2 * FreeRTOS Kernel V10.3.0
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3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /* Standard includes. */
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31 /* Scheduler includes. */
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32 #include "FreeRTOS.h"
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35 /* Critical nesting should be initialised to a non zero value so interrupts don't
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36 accidentally get enabled before the scheduler is started. */
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37 #define portINITIAL_CRITICAL_NESTING (( StackType_t ) 10)
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39 /* The PSW value assigned to tasks when they start to run for the first time. */
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40 #define portPSW (( StackType_t ) 0x00000000)
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42 /* We require the address of the pxCurrentTCB variable, but don't want to know
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43 any details of its type. */
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45 extern volatile TCB_t * volatile pxCurrentTCB;
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47 /* Keeps track of the nesting level of critical sections. */
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48 volatile StackType_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;
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49 /*-----------------------------------------------------------*/
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51 /* Sets up the timer to generate the tick interrupt. */
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52 static void prvSetupTimerInterrupt( void );
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54 /*-----------------------------------------------------------*/
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55 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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57 *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */
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59 *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */
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61 *pxTopOfStack = portPSW; /* Initial PSW value */
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63 *pxTopOfStack = ( StackType_t ) 0x20202020; /* Initial Value of R20 */
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65 *pxTopOfStack = ( StackType_t ) 0x21212121; /* Initial Value of R21 */
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67 *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R22 */
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69 *pxTopOfStack = ( StackType_t ) 0x23232323; /* Initial Value of R23 */
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71 *pxTopOfStack = ( StackType_t ) 0x24242424; /* Initial Value of R24 */
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73 #if (__DATA_MODEL__ == 0) || (__DATA_MODEL__ == 1)
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74 *pxTopOfStack = ( StackType_t ) 0x25252525; /* Initial Value of R25 */
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76 #endif /* configDATA_MODE */
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77 *pxTopOfStack = ( StackType_t ) 0x26262626; /* Initial Value of R26 */
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79 *pxTopOfStack = ( StackType_t ) 0x27272727; /* Initial Value of R27 */
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81 *pxTopOfStack = ( StackType_t ) 0x28282828; /* Initial Value of R28 */
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83 *pxTopOfStack = ( StackType_t ) 0x29292929; /* Initial Value of R29 */
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85 *pxTopOfStack = ( StackType_t ) 0x30303030; /* Initial Value of R30 */
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87 *pxTopOfStack = ( StackType_t ) 0x19191919; /* Initial Value of R19 */
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89 *pxTopOfStack = ( StackType_t ) 0x18181818; /* Initial Value of R18 */
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91 *pxTopOfStack = ( StackType_t ) 0x17171717; /* Initial Value of R17 */
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93 *pxTopOfStack = ( StackType_t ) 0x16161616; /* Initial Value of R16 */
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95 *pxTopOfStack = ( StackType_t ) 0x15151515; /* Initial Value of R15 */
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97 *pxTopOfStack = ( StackType_t ) 0x14141414; /* Initial Value of R14 */
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99 *pxTopOfStack = ( StackType_t ) 0x13131313; /* Initial Value of R13 */
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101 *pxTopOfStack = ( StackType_t ) 0x12121212; /* Initial Value of R12 */
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103 *pxTopOfStack = ( StackType_t ) 0x11111111; /* Initial Value of R11 */
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105 *pxTopOfStack = ( StackType_t ) 0x10101010; /* Initial Value of R10 */
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107 *pxTopOfStack = ( StackType_t ) 0x99999999; /* Initial Value of R09 */
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109 *pxTopOfStack = ( StackType_t ) 0x88888888; /* Initial Value of R08 */
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111 *pxTopOfStack = ( StackType_t ) 0x77777777; /* Initial Value of R07 */
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113 *pxTopOfStack = ( StackType_t ) 0x66666666; /* Initial Value of R06 */
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115 *pxTopOfStack = ( StackType_t ) 0x55555555; /* Initial Value of R05 */
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117 #if __DATA_MODEL__ == 0 || __DATA_MODEL__ == 1
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118 *pxTopOfStack = ( StackType_t ) 0x44444444; /* Initial Value of R04 */
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120 #endif /* configDATA_MODE */
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121 *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R02 */
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123 *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 is expected to hold the function parameter*/
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125 *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;
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128 * Return a pointer to the top of the stack we have generated so this can
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129 * be stored in the task control block for the task.
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131 return pxTopOfStack;
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133 /*-----------------------------------------------------------*/
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135 BaseType_t xPortStartScheduler( void )
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137 /* Setup the hardware to generate the tick. Interrupts are disabled when
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138 this function is called. */
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139 prvSetupTimerInterrupt();
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141 /* Restore the context of the first task that is going to run. */
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144 /* Should not get here as the tasks are now running! */
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147 /*-----------------------------------------------------------*/
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149 void vPortEndScheduler( void )
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151 /* It is unlikely that the V850ES/Fx3 port will get stopped. If required simply
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152 disable the tick interrupt here. */
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154 /*-----------------------------------------------------------*/
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157 * Hardware initialisation to generate the RTOS tick. This uses
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159 static void prvSetupTimerInterrupt( void )
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161 TM0CE = 0; /* TMM0 operation disable */
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162 TM0EQMK0 = 1; /* INTTM0EQ0 interrupt disable */
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163 TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */
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165 #ifdef __IAR_V850ES_Fx3__
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167 TM0CMP0 = (((configCPU_CLOCK_HZ / configTICK_RATE_HZ) / 2)-1); /* divided by 2 because peripherals only run at CPU_CLOCK/2 */
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171 TM0CMP0 = (configCPU_CLOCK_HZ / configTICK_RATE_HZ);
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177 TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */
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178 TM0EQMK0 = 0; /* INTTM0EQ0 interrupt enable */
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179 TM0CE = 1; /* TMM0 operation enable */
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181 /*-----------------------------------------------------------*/
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