]> git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/MPLAB/PIC18F/port.c
Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt
[freertos] / FreeRTOS / Source / portable / MPLAB / PIC18F / port.c
1 /*\r
2  * FreeRTOS Kernel V10.0.0\r
3  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
4  *\r
5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
6  * this software and associated documentation files (the "Software"), to deal in\r
7  * the Software without restriction, including without limitation the rights to\r
8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
10  * subject to the following conditions:\r
11  *\r
12  * The above copyright notice and this permission notice shall be included in all\r
13  * copies or substantial portions of the Software. If you wish to use our Amazon\r
14  * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
15  *\r
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
18  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
19  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
20  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
22  *\r
23  * http://www.FreeRTOS.org\r
24  * http://aws.amazon.com/freertos\r
25  *\r
26  * 1 tab == 4 spaces!\r
27  */\r
28 \r
29 /* \r
30 Changes between V1.2.4 and V1.2.5\r
31 \r
32         + Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global \r
33           interrupt flag setting.  Using the two bits defined within\r
34           portINITAL_INTERRUPT_STATE was causing the w register to get clobbered\r
35           before the test was performed.\r
36 \r
37 Changes from V1.2.5\r
38 \r
39         + Set the interrupt vector address to 0x08.  Previously it was at the\r
40           incorrect address for compatibility mode of 0x18.\r
41 \r
42 Changes from V2.1.1\r
43 \r
44         + PCLATU and PCLATH are now saved as part of the context.  This allows\r
45           function pointers to be used within tasks.  Thanks to Javier Espeche\r
46           for the enhancement. \r
47 \r
48 Changes from V2.3.1\r
49 \r
50         + TABLAT is now saved as part of the task context.\r
51         \r
52 Changes from V3.2.0\r
53 \r
54         + TBLPTRU is now initialised to zero as the MPLAB compiler expects this\r
55           value and does not write to the register.\r
56 */\r
57 \r
58 /* Scheduler include files. */\r
59 #include "FreeRTOS.h"\r
60 #include "task.h"\r
61 \r
62 /* MPLAB library include file. */\r
63 #include "timers.h"\r
64 \r
65 /*-----------------------------------------------------------\r
66  * Implementation of functions defined in portable.h for the PIC port.\r
67  *----------------------------------------------------------*/\r
68 \r
69 /* Hardware setup for tick. */\r
70 #define portTIMER_FOSC_SCALE                    ( ( uint32_t ) 4 )\r
71 \r
72 /* Initial interrupt enable state for newly created tasks.  This value is\r
73 copied into INTCON when a task switches in for the first time. */\r
74 #define portINITAL_INTERRUPT_STATE                      0xc0\r
75 \r
76 /* Just the bit within INTCON for the global interrupt flag. */\r
77 #define portGLOBAL_INTERRUPT_FLAG                       0x80\r
78 \r
79 /* Constant used for context switch macro when we require the interrupt \r
80 enable state to be unchanged when the interrupted task is switched back in. */\r
81 #define portINTERRUPTS_UNCHANGED                        0x00\r
82 \r
83 /* Some memory areas get saved as part of the task context.  These memory\r
84 area's get used by the compiler for temporary storage, especially when \r
85 performing mathematical operations, or when using 32bit data types.  This\r
86 constant defines the size of memory area which must be saved. */\r
87 #define portCOMPILER_MANAGED_MEMORY_SIZE        ( ( uint8_t ) 0x13 )\r
88 \r
89 /* We require the address of the pxCurrentTCB variable, but don't want to know\r
90 any details of its type. */\r
91 typedef void TCB_t;\r
92 extern volatile TCB_t * volatile pxCurrentTCB;\r
93 \r
94 /* IO port constants. */\r
95 #define portBIT_SET             ( ( uint8_t ) 1 )\r
96 #define portBIT_CLEAR   ( ( uint8_t ) 0 )\r
97 \r
98 /*\r
99  * The serial port ISR's are defined in serial.c, but are called from portable\r
100  * as they use the same vector as the tick ISR.\r
101  */\r
102 void vSerialTxISR( void );\r
103 void vSerialRxISR( void );\r
104 \r
105 /*\r
106  * Perform hardware setup to enable ticks.\r
107  */\r
108 static void prvSetupTimerInterrupt( void );\r
109 \r
110 /* \r
111  * ISR to maintain the tick, and perform tick context switches if the\r
112  * preemptive scheduler is being used.\r
113  */\r
114 static void prvTickISR( void );\r
115 \r
116 /*\r
117  * ISR placed on the low priority vector.  This calls the appropriate ISR for\r
118  * the actual interrupt.\r
119  */\r
120 static void prvLowInterrupt( void );\r
121 \r
122 /* \r
123  * Macro that pushes all the registers that make up the context of a task onto\r
124  * the stack, then saves the new top of stack into the TCB.\r
125  * \r
126  * If this is called from an ISR then the interrupt enable bits must have been \r
127  * set for the ISR to ever get called.  Therefore we want to save the INTCON\r
128  * register with the enable bits forced to be set - and ucForcedInterruptFlags \r
129  * must contain these bit settings.  This means the interrupts will again be\r
130  * enabled when the interrupted task is switched back in.\r
131  *\r
132  * If this is called from a manual context switch (i.e. from a call to yield),\r
133  * then we want to save the INTCON so it is restored with its current state,\r
134  * and ucForcedInterruptFlags must be 0.  This allows a yield from within\r
135  * a critical section.\r
136  *\r
137  * The compiler uses some locations at the bottom of the memory for temporary\r
138  * storage during math and other computations.  This is especially true if\r
139  * 32bit data types are utilised (as they are by the scheduler).  The .tmpdata\r
140  * and MATH_DATA sections have to be stored in there entirety as part of a task\r
141  * context.  This macro stores from data address 0x00 to \r
142  * portCOMPILER_MANAGED_MEMORY_SIZE.  This is sufficient for the demo \r
143  * applications but you should check the map file for your project to ensure \r
144  * this is sufficient for your needs.  It is not clear whether this size is \r
145  * fixed for all compilations or has the potential to be program specific.\r
146  */\r
147 #define portSAVE_CONTEXT( ucForcedInterruptFlags )                                                              \\r
148 {                                                                                                                                                               \\r
149         _asm                                                                                                                                            \\r
150                 /* Save the status and WREG registers first, as these will get modified \\r
151                 by the operations below. */                                                                                             \\r
152                 MOVFF   WREG, PREINC1                                                                                                   \\r
153                 MOVFF   STATUS, PREINC1                                                                                                 \\r
154                 /* Save the INTCON register with the appropriate bits forced if                 \\r
155                 necessary - as described above. */                                                                              \\r
156                 MOVFF   INTCON, WREG                                                                                                    \\r
157                 IORLW   ucForcedInterruptFlags                                                                                  \\r
158                 MOVFF   WREG, PREINC1                                                                                                   \\r
159         _endasm                                                                                                                                         \\r
160                                                                                                                                                                 \\r
161         portDISABLE_INTERRUPTS();                                                                                                       \\r
162                                                                                                                                                                 \\r
163         _asm                                                                                                                                            \\r
164                 /* Store the necessary registers to the stack. */                                               \\r
165                 MOVFF   BSR, PREINC1                                                                                                    \\r
166                 MOVFF   FSR2L, PREINC1                                                                                                  \\r
167                 MOVFF   FSR2H, PREINC1                                                                                                  \\r
168                 MOVFF   FSR0L, PREINC1                                                                                                  \\r
169                 MOVFF   FSR0H, PREINC1                                                                                                  \\r
170                 MOVFF   TABLAT, PREINC1                                                                                                 \\r
171                 MOVFF   TBLPTRU, PREINC1                                                                                                \\r
172                 MOVFF   TBLPTRH, PREINC1                                                                                                \\r
173                 MOVFF   TBLPTRL, PREINC1                                                                                                \\r
174                 MOVFF   PRODH, PREINC1                                                                                                  \\r
175                 MOVFF   PRODL, PREINC1                                                                                                  \\r
176                 MOVFF   PCLATU, PREINC1                                                                                                 \\r
177                 MOVFF   PCLATH, PREINC1                                                                                                 \\r
178                 /* Store the .tempdata and MATH_DATA areas as described above. */               \\r
179                 CLRF    FSR0L, 0                                                                                                                \\r
180                 CLRF    FSR0H, 0                                                                                                                \\r
181                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
182                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
183                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
184                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
185                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
186                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
187                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
188                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
189                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
190                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
191                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
192                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
193                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
194                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
195                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
196                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
197                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
198                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
199                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
200                 MOVFF   INDF0, PREINC1                                                                                                  \\r
201                 MOVFF   FSR0L, PREINC1                                                                                                  \\r
202                 MOVFF   FSR0H, PREINC1                                                                                                  \\r
203                 /* Store the hardware stack pointer in a temp register before we                \\r
204                 modify it. */                                                                                                                   \\r
205                 MOVFF   STKPTR, FSR0L                                                                                                   \\r
206         _endasm                                                                                                                                         \\r
207                                                                                                                                                                 \\r
208                 /* Store each address from the hardware stack. */                                               \\r
209                 while( STKPTR > ( uint8_t ) 0 )                                                         \\r
210                 {                                                                                                                                               \\r
211                         _asm                                                                                                                            \\r
212                                 MOVFF   TOSL, PREINC1                                                                                   \\r
213                                 MOVFF   TOSH, PREINC1                                                                                   \\r
214                                 MOVFF   TOSU, PREINC1                                                                                   \\r
215                                 POP                                                                                                                             \\r
216                         _endasm                                                                                                                         \\r
217                 }                                                                                                                                               \\r
218                                                                                                                                                                 \\r
219         _asm                                                                                                                                            \\r
220                 /* Store the number of addresses on the hardware stack (from the                \\r
221                 temporary register). */                                                                                                 \\r
222                 MOVFF   FSR0L, PREINC1                                                                                                  \\r
223                 MOVF    PREINC1, 1, 0                                                                                                   \\r
224         _endasm                                                                                                                                         \\r
225                                                                                                                                                                 \\r
226         /* Save the new top of the software stack in the TCB. */                                        \\r
227         _asm                                                                                                                                            \\r
228                 MOVFF   pxCurrentTCB, FSR0L                                                                                             \\r
229                 MOVFF   pxCurrentTCB + 1, FSR0H                                                                                 \\r
230                 MOVFF   FSR1L, POSTINC0                                                                                                 \\r
231                 MOVFF   FSR1H, POSTINC0                                                                                                 \\r
232         _endasm                                                                                                                                         \\r
233 }\r
234 /*-----------------------------------------------------------*/\r
235 \r
236 /*\r
237  * This is the reverse of portSAVE_CONTEXT.  See portSAVE_CONTEXT for more\r
238  * details.\r
239  */\r
240 #define portRESTORE_CONTEXT()                                                                                                   \\r
241 {                                                                                                                                                               \\r
242         _asm                                                                                                                                            \\r
243                 /* Set FSR0 to point to pxCurrentTCB->pxTopOfStack. */                                  \\r
244                 MOVFF   pxCurrentTCB, FSR0L                                                                                             \\r
245                 MOVFF   pxCurrentTCB + 1, FSR0H                                                                                 \\r
246                                                                                                                                                                 \\r
247                 /* De-reference FSR0 to set the address it holds into FSR1.                             \\r
248                 (i.e. *( pxCurrentTCB->pxTopOfStack ) ). */                                                             \\r
249                 MOVFF   POSTINC0, FSR1L                                                                                                 \\r
250                 MOVFF   POSTINC0, FSR1H                                                                                                 \\r
251                                                                                                                                                                 \\r
252                 /* How many return addresses are there on the hardware stack?  Discard  \\r
253                 the first byte as we are pointing to the next free space. */                    \\r
254                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
255                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
256         _endasm                                                                                                                                         \\r
257                                                                                                                                                                 \\r
258         /* Fill the hardware stack from our software stack. */                                          \\r
259         STKPTR = 0;                                                                                                                                     \\r
260                                                                                                                                                                 \\r
261         while( STKPTR < FSR0L )                                                                                                         \\r
262         {                                                                                                                                                       \\r
263                 _asm                                                                                                                                    \\r
264                         PUSH                                                                                                                            \\r
265                         MOVF    POSTDEC1, 0, 0                                                                                          \\r
266                         MOVWF   TOSU, 0                                                                                                         \\r
267                         MOVF    POSTDEC1, 0, 0                                                                                          \\r
268                         MOVWF   TOSH, 0                                                                                                         \\r
269                         MOVF    POSTDEC1, 0, 0                                                                                          \\r
270                         MOVWF   TOSL, 0                                                                                                         \\r
271                 _endasm                                                                                                                                 \\r
272         }                                                                                                                                                       \\r
273                                                                                                                                                                 \\r
274         _asm                                                                                                                                            \\r
275                 /* Restore the .tmpdata and MATH_DATA memory. */                                                \\r
276                 MOVFF   POSTDEC1, FSR0H                                                                                                 \\r
277                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
278                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
279                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
280                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
281                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
282                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
283                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
284                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
285                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
286                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
287                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
288                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
289                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
290                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
291                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
292                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
293                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
294                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
295                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
296                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
297                 MOVFF   POSTDEC1, INDF0                                                                                                 \\r
298                 /* Restore the other registers forming the tasks context. */                    \\r
299                 MOVFF   POSTDEC1, PCLATH                                                                                                \\r
300                 MOVFF   POSTDEC1, PCLATU                                                                                                \\r
301                 MOVFF   POSTDEC1, PRODL                                                                                                 \\r
302                 MOVFF   POSTDEC1, PRODH                                                                                                 \\r
303                 MOVFF   POSTDEC1, TBLPTRL                                                                                               \\r
304                 MOVFF   POSTDEC1, TBLPTRH                                                                                               \\r
305                 MOVFF   POSTDEC1, TBLPTRU                                                                                               \\r
306                 MOVFF   POSTDEC1, TABLAT                                                                                                \\r
307                 MOVFF   POSTDEC1, FSR0H                                                                                                 \\r
308                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
309                 MOVFF   POSTDEC1, FSR2H                                                                                                 \\r
310                 MOVFF   POSTDEC1, FSR2L                                                                                                 \\r
311                 MOVFF   POSTDEC1, BSR                                                                                                   \\r
312                 /* The next byte is the INTCON register.  Read this into WREG as some   \\r
313                 manipulation is required. */                                                                                    \\r
314                 MOVFF   POSTDEC1, WREG                                                                                                  \\r
315         _endasm                                                                                                                                         \\r
316                                                                                                                                                                 \\r
317         /* From the INTCON register, only the interrupt enable bits form part           \\r
318         of the tasks context.  It is perfectly legitimate for another task to           \\r
319         have modified any other bits.  We therefore only restore the top two bits.      \\r
320         */                                                                                                                                                      \\r
321         if( WREG & portGLOBAL_INTERRUPT_FLAG )                                                                          \\r
322         {                                                                                                                                                       \\r
323                 _asm                                                                                                                                    \\r
324                         MOVFF   POSTDEC1, STATUS                                                                                        \\r
325                         MOVFF   POSTDEC1, WREG                                                                                          \\r
326                         /* Return enabling interrupts. */                                                                       \\r
327                         RETFIE  0                                                                                                                       \\r
328                 _endasm                                                                                                                                 \\r
329         }                                                                                                                                                       \\r
330         else                                                                                                                                            \\r
331         {                                                                                                                                                       \\r
332                 _asm                                                                                                                                    \\r
333                         MOVFF   POSTDEC1, STATUS                                                                                        \\r
334                         MOVFF   POSTDEC1, WREG                                                                                          \\r
335                         /* Return without effecting interrupts.  The context may have           \\r
336                         been saved from a critical region. */                                                           \\r
337                         RETURN  0                                                                                                                       \\r
338                 _endasm                                                                                                                                 \\r
339         }                                                                                                                                                       \\r
340 }\r
341 /*-----------------------------------------------------------*/\r
342 \r
343 /* \r
344  * See header file for description. \r
345  */\r
346 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
347 {\r
348 uint32_t ulAddress;\r
349 uint8_t ucBlock;\r
350 \r
351         /* Place a few bytes of known values on the bottom of the stack. \r
352         This is just useful for debugging. */\r
353 \r
354         *pxTopOfStack = 0x11;\r
355         pxTopOfStack++;\r
356         *pxTopOfStack = 0x22;\r
357         pxTopOfStack++;\r
358         *pxTopOfStack = 0x33;\r
359         pxTopOfStack++;\r
360 \r
361 \r
362         /* Simulate how the stack would look after a call to vPortYield() generated\r
363         by the compiler. \r
364 \r
365         First store the function parameters.  This is where the task will expect to\r
366         find them when it starts running. */\r
367         ulAddress = ( uint32_t ) pvParameters;\r
368         *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
369         pxTopOfStack++;\r
370 \r
371         ulAddress >>= 8;\r
372         *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
373         pxTopOfStack++;\r
374 \r
375         /* Next we just leave a space.  When a context is saved the stack pointer\r
376         is incremented before it is used so as not to corrupt whatever the stack\r
377         pointer is actually pointing to.  This is especially necessary during \r
378         function epilogue code generated by the compiler. */\r
379         *pxTopOfStack = 0x44;\r
380         pxTopOfStack++;\r
381 \r
382         /* Next are all the registers that form part of the task context. */\r
383         \r
384         *pxTopOfStack = ( StackType_t ) 0x66; /* WREG. */\r
385         pxTopOfStack++;\r
386 \r
387         *pxTopOfStack = ( StackType_t ) 0xcc; /* Status. */\r
388         pxTopOfStack++;\r
389 \r
390         /* INTCON is saved with interrupts enabled. */\r
391         *pxTopOfStack = ( StackType_t ) portINITAL_INTERRUPT_STATE; /* INTCON */\r
392         pxTopOfStack++;\r
393 \r
394         *pxTopOfStack = ( StackType_t ) 0x11; /* BSR. */\r
395         pxTopOfStack++;\r
396 \r
397         *pxTopOfStack = ( StackType_t ) 0x22; /* FSR2L. */\r
398         pxTopOfStack++;\r
399 \r
400         *pxTopOfStack = ( StackType_t ) 0x33; /* FSR2H. */\r
401         pxTopOfStack++;\r
402 \r
403         *pxTopOfStack = ( StackType_t ) 0x44; /* FSR0L. */\r
404         pxTopOfStack++;\r
405 \r
406         *pxTopOfStack = ( StackType_t ) 0x55; /* FSR0H. */\r
407         pxTopOfStack++;\r
408 \r
409         *pxTopOfStack = ( StackType_t ) 0x66; /* TABLAT. */\r
410         pxTopOfStack++;\r
411 \r
412         *pxTopOfStack = ( StackType_t ) 0x00; /* TBLPTRU. */\r
413         pxTopOfStack++;\r
414 \r
415         *pxTopOfStack = ( StackType_t ) 0x88; /* TBLPTRUH. */\r
416         pxTopOfStack++;\r
417 \r
418         *pxTopOfStack = ( StackType_t ) 0x99; /* TBLPTRUL. */\r
419         pxTopOfStack++;\r
420 \r
421         *pxTopOfStack = ( StackType_t ) 0xaa; /* PRODH. */\r
422         pxTopOfStack++;\r
423 \r
424         *pxTopOfStack = ( StackType_t ) 0xbb; /* PRODL. */\r
425         pxTopOfStack++;\r
426 \r
427         *pxTopOfStack = ( StackType_t ) 0x00; /* PCLATU. */\r
428         pxTopOfStack++;\r
429 \r
430         *pxTopOfStack = ( StackType_t ) 0x00; /* PCLATH. */\r
431         pxTopOfStack++;\r
432 \r
433         /* Next the .tmpdata and MATH_DATA sections. */\r
434         for( ucBlock = 0; ucBlock <= portCOMPILER_MANAGED_MEMORY_SIZE; ucBlock++ )\r
435         {\r
436                 *pxTopOfStack = ( StackType_t ) ucBlock;\r
437                 *pxTopOfStack++;\r
438         }\r
439 \r
440         /* Store the top of the global data section. */\r
441         *pxTopOfStack = ( StackType_t ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */\r
442         pxTopOfStack++;\r
443 \r
444         *pxTopOfStack = ( StackType_t ) 0x00; /* High. */\r
445         pxTopOfStack++;\r
446 \r
447         /* The only function return address so far is the address of the \r
448         task. */\r
449         ulAddress = ( uint32_t ) pxCode;\r
450 \r
451         /* TOS low. */\r
452         *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
453         pxTopOfStack++;\r
454         ulAddress >>= 8;\r
455 \r
456         /* TOS high. */\r
457         *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
458         pxTopOfStack++;\r
459         ulAddress >>= 8;\r
460 \r
461         /* TOS even higher. */\r
462         *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
463         pxTopOfStack++;\r
464 \r
465         /* Store the number of return addresses on the hardware stack - so far only\r
466         the address of the task entry point. */\r
467         *pxTopOfStack = ( StackType_t ) 1;\r
468         pxTopOfStack++;\r
469 \r
470         return pxTopOfStack;\r
471 }\r
472 /*-----------------------------------------------------------*/\r
473 \r
474 BaseType_t xPortStartScheduler( void )\r
475 {\r
476         /* Setup a timer for the tick ISR is using the preemptive scheduler. */\r
477         prvSetupTimerInterrupt(); \r
478 \r
479         /* Restore the context of the first task to run. */\r
480         portRESTORE_CONTEXT();\r
481 \r
482         /* Should not get here.  Use the function name to stop compiler warnings. */\r
483         ( void ) prvLowInterrupt;\r
484         ( void ) prvTickISR;\r
485 \r
486         return pdTRUE;\r
487 }\r
488 /*-----------------------------------------------------------*/\r
489 \r
490 void vPortEndScheduler( void )\r
491 {\r
492         /* It is unlikely that the scheduler for the PIC port will get stopped\r
493         once running.  If required disable the tick interrupt here, then return \r
494         to xPortStartScheduler(). */\r
495 }\r
496 /*-----------------------------------------------------------*/\r
497 \r
498 /*\r
499  * Manual context switch.  This is similar to the tick context switch,\r
500  * but does not increment the tick count.  It must be identical to the\r
501  * tick context switch in how it stores the stack of a task.\r
502  */\r
503 void vPortYield( void )\r
504 {\r
505         /* This can get called with interrupts either enabled or disabled.  We\r
506         will save the INTCON register with the interrupt enable bits unmodified. */\r
507         portSAVE_CONTEXT( portINTERRUPTS_UNCHANGED );\r
508 \r
509         /* Switch to the highest priority task that is ready to run. */\r
510         vTaskSwitchContext();\r
511 \r
512         /* Start executing the task we have just switched to. */\r
513         portRESTORE_CONTEXT();\r
514 }\r
515 /*-----------------------------------------------------------*/\r
516 \r
517 /*\r
518  * Vector for ISR.  Nothing here must alter any registers!\r
519  */\r
520 #pragma code high_vector=0x08\r
521 static void prvLowInterrupt( void )\r
522 {\r
523         /* Was the interrupt the tick? */\r
524         if( PIR1bits.CCP1IF )\r
525         {               \r
526                 _asm\r
527                         goto prvTickISR\r
528                 _endasm\r
529         }\r
530 \r
531         /* Was the interrupt a byte being received? */\r
532         if( PIR1bits.RCIF )\r
533         {\r
534                 _asm\r
535                         goto vSerialRxISR\r
536                 _endasm\r
537         }\r
538 \r
539         /* Was the interrupt the Tx register becoming empty? */\r
540         if( PIR1bits.TXIF )\r
541         {\r
542                 if( PIE1bits.TXIE )\r
543                 {\r
544                         _asm\r
545                                 goto vSerialTxISR\r
546                         _endasm\r
547                 }\r
548         }\r
549 }\r
550 #pragma code\r
551 \r
552 /*-----------------------------------------------------------*/\r
553 \r
554 /*\r
555  * ISR for the tick.\r
556  * This increments the tick count and, if using the preemptive scheduler, \r
557  * performs a context switch.  This must be identical to the manual \r
558  * context switch in how it stores the context of a task. \r
559  */\r
560 static void prvTickISR( void )\r
561 {\r
562         /* Interrupts must have been enabled for the ISR to fire, so we have to \r
563         save the context with interrupts enabled. */\r
564         portSAVE_CONTEXT( portGLOBAL_INTERRUPT_FLAG );\r
565         PIR1bits.CCP1IF = 0;\r
566 \r
567         /* Maintain the tick count. */\r
568         if( xTaskIncrementTick() != pdFALSE )\r
569         {\r
570                 /* Switch to the highest priority task that is ready to run. */\r
571                 vTaskSwitchContext();\r
572         }\r
573 \r
574         portRESTORE_CONTEXT();\r
575 }\r
576 /*-----------------------------------------------------------*/\r
577 \r
578 /*\r
579  * Setup a timer for a regular tick.\r
580  */\r
581 static void prvSetupTimerInterrupt( void )\r
582 {\r
583 const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );\r
584 uint32_t ulCompareValue;\r
585 uint8_t ucByte;\r
586 \r
587         /* Interrupts are disabled when this function is called.\r
588 \r
589         Setup CCP1 to provide the tick interrupt using a compare match on timer\r
590         1.\r
591 \r
592         Clear the time count then setup timer. */\r
593         TMR1H = ( uint8_t ) 0x00;\r
594         TMR1L = ( uint8_t ) 0x00;\r
595 \r
596         /* Set the compare match value. */\r
597         ulCompareValue = ulConstCompareValue;\r
598         CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );\r
599         ulCompareValue >>= ( uint32_t ) 8;\r
600         CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );    \r
601 \r
602         CCP1CONbits.CCP1M0 = portBIT_SET;       /*< Compare match mode. */\r
603         CCP1CONbits.CCP1M1 = portBIT_SET;       /*< Compare match mode. */\r
604         CCP1CONbits.CCP1M2 = portBIT_CLEAR;     /*< Compare match mode. */\r
605         CCP1CONbits.CCP1M3 = portBIT_SET;       /*< Compare match mode. */\r
606         PIE1bits.CCP1IE = portBIT_SET;          /*< Interrupt enable. */\r
607 \r
608         /* We are only going to use the global interrupt bit, so set the peripheral\r
609         bit to true. */\r
610         INTCONbits.GIEL = portBIT_SET;\r
611 \r
612         /* Provided library function for setting up the timer that will produce the\r
613         tick. */\r
614         OpenTimer1( T1_16BIT_RW & T1_SOURCE_INT & T1_PS_1_1 & T1_CCP1_T3_CCP2 );\r
615 }\r
616 \r