2 * FreeRTOS Kernel V10.0.0
\r
3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
6 * this software and associated documentation files (the "Software"), to deal in
\r
7 * the Software without restriction, including without limitation the rights to
\r
8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
9 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
10 * subject to the following conditions:
\r
12 * The above copyright notice and this permission notice shall be included in all
\r
13 * copies or substantial portions of the Software. If you wish to use our Amazon
\r
14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
\r
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
23 * http://www.FreeRTOS.org
\r
24 * http://aws.amazon.com/freertos
\r
26 * 1 tab == 4 spaces!
\r
29 /*-----------------------------------------------------------
\r
30 * Implementation of functions defined in portable.h for the PIC32MEC14xx port.
\r
31 *----------------------------------------------------------*/
\r
33 /* Scheduler include files. */
\r
34 #include "FreeRTOS.h"
\r
37 /* Microchip includes. */
\r
39 #include <cp0defs.h>
\r
41 #if !defined(__MEC__)
\r
42 #error This port is designed to work with XC32 on MEC14xx. Please update your C compiler version or settings.
\r
45 #if( ( configMAX_SYSCALL_INTERRUPT_PRIORITY >= 0x7 ) || ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) )
\r
46 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must be less than 7 and greater than 0
\r
49 /* Bits within various registers. */
\r
50 #define portIE_BIT ( 0x00000001 )
\r
51 #define portEXL_BIT ( 0x00000002 )
\r
53 /* The EXL bit is set to ensure interrupts do not occur while the context of
\r
54 the first task is being restored. MEC14xx does not have DSP HW. */
\r
55 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT )
\r
57 /* MEC14xx RTOS Timer MMCR's. */
\r
58 #define portMMCR_RTMR_PRELOAD *((volatile uint32_t *)(0xA0007404ul))
\r
59 #define portMMCR_RTMR_CONTROL *((volatile uint32_t *)(0xA0007408ul))
\r
61 /* MEC14xx JTVIC external interrupt controller is mapped to M14K closely-coupled
\r
62 peripheral space. */
\r
63 #define portGIRQ23_RTOS_TIMER_BITPOS ( 4 )
\r
64 #define portGIRQ23_RTOS_TIMER_MASK ( 1ul << ( portGIRQ23_RTOS_TIMER_BITPOS ) )
\r
65 #define portMMCR_JTVIC_GIRQ23_SRC *((volatile uint32_t *)(0xBFFFC0F0ul))
\r
66 #define portMMCR_JTVIC_GIRQ23_SETEN *((volatile uint32_t *)(0xBFFFC0F4ul))
\r
67 #define portMMCR_JTVIC_GIRQ23_PRIA *((volatile uint32_t *)(0xBFFFC3F0ul))
\r
69 /* MIPS Software Interrupts are routed through JTVIC GIRQ24 */
\r
70 #define portGIRQ24_M14K_SOFTIRQ0_BITPOS ( 1 )
\r
71 #define portGIRQ24_M14K_SOFTIRQ0_MASK ( 1ul << ( portGIRQ24_M14K_SOFTIRQ0_BITPOS ) )
\r
72 #define portMMCR_JTVIC_GIRQ24_SRC *((volatile uint32_t *)(0xBFFFC100ul))
\r
73 #define portMMCR_JTVIC_GIRQ24_SETEN *((volatile uint32_t *)(0xBFFFC104ul))
\r
74 #define portMMCR_JTVIC_GIRQ24_PRIA *((volatile uint32_t *)(0xBFFFC400ul))
\r
77 By default port.c generates its tick interrupt from the RTOS timer. The user
\r
78 can override this behaviour by:
\r
79 1: Providing their own implementation of vApplicationSetupTickTimerInterrupt(),
\r
80 which is the function that configures the timer. The function is defined
\r
81 as a weak symbol in this file so if the same function name is used in the
\r
82 application code then the version in the application code will be linked
\r
83 into the application in preference to the version defined in this file.
\r
84 2: Provide a vector implementation in port_asm.S that overrides the default
\r
85 behaviour for the specified interrupt vector.
\r
86 3: Specify the correct bit to clear the interrupt during the timer interrupt
\r
89 #ifndef configTICK_INTERRUPT_VECTOR
\r
90 #define configTICK_INTERRUPT_VECTOR girq23_b4
\r
91 #define configCLEAR_TICK_TIMER_INTERRUPT() portMMCR_JTVIC_GIRQ23_SRC = portGIRQ23_RTOS_TIMER_MASK
\r
93 #ifndef configCLEAR_TICK_TIMER_INTERRUPT
\r
94 #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.
\r
98 /* Let the user override the pre-loading of the initial RA with the address of
\r
99 prvTaskExitError() in case it messes up unwinding of the stack in the debugger -
\r
100 in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */
\r
101 #ifdef configTASK_RETURN_ADDRESS
\r
102 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
\r
104 #define portTASK_RETURN_ADDRESS prvTaskExitError
\r
107 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
\r
108 stack checking. A problem in the ISR stack will trigger an assert, not call the
\r
109 stack overflow hook function (because the stack overflow hook is specific to a
\r
110 task stack, not the ISR stack). */
\r
111 #if( configCHECK_FOR_STACK_OVERFLOW > 2 )
\r
113 /* Don't use 0xa5 as the stack fill bytes as that is used by the kernel for
\r
114 the task stacks, and so will legitimately appear in many positions within
\r
116 #define portISR_STACK_FILL_BYTE 0xee
\r
118 static const uint8_t ucExpectedStackBytes[] = {
\r
119 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
\r
120 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
\r
121 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
\r
122 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
\r
123 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
\r
125 #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
\r
127 /* Define the function away. */
\r
128 #define portCHECK_ISR_STACK()
\r
129 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
\r
132 /*-----------------------------------------------------------*/
\r
135 * Used to catch tasks that attempt to return from their implementing function.
\r
137 static void prvTaskExitError( void );
\r
139 /*-----------------------------------------------------------*/
\r
141 /* Records the interrupt nesting depth. This is initialised to one as it is
\r
142 decremented to 0 when the first task starts. */
\r
143 volatile UBaseType_t uxInterruptNesting = 0x01;
\r
145 /* Stores the task stack pointer when a switch is made to use the system stack. */
\r
146 UBaseType_t uxSavedTaskStackPointer = 0;
\r
148 /* The stack used by interrupt service routines that cause a context switch. */
\r
149 StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
\r
151 /* The top of stack value ensures there is enough space to store 6 registers on
\r
152 the callers stack, as some functions seem to want to do this. */
\r
153 const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
\r
155 /*-----------------------------------------------------------*/
\r
158 * See header file for description.
\r
160 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
\r
162 /* Ensure byte alignment is maintained when leaving this function. */
\r
165 *pxTopOfStack = (StackType_t) 0xDEADBEEF;
\r
168 *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
\r
171 *pxTopOfStack = (StackType_t) ulPortGetCP0Cause();
\r
174 *pxTopOfStack = (StackType_t) portINITIAL_SR; /* CP0_STATUS */
\r
177 *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
\r
180 *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
\r
181 pxTopOfStack -= 15;
\r
183 *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
\r
184 pxTopOfStack -= 15;
\r
186 return pxTopOfStack;
\r
188 /*-----------------------------------------------------------*/
\r
190 static __inline uint32_t prvDisableInterrupt( void )
\r
192 uint32_t prev_state;
\r
194 __asm volatile( "di %0; ehb" : "=r" ( prev_state ) :: "memory" );
\r
197 /*-----------------------------------------------------------*/
\r
199 static void prvTaskExitError( void )
\r
201 /* A function that implements a task must not exit or attempt to return to
\r
202 its caller as there is nothing to return to. If a task wants to exit it
\r
203 should instead call vTaskDelete( NULL ).
\r
205 Artificially force an assert() to be triggered if configASSERT() is
\r
206 defined, then stop here so application writers can catch the error. */
\r
207 configASSERT( uxSavedTaskStackPointer == 0UL );
\r
208 portDISABLE_INTERRUPTS();
\r
211 /*-----------------------------------------------------------*/
\r
214 * Setup a timer for a regular tick. This function uses the RTOS timer.
\r
215 * The function is declared weak so an application writer can use a different
\r
216 * timer by redefining this implementation. If a different timer is used then
\r
217 * configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to
\r
218 * ensure the RTOS provided tick interrupt handler is installed on the correct
\r
221 __attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
\r
223 /* MEC14xx RTOS Timer whose input clock is 32KHz. */
\r
224 const uint32_t ulPreload = ( 32768ul / ( configTICK_RATE_HZ ) );
\r
226 configASSERT( ulPreload != 0UL );
\r
228 /* Configure the RTOS timer. */
\r
229 portMMCR_RTMR_CONTROL = 0ul;
\r
230 portMMCR_RTMR_PRELOAD = ulPreload;
\r
232 /* Configure interrupts from the RTOS timer. */
\r
233 portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK );
\r
234 portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 16 );
\r
235 portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) ) << 16 );
\r
236 portMMCR_JTVIC_GIRQ23_SETEN = ( portGIRQ23_RTOS_TIMER_MASK );
\r
238 /* Enable the RTOS timer. */
\r
239 portMMCR_RTMR_CONTROL = 0x0Fu;
\r
241 /*-----------------------------------------------------------*/
\r
243 void vPortEndScheduler(void)
\r
245 /* Not implemented in ports where there is nothing to return to.
\r
246 Artificially force an assert. */
\r
247 configASSERT( uxInterruptNesting == 1000UL );
\r
249 /*-----------------------------------------------------------*/
\r
251 BaseType_t xPortStartScheduler( void )
\r
253 extern void vPortStartFirstTask( void );
\r
254 extern void *pxCurrentTCB;
\r
256 #if ( configCHECK_FOR_STACK_OVERFLOW > 2 )
\r
258 /* Fill the ISR stack to make it easy to asses how much is being used. */
\r
259 memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
\r
261 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
\r
263 /* Clear the software interrupt flag. */
\r
264 portMMCR_JTVIC_GIRQ24_SRC = (portGIRQ24_M14K_SOFTIRQ0_MASK);
\r
266 /* Set software timer priority. Each GIRQn has one nibble containing its
\r
268 portMMCR_JTVIC_GIRQ24_PRIA &= ~(0xF0ul);
\r
269 portMMCR_JTVIC_GIRQ24_PRIA |= ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) << 4 );
\r
271 /* Enable software interrupt. */
\r
272 portMMCR_JTVIC_GIRQ24_SETEN = ( portGIRQ24_M14K_SOFTIRQ0_MASK );
\r
274 /* Setup the timer to generate the tick. Interrupts will have been disabled
\r
275 by the time we get here. */
\r
276 vApplicationSetupTickTimerInterrupt();
\r
278 /* Start the highest priority task that has been created so far. Its stack
\r
279 location is loaded into uxSavedTaskStackPointer. */
\r
280 uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
\r
281 vPortStartFirstTask();
\r
283 /* Should never get here as the tasks will now be executing! Call the task
\r
284 exit error function to prevent compiler warnings about a static function
\r
285 not being called in the case that the application writer overrides this
\r
286 functionality by defining configTASK_RETURN_ADDRESS. */
\r
287 prvTaskExitError();
\r
291 /*-----------------------------------------------------------*/
\r
293 void vPortIncrementTick( void )
\r
295 UBaseType_t uxSavedStatus;
\r
298 uxSavedStatus = uxPortSetInterruptMaskFromISR();
\r
300 if( xTaskIncrementTick() != pdFALSE )
\r
302 /* Pend a context switch. */
\r
303 ulCause = ulPortGetCP0Cause();
\r
304 ulCause |= ( 1ul << 8UL );
\r
305 vPortSetCP0Cause( ulCause );
\r
308 vPortClearInterruptMaskFromISR( uxSavedStatus );
\r
310 /* Look for the ISR stack getting near or past its limit. */
\r
311 portCHECK_ISR_STACK();
\r
313 /* Clear timer interrupt. */
\r
314 configCLEAR_TICK_TIMER_INTERRUPT();
\r
316 /*-----------------------------------------------------------*/
\r
318 UBaseType_t uxPortSetInterruptMaskFromISR( void )
\r
320 UBaseType_t uxSavedStatusRegister;
\r
322 prvDisableInterrupt();
\r
323 uxSavedStatusRegister = ulPortGetCP0Status() | 0x01;
\r
325 /* This clears the IPL bits, then sets them to
\r
326 configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
\r
327 from an interrupt that has a priority above
\r
328 configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
\r
329 can only result in the IPL being unchanged or raised, and therefore never
\r
331 vPortSetCP0Status( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
\r
333 return uxSavedStatusRegister;
\r
335 /*-----------------------------------------------------------*/
\r
337 void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
\r
339 vPortSetCP0Status( uxSavedStatusRegister );
\r
341 /*-----------------------------------------------------------*/
\r