2 FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the PIC32MX port.
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68 *----------------------------------------------------------*/
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71 #error This port is designed to work with XC32. Please update your C compiler version.
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74 /* Scheduler include files. */
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75 #include "FreeRTOS.h"
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78 /* Hardware specifics. */
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79 #define portTIMER_PRESCALE 8
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80 #define portPRESCALE_BITS 1
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82 /* Bits within various registers. */
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83 #define portIE_BIT ( 0x00000001 )
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84 #define portEXL_BIT ( 0x00000002 )
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86 /* Bits within the CAUSE register. */
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87 #define portCORE_SW_0 ( 0x00000100 )
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88 #define portCORE_SW_1 ( 0x00000200 )
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90 /* The EXL bit is set to ensure interrupts do not occur while the context of
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91 the first task is being restored. */
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92 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT )
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94 #ifndef configTICK_INTERRUPT_VECTOR
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95 #define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR
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98 /* Records the interrupt nesting depth. This starts at one as it will be
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99 decremented to 0 when the first task starts. */
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100 volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;
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102 /* Stores the task stack pointer when a switch is made to use the system stack. */
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103 unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;
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105 /* The stack used by interrupt service routines that cause a context switch. */
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106 portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
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108 /* The top of stack value ensures there is enough space to store 6 registers on
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109 the callers stack, as some functions seem to want to do this. */
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110 const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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113 * Place the prototype here to ensure the interrupt vector is correctly installed.
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114 * Note that because the interrupt is written in assembly, the IPL setting in the
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115 * following line of code has no effect. The interrupt priority is set by the
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116 * call to ConfigIntTimer1() in vApplicationSetupTickTimerInterrupt().
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118 extern void __attribute__( (interrupt(ipl1), vector( configTICK_INTERRUPT_VECTOR ))) vPortTickInterruptHandler( void );
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121 * The software interrupt handler that performs the yield. Note that, because
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122 * the interrupt is written in assembly, the IPL setting in the following line of
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123 * code has no effect. The interrupt priority is set by the call to
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124 * mConfigIntCoreSW0() in xPortStartScheduler().
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126 void __attribute__( (interrupt(ipl1), vector(_CORE_SOFTWARE_0_VECTOR))) vPortYieldISR( void );
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128 /*-----------------------------------------------------------*/
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131 * See header file for description.
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133 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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135 /* Ensure byte alignment is maintained when leaving this function. */
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138 *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;
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141 *pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
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144 *pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();
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147 *pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR; /* CP0_STATUS */
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150 *pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */
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153 *pxTopOfStack = (portSTACK_TYPE) NULL; /* ra */
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154 pxTopOfStack -= 15;
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156 *pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in */
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157 pxTopOfStack -= 14;
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159 *pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* critical nesting level - no longer used. */
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162 return pxTopOfStack;
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164 /*-----------------------------------------------------------*/
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167 * Setup a timer for a regular tick. This function uses peripheral timer 1.
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168 * The function is declared weak so an application writer can use a different
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169 * timer by redefining this implementation. If a different timer is used then
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170 * configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to
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171 * ensure the RTOS provided tick interrupt handler is installed on the correct
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172 * vector number. When Timer 1 is used the vector number is defined as
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175 __attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
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177 const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;
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180 T1CONbits.TCKPS = portPRESCALE_BITS;
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181 PR1 = ulCompareMatch;
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182 IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
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184 /* Clear the interrupt as a starting condition. */
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187 /* Enable the interrupt. */
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190 /* Start the timer. */
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193 /*-----------------------------------------------------------*/
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195 void vPortEndScheduler(void)
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197 /* It is unlikely that the scheduler for the PIC port will get stopped
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198 once running. If required disable the tick interrupt here, then return
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199 to xPortStartScheduler(). */
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202 /*-----------------------------------------------------------*/
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204 portBASE_TYPE xPortStartScheduler( void )
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206 extern void vPortStartFirstTask( void );
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207 extern void *pxCurrentTCB;
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209 /* Clear the software interrupt flag. */
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210 IFS0CLR = _IFS0_CS0IF_MASK;
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212 /* Set software timer priority. */
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213 IPC0CLR = _IPC0_CS0IP_MASK;
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214 IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );
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216 /* Enable software interrupt. */
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217 IEC0CLR = _IEC0_CS0IE_MASK;
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218 IEC0SET = 1 << _IEC0_CS0IE_POSITION;
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220 /* Setup the timer to generate the tick. Interrupts will have been
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221 disabled by the time we get here. */
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222 vApplicationSetupTickTimerInterrupt();
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224 /* Kick off the highest priority task that has been created so far.
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225 Its stack location is loaded into uxSavedTaskStackPointer. */
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226 uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;
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227 vPortStartFirstTask();
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229 /* Should never get here as the tasks will now be executing. */
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232 /*-----------------------------------------------------------*/
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234 void vPortIncrementTick( void )
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236 unsigned portBASE_TYPE uxSavedStatus;
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238 uxSavedStatus = uxPortSetInterruptMaskFromISR();
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240 if( xTaskIncrementTick() != pdFALSE )
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242 /* Pend a context switch. */
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243 _CP0_BIS_CAUSE( portCORE_SW_0 );
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246 vPortClearInterruptMaskFromISR( uxSavedStatus );
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248 /* Clear timer 1 interrupt. */
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249 IFS0CLR = _IFS0_T1IF_MASK;
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251 /*-----------------------------------------------------------*/
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253 unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )
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255 unsigned portBASE_TYPE uxSavedStatusRegister;
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257 asm volatile ( "di" );
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258 uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
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259 /* This clears the IPL bits, then sets them to
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260 configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
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261 from an interrupt that has a priority above
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262 configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
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263 can only result in the IPL being unchanged or raised, and therefore never
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265 _CP0_SET_STATUS( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
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267 return uxSavedStatusRegister;
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269 /*-----------------------------------------------------------*/
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271 void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )
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273 _CP0_SET_STATUS( uxSavedStatusRegister );
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275 /*-----------------------------------------------------------*/
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