2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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97 #include <sys/asm.h>
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98 #include "ISR_Support.h"
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104 .extern pxCurrentTCB
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105 .extern vTaskSwitchContext
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106 .extern vPortIncrementTick
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107 .extern xISRStackTop
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109 .global vPortStartFirstTask
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110 .global vPortYieldISR
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111 .global vPortTickInterruptHandler
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114 /******************************************************************/
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118 .ent vPortTickInterruptHandler
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120 vPortTickInterruptHandler:
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124 jal vPortIncrementTick
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127 portRESTORE_CONTEXT
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129 .end vPortTickInterruptHandler
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131 /******************************************************************/
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135 .ent vPortStartFirstTask
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137 vPortStartFirstTask:
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139 /* Simply restore the context of the highest priority task that has been
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141 portRESTORE_CONTEXT
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143 .end vPortStartFirstTask
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147 /*******************************************************************/
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155 /* Make room for the context. First save the current status so it can be
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157 addiu sp, sp, -portCONTEXT_SIZE
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158 mfc0 k1, _CP0_STATUS
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160 /* Also save s6 and s5 so they can be used. Any nesting interrupts should
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161 maintain the values of these registers across the ISR. */
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164 sw k1, portSTATUS_STACK_LOCATION(sp)
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166 /* Prepare to re-enabled interrupt above the kernel priority. */
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167 ins k1, zero, 10, 6
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168 ori k1, k1, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 )
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171 /* s5 is used as the frame pointer. */
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174 /* Swap to the system stack. This is not conditional on the nesting
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175 count as this interrupt is always the lowest priority and therefore
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176 the nesting is always 0. */
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177 la sp, xISRStackTop
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180 /* Set the nesting count. */
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181 la k0, uxInterruptNesting
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185 /* s6 holds the EPC value, this is saved with the rest of the context
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186 after interrupts are enabled. */
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189 /* Re-enable interrupts above configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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190 mtc0 k1, _CP0_STATUS
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192 /* Save the context into the space just created. s6 is saved again
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193 here as it now contains the EPC value. */
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213 sw s6, portEPC_STACK_LOCATION(s5)
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214 /* s5 and s6 has already been saved. */
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222 /* s7 is used as a scratch register as this should always be saved across
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223 nesting interrupts. */
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229 /* Save the stack pointer to the task. */
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230 la s7, pxCurrentTCB
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234 /* Set the interrupt mask to the max priority that can use the API. The
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235 yield handler will only be called at configKERNEL_INTERRUPT_PRIORITY which
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236 is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only ever
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237 raise the IPL value and never lower it. */
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240 mfc0 s7, _CP0_STATUS
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241 ins s7, zero, 10, 6
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242 ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1
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244 /* This mtc0 re-enables interrupts, but only above
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245 configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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246 mtc0 s6, _CP0_STATUS
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249 /* Clear the software interrupt in the core. */
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250 mfc0 s6, _CP0_CAUSE
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252 mtc0 s6, _CP0_CAUSE
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255 /* Clear the interrupt in the interrupt controller. */
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260 jal vTaskSwitchContext
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263 /* Clear the interrupt mask again. The saved status value is still in s7. */
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264 mtc0 s7, _CP0_STATUS
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267 /* Restore the stack pointer from the TCB. */
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268 la s0, pxCurrentTCB
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272 /* Restore the rest of the context. */
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283 /* s5 is loaded later. */
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305 /* Protect access to the k registers, and others. */
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309 /* Set nesting back to zero. As the lowest priority interrupt this
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310 interrupt cannot have nested. */
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311 la k0, uxInterruptNesting
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314 /* Switch back to use the real stack pointer. */
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317 /* Restore the real s5 value. */
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320 /* Pop the status and epc values. */
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321 lw k1, portSTATUS_STACK_LOCATION(sp)
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322 lw k0, portEPC_STACK_LOCATION(sp)
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324 /* Remove stack frame. */
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325 addiu sp, sp, portCONTEXT_SIZE
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327 mtc0 k1, _CP0_STATUS
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