2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /*-----------------------------------------------------------
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30 * Implementation of functions defined in portable.h for the PIC32MZ port.
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31 *----------------------------------------------------------*/
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33 /* Microchip specific headers. */
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36 /* Standard headers. */
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39 /* Scheduler include files. */
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40 #include "FreeRTOS.h"
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43 #if !defined(__PIC32MZ__)
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44 #error This port is designed to work with XC32 on PIC32MZ MCUs. Please update your C compiler version or settings.
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47 #if( ( configMAX_SYSCALL_INTERRUPT_PRIORITY >= 0x7 ) || ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) )
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48 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must be less than 7 and greater than 0
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51 /* Hardware specifics. */
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52 #define portTIMER_PRESCALE 8
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53 #define portPRESCALE_BITS 1
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55 /* Bits within various registers. */
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56 #define portIE_BIT ( 0x00000001 )
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57 #define portEXL_BIT ( 0x00000002 )
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58 #define portMX_BIT ( 0x01000000 ) /* Allow access to DSP instructions. */
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59 #define portCU1_BIT ( 0x20000000 ) /* enable CP1 for parts with hardware. */
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60 #define portFR_BIT ( 0x04000000 ) /* Enable 64 bit floating point registers. */
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62 /* Bits within the CAUSE register. */
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63 #define portCORE_SW_0 ( 0x00000100 )
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64 #define portCORE_SW_1 ( 0x00000200 )
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66 /* The EXL bit is set to ensure interrupts do not occur while the context of
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67 the first task is being restored. */
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68 #if ( __mips_hard_float == 1 )
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69 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT | portFR_BIT | portCU1_BIT )
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71 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT )
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74 /* The initial value to store into the FPU status and control register. This is
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75 only used on parts that support a hardware FPU. */
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76 #define portINITIAL_FPSCR (0x1000000) /* High perf on denormal ops */
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80 By default port.c generates its tick interrupt from TIMER1. The user can
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81 override this behaviour by:
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82 1: Providing their own implementation of vApplicationSetupTickTimerInterrupt(),
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83 which is the function that configures the timer. The function is defined
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84 as a weak symbol in this file so if the same function name is used in the
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85 application code then the version in the application code will be linked
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86 into the application in preference to the version defined in this file.
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87 2: Define configTICK_INTERRUPT_VECTOR to the vector number of the timer used
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88 to generate the tick interrupt. For example, when timer 1 is used then
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89 configTICK_INTERRUPT_VECTOR is set to _TIMER_1_VECTOR.
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90 configTICK_INTERRUPT_VECTOR should be defined in FreeRTOSConfig.h.
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91 3: Define configCLEAR_TICK_TIMER_INTERRUPT() to clear the interrupt in the
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92 timer used to generate the tick interrupt. For example, when timer 1 is
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93 used configCLEAR_TICK_TIMER_INTERRUPT() is defined to
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94 IFS0CLR = _IFS0_T1IF_MASK.
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96 #ifndef configTICK_INTERRUPT_VECTOR
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97 #define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR
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98 #define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK
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100 #ifndef configCLEAR_TICK_TIMER_INTERRUPT
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101 #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.
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105 /* Let the user override the pre-loading of the initial RA with the address of
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106 prvTaskExitError() in case it messes up unwinding of the stack in the
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107 debugger - in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */
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108 #ifdef configTASK_RETURN_ADDRESS
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109 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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111 #define portTASK_RETURN_ADDRESS prvTaskExitError
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114 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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115 stack checking. A problem in the ISR stack will trigger an assert, not call the
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116 stack overflow hook function (because the stack overflow hook is specific to a
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117 task stack, not the ISR stack). */
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118 #if( configCHECK_FOR_STACK_OVERFLOW > 2 )
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120 /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for
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121 the task stacks, and so will legitimately appear in many positions within
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123 #define portISR_STACK_FILL_BYTE 0xee
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125 static const uint8_t ucExpectedStackBytes[] = {
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126 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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127 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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128 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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129 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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130 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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132 #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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134 /* Define the function away. */
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135 #define portCHECK_ISR_STACK()
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136 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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138 /*-----------------------------------------------------------*/
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141 * Used to catch tasks that attempt to return from their implementing function.
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143 static void prvTaskExitError( void );
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145 /*-----------------------------------------------------------*/
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147 /* Records the interrupt nesting depth. This is initialised to one as it is
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148 decremented to 0 when the first task starts. */
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149 volatile UBaseType_t uxInterruptNesting = 0x01;
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151 /* Stores the task stack pointer when a switch is made to use the system stack. */
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152 UBaseType_t uxSavedTaskStackPointer = 0;
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154 /* The stack used by interrupt service routines that cause a context switch. */
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155 __attribute__ ((aligned(8))) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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157 /* The top of stack value ensures there is enough space to store 6 registers on
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158 the callers stack, as some functions seem to want to do this. 8 byte alignment
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159 is required to allow double word floating point stack pushes generated by the
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161 const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );
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163 /* Saved as part of the task context. Set to pdFALSE if the task does not
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164 require an FPU context. */
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165 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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166 uint32_t ulTaskHasFPUContext = 0;
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169 /*-----------------------------------------------------------*/
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172 * See header file for description.
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174 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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176 /* Ensure 8 byte alignment is maintained when leaving this function. */
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180 *pxTopOfStack = (StackType_t) 0xDEADBEEF;
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183 *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
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186 *pxTopOfStack = (StackType_t) _CP0_GET_CAUSE();
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189 *pxTopOfStack = (StackType_t) portINITIAL_SR;/* CP0_STATUS */
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192 *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
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195 *pxTopOfStack = (StackType_t) 0x00000000; /* DSPControl */
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196 pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */
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198 *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
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199 pxTopOfStack -= 15;
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201 *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
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202 pxTopOfStack -= 15;
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204 *pxTopOfStack = (StackType_t) pdFALSE; /*by default disable FPU context save on parts with FPU */
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206 return pxTopOfStack;
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208 /*-----------------------------------------------------------*/
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210 static void prvTaskExitError( void )
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212 /* A function that implements a task must not exit or attempt to return to
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213 its caller as there is nothing to return to. If a task wants to exit it
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214 should instead call vTaskDelete( NULL ).
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216 Artificially force an assert() to be triggered if configASSERT() is
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217 defined, then stop here so application writers can catch the error. */
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218 configASSERT( uxSavedTaskStackPointer == 0UL );
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219 portDISABLE_INTERRUPTS();
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222 /*-----------------------------------------------------------*/
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225 * Setup a timer for a regular tick. This function uses peripheral timer 1.
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226 * The function is declared weak so an application writer can use a different
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227 * timer by redefining this implementation. If a different timer is used then
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228 * configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to
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229 * ensure the RTOS provided tick interrupt handler is installed on the correct
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230 * vector number. When Timer 1 is used the vector number is defined as
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233 __attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
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235 const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1UL;
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238 T1CONbits.TCKPS = portPRESCALE_BITS;
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239 PR1 = ulCompareMatch;
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240 IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
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242 /* Clear the interrupt as a starting condition. */
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245 /* Enable the interrupt. */
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248 /* Start the timer. */
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251 /*-----------------------------------------------------------*/
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253 void vPortEndScheduler(void)
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255 /* Not implemented in ports where there is nothing to return to.
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256 Artificially force an assert. */
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257 configASSERT( uxInterruptNesting == 1000UL );
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259 /*-----------------------------------------------------------*/
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261 BaseType_t xPortStartScheduler( void )
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263 extern void vPortStartFirstTask( void );
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264 extern void *pxCurrentTCB;
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266 #if ( configCHECK_FOR_STACK_OVERFLOW > 2 )
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268 /* Fill the ISR stack to make it easy to asses how much is being used. */
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269 memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
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271 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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273 /* Clear the software interrupt flag. */
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274 IFS0CLR = _IFS0_CS0IF_MASK;
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276 /* Set software timer priority. */
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277 IPC0CLR = _IPC0_CS0IP_MASK;
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278 IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );
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280 /* Enable software interrupt. */
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281 IEC0CLR = _IEC0_CS0IE_MASK;
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282 IEC0SET = 1 << _IEC0_CS0IE_POSITION;
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284 /* Setup the timer to generate the tick. Interrupts will have been
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285 disabled by the time we get here. */
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286 vApplicationSetupTickTimerInterrupt();
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288 /* Kick off the highest priority task that has been created so far.
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289 Its stack location is loaded into uxSavedTaskStackPointer. */
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290 uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
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291 vPortStartFirstTask();
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293 /* Should never get here as the tasks will now be executing! Call the task
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294 exit error function to prevent compiler warnings about a static function
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295 not being called in the case that the application writer overrides this
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296 functionality by defining configTASK_RETURN_ADDRESS. */
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297 prvTaskExitError();
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301 /*-----------------------------------------------------------*/
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303 void vPortIncrementTick( void )
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305 UBaseType_t uxSavedStatus;
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307 uxSavedStatus = uxPortSetInterruptMaskFromISR();
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309 if( xTaskIncrementTick() != pdFALSE )
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311 /* Pend a context switch. */
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312 _CP0_BIS_CAUSE( portCORE_SW_0 );
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315 vPortClearInterruptMaskFromISR( uxSavedStatus );
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317 /* Look for the ISR stack getting near or past its limit. */
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318 portCHECK_ISR_STACK();
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320 /* Clear timer interrupt. */
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321 configCLEAR_TICK_TIMER_INTERRUPT();
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323 /*-----------------------------------------------------------*/
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325 UBaseType_t uxPortSetInterruptMaskFromISR( void )
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327 UBaseType_t uxSavedStatusRegister;
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329 __builtin_disable_interrupts();
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330 uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
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331 /* This clears the IPL bits, then sets them to
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332 configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
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333 from an interrupt that has a priority above
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334 configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
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335 can only result in the IPL being unchanged or raised, and therefore never
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337 _CP0_SET_STATUS( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
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339 return uxSavedStatusRegister;
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341 /*-----------------------------------------------------------*/
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343 void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
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345 _CP0_SET_STATUS( uxSavedStatusRegister );
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347 /*-----------------------------------------------------------*/
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349 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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351 void vPortTaskUsesFPU(void)
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353 extern void vPortInitialiseFPSCR( uint32_t uxFPSCRInit );
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355 portENTER_CRITICAL();
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357 /* Initialise the floating point status register. */
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358 vPortInitialiseFPSCR(portINITIAL_FPSCR);
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360 /* A task is registering the fact that it needs a FPU context. Set the
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361 FPU flag (saved as part of the task context). */
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362 ulTaskHasFPUContext = pdTRUE;
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364 portEXIT_CRITICAL();
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367 #endif /* __mips_hard_float == 1 */
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369 /*-----------------------------------------------------------*/
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