git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/MPLAB/PIC32MZ/portmacro.h

   1 /*\r
   2     FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
  12 \r
  13     ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18     ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
  27      *    FreeRTOS provides completely free yet professionally developed,    *\r
  28      *    robust, strictly quality controlled, supported, and cross          *\r
  29      *    platform software that is more than just the market leader, it     *\r
  30      *    is the industry's de facto standard.                               *\r
  31      *                                                                       *\r
  32      *    Help yourself get started quickly while simultaneously helping     *\r
  33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
  34      *    tutorial book, reference manual, or both:                          *\r
  35      *    http://www.FreeRTOS.org/Documentation                              *\r
  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41     defined configASSERT()?\r
  42 \r
  43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
  44     embedded software for free we request you assist our global community by\r
  45     participating in the support forum.\r
  46 \r
  47     http://www.FreeRTOS.org/training - Investing in training allows your team to\r
  48     be as productive as possible as early as possible.  Now you can receive\r
  49     FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
  50     Ltd, and the world's leading authority on the world's leading RTOS.\r
  51 \r
  52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  55 \r
  56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
  57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
  58 \r
  59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
  60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  61     licenses offer ticketed support, indemnification and commercial middleware.\r
  62 \r
  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  64     engineered and independently SIL3 certified version for use in safety and\r
  65     mission critical applications that require provable dependability.\r
  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 #ifndef PORTMACRO_H\r
  71 #define PORTMACRO_H\r
  72 \r
  73 /* System include files */\r
  74 #include <xc.h>\r
  75 \r
  76 #ifdef __cplusplus\r
  77 extern "C" {\r
  78 #endif\r
  79 \r
  80 /*-----------------------------------------------------------\r
  81  * Port specific definitions.\r
  82  *\r
  83  * The settings in this file configure FreeRTOS correctly for the\r
  84  * given hardware and compiler.\r
  85  *\r
  86  * These settings should not be altered.\r
  87  *-----------------------------------------------------------\r
  88  */\r
  89 \r
  90 /* Type definitions. */\r
  91 #define portCHAR                char\r
  92 #define portFLOAT               float\r
  93 #define portDOUBLE              double\r
  94 #define portLONG                long\r
  95 #define portSHORT               short\r
  96 #define portSTACK_TYPE  uint32_t\r
  97 #define portBASE_TYPE   long\r
  98 \r
  99 typedef portSTACK_TYPE StackType_t;\r
 100 typedef long BaseType_t;\r
 101 typedef unsigned long UBaseType_t;\r
 102 \r
 103 #if( configUSE_16_BIT_TICKS == 1 )\r
 104         typedef uint16_t TickType_t;\r
 105         #define portMAX_DELAY ( TickType_t ) 0xffff\r
 106 #else\r
 107         typedef uint32_t TickType_t;\r
 108         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 109 \r
 110         /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
 111         not need to be guarded with a critical section. */\r
 112         #define portTICK_TYPE_IS_ATOMIC 1\r
 113 #endif\r
 114 /*-----------------------------------------------------------*/\r
 115 \r
 116 /* Hardware specifics. */\r
 117 #define portBYTE_ALIGNMENT                      8\r
 118 #define portSTACK_GROWTH                        -1\r
 119 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 120 /*-----------------------------------------------------------*/\r
 121 \r
 122 /* Critical section management. */\r
 123 #define portIPL_SHIFT                           ( 10UL )\r
 124 /* Don't straddle the CEE bit.  Interrupts calling FreeRTOS functions should\r
 125 never have higher IPL bits set anyway. */\r
 126 #define portALL_IPL_BITS                        ( 0x7FUL << portIPL_SHIFT )\r
 127 #define portSW0_BIT                                     ( 0x01 << 8 )\r
 128 \r
 129 /* This clears the IPL bits, then sets them to\r
 130 configMAX_SYSCALL_INTERRUPT_PRIORITY.  An extra check is performed if\r
 131 configASSERT() is defined to ensure an assertion handler does not inadvertently\r
 132 attempt to lower the IPL when the call to assert was triggered because the IPL\r
 133 value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR\r
 134 safe FreeRTOS API function was executed.  ISR safe FreeRTOS API functions are\r
 135 those that end in FromISR.  FreeRTOS maintains a separate interrupt API to\r
 136 ensure API function and interrupt entry is as fast and as simple as possible. */\r
 137 #ifdef configASSERT\r
 138         #define portDISABLE_INTERRUPTS()                                                                                        \\r
 139         {                                                                                                                                                       \\r
 140         uint32_t ulStatus;                                                                                                                      \\r
 141                                                                                                                                                                 \\r
 142                 /* Mask interrupts at and below the kernel interrupt priority. */               \\r
 143                 ulStatus = _CP0_GET_STATUS();                                                                                   \\r
 144                                                                                                                                                                 \\r
 145                 /* Is the current IPL below configMAX_SYSCALL_INTERRUPT_PRIORITY? */    \\r
 146                 if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY ) \\r
 147                 {                                                                                                                                               \\r
 148                         ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
 149                         _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
 150                 }                                                                                                                                               \\r
 151         }\r
 152 #else /* configASSERT */\r
 153         #define portDISABLE_INTERRUPTS()                                                                                \\r
 154         {                                                                                                                                               \\r
 155         uint32_t ulStatus;                                                                                                              \\r
 156                                                                                                                                                         \\r
 157                 /* Mask interrupts at and below the kernel interrupt priority. */       \\r
 158                 ulStatus = _CP0_GET_STATUS();                                                                           \\r
 159                 ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
 160                 _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
 161         }\r
 162 #endif /* configASSERT */\r
 163 \r
 164 #define portENABLE_INTERRUPTS()                                                                                 \\r
 165 {                                                                                                                                               \\r
 166 uint32_t ulStatus;                                                                                                              \\r
 167                                                                                                                                                 \\r
 168         /* Unmask all interrupts. */                                                                            \\r
 169         ulStatus = _CP0_GET_STATUS();                                                                           \\r
 170         ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
 171         _CP0_SET_STATUS( ulStatus );                                                                            \\r
 172 }\r
 173 \r
 174 \r
 175 extern void vTaskEnterCritical( void );\r
 176 extern void vTaskExitCritical( void );\r
 177 #define portCRITICAL_NESTING_IN_TCB     1\r
 178 #define portENTER_CRITICAL()            vTaskEnterCritical()\r
 179 #define portEXIT_CRITICAL()                     vTaskExitCritical()\r
 180 \r
 181 extern UBaseType_t uxPortSetInterruptMaskFromISR();\r
 182 extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
 183 #define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
 184 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
 185 \r
 186 #if ( __mips_hard_float == 0 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )\r
 187     #error configUSE_TASK_FPU_SUPPORT can only be set to 1 when the part supports a hardware FPU module.\r
 188 #endif\r
 189 \r
 190 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )\r
 191     void vPortTaskUsesFPU( void );\r
 192         #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
 193 #endif\r
 194 \r
 195 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
 196         #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
 197 #endif\r
 198 \r
 199 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
 200 \r
 201         /* Check the configuration. */\r
 202         #if( configMAX_PRIORITIES > 32 )\r
 203                 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
 204         #endif\r
 205 \r
 206         /* Store/clear the ready priorities in a bit map. */\r
 207         #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
 208         #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
 209 \r
 210         /*-----------------------------------------------------------*/\r
 211 \r
 212         #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )\r
 213 \r
 214 #endif /* taskRECORD_READY_PRIORITY */\r
 215 \r
 216 /*-----------------------------------------------------------*/\r
 217 \r
 218 /* Task utilities. */\r
 219 \r
 220 #define portYIELD()                                                             \\r
 221 {                                                                                               \\r
 222 uint32_t ulCause;                                                               \\r
 223                                                                                                 \\r
 224         /* Trigger software interrupt. */                       \\r
 225         ulCause = _CP0_GET_CAUSE();                                     \\r
 226         ulCause |= portSW0_BIT;                                         \\r
 227         _CP0_SET_CAUSE( ulCause );                                      \\r
 228 }\r
 229 \r
 230 extern volatile UBaseType_t uxInterruptNesting;\r
 231 #define portASSERT_IF_IN_ISR() configASSERT( uxInterruptNesting == 0 )\r
 232 \r
 233 #define portNOP()       __asm volatile ( "nop" )\r
 234 \r
 235 /*-----------------------------------------------------------*/\r
 236 \r
 237 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 238 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))\r
 239 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 240 /*-----------------------------------------------------------*/\r
 241 \r
 242 #define portEND_SWITCHING_ISR( xSwitchRequired )        if( xSwitchRequired )   \\r
 243                                                                                                         {                                               \\r
 244                                                                                                                 portYIELD();            \\r
 245                                                                                                         }\r
 246 \r
 247 /* Required by the kernel aware debugger. */\r
 248 #ifdef __DEBUG\r
 249         #define portREMOVE_STATIC_QUALIFIER\r
 250 #endif\r
 251 \r
 252 #ifdef __cplusplus\r
 253 }\r
 254 #endif\r
 255 \r
 256 #endif /* PORTMACRO_H */\r
 257 \r