2 * FreeRTOS Kernel V10.1.0
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3 * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the ARM CM4F port.
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30 *----------------------------------------------------------*/
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32 /* Scheduler includes. */
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33 #include "FreeRTOS.h"
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37 #ifndef configSYSTICK_CLOCK_HZ
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38 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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39 /* Ensure the SysTick is clocked at the same frequency as the core. */
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40 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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42 /* The way the SysTick is clocked is not modified in case it is not the same
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44 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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47 /* Constants required to manipulate the core. Registers first... */
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48 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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49 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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50 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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51 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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52 /* ...then bits in the registers. */
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53 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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54 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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55 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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56 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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57 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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59 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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60 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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62 /* Constants required to check the validity of an interrupt priority. */
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63 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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64 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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65 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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66 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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67 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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68 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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69 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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70 #define portPRIGROUP_SHIFT ( 8UL )
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72 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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73 #define portVECTACTIVE_MASK ( 0xFFUL )
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75 /* Constants required to manipulate the VFP. */
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76 #define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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77 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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79 /* Constants required to set up the initial stack. */
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80 #define portINITIAL_XPSR ( 0x01000000 )
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81 #define portINITIAL_EXC_RETURN ( 0xfffffffd )
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83 /* The systick is a 24-bit counter. */
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84 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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86 /* A fiddle factor to estimate the number of SysTick counts that would have
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87 occurred while the SysTick counter is stopped during tickless idle
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89 #define portMISSED_COUNTS_FACTOR ( 45UL )
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91 /* Let the user override the pre-loading of the initial LR with the address of
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92 prvTaskExitError() in case it messes up unwinding of the stack in the
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94 #ifdef configTASK_RETURN_ADDRESS
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95 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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97 #define portTASK_RETURN_ADDRESS prvTaskExitError
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100 /* Cannot find a weak linkage attribute, so the
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101 configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if the
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102 application writer wants to provide their own implementation of
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103 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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105 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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106 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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109 /* Manual definition of missing asm names. */
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117 extern void *pxCurrentTCB;
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119 /* Each task maintains its own interrupt status in the critical nesting
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121 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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124 * Setup the timer to generate the tick interrupts. The implementation in this
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125 * file is weak to allow application writers to change the timer used to
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126 * generate the tick interrupt.
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128 void vPortSetupTimerInterrupt( void );
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131 * Exception handlers.
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133 void xPortPendSVHandler( void );
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134 void xPortSysTickHandler( void );
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135 void vPortSVCHandler( void );
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138 * Start first task is a separate function so it can be tested in isolation.
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140 static void prvPortStartFirstTask( void );
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143 * Function to enable the VFP.
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145 static void vPortEnableVFP( void );
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148 * Used to catch tasks that attempt to return from their implementing function.
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150 static void prvTaskExitError( void );
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152 /*-----------------------------------------------------------*/
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155 * The number of SysTick increments that make up one tick period.
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157 #if( configUSE_TICKLESS_IDLE == 1 )
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158 static uint32_t ulTimerCountsForOneTick = 0;
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159 #endif /* configUSE_TICKLESS_IDLE */
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162 * The maximum number of tick periods that can be suppressed is limited by the
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163 * 24 bit resolution of the SysTick timer.
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165 #if( configUSE_TICKLESS_IDLE == 1 )
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166 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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167 #endif /* configUSE_TICKLESS_IDLE */
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170 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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171 * power functionality only.
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173 #if( configUSE_TICKLESS_IDLE == 1 )
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174 static uint32_t ulStoppedTimerCompensation = 0;
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175 #endif /* configUSE_TICKLESS_IDLE */
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178 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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179 * FreeRTOS API functions are not called from interrupts that have been assigned
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180 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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182 #if ( configASSERT_DEFINED == 1 )
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183 static uint8_t ucMaxSysCallPriority = 0;
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184 static uint32_t ulMaxPRIGROUPValue = 0;
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185 #endif /* configASSERT_DEFINED */
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187 /*-----------------------------------------------------------*/
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190 * See header file for description.
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192 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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194 /* Simulate the stack frame as it would be created by a context switch
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197 /* Offset added to account for the way the MCU uses the stack on entry/exit
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198 of interrupts, and to ensure alignment. */
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201 /* Sometimes the parameters are loaded from the stack. */
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202 *pxTopOfStack = ( StackType_t ) pvParameters;
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205 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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207 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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209 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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211 /* Save code space by skipping register initialisation. */
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212 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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213 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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215 /* A save method is being used that requires each task to maintain its
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216 own exec return value. */
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218 *pxTopOfStack = portINITIAL_EXC_RETURN;
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220 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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222 return pxTopOfStack;
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224 /*-----------------------------------------------------------*/
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226 static void prvTaskExitError( void )
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228 /* A function that implements a task must not exit or attempt to return to
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229 its caller as there is nothing to return to. If a task wants to exit it
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230 should instead call vTaskDelete( NULL ).
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232 Artificially force an assert() to be triggered if configASSERT() is
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233 defined, then stop here so application writers can catch the error. */
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234 configASSERT( uxCriticalNesting == ~0UL );
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235 portDISABLE_INTERRUPTS();
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238 /*-----------------------------------------------------------*/
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240 void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
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243 ldr r3, =_pxCurrentTCB /* Restore the context. */
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244 ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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245 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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246 ldm r0!, (r4-r11, r14)/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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247 msr psp, r0 /* Restore the task stack pointer. */
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254 /*-----------------------------------------------------------*/
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256 static void prvPortStartFirstTask( void )
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259 ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
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262 msr msp, r0 /* Set the msp back to the start of the stack. */
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263 /* Clear the bit that indicates the FPU is in use in case the FPU was used
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264 before the scheduler was started - which would otherwise result in the
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265 unnecessary leaving of space in the SVC stack for lazy saving of FPU
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269 cpsie i /* Globally enable interrupts. */
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273 svc #0 /* System call to start first task. */
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277 /*-----------------------------------------------------------*/
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280 * See header file for description.
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282 BaseType_t xPortStartScheduler( void )
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284 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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285 See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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286 configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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288 #if( configASSERT_DEFINED == 1 )
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290 volatile uint32_t ulOriginalPriority;
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291 volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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292 volatile uint8_t ucMaxPriorityValue;
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294 /* Determine the maximum priority from which ISR safe FreeRTOS API
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295 functions can be called. ISR safe functions are those that end in
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296 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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297 ensure interrupt entry is as fast and simple as possible.
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299 Save the interrupt priority value that is about to be clobbered. */
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300 ulOriginalPriority = *pucFirstUserPriorityRegister;
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302 /* Determine the number of priority bits available. First write to all
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304 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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306 /* Read the value back to see how many bits stuck. */
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307 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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309 /* The kernel interrupt priority should be set to the lowest
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311 configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
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313 /* Use the same mask on the maximum system call priority. */
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314 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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316 /* Calculate the maximum acceptable priority group value for the number
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317 of bits read back. */
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318 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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319 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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321 ulMaxPRIGROUPValue--;
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322 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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325 #ifdef __NVIC_PRIO_BITS
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327 /* Check the CMSIS configuration that defines the number of
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328 priority bits matches the number of priority bits actually queried
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329 from the hardware. */
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330 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
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334 #ifdef configPRIO_BITS
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336 /* Check the FreeRTOS configuration that defines the number of
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337 priority bits matches the number of priority bits actually queried
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338 from the hardware. */
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339 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
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343 /* Shift the priority group value back to its position within the AIRCR
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345 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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346 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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348 /* Restore the clobbered interrupt priority register to its original
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350 *pucFirstUserPriorityRegister = ulOriginalPriority;
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352 #endif /* conifgASSERT_DEFINED */
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354 /* Make PendSV and SysTick the lowest priority interrupts. */
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355 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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356 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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358 /* Start the timer that generates the tick ISR. Interrupts are disabled
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360 vPortSetupTimerInterrupt();
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362 /* Initialise the critical nesting count ready for the first task. */
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363 uxCriticalNesting = 0;
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365 /* Ensure the VFP is enabled - it should be anyway. */
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368 /* Lazy save always. */
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369 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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371 /* Start the first task. */
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372 prvPortStartFirstTask();
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374 /* Should never get here as the tasks will now be executing! Call the task
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375 exit error function to prevent compiler warnings about a static function
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376 not being called in the case that the application writer overrides this
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377 functionality by defining configTASK_RETURN_ADDRESS. */
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378 prvTaskExitError();
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380 /* Should not get here! */
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383 /*-----------------------------------------------------------*/
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385 void vPortEndScheduler( void )
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387 /* Not implemented in ports where there is nothing to return to.
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388 Artificially force an assert. */
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389 configASSERT( uxCriticalNesting == 1000UL );
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391 /*-----------------------------------------------------------*/
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393 void vPortEnterCritical( void )
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395 portDISABLE_INTERRUPTS();
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396 uxCriticalNesting++;
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398 /* This is not the interrupt safe version of the enter critical function so
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399 assert() if it is being called from an interrupt context. Only API
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400 functions that end in "FromISR" can be used in an interrupt. Only assert if
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401 the critical nesting count is 1 to protect against recursive calls if the
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402 assert function also uses a critical section. */
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403 if( uxCriticalNesting == 1 )
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405 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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408 /*-----------------------------------------------------------*/
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410 void vPortExitCritical( void )
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412 configASSERT( uxCriticalNesting );
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413 uxCriticalNesting--;
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414 if( uxCriticalNesting == 0 )
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416 portENABLE_INTERRUPTS();
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419 /*-----------------------------------------------------------*/
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421 const uint8_t ucMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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422 void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
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426 /* The function is not truly naked, so add back the 4 bytes subtracted
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427 from the stack pointer by the function prologue. */
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433 ldr r3, =_pxCurrentTCB /* Get the location of the current TCB. */
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436 tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
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438 vstmdbeq r0!, (s16-s31)
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440 stmdb r0!, (r4-r11, r14) /* Save the core registers. */
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442 str r0, [r2] /* Save the new top of stack into the first member of the TCB. */
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444 stmdb sp!, (r0, r3)
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445 ldr r0, =_ucMaxSyscallInterruptPriority
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450 bl _vTaskSwitchContext
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455 ldr r1, [r3] /* The first item in pxCurrentTCB is the task top of stack. */
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458 ldm r0!, (r4-r11, r14) /* Pop the core registers. */
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460 tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
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462 vldmiaeq r0!, (s16-s31)
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469 /*-----------------------------------------------------------*/
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471 void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
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473 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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474 executes all interrupts must be unmasked. There is therefore no need to
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475 save and then restore the interrupt mask value as its value is already
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476 known - therefore the slightly faster portDISABLE_INTERRUPTS() function is
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477 used in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
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478 portDISABLE_INTERRUPTS();
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480 /* Increment the RTOS tick. */
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481 if( xTaskIncrementTick() != pdFALSE )
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483 /* A context switch is required. Context switching is performed in
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484 the PendSV interrupt. Pend the PendSV interrupt. */
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485 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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488 portENABLE_INTERRUPTS();
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490 /*-----------------------------------------------------------*/
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492 #if( ( configUSE_TICKLESS_IDLE == 1 ) && ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) )
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494 void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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496 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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497 TickType_t xModifiableIdleTime;
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499 /* Make sure the SysTick reload value does not overflow the counter. */
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500 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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502 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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505 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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506 is accounted for as best it can be, but using the tickless mode will
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507 inevitably result in some tiny drift of the time maintained by the
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508 kernel with respect to calendar time. */
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509 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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511 /* Calculate the reload value required to wait xExpectedIdleTime
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512 tick periods. -1 is used because this code will execute part way
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513 through one of the tick periods. */
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514 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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515 if( ulReloadValue > ulStoppedTimerCompensation )
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517 ulReloadValue -= ulStoppedTimerCompensation;
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520 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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521 method as that will mask interrupts that should exit sleep mode. */
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522 __asm { "cpsid i" };
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526 /* If a context switch is pending or a task is waiting for the scheduler
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527 to be unsuspended then abandon the low power entry. */
\r
528 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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530 /* Restart from whatever is left in the count register to complete
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531 this tick period. */
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532 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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534 /* Restart SysTick. */
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535 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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537 /* Reset the reload register to the value required for normal tick
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539 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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541 /* Re-enable interrupts - see comments above the cpsid instruction()
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543 __asm { "cpsie i" };
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547 /* Set the new reload value. */
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548 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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550 /* Clear the SysTick count flag and set the count value back to
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552 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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554 /* Restart SysTick. */
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555 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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557 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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558 set its parameter to 0 to indicate that its implementation contains
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559 its own wait for interrupt or wait for event instruction, and so wfi
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560 should not be executed again. However, the original expected idle
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561 time variable must remain unmodified, so a copy is taken. */
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562 xModifiableIdleTime = xExpectedIdleTime;
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563 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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564 if( xModifiableIdleTime > 0 )
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570 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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572 /* Re-enable interrupts to allow the interrupt that brought the MCU
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573 out of sleep mode to execute immediately. see comments above
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574 __disable_interrupt() call above. */
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575 __asm { "cpsie i" };
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579 /* Disable interrupts again because the clock is about to be stopped
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580 and interrupts that execute while the clock is stopped will increase
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581 any slippage between the time maintained by the RTOS and calendar
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583 __asm { "cpsid i" };
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587 /* Disable the SysTick clock without reading the
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588 portNVIC_SYSTICK_CTRL_REG register to ensure the
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589 portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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590 the time the SysTick is stopped for is accounted for as best it can
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591 be, but using the tickless mode will inevitably result in some tiny
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592 drift of the time maintained by the kernel with respect to calendar
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594 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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596 /* Determine if the SysTick clock has already counted to zero and
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597 been set back to the current reload value (the reload back being
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598 correct for the entire expected idle time) or if the SysTick is yet
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599 to count to zero (in which case an interrupt other than the SysTick
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600 must have brought the system out of sleep mode). */
\r
601 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
\r
603 uint32_t ulCalculatedLoadValue;
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605 /* The tick interrupt is already pending, and the SysTick count
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606 reloaded with ulReloadValue. Reset the
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607 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
\r
609 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
\r
611 /* Don't allow a tiny value, or values that have somehow
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612 underflowed because the post sleep hook did something
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613 that took too long. */
\r
614 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
616 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
619 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
\r
621 /* As the pending tick will be processed as soon as this
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622 function exits, the tick value maintained by the tick is stepped
\r
623 forward by one less than the time spent waiting. */
\r
624 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
\r
628 /* Something other than the tick interrupt ended the sleep.
\r
629 Work out how long the sleep lasted rounded to complete tick
\r
630 periods (not the ulReload value which accounted for part
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632 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
\r
634 /* How many complete tick periods passed while the processor
\r
636 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
638 /* The reload value is set to whatever fraction of a single tick
\r
640 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
643 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
\r
644 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
\r
646 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
647 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
648 vTaskStepTick( ulCompleteTickPeriods );
\r
649 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
651 /* Exit with interrpts enabled. */
\r
652 __asm { "cpsie i" };
\r
656 #endif /* #if configUSE_TICKLESS_IDLE */
\r
657 /*-----------------------------------------------------------*/
\r
660 * Setup the systick timer to generate the tick interrupts at the required
\r
663 #if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
\r
665 void vPortSetupTimerInterrupt( void )
\r
667 /* Calculate the constants required to configure the tick interrupt. */
\r
668 #if( configUSE_TICKLESS_IDLE == 1 )
\r
670 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
671 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
672 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
674 #endif /* configUSE_TICKLESS_IDLE */
\r
676 /* Reset SysTick. */
\r
677 portNVIC_SYSTICK_CTRL_REG = 0UL;
\r
678 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
680 /* Configure SysTick to interrupt at the requested rate. */
\r
681 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
682 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
685 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
686 /*-----------------------------------------------------------*/
\r
688 /* This is a naked function. */
\r
689 static void vPortEnableVFP( void )
\r
692 ldr r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
\r
695 orr r1, r1, #0xF00000 /* Enable CP10 and CP11 coprocessors, then save back. */
\r
700 /*-----------------------------------------------------------*/
\r
702 BaseType_t xPortIsInsideInterrupt( void )
\r
704 BaseType_t xReturn;
\r
706 /* Obtain the number of the currently executing interrupt. */
\r
707 if( CPU_REG_GET( CPU_IPSR ) == 0 )
\r
718 /*-----------------------------------------------------------*/
\r
720 #if( configASSERT_DEFINED == 1 )
\r
722 /* Limitations in the MikroC inline asm means ulCurrentInterrupt has to be
\r
723 global - which makes vPortValidateInterruptPriority() non re-entrant.
\r
724 However that should not matter as an interrupt can only itself be
\r
725 interrupted by a higher priority interrupt. That means if
\r
726 ulCurrentInterrupt, so ulCurrentInterrupt getting corrupted cannot lead to
\r
727 an invalid interrupt priority being missed. */
\r
728 uint32_t ulCurrentInterrupt;
\r
729 uint8_t ucCurrentPriority;
\r
730 void vPortValidateInterruptPriority( void )
\r
732 /* Obtain the number of the currently executing interrupt. */
\r
733 __asm { push (r0, r1)
\r
735 ldr r1, =_ulCurrentInterrupt
\r
740 /* Is the interrupt number a user defined interrupt? */
\r
741 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
743 /* Look up the interrupt's priority. */
\r
744 ucCurrentPriority = *( ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + ulCurrentInterrupt ) );
\r
746 /* The following assertion will fail if a service routine (ISR) for
\r
747 an interrupt that has been assigned a priority above
\r
748 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
749 function. ISR safe FreeRTOS API functions must *only* be called
\r
750 from interrupts that have been assigned a priority at or below
\r
751 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
753 Numerically low interrupt priority numbers represent logically high
\r
754 interrupt priorities, therefore the priority of the interrupt must
\r
755 be set to a value equal to or numerically *higher* than
\r
756 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
758 Interrupts that use the FreeRTOS API must not be left at their
\r
759 default priority of zero as that is the highest possible priority,
\r
760 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
761 and therefore also guaranteed to be invalid.
\r
763 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
764 interrupt entry is as fast and simple as possible.
\r
766 The following links provide detailed information:
\r
767 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
768 http://www.freertos.org/FAQHelp.html */
\r
769 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
772 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
773 that define each interrupt's priority to be split between bits that
\r
774 define the interrupt's pre-emption priority bits and bits that define
\r
775 the interrupt's sub-priority. For simplicity all bits must be defined
\r
776 to be pre-emption priority bits. The following assertion will fail if
\r
777 this is not the case (if some bits represent a sub-priority).
\r
779 If the application only uses CMSIS libraries for interrupt
\r
780 configuration then the correct setting can be achieved on all Cortex-M
\r
781 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
782 scheduler. Note however that some vendor specific peripheral libraries
\r
783 assume a non-zero priority group setting, in which cases using a value
\r
784 of zero will result in unpredictable behaviour. */
\r
785 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
788 #endif /* configASSERT_DEFINED */