git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc

   1 ;/*\r
   2 ; * FreeRTOS Kernel V10.2.1\r
   3 ; * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4 ; *\r
   5 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6 ; * this software and associated documentation files (the "Software"), to deal in\r
   7 ; * the Software without restriction, including without limitation the rights to\r
   8 ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9 ; * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10 ; * subject to the following conditions:\r
  11 ; *\r
  12 ; * The above copyright notice and this permission notice shall be included in all\r
  13 ; * copies or substantial portions of the Software.\r
  14 ; *\r
  15 ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  16 ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  17 ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  18 ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  19 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  20 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  21 ; *\r
  22 ; * http://www.FreeRTOS.org\r
  23 ; * http://aws.amazon.com/freertos\r
  24 ; *\r
  25 ; * 1 tab == 4 spaces!\r
  26 ; */\r
  27 \r
  28         IMPORT  ulCriticalNesting               ;\r
  29         IMPORT  pxCurrentTCB                    ;\r
  30 \r
  31 \r
  32         MACRO\r
  33         portRESTORE_CONTEXT\r
  34 \r
  35 \r
  36         LDR             R0, =pxCurrentTCB               ; Set the LR to the task stack.  The location was...\r
  37         LDR             R0, [R0]                                ; ... stored in pxCurrentTCB\r
  38         LDR             LR, [R0]\r
  39 \r
  40         LDR             R0, =ulCriticalNesting  ; The critical nesting depth is the first item on...\r
  41         LDMFD   LR!, {R1}                               ; ...the stack.  Load it into the ulCriticalNesting var.\r
  42         STR             R1, [R0]                                ;\r
  43 \r
  44         LDMFD   LR!, {R0}                               ; Get the SPSR from the stack.\r
  45         MSR             SPSR_cxsf, R0                   ;\r
  46 \r
  47         LDMFD   LR, {R0-R14}^                   ; Restore all system mode registers for the task.\r
  48         NOP                                                             ;\r
  49 \r
  50         LDR             LR, [LR, #+60]                  ; Restore the return address\r
  51 \r
  52                                                                         ; And return - correcting the offset in the LR to obtain ...\r
  53         SUBS    PC, LR, #4                              ; ...the correct address.\r
  54 \r
  55         MEND\r
  56 \r
  57 ; /**********************************************************************/\r
  58 \r
  59         MACRO\r
  60         portSAVE_CONTEXT\r
  61 \r
  62 \r
  63         STMDB   SP!, {R0}                               ; Store R0 first as we need to use it.\r
  64 \r
  65         STMDB   SP,{SP}^                                ; Set R0 to point to the task stack pointer.\r
  66         NOP                                                             ;\r
  67         SUB             SP, SP, #4                              ;\r
  68         LDMIA   SP!,{R0}                                ;\r
  69 \r
  70         STMDB   R0!, {LR}                               ; Push the return address onto the stack.\r
  71         MOV             LR, R0                                  ; Now we have saved LR we can use it instead of R0.\r
  72         LDMIA   SP!, {R0}                               ; Pop R0 so we can save it onto the system mode stack.\r
  73 \r
  74         STMDB   LR,{R0-LR}^                             ; Push all the system mode registers onto the task stack.\r
  75         NOP                                                             ;\r
  76         SUB             LR, LR, #60                             ;\r
  77 \r
  78         MRS             R0, SPSR                                ; Push the SPSR onto the task stack.\r
  79         STMDB   LR!, {R0}                               ;\r
  80 \r
  81         LDR             R0, =ulCriticalNesting  ;\r
  82         LDR             R0, [R0]                                ;\r
  83         STMDB   LR!, {R0}                               ;\r
  84 \r
  85         LDR             R0, =pxCurrentTCB               ; Store the new top of stack for the task.\r
  86         LDR             R1, [R0]                                ;\r
  87         STR             LR, [R1]                                ;\r
  88 \r
  89         MEND\r
  90 \r
  91         END\r