2 * FreeRTOS Kernel V10.2.1
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3 * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the ARM CM0 port.
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30 *----------------------------------------------------------*/
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32 /* Scheduler includes. */
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33 #include "FreeRTOS.h"
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36 /* Constants required to manipulate the NVIC. */
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37 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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38 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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39 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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40 #define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
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41 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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42 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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43 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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44 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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45 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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46 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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47 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
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48 #define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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49 #define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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51 /* Constants required to set up the initial stack. */
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52 #define portINITIAL_XPSR ( 0x01000000 )
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54 /* The systick is a 24-bit counter. */
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55 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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57 /* A fiddle factor to estimate the number of SysTick counts that would have
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58 occurred while the SysTick counter is stopped during tickless idle
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60 #ifndef portMISSED_COUNTS_FACTOR
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61 #define portMISSED_COUNTS_FACTOR ( 45UL )
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64 /* Constants used with memory barrier intrinsics. */
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65 #define portSY_FULL_READ_WRITE ( 15 )
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67 /* Each task maintains its own interrupt status in the critical nesting
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69 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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71 /* The number of SysTick increments that make up one tick period. */
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72 #if( configUSE_TICKLESS_IDLE == 1 )
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73 static uint32_t ulTimerCountsForOneTick = 0;
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74 #endif /* configUSE_TICKLESS_IDLE */
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76 /* The maximum number of tick periods that can be suppressed is limited by the
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77 24 bit resolution of the SysTick timer. */
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78 #if( configUSE_TICKLESS_IDLE == 1 )
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79 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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80 #endif /* configUSE_TICKLESS_IDLE */
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82 /* Compensate for the CPU cycles that pass while the SysTick is stopped (low
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83 power functionality only.
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85 #if( configUSE_TICKLESS_IDLE == 1 )
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86 static uint32_t ulStoppedTimerCompensation = 0;
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87 #endif /* configUSE_TICKLESS_IDLE */
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90 * Setup the timer to generate the tick interrupts.
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92 static void prvSetupTimerInterrupt( void );
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95 * Exception handlers.
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97 void xPortPendSVHandler( void );
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98 void xPortSysTickHandler( void );
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99 void vPortSVCHandler( void );
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102 * Start first task is a separate function so it can be tested in isolation.
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104 static void prvPortStartFirstTask( void );
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107 * Used to catch tasks that attempt to return from their implementing function.
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109 static void prvTaskExitError( void );
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111 /*-----------------------------------------------------------*/
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114 * See header file for description.
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116 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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118 /* Simulate the stack frame as it would be created by a context switch
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120 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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121 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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123 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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125 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
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126 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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127 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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128 pxTopOfStack -= 8; /* R11..R4. */
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130 return pxTopOfStack;
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132 /*-----------------------------------------------------------*/
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134 static void prvTaskExitError( void )
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136 /* A function that implements a task must not exit or attempt to return to
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137 its caller as there is nothing to return to. If a task wants to exit it
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138 should instead call vTaskDelete( NULL ).
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140 Artificially force an assert() to be triggered if configASSERT() is
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141 defined, then stop here so application writers can catch the error. */
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142 configASSERT( uxCriticalNesting == ~0UL );
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143 portDISABLE_INTERRUPTS();
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146 /*-----------------------------------------------------------*/
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148 void vPortSVCHandler( void )
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150 /* This function is no longer used, but retained for backward
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153 /*-----------------------------------------------------------*/
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155 __asm void prvPortStartFirstTask( void )
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157 extern pxCurrentTCB;
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161 /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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162 table offset register that can be used to locate the initial stack value.
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163 Not all M0 parts have the application vector table at address 0. */
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165 ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
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167 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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168 adds r0, #32 /* Discard everything up to r0. */
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169 msr psp, r0 /* This is now the new top of stack to use in the task. */
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170 movs r0, #2 /* Switch to the psp stack. */
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173 pop {r0-r5} /* Pop the registers that are saved automatically. */
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174 mov lr, r5 /* lr is now in r5. */
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175 pop {r3} /* The return address is now in r3. */
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176 pop {r2} /* Pop and discard the XPSR. */
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177 cpsie i /* The first task has its context and interrupts can be enabled. */
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178 bx r3 /* Finally, jump to the user defined task code. */
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182 /*-----------------------------------------------------------*/
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185 * See header file for description.
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187 BaseType_t xPortStartScheduler( void )
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189 /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
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190 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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191 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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193 /* Start the timer that generates the tick ISR. Interrupts are disabled
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195 prvSetupTimerInterrupt();
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197 /* Initialise the critical nesting count ready for the first task. */
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198 uxCriticalNesting = 0;
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200 /* Start the first task. */
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201 prvPortStartFirstTask();
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203 /* Should not get here! */
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206 /*-----------------------------------------------------------*/
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208 void vPortEndScheduler( void )
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210 /* Not implemented in ports where there is nothing to return to.
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211 Artificially force an assert. */
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212 configASSERT( uxCriticalNesting == 1000UL );
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214 /*-----------------------------------------------------------*/
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216 void vPortYield( void )
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218 /* Set a PendSV to request a context switch. */
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219 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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221 /* Barriers are normally not required but do ensure the code is completely
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222 within the specified behaviour for the architecture. */
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223 __dsb( portSY_FULL_READ_WRITE );
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224 __isb( portSY_FULL_READ_WRITE );
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226 /*-----------------------------------------------------------*/
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228 void vPortEnterCritical( void )
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230 portDISABLE_INTERRUPTS();
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231 uxCriticalNesting++;
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232 __dsb( portSY_FULL_READ_WRITE );
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233 __isb( portSY_FULL_READ_WRITE );
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235 /*-----------------------------------------------------------*/
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237 void vPortExitCritical( void )
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239 configASSERT( uxCriticalNesting );
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240 uxCriticalNesting--;
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241 if( uxCriticalNesting == 0 )
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243 portENABLE_INTERRUPTS();
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246 /*-----------------------------------------------------------*/
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248 __asm uint32_t ulSetInterruptMaskFromISR( void )
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254 /*-----------------------------------------------------------*/
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256 __asm void vClearInterruptMaskFromISR( uint32_t ulMask )
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261 /*-----------------------------------------------------------*/
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263 __asm void xPortPendSVHandler( void )
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265 extern vTaskSwitchContext
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266 extern pxCurrentTCB
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272 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
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275 subs r0, #32 /* Make space for the remaining low registers. */
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276 str r0, [r2] /* Save the new top of stack. */
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277 stmia r0!, {r4-r7} /* Store the low registers that are not saved automatically. */
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278 mov r4, r8 /* Store the high registers. */
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286 bl vTaskSwitchContext
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288 pop {r2, r3} /* lr goes in r3. r2 now holds tcb pointer. */
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291 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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292 adds r0, #16 /* Move to the high registers. */
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293 ldmia r0!, {r4-r7} /* Pop the high registers. */
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299 msr psp, r0 /* Remember the new top of stack for the task. */
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301 subs r0, #32 /* Go back for the low registers that are not automatically restored. */
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302 ldmia r0!, {r4-r7} /* Pop low registers. */
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307 /*-----------------------------------------------------------*/
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309 void xPortSysTickHandler( void )
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311 uint32_t ulPreviousMask;
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313 ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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315 /* Increment the RTOS tick. */
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316 if( xTaskIncrementTick() != pdFALSE )
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318 /* Pend a context switch. */
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319 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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322 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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324 /*-----------------------------------------------------------*/
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327 * Setup the systick timer to generate the tick interrupts at the required
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330 void prvSetupTimerInterrupt( void )
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332 /* Calculate the constants required to configure the tick interrupt. */
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333 #if( configUSE_TICKLESS_IDLE == 1 )
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334 ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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335 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
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336 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
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337 #endif /* configUSE_TICKLESS_IDLE */
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339 /* Stop and reset the SysTick. */
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340 portNVIC_SYSTICK_CTRL_REG = 0UL;
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341 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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343 /* Configure SysTick to interrupt at the requested rate. */
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344 portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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345 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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347 /*-----------------------------------------------------------*/
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349 #if( configUSE_TICKLESS_IDLE == 1 )
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351 __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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353 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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354 TickType_t xModifiableIdleTime;
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356 /* Make sure the SysTick reload value does not overflow the counter. */
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357 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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359 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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362 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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363 is accounted for as best it can be, but using the tickless mode will
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364 inevitably result in some tiny drift of the time maintained by the
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365 kernel with respect to calendar time. */
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366 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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368 /* Calculate the reload value required to wait xExpectedIdleTime
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369 tick periods. -1 is used because this code will execute part way
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370 through one of the tick periods. */
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371 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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372 if( ulReloadValue > ulStoppedTimerCompensation )
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374 ulReloadValue -= ulStoppedTimerCompensation;
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377 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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378 method as that will mask interrupts that should exit sleep mode. */
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380 __dsb( portSY_FULL_READ_WRITE );
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381 __isb( portSY_FULL_READ_WRITE );
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383 /* If a context switch is pending or a task is waiting for the scheduler
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384 to be unsuspended then abandon the low power entry. */
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385 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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387 /* Restart from whatever is left in the count register to complete
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388 this tick period. */
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389 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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391 /* Restart SysTick. */
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392 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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394 /* Reset the reload register to the value required for normal tick
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396 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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398 /* Re-enable interrupts - see comments above __disable_irq() call
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404 /* Set the new reload value. */
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405 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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407 /* Clear the SysTick count flag and set the count value back to
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409 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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411 /* Restart SysTick. */
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412 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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414 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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415 set its parameter to 0 to indicate that its implementation contains
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416 its own wait for interrupt or wait for event instruction, and so wfi
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417 should not be executed again. However, the original expected idle
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418 time variable must remain unmodified, so a copy is taken. */
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419 xModifiableIdleTime = xExpectedIdleTime;
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420 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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421 if( xModifiableIdleTime > 0 )
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423 __dsb( portSY_FULL_READ_WRITE );
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425 __isb( portSY_FULL_READ_WRITE );
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427 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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429 /* Re-enable interrupts to allow the interrupt that brought the MCU
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430 out of sleep mode to execute immediately. see comments above
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431 __disable_interrupt() call above. */
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433 __dsb( portSY_FULL_READ_WRITE );
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434 __isb( portSY_FULL_READ_WRITE );
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436 /* Disable interrupts again because the clock is about to be stopped
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437 and interrupts that execute while the clock is stopped will increase
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438 any slippage between the time maintained by the RTOS and calendar
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441 __dsb( portSY_FULL_READ_WRITE );
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442 __isb( portSY_FULL_READ_WRITE );
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444 /* Disable the SysTick clock without reading the
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445 portNVIC_SYSTICK_CTRL_REG register to ensure the
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446 portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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447 the time the SysTick is stopped for is accounted for as best it can
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448 be, but using the tickless mode will inevitably result in some tiny
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449 drift of the time maintained by the kernel with respect to calendar
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451 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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453 /* Determine if the SysTick clock has already counted to zero and
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454 been set back to the current reload value (the reload back being
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455 correct for the entire expected idle time) or if the SysTick is yet
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456 to count to zero (in which case an interrupt other than the SysTick
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457 must have brought the system out of sleep mode). */
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458 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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460 uint32_t ulCalculatedLoadValue;
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462 /* The tick interrupt is already pending, and the SysTick count
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463 reloaded with ulReloadValue. Reset the
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464 portNVIC_SYSTICK_LOAD with whatever remains of this tick
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466 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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468 /* Don't allow a tiny value, or values that have somehow
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469 underflowed because the post sleep hook did something
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470 that took too long. */
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471 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
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473 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
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476 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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478 /* As the pending tick will be processed as soon as this
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479 function exits, the tick value maintained by the tick is stepped
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480 forward by one less than the time spent waiting. */
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481 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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485 /* Something other than the tick interrupt ended the sleep.
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486 Work out how long the sleep lasted rounded to complete tick
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487 periods (not the ulReload value which accounted for part
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489 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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491 /* How many complete tick periods passed while the processor
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493 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
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495 /* The reload value is set to whatever fraction of a single tick
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497 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
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500 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD
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501 again, then set portNVIC_SYSTICK_LOAD back to its standard
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503 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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504 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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505 vTaskStepTick( ulCompleteTickPeriods );
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506 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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508 /* Exit with interrpts enabled. */
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513 #endif /* #if configUSE_TICKLESS_IDLE */
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515 /*-----------------------------------------------------------*/
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