2 FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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6 ***************************************************************************
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8 * FreeRTOS provides completely free yet professionally developed, *
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9 * robust, strictly quality controlled, supported, and cross *
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10 * platform software that has become a de facto standard. *
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12 * Help yourself get started quickly and support the FreeRTOS *
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13 * project by purchasing a FreeRTOS tutorial book, reference *
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14 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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18 ***************************************************************************
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20 This file is part of the FreeRTOS distribution.
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22 FreeRTOS is free software; you can redistribute it and/or modify it under
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23 the terms of the GNU General Public License (version 2) as published by the
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24 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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26 >>! NOTE: The modification to the GPL is included to allow you to distribute
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27 >>! a combined work that includes FreeRTOS without being obliged to provide
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28 >>! the source code for proprietary components outside of the FreeRTOS
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31 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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32 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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33 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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34 link: http://www.freertos.org/a00114.html
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38 ***************************************************************************
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40 * Having a problem? Start by reading the FAQ "My application does *
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41 * not run, what could be wrong?" *
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43 * http://www.FreeRTOS.org/FAQHelp.html *
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45 ***************************************************************************
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47 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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48 license and Real Time Engineers Ltd. contact details.
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50 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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51 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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52 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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54 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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55 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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56 licenses offer ticketed support, indemnification and middleware.
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58 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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59 engineered and independently SIL3 certified version for use in safety and
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60 mission critical applications that require provable dependability.
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65 /*-----------------------------------------------------------
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66 * Implementation of functions defined in portable.h for the ARM CM3 port.
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67 *----------------------------------------------------------*/
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69 /* Scheduler includes. */
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70 #include "FreeRTOS.h"
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73 #ifndef configKERNEL_INTERRUPT_PRIORITY
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74 #define configKERNEL_INTERRUPT_PRIORITY 255
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77 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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78 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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81 #ifndef configSYSTICK_CLOCK_HZ
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82 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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85 /* The __weak attribute does not work as you might expect with the Keil tools
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86 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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87 the application writer wants to provide their own implementation of
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88 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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90 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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91 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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94 /* Constants required to manipulate the core. Registers first... */
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95 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
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96 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
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97 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
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98 #define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
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99 /* ...then bits in the registers. */
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100 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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101 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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102 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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103 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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104 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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105 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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107 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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108 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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110 /* Constants required to check the validity of an interrupt priority. */
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111 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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112 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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113 #define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
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114 #define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )
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115 #define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )
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116 #define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )
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117 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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118 #define portPRIGROUP_SHIFT ( 8UL )
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120 /* Constants required to set up the initial stack. */
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121 #define portINITIAL_XPSR ( 0x01000000 )
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123 /* Constants used with memory barrier intrinsics. */
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124 #define portSY_FULL_READ_WRITE ( 15 )
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126 /* The systick is a 24-bit counter. */
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127 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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129 /* A fiddle factor to estimate the number of SysTick counts that would have
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130 occurred while the SysTick counter is stopped during tickless idle
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132 #define portMISSED_COUNTS_FACTOR ( 45UL )
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134 /* Each task maintains its own interrupt status in the critical nesting
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136 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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139 * Setup the timer to generate the tick interrupts. The implementation in this
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140 * file is weak to allow application writers to change the timer used to
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141 * generate the tick interrupt.
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143 void vPortSetupTimerInterrupt( void );
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146 * Exception handlers.
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148 void xPortPendSVHandler( void );
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149 void xPortSysTickHandler( void );
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150 void vPortSVCHandler( void );
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153 * Start first task is a separate function so it can be tested in isolation.
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155 static void prvStartFirstTask( void );
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158 * Used to catch tasks that attempt to return from their implementing function.
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160 static void prvTaskExitError( void );
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162 /*-----------------------------------------------------------*/
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165 * The number of SysTick increments that make up one tick period.
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167 #if configUSE_TICKLESS_IDLE == 1
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168 static unsigned long ulTimerCountsForOneTick = 0;
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169 #endif /* configUSE_TICKLESS_IDLE */
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172 * The maximum number of tick periods that can be suppressed is limited by the
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173 * 24 bit resolution of the SysTick timer.
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175 #if configUSE_TICKLESS_IDLE == 1
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176 static unsigned long xMaximumPossibleSuppressedTicks = 0;
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177 #endif /* configUSE_TICKLESS_IDLE */
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180 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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181 * power functionality only.
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183 #if configUSE_TICKLESS_IDLE == 1
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184 static unsigned long ulStoppedTimerCompensation = 0;
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185 #endif /* configUSE_TICKLESS_IDLE */
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188 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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189 * FreeRTOS API functions are not called from interrupts that have been assigned
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190 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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192 #if ( configASSERT_DEFINED == 1 )
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193 static unsigned char ucMaxSysCallPriority = 0;
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194 static unsigned long ulMaxPRIGROUPValue = 0;
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195 static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16;
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196 #endif /* configASSERT_DEFINED */
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198 /*-----------------------------------------------------------*/
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201 * See header file for description.
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203 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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205 /* Simulate the stack frame as it would be created by a context switch
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207 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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208 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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210 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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212 *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */
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214 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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215 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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216 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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218 return pxTopOfStack;
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220 /*-----------------------------------------------------------*/
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222 static void prvTaskExitError( void )
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224 /* A function that implements a task must not exit or attempt to return to
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225 its caller as there is nothing to return to. If a task wants to exit it
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226 should instead call vTaskDelete( NULL ).
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228 Artificially force an assert() to be triggered if configASSERT() is
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229 defined, then stop here so application writers can catch the error. */
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230 configASSERT( uxCriticalNesting == ~0UL );
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231 portDISABLE_INTERRUPTS();
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234 /*-----------------------------------------------------------*/
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236 __asm void vPortSVCHandler( void )
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240 ldr r3, =pxCurrentTCB /* Restore the context. */
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241 ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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242 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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243 ldmia r0!, {r4-r11} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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244 msr psp, r0 /* Restore the task stack pointer. */
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250 /*-----------------------------------------------------------*/
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252 __asm void prvStartFirstTask( void )
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256 /* Use the NVIC offset register to locate the stack. */
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257 ldr r0, =0xE000ED08
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260 /* Set the msp back to the start of the stack. */
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262 /* Globally enable interrupts. */
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264 /* Call SVC to start the first task. */
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268 /*-----------------------------------------------------------*/
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271 * See header file for description.
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273 portBASE_TYPE xPortStartScheduler( void )
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275 #if( configASSERT_DEFINED == 1 )
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277 volatile unsigned long ulOriginalPriority;
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278 volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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279 volatile unsigned char ucMaxPriorityValue;
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281 /* Determine the maximum priority from which ISR safe FreeRTOS API
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282 functions can be called. ISR safe functions are those that end in
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283 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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284 ensure interrupt entry is as fast and simple as possible.
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286 Save the interrupt priority value that is about to be clobbered. */
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287 ulOriginalPriority = *pcFirstUserPriorityRegister;
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289 /* Determine the number of priority bits available. First write to all
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291 *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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293 /* Read the value back to see how many bits stuck. */
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294 ucMaxPriorityValue = *pcFirstUserPriorityRegister;
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296 /* Use the same mask on the maximum system call priority. */
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297 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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299 /* Calculate the maximum acceptable priority group value for the number
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300 of bits read back. */
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301 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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302 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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304 ulMaxPRIGROUPValue--;
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305 ucMaxPriorityValue <<= ( unsigned char ) 0x01;
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308 /* Shift the priority group value back to its position within the AIRCR
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310 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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311 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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313 /* Restore the clobbered interrupt priority register to its original
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315 *pcFirstUserPriorityRegister = ulOriginalPriority;
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317 #endif /* conifgASSERT_DEFINED */
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319 /* Make PendSV and SysTick the lowest priority interrupts. */
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320 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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321 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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323 /* Start the timer that generates the tick ISR. Interrupts are disabled
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325 vPortSetupTimerInterrupt();
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327 /* Initialise the critical nesting count ready for the first task. */
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328 uxCriticalNesting = 0;
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330 /* Start the first task. */
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331 prvStartFirstTask();
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333 /* Should not get here! */
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336 /*-----------------------------------------------------------*/
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338 void vPortEndScheduler( void )
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340 /* It is unlikely that the CM3 port will require this function as there
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341 is nothing to return to. */
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343 /*-----------------------------------------------------------*/
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345 void vPortYield( void )
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347 /* Set a PendSV to request a context switch. */
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348 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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350 /* Barriers are normally not required but do ensure the code is completely
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351 within the specified behaviour for the architecture. */
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352 __dsb( portSY_FULL_READ_WRITE );
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353 __isb( portSY_FULL_READ_WRITE );
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355 /*-----------------------------------------------------------*/
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357 void vPortEnterCritical( void )
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359 portDISABLE_INTERRUPTS();
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360 uxCriticalNesting++;
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361 __dsb( portSY_FULL_READ_WRITE );
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362 __isb( portSY_FULL_READ_WRITE );
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364 /*-----------------------------------------------------------*/
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366 void vPortExitCritical( void )
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368 uxCriticalNesting--;
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369 if( uxCriticalNesting == 0 )
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371 portENABLE_INTERRUPTS();
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374 /*-----------------------------------------------------------*/
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376 __asm void xPortPendSVHandler( void )
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378 extern uxCriticalNesting;
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379 extern pxCurrentTCB;
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380 extern vTaskSwitchContext;
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386 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
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389 stmdb r0!, {r4-r11} /* Save the remaining registers. */
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390 str r0, [r2] /* Save the new top of stack into the first member of the TCB. */
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392 stmdb sp!, {r3, r14}
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393 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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395 bl vTaskSwitchContext
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398 ldmia sp!, {r3, r14}
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401 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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402 ldmia r0!, {r4-r11} /* Pop the registers and the critical nesting count. */
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407 /*-----------------------------------------------------------*/
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409 void xPortSysTickHandler( void )
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411 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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412 executes all interrupts must be unmasked. There is therefore no need to
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413 save and then restore the interrupt mask value as its value is already
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415 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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417 /* Increment the RTOS tick. */
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418 if( xTaskIncrementTick() != pdFALSE )
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420 /* A context switch is required. Context switching is performed in
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421 the PendSV interrupt. Pend the PendSV interrupt. */
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422 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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425 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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427 /*-----------------------------------------------------------*/
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429 #if configUSE_TICKLESS_IDLE == 1
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431 __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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433 unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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434 portTickType xModifiableIdleTime;
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436 /* Make sure the SysTick reload value does not overflow the counter. */
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437 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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439 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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442 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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443 is accounted for as best it can be, but using the tickless mode will
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444 inevitably result in some tiny drift of the time maintained by the
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445 kernel with respect to calendar time. */
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446 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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448 /* Calculate the reload value required to wait xExpectedIdleTime
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449 tick periods. -1 is used because this code will execute part way
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450 through one of the tick periods. */
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451 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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452 if( ulReloadValue > ulStoppedTimerCompensation )
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454 ulReloadValue -= ulStoppedTimerCompensation;
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457 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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458 method as that will mask interrupts that should exit sleep mode. */
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461 /* If a context switch is pending or a task is waiting for the scheduler
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462 to be unsuspended then abandon the low power entry. */
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463 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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465 /* Restart from whatever is left in the count register to complete
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466 this tick period. */
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467 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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469 /* Restart SysTick. */
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470 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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472 /* Reset the reload register to the value required for normal tick
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474 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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476 /* Re-enable interrupts - see comments above __disable_irq() call
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482 /* Set the new reload value. */
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483 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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485 /* Clear the SysTick count flag and set the count value back to
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487 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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489 /* Restart SysTick. */
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490 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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492 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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493 set its parameter to 0 to indicate that its implementation contains
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494 its own wait for interrupt or wait for event instruction, and so wfi
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495 should not be executed again. However, the original expected idle
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496 time variable must remain unmodified, so a copy is taken. */
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497 xModifiableIdleTime = xExpectedIdleTime;
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498 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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499 if( xModifiableIdleTime > 0 )
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501 __dsb( portSY_FULL_READ_WRITE );
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503 __isb( portSY_FULL_READ_WRITE );
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505 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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507 /* Stop SysTick. Again, the time the SysTick is stopped for is
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508 accounted for as best it can be, but using the tickless mode will
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509 inevitably result in some tiny drift of the time maintained by the
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510 kernel with respect to calendar time. */
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511 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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513 /* Re-enable interrupts - see comments above __disable_irq() call
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517 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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519 unsigned long ulCalculatedLoadValue;
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521 /* The tick interrupt has already executed, and the SysTick
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522 count reloaded with ulReloadValue. Reset the
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523 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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525 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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527 /* Don't allow a tiny value, or values that have somehow
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528 underflowed because the post sleep hook did something
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529 that took too long. */
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530 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
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532 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
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535 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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537 /* The tick interrupt handler will already have pended the tick
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538 processing in the kernel. As the pending tick will be
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539 processed as soon as this function exits, the tick value
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540 maintained by the tick is stepped forward by one less than the
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541 time spent waiting. */
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542 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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546 /* Something other than the tick interrupt ended the sleep.
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547 Work out how long the sleep lasted rounded to complete tick
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548 periods (not the ulReload value which accounted for part
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550 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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552 /* How many complete tick periods passed while the processor
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554 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
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556 /* The reload value is set to whatever fraction of a single tick
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558 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
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561 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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562 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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563 value. The critical section is used to ensure the tick interrupt
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564 can only execute once in the case that the reload register is near
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566 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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567 portENTER_CRITICAL();
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569 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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570 vTaskStepTick( ulCompleteTickPeriods );
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571 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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573 portEXIT_CRITICAL();
\r
577 #endif /* #if configUSE_TICKLESS_IDLE */
\r
579 /*-----------------------------------------------------------*/
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582 * Setup the SysTick timer to generate the tick interrupts at the required
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585 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
\r
587 void vPortSetupTimerInterrupt( void )
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589 /* Calculate the constants required to configure the tick interrupt. */
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590 #if configUSE_TICKLESS_IDLE == 1
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592 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
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593 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
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594 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
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596 #endif /* configUSE_TICKLESS_IDLE */
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598 /* Configure SysTick to interrupt at the requested rate. */
\r
599 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
\r
600 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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603 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
604 /*-----------------------------------------------------------*/
\r
606 __asm unsigned long ulPortSetInterruptMask( void )
\r
611 mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
615 /*-----------------------------------------------------------*/
\r
617 __asm void vPortClearInterruptMask( unsigned long ulNewMask )
\r
624 /*-----------------------------------------------------------*/
\r
626 __asm unsigned long vPortGetIPSR( void )
\r
633 /*-----------------------------------------------------------*/
\r
635 #if( configASSERT_DEFINED == 1 )
\r
637 void vPortValidateInterruptPriority( void )
\r
639 unsigned long ulCurrentInterrupt;
\r
640 unsigned char ucCurrentPriority;
\r
642 /* Obtain the number of the currently executing interrupt. */
\r
643 ulCurrentInterrupt = vPortGetIPSR();
\r
645 /* Is the interrupt number a user defined interrupt? */
\r
646 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
648 /* Look up the interrupt's priority. */
\r
649 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
651 /* The following assertion will fail if a service routine (ISR) for
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652 an interrupt that has been assigned a priority above
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653 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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654 function. ISR safe FreeRTOS API functions must *only* be called
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655 from interrupts that have been assigned a priority at or below
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656 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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658 Numerically low interrupt priority numbers represent logically high
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659 interrupt priorities, therefore the priority of the interrupt must
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660 be set to a value equal to or numerically *higher* than
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661 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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663 Interrupts that use the FreeRTOS API must not be left at their
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664 default priority of zero as that is the highest possible priority,
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665 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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666 and therefore also guaranteed to be invalid.
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668 FreeRTOS maintains separate thread and ISR API functions to ensure
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669 interrupt entry is as fast and simple as possible.
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671 The following links provide detailed information:
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672 http://www.freertos.org/RTOS-Cortex-M3-M4.html
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673 http://www.freertos.org/FAQHelp.html */
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674 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
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677 /* Priority grouping: The interrupt controller (NVIC) allows the bits
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678 that define each interrupt's priority to be split between bits that
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679 define the interrupt's pre-emption priority bits and bits that define
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680 the interrupt's sub-priority. For simplicity all bits must be defined
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681 to be pre-emption priority bits. The following assertion will fail if
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682 this is not the case (if some bits represent a sub-priority).
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684 If the application only uses CMSIS libraries for interrupt
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685 configuration then the correct setting can be achieved on all Cortex-M
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686 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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687 scheduler. Note however that some vendor specific peripheral libraries
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688 assume a non-zero priority group setting, in which cases using a value
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689 of zero will result in unpredicable behaviour. */
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690 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
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693 #endif /* configASSERT_DEFINED */
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