2 FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to !<<
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28 >>! distribute a combined work that includes FreeRTOS without being !<<
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29 >>! obliged to provide the source code for proprietary components !<<
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30 >>! outside of the FreeRTOS kernel. !<<
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the ARM CM4F port.
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68 *----------------------------------------------------------*/
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70 /* Scheduler includes. */
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71 #include "FreeRTOS.h"
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74 #ifndef __TARGET_FPU_VFP
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75 #error This port can only be used when the project options are configured to enable hardware floating point support.
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78 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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79 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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82 #ifndef configSYSTICK_CLOCK_HZ
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83 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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84 /* Ensure the SysTick is clocked at the same frequency as the core. */
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85 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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87 /* The way the SysTick is clocked is not modified in case it is not the same
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89 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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92 /* The __weak attribute does not work as you might expect with the Keil tools
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93 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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94 the application writer wants to provide their own implementation of
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95 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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97 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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98 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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101 /* Constants required to manipulate the core. Registers first... */
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102 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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103 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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104 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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105 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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106 /* ...then bits in the registers. */
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107 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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108 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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109 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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110 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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111 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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113 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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114 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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116 /* Constants required to check the validity of an interrupt priority. */
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117 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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118 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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119 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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120 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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121 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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122 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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123 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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124 #define portPRIGROUP_SHIFT ( 8UL )
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126 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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127 #define portVECTACTIVE_MASK ( 0x1FUL )
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129 /* Constants required to manipulate the VFP. */
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130 #define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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131 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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133 /* Constants required to set up the initial stack. */
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134 #define portINITIAL_XPSR ( 0x01000000 )
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135 #define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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137 /* Constants used with memory barrier intrinsics. */
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138 #define portSY_FULL_READ_WRITE ( 15 )
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140 /* The systick is a 24-bit counter. */
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141 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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143 /* A fiddle factor to estimate the number of SysTick counts that would have
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144 occurred while the SysTick counter is stopped during tickless idle
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146 #define portMISSED_COUNTS_FACTOR ( 45UL )
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148 /* Each task maintains its own interrupt status in the critical nesting
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150 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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153 * Setup the timer to generate the tick interrupts. The implementation in this
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154 * file is weak to allow application writers to change the timer used to
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155 * generate the tick interrupt.
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157 void vPortSetupTimerInterrupt( void );
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160 * Exception handlers.
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162 void xPortPendSVHandler( void );
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163 void xPortSysTickHandler( void );
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164 void vPortSVCHandler( void );
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167 * Start first task is a separate function so it can be tested in isolation.
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169 static void prvStartFirstTask( void );
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172 * Functions defined in portasm.s to enable the VFP.
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174 static void prvEnableVFP( void );
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177 * Used to catch tasks that attempt to return from their implementing function.
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179 static void prvTaskExitError( void );
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181 /*-----------------------------------------------------------*/
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184 * The number of SysTick increments that make up one tick period.
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186 #if configUSE_TICKLESS_IDLE == 1
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187 static uint32_t ulTimerCountsForOneTick = 0;
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188 #endif /* configUSE_TICKLESS_IDLE */
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191 * The maximum number of tick periods that can be suppressed is limited by the
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192 * 24 bit resolution of the SysTick timer.
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194 #if configUSE_TICKLESS_IDLE == 1
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195 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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196 #endif /* configUSE_TICKLESS_IDLE */
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199 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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200 * power functionality only.
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202 #if configUSE_TICKLESS_IDLE == 1
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203 static uint32_t ulStoppedTimerCompensation = 0;
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204 #endif /* configUSE_TICKLESS_IDLE */
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207 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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208 * FreeRTOS API functions are not called from interrupts that have been assigned
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209 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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211 #if ( configASSERT_DEFINED == 1 )
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212 static uint8_t ucMaxSysCallPriority = 0;
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213 static uint32_t ulMaxPRIGROUPValue = 0;
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214 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
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215 #endif /* configASSERT_DEFINED */
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217 /*-----------------------------------------------------------*/
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220 * See header file for description.
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222 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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224 /* Simulate the stack frame as it would be created by a context switch
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227 /* Offset added to account for the way the MCU uses the stack on entry/exit
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228 of interrupts, and to ensure alignment. */
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231 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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233 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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235 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
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237 /* Save code space by skipping register initialisation. */
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238 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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239 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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241 /* A save method is being used that requires each task to maintain its
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242 own exec return value. */
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244 *pxTopOfStack = portINITIAL_EXEC_RETURN;
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246 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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248 return pxTopOfStack;
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250 /*-----------------------------------------------------------*/
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252 static void prvTaskExitError( void )
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254 /* A function that implements a task must not exit or attempt to return to
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255 its caller as there is nothing to return to. If a task wants to exit it
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256 should instead call vTaskDelete( NULL ).
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258 Artificially force an assert() to be triggered if configASSERT() is
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259 defined, then stop here so application writers can catch the error. */
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260 configASSERT( uxCriticalNesting == ~0UL );
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261 portDISABLE_INTERRUPTS();
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264 /*-----------------------------------------------------------*/
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266 __asm void vPortSVCHandler( void )
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270 /* Get the location of the current TCB. */
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271 ldr r3, =pxCurrentTCB
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274 /* Pop the core registers. */
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275 ldmia r0!, {r4-r11, r14}
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282 /*-----------------------------------------------------------*/
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284 __asm void prvStartFirstTask( void )
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288 /* Use the NVIC offset register to locate the stack. */
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289 ldr r0, =0xE000ED08
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292 /* Set the msp back to the start of the stack. */
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294 /* Globally enable interrupts. */
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299 /* Call SVC to start the first task. */
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304 /*-----------------------------------------------------------*/
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306 __asm void prvEnableVFP( void )
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310 /* The FPU enable bits are in the CPACR. */
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311 ldr.w r0, =0xE000ED88
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314 /* Enable CP10 and CP11 coprocessors, then save back. */
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315 orr r1, r1, #( 0xf << 20 )
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320 /*-----------------------------------------------------------*/
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323 * See header file for description.
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325 BaseType_t xPortStartScheduler( void )
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327 #if( configASSERT_DEFINED == 1 )
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329 volatile uint32_t ulOriginalPriority;
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330 volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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331 volatile uint8_t ucMaxPriorityValue;
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333 /* Determine the maximum priority from which ISR safe FreeRTOS API
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334 functions can be called. ISR safe functions are those that end in
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335 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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336 ensure interrupt entry is as fast and simple as possible.
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338 Save the interrupt priority value that is about to be clobbered. */
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339 ulOriginalPriority = *pucFirstUserPriorityRegister;
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341 /* Determine the number of priority bits available. First write to all
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343 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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345 /* Read the value back to see how many bits stuck. */
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346 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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348 /* Use the same mask on the maximum system call priority. */
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349 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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351 /* Calculate the maximum acceptable priority group value for the number
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352 of bits read back. */
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353 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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354 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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356 ulMaxPRIGROUPValue--;
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357 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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360 /* Shift the priority group value back to its position within the AIRCR
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362 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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363 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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365 /* Restore the clobbered interrupt priority register to its original
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367 *pucFirstUserPriorityRegister = ulOriginalPriority;
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369 #endif /* conifgASSERT_DEFINED */
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371 /* Make PendSV and SysTick the lowest priority interrupts. */
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372 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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373 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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375 /* Start the timer that generates the tick ISR. Interrupts are disabled
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377 vPortSetupTimerInterrupt();
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379 /* Initialise the critical nesting count ready for the first task. */
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380 uxCriticalNesting = 0;
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382 /* Ensure the VFP is enabled - it should be anyway. */
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385 /* Lazy save always. */
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386 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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388 /* Start the first task. */
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389 prvStartFirstTask();
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391 /* Should not get here! */
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394 /*-----------------------------------------------------------*/
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396 void vPortEndScheduler( void )
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398 /* Not implemented in ports where there is nothing to return to.
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399 Artificially force an assert. */
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400 configASSERT( uxCriticalNesting == 1000UL );
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402 /*-----------------------------------------------------------*/
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404 void vPortYield( void )
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406 /* Set a PendSV to request a context switch. */
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407 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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409 /* Barriers are normally not required but do ensure the code is completely
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410 within the specified behaviour for the architecture. */
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411 __dsb( portSY_FULL_READ_WRITE );
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412 __isb( portSY_FULL_READ_WRITE );
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414 /*-----------------------------------------------------------*/
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416 void vPortEnterCritical( void )
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418 portDISABLE_INTERRUPTS();
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419 uxCriticalNesting++;
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420 __dsb( portSY_FULL_READ_WRITE );
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421 __isb( portSY_FULL_READ_WRITE );
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423 /* This is not the interrupt safe version of the enter critical function so
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424 assert() if it is being called from an interrupt context. Only API
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425 functions that end in "FromISR" can be used in an interrupt. Only assert if
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426 the critical nesting count is 1 to protect against recursive calls if the
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427 assert function also uses a critical section. */
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428 if( uxCriticalNesting == 1 )
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430 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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433 /*-----------------------------------------------------------*/
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435 void vPortExitCritical( void )
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437 configASSERT( uxCriticalNesting );
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438 uxCriticalNesting--;
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439 if( uxCriticalNesting == 0 )
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441 portENABLE_INTERRUPTS();
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444 /*-----------------------------------------------------------*/
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446 __asm void xPortPendSVHandler( void )
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448 extern uxCriticalNesting;
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449 extern pxCurrentTCB;
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450 extern vTaskSwitchContext;
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456 /* Get the location of the current TCB. */
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457 ldr r3, =pxCurrentTCB
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460 /* Is the task using the FPU context? If so, push high vfp registers. */
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463 vstmdbeq r0!, {s16-s31}
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465 /* Save the core registers. */
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466 stmdb r0!, {r4-r11, r14}
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468 /* Save the new top of stack into the first member of the TCB. */
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472 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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474 bl vTaskSwitchContext
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479 /* The first item in pxCurrentTCB is the task top of stack. */
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483 /* Pop the core registers. */
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484 ldmia r0!, {r4-r11, r14}
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486 /* Is the task using the FPU context? If so, pop the high vfp registers
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490 vldmiaeq r0!, {s16-s31}
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494 #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
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495 #if WORKAROUND_PMU_CM001 == 1
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505 /*-----------------------------------------------------------*/
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507 void xPortSysTickHandler( void )
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509 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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510 executes all interrupts must be unmasked. There is therefore no need to
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511 save and then restore the interrupt mask value as its value is already
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513 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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515 /* Increment the RTOS tick. */
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516 if( xTaskIncrementTick() != pdFALSE )
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518 /* A context switch is required. Context switching is performed in
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519 the PendSV interrupt. Pend the PendSV interrupt. */
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520 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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523 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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525 /*-----------------------------------------------------------*/
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527 #if configUSE_TICKLESS_IDLE == 1
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529 __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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531 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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532 TickType_t xModifiableIdleTime;
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534 /* Make sure the SysTick reload value does not overflow the counter. */
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535 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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537 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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540 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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541 is accounted for as best it can be, but using the tickless mode will
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542 inevitably result in some tiny drift of the time maintained by the
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543 kernel with respect to calendar time. */
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544 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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546 /* Calculate the reload value required to wait xExpectedIdleTime
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547 tick periods. -1 is used because this code will execute part way
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548 through one of the tick periods. */
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549 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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550 if( ulReloadValue > ulStoppedTimerCompensation )
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552 ulReloadValue -= ulStoppedTimerCompensation;
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555 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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556 method as that will mask interrupts that should exit sleep mode. */
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559 /* If a context switch is pending or a task is waiting for the scheduler
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560 to be unsuspended then abandon the low power entry. */
\r
561 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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563 /* Restart from whatever is left in the count register to complete
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564 this tick period. */
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565 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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567 /* Restart SysTick. */
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568 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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570 /* Reset the reload register to the value required for normal tick
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572 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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574 /* Re-enable interrupts - see comments above __disable_irq() call
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580 /* Set the new reload value. */
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581 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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583 /* Clear the SysTick count flag and set the count value back to
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585 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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587 /* Restart SysTick. */
\r
588 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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590 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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591 set its parameter to 0 to indicate that its implementation contains
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592 its own wait for interrupt or wait for event instruction, and so wfi
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593 should not be executed again. However, the original expected idle
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594 time variable must remain unmodified, so a copy is taken. */
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595 xModifiableIdleTime = xExpectedIdleTime;
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596 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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597 if( xModifiableIdleTime > 0 )
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599 __dsb( portSY_FULL_READ_WRITE );
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601 __isb( portSY_FULL_READ_WRITE );
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603 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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605 /* Stop SysTick. Again, the time the SysTick is stopped for is
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606 accounted for as best it can be, but using the tickless mode will
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607 inevitably result in some tiny drift of the time maintained by the
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608 kernel with respect to calendar time. */
\r
609 ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
\r
610 portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
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612 /* Re-enable interrupts - see comments above __disable_irq() call
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616 if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
\r
618 uint32_t ulCalculatedLoadValue;
\r
620 /* The tick interrupt has already executed, and the SysTick
\r
621 count reloaded with ulReloadValue. Reset the
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622 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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624 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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626 /* Don't allow a tiny value, or values that have somehow
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627 underflowed because the post sleep hook did something
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628 that took too long. */
\r
629 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
631 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
634 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
\r
636 /* The tick interrupt handler will already have pended the tick
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637 processing in the kernel. As the pending tick will be
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638 processed as soon as this function exits, the tick value
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639 maintained by the tick is stepped forward by one less than the
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640 time spent waiting. */
\r
641 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
\r
645 /* Something other than the tick interrupt ended the sleep.
\r
646 Work out how long the sleep lasted rounded to complete tick
\r
647 periods (not the ulReload value which accounted for part
\r
649 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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651 /* How many complete tick periods passed while the processor
\r
653 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
655 /* The reload value is set to whatever fraction of a single tick
\r
657 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
660 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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661 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
\r
662 value. The critical section is used to ensure the tick interrupt
\r
663 can only execute once in the case that the reload register is near
\r
665 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
666 portENTER_CRITICAL();
\r
668 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
669 vTaskStepTick( ulCompleteTickPeriods );
\r
670 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
672 portEXIT_CRITICAL();
\r
676 #endif /* #if configUSE_TICKLESS_IDLE */
\r
678 /*-----------------------------------------------------------*/
\r
681 * Setup the SysTick timer to generate the tick interrupts at the required
\r
684 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
\r
686 void vPortSetupTimerInterrupt( void )
\r
688 /* Calculate the constants required to configure the tick interrupt. */
\r
689 #if configUSE_TICKLESS_IDLE == 1
\r
691 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
692 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
693 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
695 #endif /* configUSE_TICKLESS_IDLE */
\r
697 /* Configure SysTick to interrupt at the requested rate. */
\r
698 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
699 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
702 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
703 /*-----------------------------------------------------------*/
\r
705 __asm uint32_t ulPortSetInterruptMask( void )
\r
710 mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
714 /*-----------------------------------------------------------*/
\r
716 __asm void vPortClearInterruptMask( uint32_t ulNewMask )
\r
723 /*-----------------------------------------------------------*/
\r
725 __asm uint32_t vPortGetIPSR( void )
\r
732 /*-----------------------------------------------------------*/
\r
734 #if( configASSERT_DEFINED == 1 )
\r
736 void vPortValidateInterruptPriority( void )
\r
738 uint32_t ulCurrentInterrupt;
\r
739 uint8_t ucCurrentPriority;
\r
741 /* Obtain the number of the currently executing interrupt. */
\r
742 ulCurrentInterrupt = vPortGetIPSR();
\r
744 /* Is the interrupt number a user defined interrupt? */
\r
745 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
747 /* Look up the interrupt's priority. */
\r
748 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
750 /* The following assertion will fail if a service routine (ISR) for
\r
751 an interrupt that has been assigned a priority above
\r
752 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
753 function. ISR safe FreeRTOS API functions must *only* be called
\r
754 from interrupts that have been assigned a priority at or below
\r
755 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
757 Numerically low interrupt priority numbers represent logically high
\r
758 interrupt priorities, therefore the priority of the interrupt must
\r
759 be set to a value equal to or numerically *higher* than
\r
760 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
762 Interrupts that use the FreeRTOS API must not be left at their
\r
763 default priority of zero as that is the highest possible priority,
\r
764 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
765 and therefore also guaranteed to be invalid.
\r
767 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
768 interrupt entry is as fast and simple as possible.
\r
770 The following links provide detailed information:
\r
771 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
772 http://www.freertos.org/FAQHelp.html */
\r
773 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
776 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
777 that define each interrupt's priority to be split between bits that
\r
778 define the interrupt's pre-emption priority bits and bits that define
\r
779 the interrupt's sub-priority. For simplicity all bits must be defined
\r
780 to be pre-emption priority bits. The following assertion will fail if
\r
781 this is not the case (if some bits represent a sub-priority).
\r
783 If the application only uses CMSIS libraries for interrupt
\r
784 configuration then the correct setting can be achieved on all Cortex-M
\r
785 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
786 scheduler. Note however that some vendor specific peripheral libraries
\r
787 assume a non-zero priority group setting, in which cases using a value
\r
788 of zero will result in unpredicable behaviour. */
\r
789 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
792 #endif /* configASSERT_DEFINED */
\r