2 FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the ARM CM4F port.
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72 *----------------------------------------------------------*/
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74 /* Scheduler includes. */
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75 #include "FreeRTOS.h"
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78 #ifndef __TARGET_FPU_VFP
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79 #error This port can only be used when the project options are configured to enable hardware floating point support.
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82 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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83 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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86 #ifndef configSYSTICK_CLOCK_HZ
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87 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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88 /* Ensure the SysTick is clocked at the same frequency as the core. */
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89 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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91 /* The way the SysTick is clocked is not modified in case it is not the same
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93 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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96 /* The __weak attribute does not work as you might expect with the Keil tools
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97 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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98 the application writer wants to provide their own implementation of
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99 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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101 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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102 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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105 /* Constants required to manipulate the core. Registers first... */
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106 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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107 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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108 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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109 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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110 /* ...then bits in the registers. */
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111 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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112 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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113 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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114 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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115 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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117 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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118 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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120 /* Constants required to check the validity of an interrupt priority. */
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121 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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122 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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123 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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124 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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125 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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126 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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127 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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128 #define portPRIGROUP_SHIFT ( 8UL )
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130 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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131 #define portVECTACTIVE_MASK ( 0xFFUL )
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133 /* Constants required to manipulate the VFP. */
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134 #define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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135 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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137 /* Constants required to set up the initial stack. */
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138 #define portINITIAL_XPSR ( 0x01000000 )
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139 #define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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141 /* The systick is a 24-bit counter. */
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142 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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144 /* A fiddle factor to estimate the number of SysTick counts that would have
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145 occurred while the SysTick counter is stopped during tickless idle
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147 #define portMISSED_COUNTS_FACTOR ( 45UL )
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149 /* For strict compliance with the Cortex-M spec the task start address should
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150 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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151 #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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153 /* Each task maintains its own interrupt status in the critical nesting
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155 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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158 * Setup the timer to generate the tick interrupts. The implementation in this
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159 * file is weak to allow application writers to change the timer used to
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160 * generate the tick interrupt.
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162 void vPortSetupTimerInterrupt( void );
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165 * Exception handlers.
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167 void xPortPendSVHandler( void );
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168 void xPortSysTickHandler( void );
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169 void vPortSVCHandler( void );
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172 * Start first task is a separate function so it can be tested in isolation.
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174 static void prvStartFirstTask( void );
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177 * Functions defined in portasm.s to enable the VFP.
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179 static void prvEnableVFP( void );
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182 * Used to catch tasks that attempt to return from their implementing function.
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184 static void prvTaskExitError( void );
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186 /*-----------------------------------------------------------*/
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189 * The number of SysTick increments that make up one tick period.
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191 #if configUSE_TICKLESS_IDLE == 1
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192 static uint32_t ulTimerCountsForOneTick = 0;
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193 #endif /* configUSE_TICKLESS_IDLE */
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196 * The maximum number of tick periods that can be suppressed is limited by the
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197 * 24 bit resolution of the SysTick timer.
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199 #if configUSE_TICKLESS_IDLE == 1
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200 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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201 #endif /* configUSE_TICKLESS_IDLE */
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204 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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205 * power functionality only.
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207 #if configUSE_TICKLESS_IDLE == 1
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208 static uint32_t ulStoppedTimerCompensation = 0;
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209 #endif /* configUSE_TICKLESS_IDLE */
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212 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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213 * FreeRTOS API functions are not called from interrupts that have been assigned
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214 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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216 #if ( configASSERT_DEFINED == 1 )
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217 static uint8_t ucMaxSysCallPriority = 0;
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218 static uint32_t ulMaxPRIGROUPValue = 0;
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219 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
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220 #endif /* configASSERT_DEFINED */
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222 /*-----------------------------------------------------------*/
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225 * See header file for description.
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227 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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229 /* Simulate the stack frame as it would be created by a context switch
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232 /* Offset added to account for the way the MCU uses the stack on entry/exit
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233 of interrupts, and to ensure alignment. */
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236 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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238 *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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240 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
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242 /* Save code space by skipping register initialisation. */
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243 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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244 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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246 /* A save method is being used that requires each task to maintain its
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247 own exec return value. */
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249 *pxTopOfStack = portINITIAL_EXEC_RETURN;
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251 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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253 return pxTopOfStack;
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255 /*-----------------------------------------------------------*/
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257 static void prvTaskExitError( void )
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259 /* A function that implements a task must not exit or attempt to return to
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260 its caller as there is nothing to return to. If a task wants to exit it
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261 should instead call vTaskDelete( NULL ).
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263 Artificially force an assert() to be triggered if configASSERT() is
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264 defined, then stop here so application writers can catch the error. */
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265 configASSERT( uxCriticalNesting == ~0UL );
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266 portDISABLE_INTERRUPTS();
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269 /*-----------------------------------------------------------*/
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271 __asm void vPortSVCHandler( void )
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275 /* Get the location of the current TCB. */
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276 ldr r3, =pxCurrentTCB
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279 /* Pop the core registers. */
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280 ldmia r0!, {r4-r11, r14}
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287 /*-----------------------------------------------------------*/
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289 __asm void prvStartFirstTask( void )
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293 /* Use the NVIC offset register to locate the stack. */
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294 ldr r0, =0xE000ED08
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297 /* Set the msp back to the start of the stack. */
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299 /* Globally enable interrupts. */
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304 /* Call SVC to start the first task. */
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309 /*-----------------------------------------------------------*/
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311 __asm void prvEnableVFP( void )
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315 /* The FPU enable bits are in the CPACR. */
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316 ldr.w r0, =0xE000ED88
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319 /* Enable CP10 and CP11 coprocessors, then save back. */
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320 orr r1, r1, #( 0xf << 20 )
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325 /*-----------------------------------------------------------*/
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328 * See header file for description.
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330 BaseType_t xPortStartScheduler( void )
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332 #if( configASSERT_DEFINED == 1 )
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334 volatile uint32_t ulOriginalPriority;
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335 volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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336 volatile uint8_t ucMaxPriorityValue;
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338 /* Determine the maximum priority from which ISR safe FreeRTOS API
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339 functions can be called. ISR safe functions are those that end in
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340 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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341 ensure interrupt entry is as fast and simple as possible.
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343 Save the interrupt priority value that is about to be clobbered. */
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344 ulOriginalPriority = *pucFirstUserPriorityRegister;
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346 /* Determine the number of priority bits available. First write to all
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348 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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350 /* Read the value back to see how many bits stuck. */
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351 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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353 /* The kernel interrupt priority should be set to the lowest
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355 configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
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357 /* Use the same mask on the maximum system call priority. */
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358 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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360 /* Calculate the maximum acceptable priority group value for the number
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361 of bits read back. */
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362 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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363 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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365 ulMaxPRIGROUPValue--;
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366 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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369 /* Shift the priority group value back to its position within the AIRCR
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371 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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372 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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374 /* Restore the clobbered interrupt priority register to its original
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376 *pucFirstUserPriorityRegister = ulOriginalPriority;
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378 #endif /* conifgASSERT_DEFINED */
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380 /* Make PendSV and SysTick the lowest priority interrupts. */
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381 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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382 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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384 /* Start the timer that generates the tick ISR. Interrupts are disabled
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386 vPortSetupTimerInterrupt();
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388 /* Initialise the critical nesting count ready for the first task. */
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389 uxCriticalNesting = 0;
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391 /* Ensure the VFP is enabled - it should be anyway. */
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394 /* Lazy save always. */
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395 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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397 /* Start the first task. */
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398 prvStartFirstTask();
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400 /* Should not get here! */
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403 /*-----------------------------------------------------------*/
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405 void vPortEndScheduler( void )
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407 /* Not implemented in ports where there is nothing to return to.
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408 Artificially force an assert. */
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409 configASSERT( uxCriticalNesting == 1000UL );
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411 /*-----------------------------------------------------------*/
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413 void vPortEnterCritical( void )
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415 portDISABLE_INTERRUPTS();
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416 uxCriticalNesting++;
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418 /* This is not the interrupt safe version of the enter critical function so
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419 assert() if it is being called from an interrupt context. Only API
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420 functions that end in "FromISR" can be used in an interrupt. Only assert if
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421 the critical nesting count is 1 to protect against recursive calls if the
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422 assert function also uses a critical section. */
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423 if( uxCriticalNesting == 1 )
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425 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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428 /*-----------------------------------------------------------*/
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430 void vPortExitCritical( void )
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432 configASSERT( uxCriticalNesting );
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433 uxCriticalNesting--;
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434 if( uxCriticalNesting == 0 )
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436 portENABLE_INTERRUPTS();
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439 /*-----------------------------------------------------------*/
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441 __asm void xPortPendSVHandler( void )
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443 extern uxCriticalNesting;
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444 extern pxCurrentTCB;
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445 extern vTaskSwitchContext;
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451 /* Get the location of the current TCB. */
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452 ldr r3, =pxCurrentTCB
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455 /* Is the task using the FPU context? If so, push high vfp registers. */
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458 vstmdbeq r0!, {s16-s31}
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460 /* Save the core registers. */
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461 stmdb r0!, {r4-r11, r14}
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463 /* Save the new top of stack into the first member of the TCB. */
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467 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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473 bl vTaskSwitchContext
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478 /* The first item in pxCurrentTCB is the task top of stack. */
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482 /* Pop the core registers. */
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483 ldmia r0!, {r4-r11, r14}
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485 /* Is the task using the FPU context? If so, pop the high vfp registers
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489 vldmiaeq r0!, {s16-s31}
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493 #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
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494 #if WORKAROUND_PMU_CM001 == 1
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503 /*-----------------------------------------------------------*/
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505 void xPortSysTickHandler( void )
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507 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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508 executes all interrupts must be unmasked. There is therefore no need to
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509 save and then restore the interrupt mask value as its value is already
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510 known - therefore the slightly faster vPortRaiseBASEPRI() function is used
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511 in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
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512 vPortRaiseBASEPRI();
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514 /* Increment the RTOS tick. */
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515 if( xTaskIncrementTick() != pdFALSE )
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517 /* A context switch is required. Context switching is performed in
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518 the PendSV interrupt. Pend the PendSV interrupt. */
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519 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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522 vPortClearBASEPRIFromISR();
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524 /*-----------------------------------------------------------*/
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526 #if configUSE_TICKLESS_IDLE == 1
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528 __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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530 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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531 TickType_t xModifiableIdleTime;
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533 /* Make sure the SysTick reload value does not overflow the counter. */
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534 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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536 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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539 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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540 is accounted for as best it can be, but using the tickless mode will
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541 inevitably result in some tiny drift of the time maintained by the
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542 kernel with respect to calendar time. */
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543 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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545 /* Calculate the reload value required to wait xExpectedIdleTime
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546 tick periods. -1 is used because this code will execute part way
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547 through one of the tick periods. */
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548 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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549 if( ulReloadValue > ulStoppedTimerCompensation )
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551 ulReloadValue -= ulStoppedTimerCompensation;
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554 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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555 method as that will mask interrupts that should exit sleep mode. */
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557 __dsb( portSY_FULL_READ_WRITE );
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558 __isb( portSY_FULL_READ_WRITE );
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560 /* If a context switch is pending or a task is waiting for the scheduler
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561 to be unsuspended then abandon the low power entry. */
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562 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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564 /* Restart from whatever is left in the count register to complete
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565 this tick period. */
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566 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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568 /* Restart SysTick. */
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569 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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571 /* Reset the reload register to the value required for normal tick
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573 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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575 /* Re-enable interrupts - see comments above __disable_irq() call
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581 /* Set the new reload value. */
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582 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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584 /* Clear the SysTick count flag and set the count value back to
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586 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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588 /* Restart SysTick. */
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589 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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591 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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592 set its parameter to 0 to indicate that its implementation contains
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593 its own wait for interrupt or wait for event instruction, and so wfi
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594 should not be executed again. However, the original expected idle
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595 time variable must remain unmodified, so a copy is taken. */
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596 xModifiableIdleTime = xExpectedIdleTime;
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597 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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598 if( xModifiableIdleTime > 0 )
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600 __dsb( portSY_FULL_READ_WRITE );
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602 __isb( portSY_FULL_READ_WRITE );
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604 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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606 /* Stop SysTick. Again, the time the SysTick is stopped for is
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607 accounted for as best it can be, but using the tickless mode will
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608 inevitably result in some tiny drift of the time maintained by the
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609 kernel with respect to calendar time. */
\r
610 ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
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611 portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
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613 /* Re-enable interrupts - see comments above __disable_irq() call
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617 if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
\r
619 uint32_t ulCalculatedLoadValue;
\r
621 /* The tick interrupt has already executed, and the SysTick
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622 count reloaded with ulReloadValue. Reset the
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623 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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625 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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627 /* Don't allow a tiny value, or values that have somehow
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628 underflowed because the post sleep hook did something
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629 that took too long. */
\r
630 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
632 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
635 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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637 /* The tick interrupt handler will already have pended the tick
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638 processing in the kernel. As the pending tick will be
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639 processed as soon as this function exits, the tick value
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640 maintained by the tick is stepped forward by one less than the
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641 time spent waiting. */
\r
642 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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646 /* Something other than the tick interrupt ended the sleep.
\r
647 Work out how long the sleep lasted rounded to complete tick
\r
648 periods (not the ulReload value which accounted for part
\r
650 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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652 /* How many complete tick periods passed while the processor
\r
654 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
656 /* The reload value is set to whatever fraction of a single tick
\r
658 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
661 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
\r
662 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
\r
663 value. The critical section is used to ensure the tick interrupt
\r
664 can only execute once in the case that the reload register is near
\r
666 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
667 portENTER_CRITICAL();
\r
669 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
670 vTaskStepTick( ulCompleteTickPeriods );
\r
671 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
673 portEXIT_CRITICAL();
\r
677 #endif /* #if configUSE_TICKLESS_IDLE */
\r
679 /*-----------------------------------------------------------*/
\r
682 * Setup the SysTick timer to generate the tick interrupts at the required
\r
685 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
\r
687 void vPortSetupTimerInterrupt( void )
\r
689 /* Calculate the constants required to configure the tick interrupt. */
\r
690 #if configUSE_TICKLESS_IDLE == 1
\r
692 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
693 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
694 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
696 #endif /* configUSE_TICKLESS_IDLE */
\r
698 /* Stop and clear the SysTick. */
\r
699 portNVIC_SYSTICK_CTRL_REG = 0UL;
\r
700 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
702 /* Configure SysTick to interrupt at the requested rate. */
\r
703 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
704 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
707 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
708 /*-----------------------------------------------------------*/
\r
710 __asm uint32_t vPortGetIPSR( void )
\r
717 /*-----------------------------------------------------------*/
\r
719 #if( configASSERT_DEFINED == 1 )
\r
721 void vPortValidateInterruptPriority( void )
\r
723 uint32_t ulCurrentInterrupt;
\r
724 uint8_t ucCurrentPriority;
\r
726 /* Obtain the number of the currently executing interrupt. */
\r
727 ulCurrentInterrupt = vPortGetIPSR();
\r
729 /* Is the interrupt number a user defined interrupt? */
\r
730 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
732 /* Look up the interrupt's priority. */
\r
733 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
735 /* The following assertion will fail if a service routine (ISR) for
\r
736 an interrupt that has been assigned a priority above
\r
737 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
738 function. ISR safe FreeRTOS API functions must *only* be called
\r
739 from interrupts that have been assigned a priority at or below
\r
740 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
742 Numerically low interrupt priority numbers represent logically high
\r
743 interrupt priorities, therefore the priority of the interrupt must
\r
744 be set to a value equal to or numerically *higher* than
\r
745 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
747 Interrupts that use the FreeRTOS API must not be left at their
\r
748 default priority of zero as that is the highest possible priority,
\r
749 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
750 and therefore also guaranteed to be invalid.
\r
752 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
753 interrupt entry is as fast and simple as possible.
\r
755 The following links provide detailed information:
\r
756 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
757 http://www.freertos.org/FAQHelp.html */
\r
758 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
761 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
762 that define each interrupt's priority to be split between bits that
\r
763 define the interrupt's pre-emption priority bits and bits that define
\r
764 the interrupt's sub-priority. For simplicity all bits must be defined
\r
765 to be pre-emption priority bits. The following assertion will fail if
\r
766 this is not the case (if some bits represent a sub-priority).
\r
768 If the application only uses CMSIS libraries for interrupt
\r
769 configuration then the correct setting can be achieved on all Cortex-M
\r
770 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
771 scheduler. Note however that some vendor specific peripheral libraries
\r
772 assume a non-zero priority group setting, in which cases using a value
\r
773 of zero will result in unpredicable behaviour. */
\r
774 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
777 #endif /* configASSERT_DEFINED */
\r