2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /*-----------------------------------------------------------
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30 * Implementation of functions defined in portable.h for the ARM CM4F port.
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31 *----------------------------------------------------------*/
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33 /* Scheduler includes. */
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34 #include "FreeRTOS.h"
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37 #ifndef __TARGET_FPU_VFP
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38 #error This port can only be used when the project options are configured to enable hardware floating point support.
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41 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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42 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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45 #ifndef configSYSTICK_CLOCK_HZ
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46 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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47 /* Ensure the SysTick is clocked at the same frequency as the core. */
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48 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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50 /* The way the SysTick is clocked is not modified in case it is not the same
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52 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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55 /* The __weak attribute does not work as you might expect with the Keil tools
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56 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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57 the application writer wants to provide their own implementation of
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58 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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60 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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61 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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64 /* Constants required to manipulate the core. Registers first... */
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65 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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66 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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67 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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68 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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69 /* ...then bits in the registers. */
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70 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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71 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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72 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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73 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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74 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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76 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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77 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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79 /* Constants required to check the validity of an interrupt priority. */
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80 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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81 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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82 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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83 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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84 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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85 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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86 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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87 #define portPRIGROUP_SHIFT ( 8UL )
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89 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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90 #define portVECTACTIVE_MASK ( 0xFFUL )
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92 /* Constants required to manipulate the VFP. */
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93 #define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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94 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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96 /* Constants required to set up the initial stack. */
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97 #define portINITIAL_XPSR ( 0x01000000 )
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98 #define portINITIAL_EXC_RETURN ( 0xfffffffd )
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100 /* The systick is a 24-bit counter. */
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101 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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103 /* A fiddle factor to estimate the number of SysTick counts that would have
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104 occurred while the SysTick counter is stopped during tickless idle
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106 #define portMISSED_COUNTS_FACTOR ( 45UL )
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108 /* For strict compliance with the Cortex-M spec the task start address should
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109 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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110 #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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113 * Setup the timer to generate the tick interrupts. The implementation in this
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114 * file is weak to allow application writers to change the timer used to
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115 * generate the tick interrupt.
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117 void vPortSetupTimerInterrupt( void );
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120 * Exception handlers.
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122 void xPortPendSVHandler( void );
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123 void xPortSysTickHandler( void );
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124 void vPortSVCHandler( void );
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127 * Start first task is a separate function so it can be tested in isolation.
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129 static void prvStartFirstTask( void );
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132 * Functions defined in portasm.s to enable the VFP.
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134 static void prvEnableVFP( void );
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137 * Used to catch tasks that attempt to return from their implementing function.
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139 static void prvTaskExitError( void );
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141 /*-----------------------------------------------------------*/
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143 /* Each task maintains its own interrupt status in the critical nesting
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145 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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148 * The number of SysTick increments that make up one tick period.
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150 #if( configUSE_TICKLESS_IDLE == 1 )
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151 static uint32_t ulTimerCountsForOneTick = 0;
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152 #endif /* configUSE_TICKLESS_IDLE */
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155 * The maximum number of tick periods that can be suppressed is limited by the
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156 * 24 bit resolution of the SysTick timer.
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158 #if( configUSE_TICKLESS_IDLE == 1 )
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159 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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160 #endif /* configUSE_TICKLESS_IDLE */
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163 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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164 * power functionality only.
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166 #if( configUSE_TICKLESS_IDLE == 1 )
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167 static uint32_t ulStoppedTimerCompensation = 0;
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168 #endif /* configUSE_TICKLESS_IDLE */
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171 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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172 * FreeRTOS API functions are not called from interrupts that have been assigned
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173 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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175 #if ( configASSERT_DEFINED == 1 )
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176 static uint8_t ucMaxSysCallPriority = 0;
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177 static uint32_t ulMaxPRIGROUPValue = 0;
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178 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
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179 #endif /* configASSERT_DEFINED */
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181 /*-----------------------------------------------------------*/
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184 * See header file for description.
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186 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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188 /* Simulate the stack frame as it would be created by a context switch
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191 /* Offset added to account for the way the MCU uses the stack on entry/exit
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192 of interrupts, and to ensure alignment. */
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195 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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197 *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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199 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
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201 /* Save code space by skipping register initialisation. */
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202 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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203 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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205 /* A save method is being used that requires each task to maintain its
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206 own exec return value. */
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208 *pxTopOfStack = portINITIAL_EXC_RETURN;
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210 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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212 return pxTopOfStack;
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214 /*-----------------------------------------------------------*/
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216 static void prvTaskExitError( void )
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218 /* A function that implements a task must not exit or attempt to return to
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219 its caller as there is nothing to return to. If a task wants to exit it
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220 should instead call vTaskDelete( NULL ).
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222 Artificially force an assert() to be triggered if configASSERT() is
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223 defined, then stop here so application writers can catch the error. */
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224 configASSERT( uxCriticalNesting == ~0UL );
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225 portDISABLE_INTERRUPTS();
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228 /*-----------------------------------------------------------*/
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230 __asm void vPortSVCHandler( void )
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234 /* Get the location of the current TCB. */
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235 ldr r3, =pxCurrentTCB
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238 /* Pop the core registers. */
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239 ldmia r0!, {r4-r11, r14}
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246 /*-----------------------------------------------------------*/
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248 __asm void prvStartFirstTask( void )
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252 /* Use the NVIC offset register to locate the stack. */
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253 ldr r0, =0xE000ED08
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256 /* Set the msp back to the start of the stack. */
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258 /* Clear the bit that indicates the FPU is in use in case the FPU was used
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259 before the scheduler was started - which would otherwise result in the
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260 unnecessary leaving of space in the SVC stack for lazy saving of FPU
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264 /* Globally enable interrupts. */
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269 /* Call SVC to start the first task. */
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274 /*-----------------------------------------------------------*/
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276 __asm void prvEnableVFP( void )
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280 /* The FPU enable bits are in the CPACR. */
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281 ldr.w r0, =0xE000ED88
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284 /* Enable CP10 and CP11 coprocessors, then save back. */
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285 orr r1, r1, #( 0xf << 20 )
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290 /*-----------------------------------------------------------*/
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293 * See header file for description.
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295 BaseType_t xPortStartScheduler( void )
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297 #if( configASSERT_DEFINED == 1 )
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299 volatile uint32_t ulOriginalPriority;
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300 volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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301 volatile uint8_t ucMaxPriorityValue;
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303 /* Determine the maximum priority from which ISR safe FreeRTOS API
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304 functions can be called. ISR safe functions are those that end in
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305 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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306 ensure interrupt entry is as fast and simple as possible.
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308 Save the interrupt priority value that is about to be clobbered. */
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309 ulOriginalPriority = *pucFirstUserPriorityRegister;
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311 /* Determine the number of priority bits available. First write to all
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313 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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315 /* Read the value back to see how many bits stuck. */
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316 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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318 /* The kernel interrupt priority should be set to the lowest
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320 configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
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322 /* Use the same mask on the maximum system call priority. */
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323 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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325 /* Calculate the maximum acceptable priority group value for the number
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326 of bits read back. */
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327 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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328 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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330 ulMaxPRIGROUPValue--;
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331 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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334 #ifdef __NVIC_PRIO_BITS
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336 /* Check the CMSIS configuration that defines the number of
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337 priority bits matches the number of priority bits actually queried
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338 from the hardware. */
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339 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
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343 #ifdef configPRIO_BITS
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345 /* Check the FreeRTOS configuration that defines the number of
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346 priority bits matches the number of priority bits actually queried
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347 from the hardware. */
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348 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
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352 /* Shift the priority group value back to its position within the AIRCR
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354 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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355 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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357 /* Restore the clobbered interrupt priority register to its original
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359 *pucFirstUserPriorityRegister = ulOriginalPriority;
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361 #endif /* conifgASSERT_DEFINED */
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363 /* Make PendSV and SysTick the lowest priority interrupts. */
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364 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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365 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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367 /* Start the timer that generates the tick ISR. Interrupts are disabled
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369 vPortSetupTimerInterrupt();
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371 /* Initialise the critical nesting count ready for the first task. */
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372 uxCriticalNesting = 0;
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374 /* Ensure the VFP is enabled - it should be anyway. */
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377 /* Lazy save always. */
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378 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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380 /* Start the first task. */
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381 prvStartFirstTask();
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383 /* Should not get here! */
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386 /*-----------------------------------------------------------*/
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388 void vPortEndScheduler( void )
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390 /* Not implemented in ports where there is nothing to return to.
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391 Artificially force an assert. */
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392 configASSERT( uxCriticalNesting == 1000UL );
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394 /*-----------------------------------------------------------*/
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396 void vPortEnterCritical( void )
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398 portDISABLE_INTERRUPTS();
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399 uxCriticalNesting++;
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401 /* This is not the interrupt safe version of the enter critical function so
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402 assert() if it is being called from an interrupt context. Only API
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403 functions that end in "FromISR" can be used in an interrupt. Only assert if
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404 the critical nesting count is 1 to protect against recursive calls if the
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405 assert function also uses a critical section. */
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406 if( uxCriticalNesting == 1 )
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408 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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411 /*-----------------------------------------------------------*/
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413 void vPortExitCritical( void )
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415 configASSERT( uxCriticalNesting );
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416 uxCriticalNesting--;
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417 if( uxCriticalNesting == 0 )
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419 portENABLE_INTERRUPTS();
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422 /*-----------------------------------------------------------*/
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424 __asm void xPortPendSVHandler( void )
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426 extern uxCriticalNesting;
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427 extern pxCurrentTCB;
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428 extern vTaskSwitchContext;
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434 /* Get the location of the current TCB. */
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435 ldr r3, =pxCurrentTCB
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438 /* Is the task using the FPU context? If so, push high vfp registers. */
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441 vstmdbeq r0!, {s16-s31}
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443 /* Save the core registers. */
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444 stmdb r0!, {r4-r11, r14}
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446 /* Save the new top of stack into the first member of the TCB. */
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449 stmdb sp!, {r0, r3}
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450 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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456 bl vTaskSwitchContext
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459 ldmia sp!, {r0, r3}
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461 /* The first item in pxCurrentTCB is the task top of stack. */
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465 /* Pop the core registers. */
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466 ldmia r0!, {r4-r11, r14}
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468 /* Is the task using the FPU context? If so, pop the high vfp registers
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472 vldmiaeq r0!, {s16-s31}
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476 #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
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477 #if WORKAROUND_PMU_CM001 == 1
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486 /*-----------------------------------------------------------*/
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488 void xPortSysTickHandler( void )
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490 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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491 executes all interrupts must be unmasked. There is therefore no need to
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492 save and then restore the interrupt mask value as its value is already
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493 known - therefore the slightly faster vPortRaiseBASEPRI() function is used
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494 in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
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495 vPortRaiseBASEPRI();
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497 /* Increment the RTOS tick. */
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498 if( xTaskIncrementTick() != pdFALSE )
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500 /* A context switch is required. Context switching is performed in
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501 the PendSV interrupt. Pend the PendSV interrupt. */
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502 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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505 vPortClearBASEPRIFromISR();
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507 /*-----------------------------------------------------------*/
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509 #if( configUSE_TICKLESS_IDLE == 1 )
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511 __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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513 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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514 TickType_t xModifiableIdleTime;
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516 /* Make sure the SysTick reload value does not overflow the counter. */
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517 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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519 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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522 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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523 is accounted for as best it can be, but using the tickless mode will
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524 inevitably result in some tiny drift of the time maintained by the
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525 kernel with respect to calendar time. */
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526 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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528 /* Calculate the reload value required to wait xExpectedIdleTime
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529 tick periods. -1 is used because this code will execute part way
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530 through one of the tick periods. */
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531 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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532 if( ulReloadValue > ulStoppedTimerCompensation )
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534 ulReloadValue -= ulStoppedTimerCompensation;
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537 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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538 method as that will mask interrupts that should exit sleep mode. */
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540 __dsb( portSY_FULL_READ_WRITE );
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541 __isb( portSY_FULL_READ_WRITE );
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543 /* If a context switch is pending or a task is waiting for the scheduler
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544 to be unsuspended then abandon the low power entry. */
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545 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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547 /* Restart from whatever is left in the count register to complete
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548 this tick period. */
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549 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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551 /* Restart SysTick. */
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552 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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554 /* Reset the reload register to the value required for normal tick
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556 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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558 /* Re-enable interrupts - see comments above __disable_irq() call
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564 /* Set the new reload value. */
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565 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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567 /* Clear the SysTick count flag and set the count value back to
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569 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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571 /* Restart SysTick. */
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572 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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574 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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575 set its parameter to 0 to indicate that its implementation contains
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576 its own wait for interrupt or wait for event instruction, and so wfi
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577 should not be executed again. However, the original expected idle
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578 time variable must remain unmodified, so a copy is taken. */
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579 xModifiableIdleTime = xExpectedIdleTime;
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580 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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581 if( xModifiableIdleTime > 0 )
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583 __dsb( portSY_FULL_READ_WRITE );
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585 __isb( portSY_FULL_READ_WRITE );
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587 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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589 /* Re-enable interrupts to allow the interrupt that brought the MCU
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590 out of sleep mode to execute immediately. see comments above
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591 __disable_interrupt() call above. */
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593 __dsb( portSY_FULL_READ_WRITE );
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594 __isb( portSY_FULL_READ_WRITE );
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596 /* Disable interrupts again because the clock is about to be stopped
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597 and interrupts that execute while the clock is stopped will increase
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598 any slippage between the time maintained by the RTOS and calendar
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601 __dsb( portSY_FULL_READ_WRITE );
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602 __isb( portSY_FULL_READ_WRITE );
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604 /* Disable the SysTick clock without reading the
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605 portNVIC_SYSTICK_CTRL_REG register to ensure the
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606 portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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607 the time the SysTick is stopped for is accounted for as best it can
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608 be, but using the tickless mode will inevitably result in some tiny
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609 drift of the time maintained by the kernel with respect to calendar
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611 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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613 /* Determine if the SysTick clock has already counted to zero and
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614 been set back to the current reload value (the reload back being
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615 correct for the entire expected idle time) or if the SysTick is yet
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616 to count to zero (in which case an interrupt other than the SysTick
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617 must have brought the system out of sleep mode). */
\r
618 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
\r
620 uint32_t ulCalculatedLoadValue;
\r
622 /* The tick interrupt is already pending, and the SysTick count
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623 reloaded with ulReloadValue. Reset the
\r
624 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
\r
626 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
\r
628 /* Don't allow a tiny value, or values that have somehow
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629 underflowed because the post sleep hook did something
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630 that took too long. */
\r
631 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
633 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
636 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
\r
638 /* As the pending tick will be processed as soon as this
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639 function exits, the tick value maintained by the tick is stepped
\r
640 forward by one less than the time spent waiting. */
\r
641 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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645 /* Something other than the tick interrupt ended the sleep.
\r
646 Work out how long the sleep lasted rounded to complete tick
\r
647 periods (not the ulReload value which accounted for part
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649 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
\r
651 /* How many complete tick periods passed while the processor
\r
653 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
655 /* The reload value is set to whatever fraction of a single tick
\r
657 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
660 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
\r
661 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
\r
663 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
664 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
665 vTaskStepTick( ulCompleteTickPeriods );
\r
666 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
668 /* Exit with interrpts enabled. */
\r
673 #endif /* #if configUSE_TICKLESS_IDLE */
\r
675 /*-----------------------------------------------------------*/
\r
678 * Setup the SysTick timer to generate the tick interrupts at the required
\r
681 #if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
\r
683 void vPortSetupTimerInterrupt( void )
\r
685 /* Calculate the constants required to configure the tick interrupt. */
\r
686 #if( configUSE_TICKLESS_IDLE == 1 )
\r
688 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
689 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
690 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
692 #endif /* configUSE_TICKLESS_IDLE */
\r
694 /* Stop and clear the SysTick. */
\r
695 portNVIC_SYSTICK_CTRL_REG = 0UL;
\r
696 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
698 /* Configure SysTick to interrupt at the requested rate. */
\r
699 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
700 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
703 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
704 /*-----------------------------------------------------------*/
\r
706 __asm uint32_t vPortGetIPSR( void )
\r
713 /*-----------------------------------------------------------*/
\r
715 #if( configASSERT_DEFINED == 1 )
\r
717 void vPortValidateInterruptPriority( void )
\r
719 uint32_t ulCurrentInterrupt;
\r
720 uint8_t ucCurrentPriority;
\r
722 /* Obtain the number of the currently executing interrupt. */
\r
723 ulCurrentInterrupt = vPortGetIPSR();
\r
725 /* Is the interrupt number a user defined interrupt? */
\r
726 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
728 /* Look up the interrupt's priority. */
\r
729 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
731 /* The following assertion will fail if a service routine (ISR) for
\r
732 an interrupt that has been assigned a priority above
\r
733 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
734 function. ISR safe FreeRTOS API functions must *only* be called
\r
735 from interrupts that have been assigned a priority at or below
\r
736 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
738 Numerically low interrupt priority numbers represent logically high
\r
739 interrupt priorities, therefore the priority of the interrupt must
\r
740 be set to a value equal to or numerically *higher* than
\r
741 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
743 Interrupts that use the FreeRTOS API must not be left at their
\r
744 default priority of zero as that is the highest possible priority,
\r
745 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
746 and therefore also guaranteed to be invalid.
\r
748 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
749 interrupt entry is as fast and simple as possible.
\r
751 The following links provide detailed information:
\r
752 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
753 http://www.freertos.org/FAQHelp.html */
\r
754 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
757 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
758 that define each interrupt's priority to be split between bits that
\r
759 define the interrupt's pre-emption priority bits and bits that define
\r
760 the interrupt's sub-priority. For simplicity all bits must be defined
\r
761 to be pre-emption priority bits. The following assertion will fail if
\r
762 this is not the case (if some bits represent a sub-priority).
\r
764 If the application only uses CMSIS libraries for interrupt
\r
765 configuration then the correct setting can be achieved on all Cortex-M
\r
766 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
767 scheduler. Note however that some vendor specific peripheral libraries
\r
768 assume a non-zero priority group setting, in which cases using a value
\r
769 of zero will result in unpredictable behaviour. */
\r
770 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
773 #endif /* configASSERT_DEFINED */
\r