2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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96 /*-----------------------------------------------------------
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97 * Implementation of functions defined in portable.h for the RX100 port.
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98 *----------------------------------------------------------*/
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100 /* Standard C includes. */
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101 #include "limits.h"
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103 /* Scheduler includes. */
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104 #include "FreeRTOS.h"
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107 /* Library includes. */
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108 #include "string.h"
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110 /* Hardware specifics. */
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111 #include "iodefine.h"
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113 /*-----------------------------------------------------------*/
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115 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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116 PSW is set with U and I set, and PM and IPL clear. */
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117 #define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
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119 /* The peripheral clock is divided by this value before being supplying the
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121 #if ( configUSE_TICKLESS_IDLE == 0 )
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122 /* If tickless idle is not used then the divisor can be fixed. */
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123 #define portCLOCK_DIVISOR 8UL
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124 #elif ( configPERIPHERAL_CLOCK_HZ >= 12000000 )
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125 #define portCLOCK_DIVISOR 512UL
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126 #elif ( configPERIPHERAL_CLOCK_HZ >= 6000000 )
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127 #define portCLOCK_DIVISOR 128UL
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128 #elif ( configPERIPHERAL_CLOCK_HZ >= 1000000 )
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129 #define portCLOCK_DIVISOR 32UL
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131 #define portCLOCK_DIVISOR 8UL
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135 /* Keys required to lock and unlock access to certain system registers
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137 #define portUNLOCK_KEY 0xA50B
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138 #define portLOCK_KEY 0xA500
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140 /*-----------------------------------------------------------*/
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142 /* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
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143 and therefore installed in the vector table, when the FreeRTOS code is built
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145 extern BaseType_t vSoftwareInterruptEntry;
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146 const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
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148 /*-----------------------------------------------------------*/
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151 * Function to start the first task executing - written in asm code as direct
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152 * access to registers is required.
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154 static void prvStartFirstTask( void );
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157 * Software interrupt handler. Performs the actual context switch (saving and
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158 * restoring of registers). Written in asm code as direct register access is
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161 static void prvYieldHandler( void );
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164 * The entry point for the software interrupt handler. This is the function
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165 * that calls the inline asm function prvYieldHandler(). It is installed in
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166 * the vector table, but the code that installs it is in prvYieldHandler rather
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167 * than using a #pragma.
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169 void vSoftwareInterruptISR( void );
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172 * Sets up the periodic ISR used for the RTOS tick using the CMT.
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173 * The application writer can define configSETUP_TICK_INTERRUPT() (in
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174 * FreeRTOSConfig.h) such that their own tick interrupt configuration is used
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175 * in place of prvSetupTimerInterrupt().
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177 static void prvSetupTimerInterrupt( void );
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178 #ifndef configSETUP_TICK_INTERRUPT
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179 /* The user has not provided their own tick interrupt configuration so use
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180 the definition in this file (which uses the interval timer). */
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181 #define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
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182 #endif /* configSETUP_TICK_INTERRUPT */
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185 * Called after the sleep mode registers have been configured, prvSleep()
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186 * executes the pre and post sleep macros, and actually calls the wait
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189 #if configUSE_TICKLESS_IDLE == 1
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190 static void prvSleep( TickType_t xExpectedIdleTime );
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191 #endif /* configUSE_TICKLESS_IDLE */
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193 /*-----------------------------------------------------------*/
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195 /* These is accessed by the inline assembler functions. */
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196 extern void *pxCurrentTCB;
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197 extern void vTaskSwitchContext( void );
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199 /*-----------------------------------------------------------*/
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201 /* Calculate how many clock increments make up a single tick period. */
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202 static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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204 #if configUSE_TICKLESS_IDLE == 1
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206 /* Holds the maximum number of ticks that can be suppressed - which is
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207 basically how far into the future an interrupt can be generated. Set
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208 during initialisation. This is the maximum possible value that the
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209 compare match register can hold divided by ulMatchValueForOneTick. */
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210 static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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212 /* Flag set from the tick interrupt to allow the sleep processing to know if
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213 sleep mode was exited because of a tick interrupt, or an interrupt
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214 generated by something else. */
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215 static volatile uint32_t ulTickFlag = pdFALSE;
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217 /* The CMT counter is stopped temporarily each time it is re-programmed.
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218 The following constant offsets the CMT counter match value by the number of
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219 CMT counts that would typically be missed while the counter was stopped to
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220 compensate for the lost time. The large difference between the divided CMT
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221 clock and the CPU clock means it is likely ulStoppedTimerCompensation will
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222 equal zero - and be optimised away. */
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223 static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
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227 /*-----------------------------------------------------------*/
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230 * See header file for description.
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232 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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234 /* Offset to end up on 8 byte boundary. */
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237 /* R0 is not included as it is the stack pointer. */
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238 *pxTopOfStack = 0x00;
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240 *pxTopOfStack = 0x00;
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242 *pxTopOfStack = portINITIAL_PSW;
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244 *pxTopOfStack = ( StackType_t ) pxCode;
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246 /* When debugging it can be useful if every register is set to a known
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247 value. Otherwise code space can be saved by just setting the registers
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248 that need to be set. */
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249 #ifdef USE_FULL_REGISTER_INITIALISATION
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252 *pxTopOfStack = 0x12345678; /* r15. */
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254 *pxTopOfStack = 0xaaaabbbb;
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256 *pxTopOfStack = 0xdddddddd;
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258 *pxTopOfStack = 0xcccccccc;
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260 *pxTopOfStack = 0xbbbbbbbb;
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262 *pxTopOfStack = 0xaaaaaaaa;
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264 *pxTopOfStack = 0x99999999;
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266 *pxTopOfStack = 0x88888888;
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268 *pxTopOfStack = 0x77777777;
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270 *pxTopOfStack = 0x66666666;
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272 *pxTopOfStack = 0x55555555;
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274 *pxTopOfStack = 0x44444444;
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276 *pxTopOfStack = 0x33333333;
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278 *pxTopOfStack = 0x22222222;
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283 /* Leave space for the registers that will get popped from the stack
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284 when the task first starts executing. */
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285 pxTopOfStack -= 15;
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289 *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
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291 *pxTopOfStack = 0x12345678; /* Accumulator. */
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293 *pxTopOfStack = 0x87654321; /* Accumulator. */
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295 return pxTopOfStack;
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297 /*-----------------------------------------------------------*/
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299 BaseType_t xPortStartScheduler( void )
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301 /* Use pxCurrentTCB just so it does not get optimised away. */
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302 if( pxCurrentTCB != NULL )
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304 /* Call an application function to set up the timer that will generate
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305 the tick interrupt. This way the application can decide which
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306 peripheral to use. If tickless mode is used then the default
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307 implementation defined in this file (which uses CMT0) should not be
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309 configSETUP_TICK_INTERRUPT();
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311 /* Enable the software interrupt. */
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312 _IEN( _ICU_SWINT ) = 1;
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314 /* Ensure the software interrupt is clear. */
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315 _IR( _ICU_SWINT ) = 0;
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317 /* Ensure the software interrupt is set to the kernel priority. */
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318 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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320 /* Start the first task. */
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321 prvStartFirstTask();
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324 /* Execution should not reach here as the tasks are now running!
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325 prvSetupTimerInterrupt() is called here to prevent the compiler outputting
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326 a warning about a statically declared function not being referenced in the
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327 case that the application writer has provided their own tick interrupt
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328 configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
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329 their own routine will be called in place of prvSetupTimerInterrupt()). */
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330 prvSetupTimerInterrupt();
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332 /* Just to make sure the function is not optimised away. */
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333 ( void ) vSoftwareInterruptISR();
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335 /* Should not get here. */
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338 /*-----------------------------------------------------------*/
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340 #pragma inline_asm prvStartFirstTask
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341 static void prvStartFirstTask( void )
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343 /* When starting the scheduler there is nothing that needs moving to the
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344 interrupt stack because the function is not called from an interrupt.
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345 Just ensure the current stack is the user stack. */
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348 /* Obtain the location of the stack associated with which ever task
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349 pxCurrentTCB is currently pointing to. */
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350 MOV.L #_pxCurrentTCB, R15
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354 /* Restore the registers from the stack of the task pointed to by
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357 MVTACLO R15 /* Accumulator low 32 bits. */
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359 MVTACHI R15 /* Accumulator high 32 bits. */
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360 POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
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361 RTE /* This pops the remaining registers. */
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365 /*-----------------------------------------------------------*/
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367 #pragma interrupt ( prvTickISR( vect = configTICK_VECTOR, enable ) )
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368 void prvTickISR( void )
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370 /* Increment the tick, and perform any processing the new tick value
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372 set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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374 if( xTaskIncrementTick() != pdFALSE )
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379 set_ipl( configKERNEL_INTERRUPT_PRIORITY );
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381 #if configUSE_TICKLESS_IDLE == 1
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383 /* The CPU woke because of a tick. */
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384 ulTickFlag = pdTRUE;
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386 /* If this is the first tick since exiting tickless mode then the CMT
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387 compare match value needs resetting. */
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388 CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
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392 /*-----------------------------------------------------------*/
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394 void vSoftwareInterruptISR( void )
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398 /*-----------------------------------------------------------*/
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400 #pragma inline_asm prvYieldHandler
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401 static void prvYieldHandler( void )
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403 /* Re-enable interrupts. */
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406 /* Move the data that was automatically pushed onto the interrupt stack
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407 when the interrupt occurred from the interrupt stack to the user stack.
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409 R15 is saved before it is clobbered. */
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412 /* Read the user stack pointer. */
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415 /* Move the address down to the data being moved. */
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419 /* Copy the data across. */
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420 MOV.L [ R0 ], [ R15 ] ; R15
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421 MOV.L 4[ R0 ], 4[ R15 ] ; PC
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422 MOV.L 8[ R0 ], 8[ R15 ] ; PSW
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424 /* Move the interrupt stack pointer to its new correct position. */
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427 /* All the rest of the registers are saved directly to the user stack. */
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430 /* Save the rest of the general registers (R15 has been saved already). */
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433 /* Save the accumulator. */
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436 MVFACMI R15 ; Middle order word.
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437 SHLL #16, R15 ; Shifted left as it is restored to the low order word.
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440 /* Save the stack pointer to the TCB. */
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441 MOV.L #_pxCurrentTCB, R15
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445 /* Ensure the interrupt mask is set to the syscall priority while the
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446 kernel structures are being accessed. */
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447 MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
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449 /* Select the next task to run. */
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450 BSR.A _vTaskSwitchContext
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452 /* Reset the interrupt mask as no more data structure access is
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454 MVTIPL #configKERNEL_INTERRUPT_PRIORITY
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456 /* Load the stack pointer of the task that is now selected as the Running
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457 state task from its TCB. */
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458 MOV.L #_pxCurrentTCB,R15
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462 /* Restore the context of the new task. The PSW (Program Status Word) and
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463 PC will be popped by the RTE instruction. */
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473 /*-----------------------------------------------------------*/
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475 void vPortEndScheduler( void )
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477 /* Not implemented in ports where there is nothing to return to.
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478 Artificially force an assert. */
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479 configASSERT( pxCurrentTCB == NULL );
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481 /* The following line is just to prevent the symbol getting optimised away. */
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482 ( void ) vTaskSwitchContext();
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484 /*-----------------------------------------------------------*/
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486 static void prvSetupTimerInterrupt( void )
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489 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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495 SYSTEM.PRCR.WORD = portLOCK_KEY;
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497 /* Interrupt on compare match. */
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498 CMT0.CMCR.BIT.CMIE = 1;
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500 /* Set the compare match value. */
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501 CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
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503 /* Divide the PCLK. */
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504 #if portCLOCK_DIVISOR == 512
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506 CMT0.CMCR.BIT.CKS = 3;
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508 #elif portCLOCK_DIVISOR == 128
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510 CMT0.CMCR.BIT.CKS = 2;
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512 #elif portCLOCK_DIVISOR == 32
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514 CMT0.CMCR.BIT.CKS = 1;
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516 #elif portCLOCK_DIVISOR == 8
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518 CMT0.CMCR.BIT.CKS = 0;
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522 #error Invalid portCLOCK_DIVISOR setting
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527 /* Enable the interrupt... */
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528 _IEN( _CMT0_CMI0 ) = 1;
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530 /* ...and set its priority to the application defined kernel priority. */
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531 _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
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533 /* Start the timer. */
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534 CMT.CMSTR0.BIT.STR0 = 1;
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536 /*-----------------------------------------------------------*/
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538 #if configUSE_TICKLESS_IDLE == 1
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540 static void prvSleep( TickType_t xExpectedIdleTime )
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542 /* Allow the application to define some pre-sleep processing. */
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543 configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
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545 /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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546 means the application defined code has already executed the WAIT
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548 if( xExpectedIdleTime > 0 )
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553 /* Allow the application to define some post sleep processing. */
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554 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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557 #endif /* configUSE_TICKLESS_IDLE */
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558 /*-----------------------------------------------------------*/
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560 #if configUSE_TICKLESS_IDLE == 1
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562 void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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564 uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
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565 eSleepModeStatus eSleepAction;
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567 /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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569 /* Make sure the CMT reload value does not overflow the counter. */
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570 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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572 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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575 /* Calculate the reload value required to wait xExpectedIdleTime tick
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577 ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime;
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578 if( ulMatchValue > ulStoppedTimerCompensation )
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580 /* Compensate for the fact that the CMT is going to be stopped
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582 ulMatchValue -= ulStoppedTimerCompensation;
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585 /* Stop the CMT momentarily. The time the CMT is stopped for is
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586 accounted for as best it can be, but using the tickless mode will
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587 inevitably result in some tiny drift of the time maintained by the
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588 kernel with respect to calendar time. */
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589 CMT.CMSTR0.BIT.STR0 = 0;
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590 while( CMT.CMSTR0.BIT.STR0 == 1 )
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592 /* Nothing to do here. */
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595 /* Critical section using the global interrupt bit as the i bit is
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596 automatically reset by the WAIT instruction. */
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599 /* The tick flag is set to false before sleeping. If it is true when
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600 sleep mode is exited then sleep mode was probably exited because the
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601 tick was suppressed for the entire xExpectedIdleTime period. */
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602 ulTickFlag = pdFALSE;
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604 /* If a context switch is pending then abandon the low power entry as
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605 the context switch might have been pended by an external interrupt that
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606 requires processing. */
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607 eSleepAction = eTaskConfirmSleepModeStatus();
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608 if( eSleepAction == eAbortSleep )
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610 /* Restart tick. */
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611 CMT.CMSTR0.BIT.STR0 = 1;
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614 else if( eSleepAction == eNoTasksWaitingTimeout )
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616 /* Protection off. */
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617 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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619 /* Ready for software standby with all clocks stopped. */
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620 SYSTEM.SBYCR.BIT.SSBY = 1;
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622 /* Protection on. */
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623 SYSTEM.PRCR.WORD = portLOCK_KEY;
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625 /* Sleep until something happens. Calling prvSleep() will
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626 automatically reset the i bit in the PSW. */
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627 prvSleep( xExpectedIdleTime );
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629 /* Restart the CMT. */
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630 CMT.CMSTR0.BIT.STR0 = 1;
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634 /* Protection off. */
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635 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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637 /* Ready for deep sleep mode. */
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638 SYSTEM.MSTPCRC.BIT.DSLPE = 1;
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639 SYSTEM.MSTPCRA.BIT.MSTPA28 = 1;
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640 SYSTEM.SBYCR.BIT.SSBY = 0;
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642 /* Protection on. */
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643 SYSTEM.PRCR.WORD = portLOCK_KEY;
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645 /* Adjust the match value to take into account that the current
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646 time slice is already partially complete. */
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647 ulMatchValue -= ( uint32_t ) CMT0.CMCNT;
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648 CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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650 /* Restart the CMT to count up to the new match value. */
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652 CMT.CMSTR0.BIT.STR0 = 1;
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654 /* Sleep until something happens. Calling prvSleep() will
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655 automatically reset the i bit in the PSW. */
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656 prvSleep( xExpectedIdleTime );
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658 /* Stop CMT. Again, the time the SysTick is stopped for is
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659 accounted for as best it can be, but using the tickless mode will
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660 inevitably result in some tiny drift of the time maintained by the
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661 kernel with respect to calendar time. */
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662 CMT.CMSTR0.BIT.STR0 = 0;
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663 while( CMT.CMSTR0.BIT.STR0 == 1 )
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665 /* Nothing to do here. */
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668 ulCurrentCount = ( uint32_t ) CMT0.CMCNT;
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670 if( ulTickFlag != pdFALSE )
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672 /* The tick interrupt has already executed, although because
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673 this function is called with the scheduler suspended the actual
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674 tick processing will not occur until after this function has
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675 exited. Reset the match value with whatever remains of this
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677 ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
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678 CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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680 /* The tick interrupt handler will already have pended the tick
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681 processing in the kernel. As the pending tick will be
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682 processed as soon as this function exits, the tick value
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683 maintained by the tick is stepped forward by one less than the
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684 time spent sleeping. The actual stepping of the tick appears
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685 later in this function. */
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686 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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690 /* Something other than the tick interrupt ended the sleep.
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691 How many complete tick periods passed while the processor was
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693 ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
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695 /* The match value is set to whatever fraction of a single tick
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697 ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
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698 CMT0.CMCOR = ( uint16_t ) ulMatchValue;
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701 /* Restart the CMT so it runs up to the match value. The match value
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702 will get set to the value required to generate exactly one tick period
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703 the next time the CMT interrupt executes. */
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705 CMT.CMSTR0.BIT.STR0 = 1;
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707 /* Wind the tick forward by the number of tick periods that the CPU
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708 remained in a low power state. */
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709 vTaskStepTick( ulCompleteTickPeriods );
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713 #endif /* configUSE_TICKLESS_IDLE */
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