2 FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not itcan be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /*-----------------------------------------------------------
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76 * Implementation of functions defined in portable.h for the Cygnal port.
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77 *----------------------------------------------------------*/
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79 /* Standard includes. */
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82 /* Scheduler includes. */
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83 #include "FreeRTOS.h"
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86 /* Constants required to setup timer 2 to produce the RTOS tick. */
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87 #define portCLOCK_DIVISOR ( ( unsigned long ) 12 )
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88 #define portMAX_TIMER_VALUE ( ( unsigned long ) 0xffff )
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89 #define portENABLE_TIMER ( ( unsigned char ) 0x04 )
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90 #define portTIMER_2_INTERRUPT_ENABLE ( ( unsigned char ) 0x20 )
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92 /* The value used in the IE register when a task first starts. */
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93 #define portGLOBAL_INTERRUPT_BIT ( ( portSTACK_TYPE ) 0x80 )
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95 /* The value used in the PSW register when a task first starts. */
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96 #define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00 )
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98 /* Macro to clear the timer 2 interrupt flag. */
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99 #define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;
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101 /* Used during a context switch to store the size of the stack being copied
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102 to or from XRAM. */
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103 data static unsigned char ucStackBytes;
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105 /* Used during a context switch to point to the next byte in XRAM from/to which
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106 a RAM byte is to be copied. */
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107 xdata static portSTACK_TYPE * data pxXRAMStack;
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109 /* Used during a context switch to point to the next byte in RAM from/to which
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110 an XRAM byte is to be copied. */
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111 data static portSTACK_TYPE * data pxRAMStack;
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113 /* We require the address of the pxCurrentTCB variable, but don't want to know
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114 any details of its type. */
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115 typedef void tskTCB;
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116 extern volatile tskTCB * volatile pxCurrentTCB;
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119 * Setup the hardware to generate an interrupt off timer 2 at the required
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122 static void prvSetupTimerInterrupt( void );
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124 /*-----------------------------------------------------------*/
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126 * Macro that copies the current stack from internal RAM to XRAM. This is
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127 * required as the 8051 only contains enough internal RAM for a single stack,
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128 * but we have a stack for every task.
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130 #define portCOPY_STACK_TO_XRAM() \
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132 /* pxCurrentTCB points to a TCB which itself points to the location into \
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133 which the first stack byte should be copied. Set pxXRAMStack to point \
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134 to the location into which the first stack byte is to be copied. */ \
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135 pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
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137 /* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
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138 pxRAMStack = ( data portSTACK_TYPE * data ) configSTACK_START; \
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140 /* Calculate the size of the stack we are about to copy from the current \
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141 stack pointer value. */ \
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142 ucStackBytes = SP - ( configSTACK_START - 1 ); \
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144 /* Before starting to copy the stack, store the calculated stack size so \
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145 the stack can be restored when the task is resumed. */ \
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146 *pxXRAMStack = ucStackBytes; \
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148 /* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
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149 have already stored the stack size into XRAM. */ \
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150 while( ucStackBytes ) \
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153 *pxXRAMStack = *pxRAMStack; \
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158 /*-----------------------------------------------------------*/
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161 * Macro that copies the stack of the task being resumed from XRAM into
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164 #define portCOPY_XRAM_TO_STACK() \
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166 /* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
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167 copy the data back out of XRAM and into the stack. */ \
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168 pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
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169 pxRAMStack = ( data portSTACK_TYPE * data ) ( configSTACK_START - 1 ); \
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171 /* The first value stored in XRAM was the size of the stack - i.e. the \
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172 number of bytes we need to copy back. */ \
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173 ucStackBytes = pxXRAMStack[ 0 ]; \
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175 /* Copy the required number of bytes back into the stack. */ \
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180 *pxRAMStack = *pxXRAMStack; \
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182 } while( ucStackBytes ); \
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184 /* Restore the stack pointer ready to use the restored stack. */ \
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185 SP = ( unsigned char ) pxRAMStack; \
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187 /*-----------------------------------------------------------*/
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190 * Macro to push the current execution context onto the stack, before the stack
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191 * is moved to XRAM.
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193 #define portSAVE_CONTEXT() \
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196 /* Push ACC first, as when restoring the context it must be restored \
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197 last (it is used to set the IE register). */ \
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199 /* Store the IE register then disable interrupts. */ \
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220 /*-----------------------------------------------------------*/
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223 * Macro that restores the execution context from the stack. The execution
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224 * context was saved into the stack before the stack was copied into XRAM.
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226 #define portRESTORE_CONTEXT() \
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242 /* The next byte of the stack is the IE register. Only the global \
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243 enable bit forms part of the task context. Pop off the IE then set \
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244 the global enable bit to match that of the stored IE register. */ \
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252 /* Finally pop off the ACC, which was the first register saved. */ \
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257 /*-----------------------------------------------------------*/
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260 * See header file for description.
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262 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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264 unsigned long ulAddress;
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265 portSTACK_TYPE *pxStartOfStack;
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267 /* Leave space to write the size of the stack as the first byte. */
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268 pxStartOfStack = pxTopOfStack;
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271 /* Place a few bytes of known values on the bottom of the stack.
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272 This is just useful for debugging and can be uncommented if required.
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273 *pxTopOfStack = 0x11;
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275 *pxTopOfStack = 0x22;
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277 *pxTopOfStack = 0x33;
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281 /* Simulate how the stack would look after a call to the scheduler tick
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284 The return address that would have been pushed by the MCU. */
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285 ulAddress = ( unsigned long ) pxCode;
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286 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress;
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289 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress );
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292 /* Next all the registers will have been pushed by portSAVE_CONTEXT(). */
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293 *pxTopOfStack = 0xaa; /* acc */
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296 /* We want tasks to start with interrupts enabled. */
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297 *pxTopOfStack = portGLOBAL_INTERRUPT_BIT;
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300 /* The function parameters will be passed in the DPTR and B register as
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301 a three byte generic pointer is used. */
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302 ulAddress = ( unsigned long ) pvParameters;
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303 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPL */
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306 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPH */
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309 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* b */
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312 /* The remaining registers are straight forward. */
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313 *pxTopOfStack = 0x02; /* R2 */
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315 *pxTopOfStack = 0x03; /* R3 */
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317 *pxTopOfStack = 0x04; /* R4 */
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319 *pxTopOfStack = 0x05; /* R5 */
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321 *pxTopOfStack = 0x06; /* R6 */
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323 *pxTopOfStack = 0x07; /* R7 */
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325 *pxTopOfStack = 0x00; /* R0 */
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327 *pxTopOfStack = 0x01; /* R1 */
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329 *pxTopOfStack = 0x00; /* PSW */
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331 *pxTopOfStack = 0xbb; /* BP */
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333 /* Dont increment the stack size here as we don't want to include
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334 the stack size byte as part of the stack size count.
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336 Finally we place the stack size at the beginning. */
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337 *pxStartOfStack = ( portSTACK_TYPE ) ( pxTopOfStack - pxStartOfStack );
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339 /* Unlike most ports, we return the start of the stack as this is where the
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340 size of the stack is stored. */
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341 return pxStartOfStack;
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343 /*-----------------------------------------------------------*/
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346 * See header file for description.
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348 portBASE_TYPE xPortStartScheduler( void )
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350 /* Setup timer 2 to generate the RTOS tick. */
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351 prvSetupTimerInterrupt();
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353 /* Make sure we start with the expected SFR page. This line should not
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354 really be required. */
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357 /* Copy the stack for the first task to execute from XRAM into the stack,
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358 restore the task context from the new stack, then start running the task. */
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359 portCOPY_XRAM_TO_STACK();
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360 portRESTORE_CONTEXT();
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362 /* Should never get here! */
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365 /*-----------------------------------------------------------*/
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367 void vPortEndScheduler( void )
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369 /* Not implemented for this port. */
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371 /*-----------------------------------------------------------*/
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374 * Manual context switch. The first thing we do is save the registers so we
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375 * can use a naked attribute.
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377 void vPortYield( void ) _naked
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379 /* Save the execution context onto the stack, then copy the entire stack
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380 to XRAM. This is necessary as the internal RAM is only large enough to
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381 hold one stack, and we want one per task.
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383 PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
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385 portSAVE_CONTEXT();
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386 portCOPY_STACK_TO_XRAM();
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388 /* Call the standard scheduler context switch function. */
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389 vTaskSwitchContext();
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391 /* Copy the stack of the task about to execute from XRAM into RAM and
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392 restore it's context ready to run on exiting. */
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393 portCOPY_XRAM_TO_STACK();
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394 portRESTORE_CONTEXT();
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396 /*-----------------------------------------------------------*/
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398 #if configUSE_PREEMPTION == 1
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399 void vTimer2ISR( void ) interrupt 5 _naked
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401 /* Preemptive context switch function triggered by the timer 2 ISR.
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402 This does the same as vPortYield() (see above) with the addition
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403 of incrementing the RTOS tick count. */
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405 portSAVE_CONTEXT();
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406 portCOPY_STACK_TO_XRAM();
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408 vTaskIncrementTick();
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409 vTaskSwitchContext();
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411 portCLEAR_INTERRUPT_FLAG();
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412 portCOPY_XRAM_TO_STACK();
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413 portRESTORE_CONTEXT();
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416 void vTimer2ISR( void ) interrupt 5
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418 /* When using the cooperative scheduler the timer 2 ISR is only
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419 required to increment the RTOS tick count. */
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421 vTaskIncrementTick();
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422 portCLEAR_INTERRUPT_FLAG();
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425 /*-----------------------------------------------------------*/
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427 static void prvSetupTimerInterrupt( void )
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429 unsigned char ucOriginalSFRPage;
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431 /* Constants calculated to give the required timer capture values. */
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432 const unsigned long ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;
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433 const unsigned long ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;
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434 const unsigned long ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;
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435 const unsigned char ucLowCaptureByte = ( unsigned char ) ( ulCaptureValue & ( unsigned long ) 0xff );
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436 const unsigned char ucHighCaptureByte = ( unsigned char ) ( ulCaptureValue >> ( unsigned long ) 8 );
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438 /* NOTE: This uses a timer only present on 8052 architecture. */
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440 /* Remember the current SFR page so we can restore it at the end of the
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442 ucOriginalSFRPage = SFRPAGE;
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445 /* TMR2CF can be left in its default state. */
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446 TMR2CF = ( unsigned char ) 0;
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448 /* Setup the overflow reload value. */
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449 RCAP2L = ucLowCaptureByte;
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450 RCAP2H = ucHighCaptureByte;
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452 /* The initial load is performed manually. */
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453 TMR2L = ucLowCaptureByte;
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454 TMR2H = ucHighCaptureByte;
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456 /* Enable the timer 2 interrupts. */
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457 IE |= portTIMER_2_INTERRUPT_ENABLE;
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459 /* Interrupts are disabled when this is called so the timer can be started
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461 TMR2CN = portENABLE_TIMER;
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463 /* Restore the original SFR page. */
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464 SFRPAGE = ucOriginalSFRPage;
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projects / freertos / blob