2 * FreeRTOS Kernel V10.0.1
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the Cygnal port.
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30 *----------------------------------------------------------*/
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32 /* Standard includes. */
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35 /* Scheduler includes. */
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36 #include "FreeRTOS.h"
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39 /* Constants required to setup timer 2 to produce the RTOS tick. */
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40 #define portCLOCK_DIVISOR ( ( uint32_t ) 12 )
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41 #define portMAX_TIMER_VALUE ( ( uint32_t ) 0xffff )
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42 #define portENABLE_TIMER ( ( uint8_t ) 0x04 )
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43 #define portTIMER_2_INTERRUPT_ENABLE ( ( uint8_t ) 0x20 )
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45 /* The value used in the IE register when a task first starts. */
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46 #define portGLOBAL_INTERRUPT_BIT ( ( StackType_t ) 0x80 )
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48 /* The value used in the PSW register when a task first starts. */
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49 #define portINITIAL_PSW ( ( StackType_t ) 0x00 )
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51 /* Macro to clear the timer 2 interrupt flag. */
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52 #define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;
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54 /* Used during a context switch to store the size of the stack being copied
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56 data static uint8_t ucStackBytes;
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58 /* Used during a context switch to point to the next byte in XRAM from/to which
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59 a RAM byte is to be copied. */
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60 xdata static StackType_t * data pxXRAMStack;
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62 /* Used during a context switch to point to the next byte in RAM from/to which
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63 an XRAM byte is to be copied. */
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64 data static StackType_t * data pxRAMStack;
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66 /* We require the address of the pxCurrentTCB variable, but don't want to know
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67 any details of its type. */
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69 extern volatile TCB_t * volatile pxCurrentTCB;
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72 * Setup the hardware to generate an interrupt off timer 2 at the required
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75 static void prvSetupTimerInterrupt( void );
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77 /*-----------------------------------------------------------*/
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79 * Macro that copies the current stack from internal RAM to XRAM. This is
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80 * required as the 8051 only contains enough internal RAM for a single stack,
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81 * but we have a stack for every task.
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83 #define portCOPY_STACK_TO_XRAM() \
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85 /* pxCurrentTCB points to a TCB which itself points to the location into \
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86 which the first stack byte should be copied. Set pxXRAMStack to point \
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87 to the location into which the first stack byte is to be copied. */ \
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88 pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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90 /* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
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91 pxRAMStack = ( data StackType_t * data ) configSTACK_START; \
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93 /* Calculate the size of the stack we are about to copy from the current \
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94 stack pointer value. */ \
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95 ucStackBytes = SP - ( configSTACK_START - 1 ); \
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97 /* Before starting to copy the stack, store the calculated stack size so \
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98 the stack can be restored when the task is resumed. */ \
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99 *pxXRAMStack = ucStackBytes; \
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101 /* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
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102 have already stored the stack size into XRAM. */ \
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103 while( ucStackBytes ) \
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106 *pxXRAMStack = *pxRAMStack; \
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111 /*-----------------------------------------------------------*/
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114 * Macro that copies the stack of the task being resumed from XRAM into
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117 #define portCOPY_XRAM_TO_STACK() \
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119 /* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
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120 copy the data back out of XRAM and into the stack. */ \
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121 pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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122 pxRAMStack = ( data StackType_t * data ) ( configSTACK_START - 1 ); \
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124 /* The first value stored in XRAM was the size of the stack - i.e. the \
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125 number of bytes we need to copy back. */ \
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126 ucStackBytes = pxXRAMStack[ 0 ]; \
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128 /* Copy the required number of bytes back into the stack. */ \
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133 *pxRAMStack = *pxXRAMStack; \
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135 } while( ucStackBytes ); \
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137 /* Restore the stack pointer ready to use the restored stack. */ \
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138 SP = ( uint8_t ) pxRAMStack; \
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140 /*-----------------------------------------------------------*/
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143 * Macro to push the current execution context onto the stack, before the stack
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144 * is moved to XRAM.
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146 #define portSAVE_CONTEXT() \
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149 /* Push ACC first, as when restoring the context it must be restored \
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150 last (it is used to set the IE register). */ \
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152 /* Store the IE register then disable interrupts. */ \
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173 /*-----------------------------------------------------------*/
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176 * Macro that restores the execution context from the stack. The execution
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177 * context was saved into the stack before the stack was copied into XRAM.
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179 #define portRESTORE_CONTEXT() \
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195 /* The next byte of the stack is the IE register. Only the global \
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196 enable bit forms part of the task context. Pop off the IE then set \
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197 the global enable bit to match that of the stored IE register. */ \
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205 /* Finally pop off the ACC, which was the first register saved. */ \
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210 /*-----------------------------------------------------------*/
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213 * See header file for description.
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215 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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217 uint32_t ulAddress;
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218 StackType_t *pxStartOfStack;
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220 /* Leave space to write the size of the stack as the first byte. */
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221 pxStartOfStack = pxTopOfStack;
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224 /* Place a few bytes of known values on the bottom of the stack.
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225 This is just useful for debugging and can be uncommented if required.
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226 *pxTopOfStack = 0x11;
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228 *pxTopOfStack = 0x22;
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230 *pxTopOfStack = 0x33;
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234 /* Simulate how the stack would look after a call to the scheduler tick
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237 The return address that would have been pushed by the MCU. */
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238 ulAddress = ( uint32_t ) pxCode;
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239 *pxTopOfStack = ( StackType_t ) ulAddress;
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242 *pxTopOfStack = ( StackType_t ) ( ulAddress );
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245 /* Next all the registers will have been pushed by portSAVE_CONTEXT(). */
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246 *pxTopOfStack = 0xaa; /* acc */
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249 /* We want tasks to start with interrupts enabled. */
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250 *pxTopOfStack = portGLOBAL_INTERRUPT_BIT;
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253 /* The function parameters will be passed in the DPTR and B register as
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254 a three byte generic pointer is used. */
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255 ulAddress = ( uint32_t ) pvParameters;
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256 *pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */
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259 *pxTopOfStack = ( StackType_t ) ulAddress; /* DPH */
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262 *pxTopOfStack = ( StackType_t ) ulAddress; /* b */
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265 /* The remaining registers are straight forward. */
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266 *pxTopOfStack = 0x02; /* R2 */
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268 *pxTopOfStack = 0x03; /* R3 */
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270 *pxTopOfStack = 0x04; /* R4 */
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272 *pxTopOfStack = 0x05; /* R5 */
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274 *pxTopOfStack = 0x06; /* R6 */
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276 *pxTopOfStack = 0x07; /* R7 */
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278 *pxTopOfStack = 0x00; /* R0 */
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280 *pxTopOfStack = 0x01; /* R1 */
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282 *pxTopOfStack = 0x00; /* PSW */
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284 *pxTopOfStack = 0xbb; /* BP */
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286 /* Dont increment the stack size here as we don't want to include
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287 the stack size byte as part of the stack size count.
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289 Finally we place the stack size at the beginning. */
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290 *pxStartOfStack = ( StackType_t ) ( pxTopOfStack - pxStartOfStack );
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292 /* Unlike most ports, we return the start of the stack as this is where the
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293 size of the stack is stored. */
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294 return pxStartOfStack;
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296 /*-----------------------------------------------------------*/
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299 * See header file for description.
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301 BaseType_t xPortStartScheduler( void )
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303 /* Setup timer 2 to generate the RTOS tick. */
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304 prvSetupTimerInterrupt();
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306 /* Make sure we start with the expected SFR page. This line should not
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307 really be required. */
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310 /* Copy the stack for the first task to execute from XRAM into the stack,
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311 restore the task context from the new stack, then start running the task. */
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312 portCOPY_XRAM_TO_STACK();
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313 portRESTORE_CONTEXT();
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315 /* Should never get here! */
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318 /*-----------------------------------------------------------*/
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320 void vPortEndScheduler( void )
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322 /* Not implemented for this port. */
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324 /*-----------------------------------------------------------*/
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327 * Manual context switch. The first thing we do is save the registers so we
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328 * can use a naked attribute.
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330 void vPortYield( void ) _naked
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332 /* Save the execution context onto the stack, then copy the entire stack
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333 to XRAM. This is necessary as the internal RAM is only large enough to
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334 hold one stack, and we want one per task.
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336 PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
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338 portSAVE_CONTEXT();
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339 portCOPY_STACK_TO_XRAM();
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341 /* Call the standard scheduler context switch function. */
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342 vTaskSwitchContext();
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344 /* Copy the stack of the task about to execute from XRAM into RAM and
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345 restore it's context ready to run on exiting. */
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346 portCOPY_XRAM_TO_STACK();
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347 portRESTORE_CONTEXT();
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349 /*-----------------------------------------------------------*/
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351 #if configUSE_PREEMPTION == 1
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352 void vTimer2ISR( void ) interrupt 5 _naked
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354 /* Preemptive context switch function triggered by the timer 2 ISR.
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355 This does the same as vPortYield() (see above) with the addition
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356 of incrementing the RTOS tick count. */
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358 portSAVE_CONTEXT();
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359 portCOPY_STACK_TO_XRAM();
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361 if( xTaskIncrementTick() != pdFALSE )
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363 vTaskSwitchContext();
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366 portCLEAR_INTERRUPT_FLAG();
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367 portCOPY_XRAM_TO_STACK();
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368 portRESTORE_CONTEXT();
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371 void vTimer2ISR( void ) interrupt 5
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373 /* When using the cooperative scheduler the timer 2 ISR is only
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374 required to increment the RTOS tick count. */
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376 xTaskIncrementTick();
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377 portCLEAR_INTERRUPT_FLAG();
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380 /*-----------------------------------------------------------*/
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382 static void prvSetupTimerInterrupt( void )
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384 uint8_t ucOriginalSFRPage;
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386 /* Constants calculated to give the required timer capture values. */
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387 const uint32_t ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;
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388 const uint32_t ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;
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389 const uint32_t ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;
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390 const uint8_t ucLowCaptureByte = ( uint8_t ) ( ulCaptureValue & ( uint32_t ) 0xff );
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391 const uint8_t ucHighCaptureByte = ( uint8_t ) ( ulCaptureValue >> ( uint32_t ) 8 );
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393 /* NOTE: This uses a timer only present on 8052 architecture. */
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395 /* Remember the current SFR page so we can restore it at the end of the
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397 ucOriginalSFRPage = SFRPAGE;
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400 /* TMR2CF can be left in its default state. */
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401 TMR2CF = ( uint8_t ) 0;
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403 /* Setup the overflow reload value. */
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404 RCAP2L = ucLowCaptureByte;
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405 RCAP2H = ucHighCaptureByte;
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407 /* The initial load is performed manually. */
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408 TMR2L = ucLowCaptureByte;
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409 TMR2H = ucHighCaptureByte;
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411 /* Enable the timer 2 interrupts. */
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412 IE |= portTIMER_2_INTERRUPT_ENABLE;
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414 /* Interrupts are disabled when this is called so the timer can be started
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416 TMR2CN = portENABLE_TIMER;
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418 /* Restore the original SFR page. */
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419 SFRPAGE = ucOriginalSFRPage;
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