2 FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
\r
5 ***************************************************************************
\r
7 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
8 * Complete, revised, and edited pdf reference manuals are also *
\r
11 * Purchasing FreeRTOS documentation will not only help you, by *
\r
12 * ensuring you get running as quickly as possible and with an *
\r
13 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
14 * the FreeRTOS project to continue with its mission of providing *
\r
15 * professional grade, cross platform, de facto standard solutions *
\r
16 * for microcontrollers - completely free of charge! *
\r
18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
20 * Thank you for using FreeRTOS, and thank you for your support! *
\r
22 ***************************************************************************
\r
25 This file is part of the FreeRTOS distribution.
\r
27 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
28 the terms of the GNU General Public License (version 2) as published by the
\r
29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
30 >>>NOTE<<< The modification to the GPL is included to allow you to
\r
31 distribute a combined work that includes FreeRTOS without being obliged to
\r
32 provide the source code for proprietary components outside of the FreeRTOS
\r
33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
\r
34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
\r
35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
36 more details. You should have received a copy of the GNU General Public
\r
37 License and the FreeRTOS license exception along with FreeRTOS; if not it
\r
38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
\r
39 by writing to Richard Barry, contact details for whom are available on the
\r
44 ***************************************************************************
\r
46 * Having a problem? Start by reading the FAQ "My application does *
\r
47 * not run, what could be wrong? *
\r
49 * http://www.FreeRTOS.org/FAQHelp.html *
\r
51 ***************************************************************************
\r
54 http://www.FreeRTOS.org - Documentation, training, latest information,
\r
55 license and contact details.
\r
57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
58 including FreeRTOS+Trace - an indispensable productivity tool.
\r
60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
\r
61 the code with commercial support, indemnification, and middleware, under
\r
62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
\r
63 provide a safety engineered and independently SIL3 certified version under
\r
64 the SafeRTOS brand: http://www.SafeRTOS.com.
\r
67 /*-----------------------------------------------------------
\r
68 * Implementation of functions defined in portable.h for the Cygnal port.
\r
69 *----------------------------------------------------------*/
\r
71 /* Standard includes. */
\r
74 /* Scheduler includes. */
\r
75 #include "FreeRTOS.h"
\r
78 /* Constants required to setup timer 2 to produce the RTOS tick. */
\r
79 #define portCLOCK_DIVISOR ( ( unsigned long ) 12 )
\r
80 #define portMAX_TIMER_VALUE ( ( unsigned long ) 0xffff )
\r
81 #define portENABLE_TIMER ( ( unsigned char ) 0x04 )
\r
82 #define portTIMER_2_INTERRUPT_ENABLE ( ( unsigned char ) 0x20 )
\r
84 /* The value used in the IE register when a task first starts. */
\r
85 #define portGLOBAL_INTERRUPT_BIT ( ( portSTACK_TYPE ) 0x80 )
\r
87 /* The value used in the PSW register when a task first starts. */
\r
88 #define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00 )
\r
90 /* Macro to clear the timer 2 interrupt flag. */
\r
91 #define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;
\r
93 /* Used during a context switch to store the size of the stack being copied
\r
95 data static unsigned char ucStackBytes;
\r
97 /* Used during a context switch to point to the next byte in XRAM from/to which
\r
98 a RAM byte is to be copied. */
\r
99 xdata static portSTACK_TYPE * data pxXRAMStack;
\r
101 /* Used during a context switch to point to the next byte in RAM from/to which
\r
102 an XRAM byte is to be copied. */
\r
103 data static portSTACK_TYPE * data pxRAMStack;
\r
105 /* We require the address of the pxCurrentTCB variable, but don't want to know
\r
106 any details of its type. */
\r
107 typedef void tskTCB;
\r
108 extern volatile tskTCB * volatile pxCurrentTCB;
\r
111 * Setup the hardware to generate an interrupt off timer 2 at the required
\r
114 static void prvSetupTimerInterrupt( void );
\r
116 /*-----------------------------------------------------------*/
\r
118 * Macro that copies the current stack from internal RAM to XRAM. This is
\r
119 * required as the 8051 only contains enough internal RAM for a single stack,
\r
120 * but we have a stack for every task.
\r
122 #define portCOPY_STACK_TO_XRAM() \
\r
124 /* pxCurrentTCB points to a TCB which itself points to the location into \
\r
125 which the first stack byte should be copied. Set pxXRAMStack to point \
\r
126 to the location into which the first stack byte is to be copied. */ \
\r
127 pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
\r
129 /* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
\r
130 pxRAMStack = ( data portSTACK_TYPE * data ) configSTACK_START; \
\r
132 /* Calculate the size of the stack we are about to copy from the current \
\r
133 stack pointer value. */ \
\r
134 ucStackBytes = SP - ( configSTACK_START - 1 ); \
\r
136 /* Before starting to copy the stack, store the calculated stack size so \
\r
137 the stack can be restored when the task is resumed. */ \
\r
138 *pxXRAMStack = ucStackBytes; \
\r
140 /* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
\r
141 have already stored the stack size into XRAM. */ \
\r
142 while( ucStackBytes ) \
\r
145 *pxXRAMStack = *pxRAMStack; \
\r
150 /*-----------------------------------------------------------*/
\r
153 * Macro that copies the stack of the task being resumed from XRAM into
\r
156 #define portCOPY_XRAM_TO_STACK() \
\r
158 /* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
\r
159 copy the data back out of XRAM and into the stack. */ \
\r
160 pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
\r
161 pxRAMStack = ( data portSTACK_TYPE * data ) ( configSTACK_START - 1 ); \
\r
163 /* The first value stored in XRAM was the size of the stack - i.e. the \
\r
164 number of bytes we need to copy back. */ \
\r
165 ucStackBytes = pxXRAMStack[ 0 ]; \
\r
167 /* Copy the required number of bytes back into the stack. */ \
\r
172 *pxRAMStack = *pxXRAMStack; \
\r
174 } while( ucStackBytes ); \
\r
176 /* Restore the stack pointer ready to use the restored stack. */ \
\r
177 SP = ( unsigned char ) pxRAMStack; \
\r
179 /*-----------------------------------------------------------*/
\r
182 * Macro to push the current execution context onto the stack, before the stack
\r
183 * is moved to XRAM.
\r
185 #define portSAVE_CONTEXT() \
\r
188 /* Push ACC first, as when restoring the context it must be restored \
\r
189 last (it is used to set the IE register). */ \
\r
191 /* Store the IE register then disable interrupts. */ \
\r
212 /*-----------------------------------------------------------*/
\r
215 * Macro that restores the execution context from the stack. The execution
\r
216 * context was saved into the stack before the stack was copied into XRAM.
\r
218 #define portRESTORE_CONTEXT() \
\r
234 /* The next byte of the stack is the IE register. Only the global \
\r
235 enable bit forms part of the task context. Pop off the IE then set \
\r
236 the global enable bit to match that of the stored IE register. */ \
\r
244 /* Finally pop off the ACC, which was the first register saved. */ \
\r
249 /*-----------------------------------------------------------*/
\r
252 * See header file for description.
\r
254 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
\r
256 unsigned long ulAddress;
\r
257 portSTACK_TYPE *pxStartOfStack;
\r
259 /* Leave space to write the size of the stack as the first byte. */
\r
260 pxStartOfStack = pxTopOfStack;
\r
263 /* Place a few bytes of known values on the bottom of the stack.
\r
264 This is just useful for debugging and can be uncommented if required.
\r
265 *pxTopOfStack = 0x11;
\r
267 *pxTopOfStack = 0x22;
\r
269 *pxTopOfStack = 0x33;
\r
273 /* Simulate how the stack would look after a call to the scheduler tick
\r
276 The return address that would have been pushed by the MCU. */
\r
277 ulAddress = ( unsigned long ) pxCode;
\r
278 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress;
\r
281 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress );
\r
284 /* Next all the registers will have been pushed by portSAVE_CONTEXT(). */
\r
285 *pxTopOfStack = 0xaa; /* acc */
\r
288 /* We want tasks to start with interrupts enabled. */
\r
289 *pxTopOfStack = portGLOBAL_INTERRUPT_BIT;
\r
292 /* The function parameters will be passed in the DPTR and B register as
\r
293 a three byte generic pointer is used. */
\r
294 ulAddress = ( unsigned long ) pvParameters;
\r
295 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPL */
\r
298 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPH */
\r
301 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* b */
\r
304 /* The remaining registers are straight forward. */
\r
305 *pxTopOfStack = 0x02; /* R2 */
\r
307 *pxTopOfStack = 0x03; /* R3 */
\r
309 *pxTopOfStack = 0x04; /* R4 */
\r
311 *pxTopOfStack = 0x05; /* R5 */
\r
313 *pxTopOfStack = 0x06; /* R6 */
\r
315 *pxTopOfStack = 0x07; /* R7 */
\r
317 *pxTopOfStack = 0x00; /* R0 */
\r
319 *pxTopOfStack = 0x01; /* R1 */
\r
321 *pxTopOfStack = 0x00; /* PSW */
\r
323 *pxTopOfStack = 0xbb; /* BP */
\r
325 /* Dont increment the stack size here as we don't want to include
\r
326 the stack size byte as part of the stack size count.
\r
328 Finally we place the stack size at the beginning. */
\r
329 *pxStartOfStack = ( portSTACK_TYPE ) ( pxTopOfStack - pxStartOfStack );
\r
331 /* Unlike most ports, we return the start of the stack as this is where the
\r
332 size of the stack is stored. */
\r
333 return pxStartOfStack;
\r
335 /*-----------------------------------------------------------*/
\r
338 * See header file for description.
\r
340 portBASE_TYPE xPortStartScheduler( void )
\r
342 /* Setup timer 2 to generate the RTOS tick. */
\r
343 prvSetupTimerInterrupt();
\r
345 /* Make sure we start with the expected SFR page. This line should not
\r
346 really be required. */
\r
349 /* Copy the stack for the first task to execute from XRAM into the stack,
\r
350 restore the task context from the new stack, then start running the task. */
\r
351 portCOPY_XRAM_TO_STACK();
\r
352 portRESTORE_CONTEXT();
\r
354 /* Should never get here! */
\r
357 /*-----------------------------------------------------------*/
\r
359 void vPortEndScheduler( void )
\r
361 /* Not implemented for this port. */
\r
363 /*-----------------------------------------------------------*/
\r
366 * Manual context switch. The first thing we do is save the registers so we
\r
367 * can use a naked attribute.
\r
369 void vPortYield( void ) _naked
\r
371 /* Save the execution context onto the stack, then copy the entire stack
\r
372 to XRAM. This is necessary as the internal RAM is only large enough to
\r
373 hold one stack, and we want one per task.
\r
375 PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
\r
377 portSAVE_CONTEXT();
\r
378 portCOPY_STACK_TO_XRAM();
\r
380 /* Call the standard scheduler context switch function. */
\r
381 vTaskSwitchContext();
\r
383 /* Copy the stack of the task about to execute from XRAM into RAM and
\r
384 restore it's context ready to run on exiting. */
\r
385 portCOPY_XRAM_TO_STACK();
\r
386 portRESTORE_CONTEXT();
\r
388 /*-----------------------------------------------------------*/
\r
390 #if configUSE_PREEMPTION == 1
\r
391 void vTimer2ISR( void ) interrupt 5 _naked
\r
393 /* Preemptive context switch function triggered by the timer 2 ISR.
\r
394 This does the same as vPortYield() (see above) with the addition
\r
395 of incrementing the RTOS tick count. */
\r
397 portSAVE_CONTEXT();
\r
398 portCOPY_STACK_TO_XRAM();
\r
400 vTaskIncrementTick();
\r
401 vTaskSwitchContext();
\r
403 portCLEAR_INTERRUPT_FLAG();
\r
404 portCOPY_XRAM_TO_STACK();
\r
405 portRESTORE_CONTEXT();
\r
408 void vTimer2ISR( void ) interrupt 5
\r
410 /* When using the cooperative scheduler the timer 2 ISR is only
\r
411 required to increment the RTOS tick count. */
\r
413 vTaskIncrementTick();
\r
414 portCLEAR_INTERRUPT_FLAG();
\r
417 /*-----------------------------------------------------------*/
\r
419 static void prvSetupTimerInterrupt( void )
\r
421 unsigned char ucOriginalSFRPage;
\r
423 /* Constants calculated to give the required timer capture values. */
\r
424 const unsigned long ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;
\r
425 const unsigned long ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;
\r
426 const unsigned long ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;
\r
427 const unsigned char ucLowCaptureByte = ( unsigned char ) ( ulCaptureValue & ( unsigned long ) 0xff );
\r
428 const unsigned char ucHighCaptureByte = ( unsigned char ) ( ulCaptureValue >> ( unsigned long ) 8 );
\r
430 /* NOTE: This uses a timer only present on 8052 architecture. */
\r
432 /* Remember the current SFR page so we can restore it at the end of the
\r
434 ucOriginalSFRPage = SFRPAGE;
\r
437 /* TMR2CF can be left in its default state. */
\r
438 TMR2CF = ( unsigned char ) 0;
\r
440 /* Setup the overflow reload value. */
\r
441 RCAP2L = ucLowCaptureByte;
\r
442 RCAP2H = ucHighCaptureByte;
\r
444 /* The initial load is performed manually. */
\r
445 TMR2L = ucLowCaptureByte;
\r
446 TMR2H = ucHighCaptureByte;
\r
448 /* Enable the timer 2 interrupts. */
\r
449 IE |= portTIMER_2_INTERRUPT_ENABLE;
\r
451 /* Interrupts are disabled when this is called so the timer can be started
\r
453 TMR2CN = portENABLE_TIMER;
\r
455 /* Restore the original SFR page. */
\r
456 SFRPAGE = ucOriginalSFRPage;
\r
projects / freertos / blob