git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/Softune/MB91460/port.c

   1 /*\r
   2  * FreeRTOS Kernel V10.0.1\r
   3  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6  * this software and associated documentation files (the "Software"), to deal in\r
   7  * the Software without restriction, including without limitation the rights to\r
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10  * subject to the following conditions:\r
  11  *\r
  12  * The above copyright notice and this permission notice shall be included in all\r
  13  * copies or substantial portions of the Software.\r
  14  *\r
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  21  *\r
  22  * http://www.FreeRTOS.org\r
  23  * http://aws.amazon.com/freertos\r
  24  *\r
  25  * 1 tab == 4 spaces!\r
  26  */\r
  27 \r
  28 #include "FreeRTOS.h"\r
  29 #include "task.h"\r
  30 #include "mb91467d.h"\r
  31 \r
  32 /*-----------------------------------------------------------*/\r
  33 \r
  34 /* We require the address of the pxCurrentTCB variable, but don't want to know\r
  35 any details of its type. */\r
  36 typedef void TCB_t;\r
  37 extern volatile TCB_t * volatile pxCurrentTCB;\r
  38 \r
  39 /*-----------------------------------------------------------*/\r
  40  \r
  41 #pragma asm\r
  42 #macro  SaveContext\r
  43          ORCCR #0x20                                                            ;Switch to user stack\r
  44          ST RP,@-R15                                                            ;Store RP\r
  45          STM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Store R7-R0\r
  46          STM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Store R14-R8\r
  47          ST MDH, @-R15                                                          ;Store MDH\r
  48          ST MDL, @-R15                                                          ;Store MDL\r
  49          \r
  50          ANDCCR #0xDF                                                           ;Switch back to system stack\r
  51          LD @R15+,R0                                                            ;Store PC to R0 \r
  52          ORCCR #0x20                                                            ;Switch to user stack\r
  53          ST R0,@-R15                                                            ;Store PC to User stack\r
  54          \r
  55          ANDCCR #0xDF                                                           ;Switch back to system stack\r
  56          LD @R15+,R0                                                            ;Store PS to R0\r
  57          ORCCR #0x20                                                            ;Switch to user stack\r
  58          ST R0,@-R15                                                            ;Store PS to User stack\r
  59          \r
  60          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address\r
  61          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address\r
  62          ST R15,@R0                                                                     ;Store USP to pxCurrentTCB->pxTopOfStack\r
  63          \r
  64          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR\r
  65 #endm\r
  66 \r
  67 #macro RestoreContext\r
  68          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address\r
  69          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address\r
  70          ORCCR #0x20                                                            ;Switch to user stack\r
  71          LD @R0, R15                                                            ;Restore USP from pxCurrentTCB->pxTopOfStack\r
  72 \r
  73          LD @R15+,R0                                                            ;Store PS to R0\r
  74          ANDCCR #0xDF                                                           ;Switch to system stack\r
  75          ST R0,@-R15                                                            ;Store PS to system stack\r
  76 \r
  77          ORCCR #0x20                                                            ;Switch to user stack\r
  78          LD @R15+,R0                                                            ;Store PC to R0\r
  79          ANDCCR #0xDF                                                           ;Switch to system stack\r
  80          ST R0,@-R15                                                            ;Store PC to system stack\r
  81 \r
  82          ORCCR #0x20                                                            ;Switch back to retrieve the remaining context\r
  83 \r
  84          LD @R15+, MDL                                                          ;Restore MDL\r
  85          LD @R15+, MDH                                                          ;Restore MDH\r
  86          LDM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Restore R14-R8\r
  87          LDM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Restore R7-R0\r
  88          LD @R15+, RP                                                           ;Restore RP\r
  89          \r
  90          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR\r
  91 #endm\r
  92 #pragma endasm\r
  93 \r
  94 /*-----------------------------------------------------------*/\r
  95 \r
  96 /*\r
  97  * Perform hardware setup to enable ticks from timer 1,\r
  98  */\r
  99 static void prvSetupTimerInterrupt( void );\r
 100 /*-----------------------------------------------------------*/\r
 101 \r
 102 /* \r
 103  * Initialise the stack of a task to look exactly as if a call to \r
 104  * portSAVE_CONTEXT had been called.\r
 105  * \r
 106  * See the header file portable.h.\r
 107  */\r
 108 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
 109 {\r
 110         /* Place a few bytes of known values on the bottom of the stack. \r
 111         This is just useful for debugging. */\r
 112 \r
 113         *pxTopOfStack = 0x11111111;\r
 114         pxTopOfStack--;\r
 115         *pxTopOfStack = 0x22222222;\r
 116         pxTopOfStack--;\r
 117         *pxTopOfStack = 0x33333333;\r
 118         pxTopOfStack--;\r
 119 \r
 120         /* This is a redundant push to the stack, it may be required if \r
 121         in some implementations of the compiler the parameter to the task \r
 122         is passed on to the stack rather than in R4 register. */\r
 123         *pxTopOfStack = (StackType_t)(pvParameters);\r
 124         pxTopOfStack--;                  \r
 125     \r
 126         *pxTopOfStack = ( StackType_t ) 0x00000000;     /* RP */\r
 127         pxTopOfStack--;\r
 128         *pxTopOfStack = ( StackType_t ) 0x00007777;     /* R7 */\r
 129         pxTopOfStack--;\r
 130         *pxTopOfStack = ( StackType_t ) 0x00006666;     /* R6 */\r
 131         pxTopOfStack--;\r
 132         *pxTopOfStack = ( StackType_t ) 0x00005555;     /* R5 */\r
 133         pxTopOfStack--;\r
 134         \r
 135         /* In the current implementation of the compiler the first \r
 136         parameter to the task (or function) is passed via R4 parameter \r
 137         to the task, hence the pvParameters pointer is copied into the R4 \r
 138         register. See compiler manual section 4.6.2 for more information. */\r
 139         *pxTopOfStack = ( StackType_t ) (pvParameters); /* R4 */\r
 140         pxTopOfStack--;\r
 141         *pxTopOfStack = ( StackType_t ) 0x00003333;     /* R3 */\r
 142         pxTopOfStack--;\r
 143         *pxTopOfStack = ( StackType_t ) 0x00002222;     /* R2 */\r
 144         pxTopOfStack--;\r
 145         *pxTopOfStack = ( StackType_t ) 0x00001111;     /* R1 */\r
 146         pxTopOfStack--;\r
 147         *pxTopOfStack = ( StackType_t ) 0x00000001;     /* R0 */\r
 148         pxTopOfStack--; \r
 149         *pxTopOfStack = ( StackType_t ) 0x0000EEEE;     /* R14 */\r
 150         pxTopOfStack--;\r
 151         *pxTopOfStack = ( StackType_t ) 0x0000DDDD;     /* R13 */\r
 152         pxTopOfStack--;\r
 153         *pxTopOfStack = ( StackType_t ) 0x0000CCCC;     /* R12 */\r
 154         pxTopOfStack--;\r
 155         *pxTopOfStack = ( StackType_t ) 0x0000BBBB;     /* R11 */\r
 156         pxTopOfStack--;\r
 157         *pxTopOfStack = ( StackType_t ) 0x0000AAAA;     /* R10 */\r
 158         pxTopOfStack--;\r
 159         *pxTopOfStack = ( StackType_t ) 0x00009999;     /* R9 */\r
 160         pxTopOfStack--;\r
 161         *pxTopOfStack = ( StackType_t ) 0x00008888;     /* R8 */\r
 162         pxTopOfStack--; \r
 163         *pxTopOfStack = ( StackType_t ) 0x11110000;     /* MDH */\r
 164         pxTopOfStack--;\r
 165         *pxTopOfStack = ( StackType_t ) 0x22220000;     /* MDL */\r
 166         pxTopOfStack--;\r
 167 \r
 168         /* The start of the task code. */\r
 169         *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
 170         pxTopOfStack--;\r
 171          \r
 172     /* PS - User Mode, USP, ILM=31, Interrupts enabled */\r
 173         *pxTopOfStack = ( StackType_t ) 0x001F0030;     /* PS */\r
 174 \r
 175         return pxTopOfStack;\r
 176 }\r
 177 /*-----------------------------------------------------------*/\r
 178 \r
 179 BaseType_t xPortStartScheduler( void )\r
 180 {\r
 181         /* Setup the hardware to generate the tick. */\r
 182         prvSetupTimerInterrupt();\r
 183 \r
 184         /* Restore the context of the first task that is going to run. */\r
 185         #pragma asm\r
 186                 RestoreContext\r
 187         #pragma endasm\r
 188 \r
 189         /* Simulate a function call end as generated by the compiler.  We will now\r
 190         jump to the start of the task the context of which we have just restored. */    \r
 191         __asm(" reti ");\r
 192 \r
 193         /* Should not get here. */\r
 194         return pdFAIL;\r
 195 }\r
 196 /*-----------------------------------------------------------*/\r
 197 \r
 198 void vPortEndScheduler( void )\r
 199 {\r
 200         /* Not implemented - unlikely to ever be required as there is nothing to\r
 201         return to. */\r
 202 }\r
 203 /*-----------------------------------------------------------*/\r
 204 \r
 205 static void prvSetupTimerInterrupt( void )\r
 206 {\r
 207 /* The peripheral clock divided by 32 is used by the timer. */\r
 208 const uint16_t usReloadValue = ( uint16_t ) ( ( ( configPER_CLOCK_HZ / configTICK_RATE_HZ ) / 32UL ) - 1UL );\r
 209 \r
 210         /* Setup RLT0 to generate a tick interrupt. */\r
 211 \r
 212         TMCSR0_CNTE = 0;                /* Count Disable */\r
 213     TMCSR0_CSL = 0x2;           /* CLKP/32 */\r
 214     TMCSR0_MOD = 0;                     /* Software trigger */\r
 215     TMCSR0_RELD = 1;            /* Reload */\r
 216     \r
 217     TMCSR0_UF = 0;                      /* Clear underflow flag */\r
 218         TMRLR0 = usReloadValue;\r
 219         TMCSR0_INTE = 1;                /* Interrupt Enable */\r
 220         TMCSR0_CNTE = 1;                /* Count Enable */\r
 221         TMCSR0_TRG = 1;                 /* Trigger */\r
 222         \r
 223     PORTEN = 0x3;                       /* Port Enable */\r
 224 }\r
 225 /*-----------------------------------------------------------*/\r
 226 \r
 227 #if configUSE_PREEMPTION == 1\r
 228 \r
 229         /* \r
 230          * Tick ISR for preemptive scheduler. The tick count is incremented \r
 231          * after the context is saved. Then the context is switched if required,\r
 232          * and last the context of the task which is to be resumed is restored.\r
 233          */\r
 234 \r
 235         #pragma asm\r
 236 \r
 237         .global _ReloadTimer0_IRQHandler\r
 238         _ReloadTimer0_IRQHandler:\r
 239 \r
 240         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 241         SaveContext                                                             ;Save context\r
 242         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 243 \r
 244         LDI #0xFFFB,R1\r
 245         LDI #_tmcsr0, R0\r
 246         AND R1,@R0                                                              ;Clear RLT0 interrupt flag\r
 247 \r
 248         CALL32   _xTaskIncrementTick,R12                ;Increment Tick\r
 249         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
 250 \r
 251         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 252         RestoreContext                                                  ;Restore context\r
 253         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 254 \r
 255         RETI\r
 256 \r
 257         #pragma endasm\r
 258         \r
 259 #else\r
 260         \r
 261         /* \r
 262          * Tick ISR for the cooperative scheduler.  All this does is increment the\r
 263          * tick count.  We don't need to switch context, this can only be done by\r
 264          * manual calls to taskYIELD();\r
 265          */\r
 266         __interrupt void ReloadTimer0_IRQHandler( void )\r
 267         {\r
 268                 /* Clear RLT0 interrupt flag */\r
 269                 TMCSR0_UF = 0; \r
 270                 xTaskIncrementTick();\r
 271         }\r
 272 \r
 273 #endif\r
 274 \r
 275 /*\r
 276  * Manual context switch. We can use a __nosavereg attribute  as the context \r
 277  * would be saved by PortSAVE_CONTEXT().  The context is switched and then \r
 278  * the context of the new task is restored saved. \r
 279  */\r
 280 #pragma asm\r
 281 \r
 282         .global _vPortYieldDelayed\r
 283         _vPortYieldDelayed:\r
 284 \r
 285         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 286         SaveContext                                                             ;Save context\r
 287         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 288 \r
 289         LDI #_dicr, R0\r
 290         BANDL #0x0E, @R0                                                ;Clear Delayed interrupt flag\r
 291 \r
 292         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
 293 \r
 294         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 295         RestoreContext                                                  ;Restore context\r
 296         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 297 \r
 298         RETI\r
 299 \r
 300 #pragma endasm\r
 301 /*-----------------------------------------------------------*/\r
 302 \r
 303 /*\r
 304  * Manual context switch. We can use a __nosavereg attribute  as the context \r
 305  * would be saved by PortSAVE_CONTEXT().  The context is switched and then \r
 306  * the context of the new task is restored saved. \r
 307  */      \r
 308 #pragma asm\r
 309 \r
 310         .global _vPortYield\r
 311         _vPortYield:\r
 312 \r
 313         SaveContext                                                             ;Save context\r
 314         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
 315         RestoreContext                                                  ;Restore context\r
 316         \r
 317         RETI\r
 318 \r
 319 #pragma endasm\r
 320 /*-----------------------------------------------------------*/\r
 321 \r