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Update FreeRTOS version number to V7.5.3
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1 /*\r
2     FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd. \r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS provides completely free yet professionally developed,    *\r
10      *    robust, strictly quality controlled, supported, and cross          *\r
11      *    platform software that has become a de facto standard.             *\r
12      *                                                                       *\r
13      *    Help yourself get started quickly and support the FreeRTOS         *\r
14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
16      *                                                                       *\r
17      *    Thank you!                                                         *\r
18      *                                                                       *\r
19     ***************************************************************************\r
20 \r
21     This file is part of the FreeRTOS distribution.\r
22 \r
23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
24     the terms of the GNU General Public License (version 2) as published by the\r
25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
26 \r
27     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
28     >>! a combined work that includes FreeRTOS without being obliged to provide\r
29     >>! the source code for proprietary components outside of the FreeRTOS\r
30     >>! kernel.\r
31 \r
32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
35     link: http://www.freertos.org/a00114.html\r
36 \r
37     1 tab == 4 spaces!\r
38 \r
39     ***************************************************************************\r
40      *                                                                       *\r
41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
42      *    not run, what could be wrong?"                                     *\r
43      *                                                                       *\r
44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
49     license and Real Time Engineers Ltd. contact details.\r
50 \r
51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
54 \r
55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
57     licenses offer ticketed support, indemnification and middleware.\r
58 \r
59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
60     engineered and independently SIL3 certified version for use in safety and\r
61     mission critical applications that require provable dependability.\r
62 \r
63     1 tab == 4 spaces!\r
64 */\r
65 \r
66 #include "FreeRTOS.h"\r
67 #include "task.h"\r
68 #include "mb91467d.h"\r
69 \r
70 /*-----------------------------------------------------------*/\r
71 \r
72 /* We require the address of the pxCurrentTCB variable, but don't want to know\r
73 any details of its type. */\r
74 typedef void tskTCB;\r
75 extern volatile tskTCB * volatile pxCurrentTCB;\r
76 \r
77 /*-----------------------------------------------------------*/\r
78  \r
79 #pragma asm\r
80 #macro  SaveContext\r
81          ORCCR #0x20                                                            ;Switch to user stack\r
82          ST RP,@-R15                                                            ;Store RP\r
83          STM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Store R7-R0\r
84          STM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Store R14-R8\r
85          ST MDH, @-R15                                                          ;Store MDH\r
86          ST MDL, @-R15                                                          ;Store MDL\r
87          \r
88          ANDCCR #0xDF                                                           ;Switch back to system stack\r
89          LD @R15+,R0                                                            ;Store PC to R0 \r
90          ORCCR #0x20                                                            ;Switch to user stack\r
91          ST R0,@-R15                                                            ;Store PC to User stack\r
92          \r
93          ANDCCR #0xDF                                                           ;Switch back to system stack\r
94          LD @R15+,R0                                                            ;Store PS to R0\r
95          ORCCR #0x20                                                            ;Switch to user stack\r
96          ST R0,@-R15                                                            ;Store PS to User stack\r
97          \r
98          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address\r
99          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address\r
100          ST R15,@R0                                                                     ;Store USP to pxCurrentTCB->pxTopOfStack\r
101          \r
102          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR\r
103 #endm\r
104 \r
105 #macro RestoreContext\r
106          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address\r
107          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address\r
108          ORCCR #0x20                                                            ;Switch to user stack\r
109          LD @R0, R15                                                            ;Restore USP from pxCurrentTCB->pxTopOfStack\r
110 \r
111          LD @R15+,R0                                                            ;Store PS to R0\r
112          ANDCCR #0xDF                                                           ;Switch to system stack\r
113          ST R0,@-R15                                                            ;Store PS to system stack\r
114 \r
115          ORCCR #0x20                                                            ;Switch to user stack\r
116          LD @R15+,R0                                                            ;Store PC to R0\r
117          ANDCCR #0xDF                                                           ;Switch to system stack\r
118          ST R0,@-R15                                                            ;Store PC to system stack\r
119 \r
120          ORCCR #0x20                                                            ;Switch back to retrieve the remaining context\r
121 \r
122          LD @R15+, MDL                                                          ;Restore MDL\r
123          LD @R15+, MDH                                                          ;Restore MDH\r
124          LDM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Restore R14-R8\r
125          LDM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Restore R7-R0\r
126          LD @R15+, RP                                                           ;Restore RP\r
127          \r
128          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR\r
129 #endm\r
130 #pragma endasm\r
131 \r
132 /*-----------------------------------------------------------*/\r
133 \r
134 /*\r
135  * Perform hardware setup to enable ticks from timer 1,\r
136  */\r
137 static void prvSetupTimerInterrupt( void );\r
138 /*-----------------------------------------------------------*/\r
139 \r
140 /* \r
141  * Initialise the stack of a task to look exactly as if a call to \r
142  * portSAVE_CONTEXT had been called.\r
143  * \r
144  * See the header file portable.h.\r
145  */\r
146 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
147 {\r
148         /* Place a few bytes of known values on the bottom of the stack. \r
149         This is just useful for debugging. */\r
150 \r
151         *pxTopOfStack = 0x11111111;\r
152         pxTopOfStack--;\r
153         *pxTopOfStack = 0x22222222;\r
154         pxTopOfStack--;\r
155         *pxTopOfStack = 0x33333333;\r
156         pxTopOfStack--;\r
157 \r
158         /* This is a redundant push to the stack, it may be required if \r
159         in some implementations of the compiler the parameter to the task \r
160         is passed on to the stack rather than in R4 register. */\r
161         *pxTopOfStack = (portSTACK_TYPE)(pvParameters);\r
162         pxTopOfStack--;                  \r
163     \r
164         *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;  /* RP */\r
165         pxTopOfStack--;\r
166         *pxTopOfStack = ( portSTACK_TYPE ) 0x00007777;  /* R7 */\r
167         pxTopOfStack--;\r
168         *pxTopOfStack = ( portSTACK_TYPE ) 0x00006666;  /* R6 */\r
169         pxTopOfStack--;\r
170         *pxTopOfStack = ( portSTACK_TYPE ) 0x00005555;  /* R5 */\r
171         pxTopOfStack--;\r
172         \r
173         /* In the current implementation of the compiler the first \r
174         parameter to the task (or function) is passed via R4 parameter \r
175         to the task, hence the pvParameters pointer is copied into the R4 \r
176         register. See compiler manual section 4.6.2 for more information. */\r
177         *pxTopOfStack = ( portSTACK_TYPE ) (pvParameters);      /* R4 */\r
178         pxTopOfStack--;\r
179         *pxTopOfStack = ( portSTACK_TYPE ) 0x00003333;  /* R3 */\r
180         pxTopOfStack--;\r
181         *pxTopOfStack = ( portSTACK_TYPE ) 0x00002222;  /* R2 */\r
182         pxTopOfStack--;\r
183         *pxTopOfStack = ( portSTACK_TYPE ) 0x00001111;  /* R1 */\r
184         pxTopOfStack--;\r
185         *pxTopOfStack = ( portSTACK_TYPE ) 0x00000001;  /* R0 */\r
186         pxTopOfStack--; \r
187         *pxTopOfStack = ( portSTACK_TYPE ) 0x0000EEEE;  /* R14 */\r
188         pxTopOfStack--;\r
189         *pxTopOfStack = ( portSTACK_TYPE ) 0x0000DDDD;  /* R13 */\r
190         pxTopOfStack--;\r
191         *pxTopOfStack = ( portSTACK_TYPE ) 0x0000CCCC;  /* R12 */\r
192         pxTopOfStack--;\r
193         *pxTopOfStack = ( portSTACK_TYPE ) 0x0000BBBB;  /* R11 */\r
194         pxTopOfStack--;\r
195         *pxTopOfStack = ( portSTACK_TYPE ) 0x0000AAAA;  /* R10 */\r
196         pxTopOfStack--;\r
197         *pxTopOfStack = ( portSTACK_TYPE ) 0x00009999;  /* R9 */\r
198         pxTopOfStack--;\r
199         *pxTopOfStack = ( portSTACK_TYPE ) 0x00008888;  /* R8 */\r
200         pxTopOfStack--; \r
201         *pxTopOfStack = ( portSTACK_TYPE ) 0x11110000;  /* MDH */\r
202         pxTopOfStack--;\r
203         *pxTopOfStack = ( portSTACK_TYPE ) 0x22220000;  /* MDL */\r
204         pxTopOfStack--;\r
205 \r
206         /* The start of the task code. */\r
207         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
208         pxTopOfStack--;\r
209          \r
210     /* PS - User Mode, USP, ILM=31, Interrupts enabled */\r
211         *pxTopOfStack = ( portSTACK_TYPE ) 0x001F0030;  /* PS */\r
212 \r
213         return pxTopOfStack;\r
214 }\r
215 /*-----------------------------------------------------------*/\r
216 \r
217 portBASE_TYPE xPortStartScheduler( void )\r
218 {\r
219         /* Setup the hardware to generate the tick. */\r
220         prvSetupTimerInterrupt();\r
221 \r
222         /* Restore the context of the first task that is going to run. */\r
223         #pragma asm\r
224                 RestoreContext\r
225         #pragma endasm\r
226 \r
227         /* Simulate a function call end as generated by the compiler.  We will now\r
228         jump to the start of the task the context of which we have just restored. */    \r
229         __asm(" reti ");\r
230 \r
231         /* Should not get here. */\r
232         return pdFAIL;\r
233 }\r
234 /*-----------------------------------------------------------*/\r
235 \r
236 void vPortEndScheduler( void )\r
237 {\r
238         /* Not implemented - unlikely to ever be required as there is nothing to\r
239         return to. */\r
240 }\r
241 /*-----------------------------------------------------------*/\r
242 \r
243 static void prvSetupTimerInterrupt( void )\r
244 {\r
245 /* The peripheral clock divided by 32 is used by the timer. */\r
246 const unsigned short usReloadValue = ( unsigned short ) ( ( ( configPER_CLOCK_HZ / configTICK_RATE_HZ ) / 32UL ) - 1UL );\r
247 \r
248         /* Setup RLT0 to generate a tick interrupt. */\r
249 \r
250         TMCSR0_CNTE = 0;                /* Count Disable */\r
251     TMCSR0_CSL = 0x2;           /* CLKP/32 */\r
252     TMCSR0_MOD = 0;                     /* Software trigger */\r
253     TMCSR0_RELD = 1;            /* Reload */\r
254     \r
255     TMCSR0_UF = 0;                      /* Clear underflow flag */\r
256         TMRLR0 = usReloadValue;\r
257         TMCSR0_INTE = 1;                /* Interrupt Enable */\r
258         TMCSR0_CNTE = 1;                /* Count Enable */\r
259         TMCSR0_TRG = 1;                 /* Trigger */\r
260         \r
261     PORTEN = 0x3;                       /* Port Enable */\r
262 }\r
263 /*-----------------------------------------------------------*/\r
264 \r
265 #if configUSE_PREEMPTION == 1\r
266 \r
267         /* \r
268          * Tick ISR for preemptive scheduler. The tick count is incremented \r
269          * after the context is saved. Then the context is switched if required,\r
270          * and last the context of the task which is to be resumed is restored.\r
271          */\r
272 \r
273         #pragma asm\r
274 \r
275         .global _ReloadTimer0_IRQHandler\r
276         _ReloadTimer0_IRQHandler:\r
277 \r
278         ANDCCR #0xEF                                                    ;Disable Interrupts\r
279         SaveContext                                                             ;Save context\r
280         ORCCR #0x10                                                             ;Re-enable Interrupts\r
281 \r
282         LDI #0xFFFB,R1\r
283         LDI #_tmcsr0, R0\r
284         AND R1,@R0                                                              ;Clear RLT0 interrupt flag\r
285 \r
286         CALL32   _xTaskIncrementTick,R12                ;Increment Tick\r
287         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
288 \r
289         ANDCCR #0xEF                                                    ;Disable Interrupts\r
290         RestoreContext                                                  ;Restore context\r
291         ORCCR #0x10                                                             ;Re-enable Interrupts\r
292 \r
293         RETI\r
294 \r
295         #pragma endasm\r
296         \r
297 #else\r
298         \r
299         /* \r
300          * Tick ISR for the cooperative scheduler.  All this does is increment the\r
301          * tick count.  We don't need to switch context, this can only be done by\r
302          * manual calls to taskYIELD();\r
303          */\r
304         __interrupt void ReloadTimer0_IRQHandler( void )\r
305         {\r
306                 /* Clear RLT0 interrupt flag */\r
307                 TMCSR0_UF = 0; \r
308                 xTaskIncrementTick();\r
309         }\r
310 \r
311 #endif\r
312 \r
313 /*\r
314  * Manual context switch. We can use a __nosavereg attribute  as the context \r
315  * would be saved by PortSAVE_CONTEXT().  The context is switched and then \r
316  * the context of the new task is restored saved. \r
317  */\r
318 #pragma asm\r
319 \r
320         .global _vPortYieldDelayed\r
321         _vPortYieldDelayed:\r
322 \r
323         ANDCCR #0xEF                                                    ;Disable Interrupts\r
324         SaveContext                                                             ;Save context\r
325         ORCCR #0x10                                                             ;Re-enable Interrupts\r
326 \r
327         LDI #_dicr, R0\r
328         BANDL #0x0E, @R0                                                ;Clear Delayed interrupt flag\r
329 \r
330         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
331 \r
332         ANDCCR #0xEF                                                    ;Disable Interrupts\r
333         RestoreContext                                                  ;Restore context\r
334         ORCCR #0x10                                                             ;Re-enable Interrupts\r
335 \r
336         RETI\r
337 \r
338 #pragma endasm\r
339 /*-----------------------------------------------------------*/\r
340 \r
341 /*\r
342  * Manual context switch. We can use a __nosavereg attribute  as the context \r
343  * would be saved by PortSAVE_CONTEXT().  The context is switched and then \r
344  * the context of the new task is restored saved. \r
345  */      \r
346 #pragma asm\r
347 \r
348         .global _vPortYield\r
349         _vPortYield:\r
350 \r
351         SaveContext                                                             ;Save context\r
352         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
353         RestoreContext                                                  ;Restore context\r
354         \r
355         RETI\r
356 \r
357 #pragma endasm\r
358 /*-----------------------------------------------------------*/\r
359 \r