2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /*-----------------------------------------------------------
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30 * Implementation of functions defined in portable.h for the ARM CM4F port.
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31 *----------------------------------------------------------*/
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33 /* Scheduler includes. */
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34 #include "FreeRTOS.h"
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36 #ifdef SOFTDEVICE_PRESENT
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37 #include "nrf_soc.h"
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38 #include "app_util.h"
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39 #include "app_util_platform.h"
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42 #if !(__FPU_USED) && !(__LINT__)
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43 #error This port can only be used when the project options are configured to enable hardware floating point support.
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46 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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47 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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50 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
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52 #define portCORTEX_M4_r0p1_ID ( 0x410FC241UL )
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54 /* Constants required to check the validity of an interrupt priority. */
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55 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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56 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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57 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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59 /* Constants required to set up the initial stack. */
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60 #define portINITIAL_XPSR (((xPSR_Type){.b.T = 1}).w)
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61 #define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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63 /* Let the user override the pre-loading of the initial LR with the address of
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64 prvTaskExitError() in case is messes up unwinding of the stack in the
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66 #ifdef configTASK_RETURN_ADDRESS
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67 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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69 #define portTASK_RETURN_ADDRESS prvTaskExitError
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72 /* Each task maintains its own interrupt status in the critical nesting
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74 static UBaseType_t uxCriticalNesting = 0;
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77 * Setup the timer to generate the tick interrupts. The implementation in this
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78 * file is weak to allow application writers to change the timer used to
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79 * generate the tick interrupt.
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81 extern void vPortSetupTimerInterrupt( void );
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84 * Exception handlers.
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86 void xPortSysTickHandler( void );
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89 * Start first task is a separate function so it can be tested in isolation.
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91 extern void vPortStartFirstTask( void );
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94 * Function to enable the VFP.
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96 static void vPortEnableVFP( void );
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99 * Used to catch tasks that attempt to return from their implementing function.
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101 static void prvTaskExitError( void );
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103 /*-----------------------------------------------------------*/
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106 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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107 * FreeRTOS API functions are not called from interrupts that have been assigned
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108 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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110 #if ( configASSERT_DEFINED == 1 )
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111 static uint8_t ucMaxSysCallPriority = 0;
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112 static uint32_t ulMaxPRIGROUPValue = 0;
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113 #endif /* configASSERT_DEFINED */
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115 /*-----------------------------------------------------------*/
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118 * See header file for description.
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120 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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122 /* Simulate the stack frame as it would be created by a context switch
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125 /* Offset added to account for the way the MCU uses the stack on entry/exit
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126 of interrupts, and to ensure alignment. */
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129 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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131 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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133 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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135 /* Save code space by skipping register initialisation. */
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136 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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137 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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139 /* A save method is being used that requires each task to maintain its
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140 own exec return value. */
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142 *pxTopOfStack = portINITIAL_EXEC_RETURN;
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144 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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146 return pxTopOfStack;
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148 /*-----------------------------------------------------------*/
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150 static void prvTaskExitError( void )
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152 /* A function that implements a task must not exit or attempt to return to
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153 its caller as there is nothing to return to. If a task wants to exit it
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154 should instead call vTaskDelete( NULL ).
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156 Artificially force an assert() to be triggered if configASSERT() is
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157 defined, then stop here so application writers can catch the error. */
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158 configASSERT( uxCriticalNesting == ~0UL );
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159 portDISABLE_INTERRUPTS();
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164 /*-----------------------------------------------------------*/
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167 * See header file for description.
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169 BaseType_t xPortStartScheduler( void )
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171 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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172 See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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173 configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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175 /* This port is designed for nRF52, this is Cortex-M4 r0p1. */
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176 configASSERT( SCB->CPUID == portCORTEX_M4_r0p1_ID );
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178 #if ( configASSERT_DEFINED == 1 )
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180 volatile uint32_t ulOriginalPriority;
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181 volatile uint8_t * const pucFirstUserPriorityRegister = &NVIC->IP[0];
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182 volatile uint8_t ucMaxPriorityValue;
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184 /* Determine the maximum priority from which ISR safe FreeRTOS API
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185 functions can be called. ISR safe functions are those that end in
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186 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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187 ensure interrupt entry is as fast and simple as possible.
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189 Save the interrupt priority value that is about to be clobbered. */
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190 ulOriginalPriority = *pucFirstUserPriorityRegister;
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192 /* Determine the number of priority bits available. First write to all
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194 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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196 /* Read the value back to see how many bits stuck. */
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197 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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199 /* Use the same mask on the maximum system call priority. */
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200 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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202 /* Calculate the maximum acceptable priority group value for the number
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203 of bits read back. */
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204 ulMaxPRIGROUPValue = SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos;
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205 while ( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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207 ulMaxPRIGROUPValue--;
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208 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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211 /* Remove any bits that are more than actually existing. */
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212 ulMaxPRIGROUPValue &= SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos;
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214 /* Restore the clobbered interrupt priority register to its original
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216 *pucFirstUserPriorityRegister = ulOriginalPriority;
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218 #endif /* conifgASSERT_DEFINED */
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220 /* Make PendSV the lowest priority interrupts. */
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221 NVIC_SetPriority(PendSV_IRQn, configKERNEL_INTERRUPT_PRIORITY);
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223 /* Start the timer that generates the tick ISR. Interrupts are disabled
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225 vPortSetupTimerInterrupt();
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227 /* Initialise the critical nesting count ready for the first task. */
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228 uxCriticalNesting = 0;
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230 /* Ensure the VFP is enabled - it should be anyway. */
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233 /* Lazy save always. */
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234 FPU->FPCCR |= FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk;
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236 /* Finally this port requires SEVONPEND to be active */
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237 SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
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239 /* Start the first task. */
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240 vPortStartFirstTask();
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242 /* Should never get here as the tasks will now be executing! Call the task
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243 exit error function to prevent compiler warnings about a static function
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244 not being called in the case that the application writer overrides this
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245 functionality by defining configTASK_RETURN_ADDRESS. */
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246 prvTaskExitError();
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248 /* Should not get here! */
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251 /*-----------------------------------------------------------*/
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253 void vPortEndScheduler( void )
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255 /* Not implemented in ports where there is nothing to return to.
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256 Artificially force an assert. */
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257 configASSERT( uxCriticalNesting == 1000UL );
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259 /*-----------------------------------------------------------*/
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261 void vPortEnterCritical( void )
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263 portDISABLE_INTERRUPTS();
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264 uxCriticalNesting++;
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266 /* This is not the interrupt safe version of the enter critical function so
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267 assert() if it is being called from an interrupt context. Only API
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268 functions that end in "FromISR" can be used in an interrupt. Only assert if
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269 the critical nesting count is 1 to protect against recursive calls if the
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270 assert function also uses a critical section. */
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271 if ( uxCriticalNesting == 1 )
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273 configASSERT( ( SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk ) == 0 );
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276 /*-----------------------------------------------------------*/
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278 void vPortExitCritical( void )
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280 configASSERT( uxCriticalNesting );
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281 uxCriticalNesting--;
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282 if ( uxCriticalNesting == 0 )
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284 portENABLE_INTERRUPTS();
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288 /*-----------------------------------------------------------*/
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290 /* This is a naked function. */
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291 static void vPortEnableVFP( void )
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293 SCB->CPACR |= 0xf << 20;
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295 /*-----------------------------------------------------------*/
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297 #if ( configASSERT_DEFINED == 1 )
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299 void vPortValidateInterruptPriority( void )
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301 uint32_t ulCurrentInterrupt;
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302 uint8_t ucCurrentPriority;
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305 /* Obtain the number of the currently executing interrupt. */
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306 ipsr.w = __get_IPSR();
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307 ulCurrentInterrupt = ipsr.b.ISR;
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309 /* Is the interrupt number a user defined interrupt? */
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310 if ( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
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312 /* Look up the interrupt's priority. */
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313 ucCurrentPriority = NVIC->IP[ ulCurrentInterrupt - portFIRST_USER_INTERRUPT_NUMBER ];
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315 /* The following assertion will fail if a service routine (ISR) for
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316 an interrupt that has been assigned a priority above
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317 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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318 function. ISR safe FreeRTOS API functions must *only* be called
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319 from interrupts that have been assigned a priority at or below
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320 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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322 Numerically low interrupt priority numbers represent logically high
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323 interrupt priorities, therefore the priority of the interrupt must
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324 be set to a value equal to or numerically *higher* than
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325 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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327 Interrupts that use the FreeRTOS API must not be left at their
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328 default priority of zero as that is the highest possible priority,
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329 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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330 and therefore also guaranteed to be invalid.
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332 FreeRTOS maintains separate thread and ISR API functions to ensure
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333 interrupt entry is as fast and simple as possible.
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335 The following links provide detailed information:
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336 http://www.freertos.org/RTOS-Cortex-M3-M4.html
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337 http://www.freertos.org/FAQHelp.html */
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338 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
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341 /* Priority grouping: The interrupt controller (NVIC) allows the bits
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342 that define each interrupt's priority to be split between bits that
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343 define the interrupt's pre-emption priority bits and bits that define
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344 the interrupt's sub-priority. For simplicity all bits must be defined
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345 to be pre-emption priority bits. The following assertion will fail if
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346 this is not the case (if some bits represent a sub-priority).
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348 If the application only uses CMSIS libraries for interrupt
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349 configuration then the correct setting can be achieved on all Cortex-M
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350 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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351 scheduler. Note however that some vendor specific peripheral libraries
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352 assume a non-zero priority group setting, in which cases using a value
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353 of zero will result in unpredicable behaviour. */
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354 configASSERT( NVIC_GetPriorityGrouping() <= ulMaxPRIGROUPValue );
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357 #endif /* configASSERT_DEFINED */
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