1 /*******************************************************************************
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2 Copyright (c) 2006-2015 Cadence Design Systems Inc.
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4 Permission is hereby granted, free of charge, to any person obtaining
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5 a copy of this software and associated documentation files (the
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6 "Software"), to deal in the Software without restriction, including
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7 without limitation the rights to use, copy, modify, merge, publish,
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8 distribute, sublicense, and/or sell copies of the Software, and to
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9 permit persons to whom the Software is furnished to do so, subject to
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10 the following conditions:
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12 The above copyright notice and this permission notice shall be included
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13 in all copies or substantial portions of the Software.
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15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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16 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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17 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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18 IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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19 CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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20 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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21 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 ******************************************************************************/
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24 /******************************************************************************
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25 Xtensa interrupt handling data and assembly routines.
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26 Also see xtensa_intr.c and xtensa_vectors.S.
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27 ******************************************************************************/
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29 #include <xtensa/hal.h>
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30 #include <xtensa/config/core.h>
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32 #include "xtensa_context.h"
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34 #if XCHAL_HAVE_INTERRUPTS
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37 -------------------------------------------------------------------------------
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38 INTENABLE virtualization information.
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39 -------------------------------------------------------------------------------
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46 .global _xt_intenable
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47 .type _xt_intenable,@object
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48 .size _xt_intenable,4
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49 .global _xt_vpri_mask
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50 .type _xt_vpri_mask,@object
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51 .size _xt_vpri_mask,4
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53 _xt_intenable: .word 0 /* Virtual INTENABLE */
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54 _xt_vpri_mask: .word 0xFFFFFFFF /* Virtual priority mask */
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58 -------------------------------------------------------------------------------
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59 Table of C-callable interrupt handlers for each interrupt. Note that not all
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60 slots can be filled, because interrupts at level > EXCM_LEVEL will not be
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61 dispatched to a C handler by default.
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62 -------------------------------------------------------------------------------
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66 .global _xt_interrupt_table
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69 _xt_interrupt_table:
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72 .rept XCHAL_NUM_INTERRUPTS
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73 .word xt_unhandled_interrupt /* handler address */
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74 .word i /* handler arg (default: intnum) */
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78 #endif /* XCHAL_HAVE_INTERRUPTS */
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81 #if XCHAL_HAVE_EXCEPTIONS
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84 -------------------------------------------------------------------------------
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85 Table of C-callable exception handlers for each exception. Note that not all
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86 slots will be active, because some exceptions (e.g. coprocessor exceptions)
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87 are always handled by the OS and cannot be hooked by user handlers.
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88 -------------------------------------------------------------------------------
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92 .global _xt_exception_table
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95 _xt_exception_table:
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96 .rept XCHAL_EXCCAUSE_NUM
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97 .word xt_unhandled_exception /* handler address */
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104 -------------------------------------------------------------------------------
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105 unsigned int xt_ints_on ( unsigned int mask )
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107 Enables a set of interrupts. Does not simply set INTENABLE directly, but
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108 computes it as a function of the current virtual priority.
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109 Can be called from interrupt handlers.
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110 -------------------------------------------------------------------------------
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116 .type xt_ints_on,@function
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121 #if XCHAL_HAVE_INTERRUPTS
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123 movi a4, _xt_intdata
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124 xsr a3, INTENABLE /* Disables all interrupts */
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126 l32i a3, a4, 0 /* a3 = _xt_intenable */
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127 l32i a6, a4, 4 /* a6 = _xt_vpri_mask */
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128 or a5, a3, a2 /* a5 = _xt_intenable | mask */
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129 s32i a5, a4, 0 /* _xt_intenable |= mask */
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130 and a5, a5, a6 /* a5 = _xt_intenable & _xt_vpri_mask */
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131 wsr a5, INTENABLE /* Reenable interrupts */
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132 mov a2, a3 /* Previous mask */
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134 movi a2, 0 /* Return zero */
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138 .size xt_ints_on, . - xt_ints_on
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142 -------------------------------------------------------------------------------
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143 unsigned int xt_ints_off ( unsigned int mask )
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145 Disables a set of interrupts. Does not simply set INTENABLE directly,
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146 but computes it as a function of the current virtual priority.
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147 Can be called from interrupt handlers.
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148 -------------------------------------------------------------------------------
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153 .global xt_ints_off
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154 .type xt_ints_off,@function
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159 #if XCHAL_HAVE_INTERRUPTS
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161 movi a4, _xt_intdata
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162 xsr a3, INTENABLE /* Disables all interrupts */
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164 l32i a3, a4, 0 /* a3 = _xt_intenable */
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165 l32i a6, a4, 4 /* a6 = _xt_vpri_mask */
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166 or a5, a3, a2 /* a5 = _xt_intenable | mask */
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167 xor a5, a5, a2 /* a5 = _xt_intenable & ~mask */
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168 s32i a5, a4, 0 /* _xt_intenable &= ~mask */
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169 and a5, a5, a6 /* a5 = _xt_intenable & _xt_vpri_mask */
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170 wsr a5, INTENABLE /* Reenable interrupts */
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171 mov a2, a3 /* Previous mask */
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173 movi a2, 0 /* return zero */
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177 .size xt_ints_off, . - xt_ints_off
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