2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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101 #ifndef PORTMACRO_H
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102 #define PORTMACRO_H
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104 #if !defined(_SERIES) || _SERIES != 18
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105 #error "WizC supports FreeRTOS on the Microchip PIC18-series only"
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108 #if !defined(QUICKCALL) || QUICKCALL != 1
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109 #error "QuickCall must be enabled (see ProjectOptions/Optimisations)"
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112 #include <stddef.h>
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115 #define portCHAR char
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116 #define portFLOAT float
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117 #define portDOUBLE portFLOAT
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118 #define portLONG long
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119 #define portSHORT short
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120 #define portSTACK_TYPE uint8_t
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121 #define portBASE_TYPE char
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123 typedef portSTACK_TYPE StackType_t;
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124 typedef signed char BaseType_t;
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125 typedef unsigned char UBaseType_t;
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128 #if( configUSE_16_BIT_TICKS == 1 )
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129 typedef uint16_t TickType_t;
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130 #define portMAX_DELAY ( TickType_t ) ( 0xFFFF )
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132 typedef uint32_t TickType_t;
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133 #define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFF )
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136 #define portBYTE_ALIGNMENT 1
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138 /*-----------------------------------------------------------*/
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141 * Constant used for context switch macro when we require the interrupt
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142 * enable state to be forced when the interrupted task is switched back in.
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144 #define portINTERRUPTS_FORCED (0x01)
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147 * Constant used for context switch macro when we require the interrupt
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148 * enable state to be unchanged when the interrupted task is switched back in.
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150 #define portINTERRUPTS_UNCHANGED (0x00)
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152 /* Initial interrupt enable state for newly created tasks. This value is
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153 * used when a task switches in for the first time.
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155 #define portINTERRUPTS_INITIAL_STATE (portINTERRUPTS_FORCED)
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158 * Macros to modify the global interrupt enable bit in INTCON.
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160 #define portDISABLE_INTERRUPTS() \
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164 } while(bGIE) // MicroChip recommends this check!
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166 #define portENABLE_INTERRUPTS() \
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172 /*-----------------------------------------------------------*/
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175 * Critical section macros.
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177 extern uint8_t ucCriticalNesting;
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179 #define portNO_CRITICAL_SECTION_NESTING ( ( uint8_t ) 0 )
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181 #define portENTER_CRITICAL() \
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184 portDISABLE_INTERRUPTS(); \
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187 * Now interrupts are disabled ucCriticalNesting \
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188 * can be accessed directly. Increment \
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189 * ucCriticalNesting to keep a count of how \
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190 * many times portENTER_CRITICAL() has been called. \
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192 ucCriticalNesting++; \
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195 #define portEXIT_CRITICAL() \
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198 if(ucCriticalNesting > portNO_CRITICAL_SECTION_NESTING) \
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201 * Decrement the nesting count as we are leaving a \
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202 * critical section. \
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204 ucCriticalNesting--; \
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208 * If the nesting level has reached zero then \
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209 * interrupts should be re-enabled. \
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211 if( ucCriticalNesting == portNO_CRITICAL_SECTION_NESTING ) \
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213 portENABLE_INTERRUPTS(); \
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217 /*-----------------------------------------------------------*/
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220 * The minimal stacksize is calculated on the first reference of
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221 * portMINIMAL_STACK_SIZE. Some input to this calculation is
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222 * compiletime determined, other input is port-defined (see port.c)
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224 extern uint16_t usPortCALCULATE_MINIMAL_STACK_SIZE( void );
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225 extern uint16_t usCalcMinStackSize;
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227 #define portMINIMAL_STACK_SIZE \
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228 ((usCalcMinStackSize == 0) \
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229 ? usPortCALCULATE_MINIMAL_STACK_SIZE() \
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230 : usCalcMinStackSize )
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233 * WizC uses a downgrowing stack
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235 #define portSTACK_GROWTH ( -1 )
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237 /*-----------------------------------------------------------*/
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240 * Macro's that pushes all the registers that make up the context of a task onto
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241 * the stack, then saves the new top of stack into the TCB. TOSU and TBLPTRU
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242 * are only saved/restored on devices with more than 64kB (32k Words) ROM.
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244 * The stackpointer is helt by WizC in FSR2 and points to the first free byte.
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245 * WizC uses a "downgrowing" stack. There is no framepointer.
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247 * We keep track of the interruptstatus using ucCriticalNesting. When this
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248 * value equals zero, interrupts have to be enabled upon exit from the
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249 * portRESTORE_CONTEXT macro.
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251 * If this is called from an ISR then the interrupt enable bits must have been
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252 * set for the ISR to ever get called. Therefore we want to save
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253 * ucCriticalNesting with value zero. This means the interrupts will again be
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254 * re-enabled when the interrupted task is switched back in.
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256 * If this is called from a manual context switch (i.e. from a call to yield),
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257 * then we want to keep the current value of ucCritialNesting so it is restored
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258 * with its current value. This allows a yield from within a critical section.
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260 * The compiler uses some locations at the bottom of RAM for temporary
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261 * storage. The compiler may also have been instructed to optimize
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262 * function-parameters and local variables to global storage. The compiler
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263 * uses an area called LocOpt for this wizC feature.
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264 * The total overheadstorage has to be saved in it's entirety as part of
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265 * a task context. These macro's store/restore from data address 0x0000 to
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266 * (OVERHEADPAGE0-LOCOPTSIZE+MAXLOCOPTSIZE - 1).
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267 * OVERHEADPAGE0, LOCOPTSIZE and MAXLOCOPTSIZE are compiler-generated
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268 * assembler definitions.
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271 #define portSAVE_CONTEXT( ucInterruptForced ) \
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274 portDISABLE_INTERRUPTS(); \
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278 ; Push the relevant SFR's onto the task's stack \
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280 movff STATUS,POSTDEC2 \
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281 movff WREG,POSTDEC2 \
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282 movff BSR,POSTDEC2 \
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283 movff PRODH,POSTDEC2 \
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284 movff PRODL,POSTDEC2 \
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285 movff FSR0H,POSTDEC2 \
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286 movff FSR0L,POSTDEC2 \
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287 movff FSR1H,POSTDEC2 \
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288 movff FSR1L,POSTDEC2 \
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289 movff TABLAT,POSTDEC2 \
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290 if __ROMSIZE > 0x8000 \
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291 movff TBLPTRU,POSTDEC2 \
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293 movff TBLPTRH,POSTDEC2 \
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294 movff TBLPTRL,POSTDEC2 \
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295 if __ROMSIZE > 0x8000 \
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296 movff PCLATU,POSTDEC2 \
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298 movff PCLATH,POSTDEC2 \
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300 ; Store the compiler-scratch-area as described above. \
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302 movlw OVERHEADPAGE0-LOCOPTSIZE+MAXLOCOPTSIZE \
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303 clrf FSR0L,ACCESS \
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304 clrf FSR0H,ACCESS \
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306 movff POSTINC0,POSTDEC2 \
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307 decfsz WREG,W,ACCESS \
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308 SMARTJUMP _rtos_S1 \
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310 ; Save the pic call/return-stack belonging to the \
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311 ; current task by copying it to the task's software- \
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312 ; stack. We save the hardware stack pointer (which \
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313 ; is the number of addresses on the stack) in the \
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314 ; W-register first because we need it later and it \
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315 ; is modified in the save-loop by executing pop's. \
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316 ; After the loop the W-register is stored on the \
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319 movf STKPTR,W,ACCESS \
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322 if __ROMSIZE > 0x8000 \
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323 movff TOSU,POSTDEC2 \
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325 movff TOSH,POSTDEC2 \
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326 movff TOSL,POSTDEC2 \
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328 tstfsz STKPTR,ACCESS \
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329 SMARTJUMP _rtos_S2 \
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331 movwf POSTDEC2,ACCESS \
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333 ; Next the value for ucCriticalNesting used by the \
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334 ; task is stored on the stack. When \
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335 ; (ucInterruptForced == portINTERRUPTS_FORCED), we save \
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336 ; it as 0 (portNO_CRITICAL_SECTION_NESTING). \
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338 if ucInterruptForced == portINTERRUPTS_FORCED \
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339 clrf POSTDEC2,ACCESS \
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341 movff ucCriticalNesting,POSTDEC2 \
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344 ; Save the new top of the software stack in the TCB. \
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346 movff pxCurrentTCB,FSR0L \
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347 movff pxCurrentTCB+1,FSR0H \
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348 movff FSR2L,POSTINC0 \
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349 movff FSR2H,POSTINC0 \
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350 _Pragma("asmend") \
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353 /************************************************************/
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356 * This is the reverse of portSAVE_CONTEXT.
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358 #define portRESTORE_CONTEXT() \
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363 ; Set FSR0 to point to pxCurrentTCB->pxTopOfStack. \
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365 movff pxCurrentTCB,FSR0L \
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366 movff pxCurrentTCB+1,FSR0H \
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368 ; De-reference FSR0 to set the address it holds into \
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369 ; FSR2 (i.e. *( pxCurrentTCB->pxTopOfStack ) ). FSR2 \
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370 ; is used by wizC as stackpointer. \
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372 movff POSTINC0,FSR2L \
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373 movff POSTINC0,FSR2H \
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375 ; Next, the value for ucCriticalNesting used by the \
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376 ; task is retrieved from the stack. \
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378 movff PREINC2,ucCriticalNesting \
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380 ; Rebuild the pic call/return-stack. The number of \
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381 ; return addresses is the next item on the task stack. \
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382 ; Save this number in PRODL. Then fetch the addresses \
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383 ; and store them on the hardwarestack. \
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384 ; The datasheets say we can't use movff here... \
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386 movff PREINC2,PRODL // Use PRODL as tempregister \
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387 clrf STKPTR,ACCESS \
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390 movf PREINC2,W,ACCESS \
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391 movwf TOSL,ACCESS \
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392 movf PREINC2,W,ACCESS \
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393 movwf TOSH,ACCESS \
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394 if __ROMSIZE > 0x8000 \
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395 movf PREINC2,W,ACCESS \
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396 movwf TOSU,ACCESS \
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400 decfsz PRODL,F,ACCESS \
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401 SMARTJUMP _rtos_R1 \
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403 ; Restore the compiler's working storage area to page 0 \
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405 movlw OVERHEADPAGE0-LOCOPTSIZE+MAXLOCOPTSIZE \
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406 movwf FSR0L,ACCESS \
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407 clrf FSR0H,ACCESS \
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409 decf FSR0L,F,ACCESS \
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410 movff PREINC2,INDF0 \
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411 tstfsz FSR0L,ACCESS \
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412 SMARTJUMP _rtos_R2 \
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414 ; Restore the sfr's forming the tasks context. \
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415 ; We cannot yet restore bsr, w and status because \
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416 ; we need these registers for a final test. \
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418 movff PREINC2,PCLATH \
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419 if __ROMSIZE > 0x8000 \
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420 movff PREINC2,PCLATU \
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422 clrf PCLATU,ACCESS \
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424 movff PREINC2,TBLPTRL \
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425 movff PREINC2,TBLPTRH \
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426 if __ROMSIZE > 0x8000 \
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427 movff PREINC2,TBLPTRU \
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429 clrf TBLPTRU,ACCESS \
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431 movff PREINC2,TABLAT \
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432 movff PREINC2,FSR1L \
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433 movff PREINC2,FSR1H \
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434 movff PREINC2,FSR0L \
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435 movff PREINC2,FSR0H \
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436 movff PREINC2,PRODL \
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437 movff PREINC2,PRODH \
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439 ; The return from portRESTORE_CONTEXT() depends on \
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440 ; the value of ucCriticalNesting. When it is zero, \
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441 ; interrupts need to be enabled. This is done via a \
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442 ; retfie instruction because we need the \
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443 ; interrupt-enabling and the return to the restored \
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444 ; task to be uninterruptable. \
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445 ; Because bsr, status and W are affected by the test \
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446 ; they are restored after the test. \
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448 movlb ucCriticalNesting>>8 \
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449 tstfsz ucCriticalNesting,BANKED \
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450 SMARTJUMP _rtos_R4 \
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452 movff PREINC2,BSR \
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453 movff PREINC2,WREG \
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454 movff PREINC2,STATUS \
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455 retfie 0 ; Return enabling interrupts \
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457 movff PREINC2,BSR \
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458 movff PREINC2,WREG \
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459 movff PREINC2,STATUS \
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460 return 0 ; Return without affecting interrupts \
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461 _Pragma("asmend") \
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464 /*-----------------------------------------------------------*/
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466 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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468 /*-----------------------------------------------------------*/
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470 extern void vPortYield( void );
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471 #define portYIELD() vPortYield()
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473 #define portNOP() _Pragma("asm") \
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477 /*-----------------------------------------------------------*/
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479 #define portTASK_FUNCTION( xFunction, pvParameters ) \
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480 void pointed xFunction( void *pvParameters ) \
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481 _Pragma(asmfunc xFunction)
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483 #define portTASK_FUNCTION_PROTO portTASK_FUNCTION
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484 /*-----------------------------------------------------------*/
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490 #endif /* PORTMACRO_H */
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projects / freertos / blob