2 FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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30 ***************************************************************************
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36 + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
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40 + Removed the use of the %0 parameter within the assembler macros and
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41 replaced them with hard coded registers. This will ensure the
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42 assembler does not select the link register as the temp register as
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43 was occasionally happening previously.
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45 + The assembler statements are now included in a single asm block rather
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46 than each line having its own asm block.
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52 /*-----------------------------------------------------------
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53 * Port specific definitions.
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55 * The settings in this file configure FreeRTOS correctly for the
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56 * given hardware and compiler.
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58 * These settings should not be altered.
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59 *-----------------------------------------------------------
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62 /* Type definitions. */
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63 #define portCHAR char
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64 #define portFLOAT float
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65 #define portDOUBLE double
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66 #define portLONG long
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67 #define portSHORT short
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68 #define portSTACK_TYPE unsigned portLONG
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69 #define portBASE_TYPE portLONG
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71 #if( configUSE_16_BIT_TICKS == 1 )
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72 typedef unsigned portSHORT portTickType;
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73 #define portMAX_DELAY ( portTickType ) 0xffff
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75 typedef unsigned portLONG portTickType;
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76 #define portMAX_DELAY ( portTickType ) 0xffffffff
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78 /*-----------------------------------------------------------*/
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80 /* Architecture specifics. */
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81 #define portSTACK_GROWTH ( -1 )
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82 #define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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83 #define portBYTE_ALIGNMENT 4
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84 #define portNOP() asm volatile ( "NOP" );
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85 /*-----------------------------------------------------------*/
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88 /* Scheduler utilities. */
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91 * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR
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92 * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but
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93 * are included here for efficiency. An attempt to call one from
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94 * THUMB mode code will result in a compile time error.
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97 #define portRESTORE_CONTEXT() \
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99 extern volatile void * volatile pxCurrentTCB; \
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100 extern volatile unsigned portLONG ulCriticalNesting; \
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102 /* Set the LR to the task stack. */ \
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104 "LDR R0, =pxCurrentTCB \n\t" \
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105 "LDR R0, [R0] \n\t" \
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106 "LDR LR, [R0] \n\t" \
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108 /* The critical nesting depth is the first item on the stack. */ \
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109 /* Load it into the ulCriticalNesting variable. */ \
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110 "LDR R0, =ulCriticalNesting \n\t" \
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111 "LDMFD LR!, {R1} \n\t" \
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112 "STR R1, [R0] \n\t" \
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114 /* Get the SPSR from the stack. */ \
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115 "LDMFD LR!, {R0} \n\t" \
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116 "MSR SPSR, R0 \n\t" \
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118 /* Restore all system mode registers for the task. */ \
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119 "LDMFD LR, {R0-R14}^ \n\t" \
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122 /* Restore the return address. */ \
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123 "LDR LR, [LR, #+60] \n\t" \
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125 /* And return - correcting the offset in the LR to obtain the */ \
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126 /* correct address. */ \
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127 "SUBS PC, LR, #4 \n\t" \
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129 ( void ) ulCriticalNesting; \
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130 ( void ) pxCurrentTCB; \
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132 /*-----------------------------------------------------------*/
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134 #define portSAVE_CONTEXT() \
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136 extern volatile void * volatile pxCurrentTCB; \
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137 extern volatile unsigned portLONG ulCriticalNesting; \
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139 /* Push R0 as we are going to use the register. */ \
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141 "STMDB SP!, {R0} \n\t" \
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143 /* Set R0 to point to the task stack pointer. */ \
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144 "STMDB SP,{SP}^ \n\t" \
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146 "SUB SP, SP, #4 \n\t" \
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147 "LDMIA SP!,{R0} \n\t" \
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149 /* Push the return address onto the stack. */ \
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150 "STMDB R0!, {LR} \n\t" \
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152 /* Now we have saved LR we can use it instead of R0. */ \
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153 "MOV LR, R0 \n\t" \
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155 /* Pop R0 so we can save it onto the system mode stack. */ \
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156 "LDMIA SP!, {R0} \n\t" \
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158 /* Push all the system mode registers onto the task stack. */ \
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159 "STMDB LR,{R0-LR}^ \n\t" \
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161 "SUB LR, LR, #60 \n\t" \
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163 /* Push the SPSR onto the task stack. */ \
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164 "MRS R0, SPSR \n\t" \
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165 "STMDB LR!, {R0} \n\t" \
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167 "LDR R0, =ulCriticalNesting \n\t" \
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168 "LDR R0, [R0] \n\t" \
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169 "STMDB LR!, {R0} \n\t" \
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171 /* Store the new top of stack for the task. */ \
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172 "LDR R0, =pxCurrentTCB \n\t" \
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173 "LDR R0, [R0] \n\t" \
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174 "STR LR, [R0] \n\t" \
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176 ( void ) ulCriticalNesting; \
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177 ( void ) pxCurrentTCB; \
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181 /*-----------------------------------------------------------
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182 * ISR entry and exit macros. These are only required if a task switch
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183 * is required from the ISR.
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184 *----------------------------------------------------------*/
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187 #define portENTER_SWITCHING_ISR() \
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188 /* Save the context of the interrupted task. */ \
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189 portSAVE_CONTEXT(); \
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191 /* We don't know the stack requirements for the ISR, so the frame */\
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192 /* pointer will be set to the top of the task stack, and the stack*/\
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193 /* pointer left where it is. The IRQ stack will get used for any */\
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194 /* functions calls made by this ISR. */ \
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195 asm volatile ( "SUB R11, LR, #4" ); \
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198 #define portEXIT_SWITCHING_ISR( SwitchRequired ) \
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199 /* If a switch is required then we just need to call */ \
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200 /* vTaskSwitchContext() as the context has already been */ \
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202 if( SwitchRequired ) \
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204 vTaskSwitchContext(); \
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207 /* Restore the context of which ever task is now the highest */ \
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208 /* priority that is ready to run. */ \
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209 portRESTORE_CONTEXT();
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211 #define portYIELD() asm volatile ( "SWI" );
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212 /*-----------------------------------------------------------*/
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215 /* Critical section management. */
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218 * The interrupt management utilities can only be called from ARM mode. When
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219 * THUMB_INTERWORK is defined the utilities are defined as functions in
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220 * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
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221 * defined then the utilities are defined as macros here - as per other ports.
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224 #ifdef THUMB_INTERWORK
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226 extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
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227 extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
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229 #define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
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230 #define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
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234 #define portDISABLE_INTERRUPTS() \
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235 #define portDISABLE_INTERRUPTS() \
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237 "STMDB SP!, {R0} \n\t" /* Push R0. */ \
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238 "MRS R0, CPSR \n\t" /* Get CPSR. */ \
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239 "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
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240 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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241 "LDMIA SP!, {R0} " ) /* Pop R0. */
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243 #define portENABLE_INTERRUPTS() \
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245 "STMDB SP!, {R0} \n\t" /* Push R0. */ \
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246 "MRS R0, CPSR \n\t" /* Get CPSR. */ \
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247 "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
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248 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \
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249 "LDMIA SP!, {R0} " ) /* Pop R0. */
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251 #endif /* THUMB_INTERWORK */
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253 extern void vPortEnterCritical( void );
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254 extern void vPortExitCritical( void );
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256 #define portENTER_CRITICAL() vPortEnterCritical();
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257 #define portEXIT_CRITICAL() vPortExitCritical();
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258 /*-----------------------------------------------------------*/
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260 /* Task function macros as described on the FreeRTOS.org WEB site. */
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261 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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262 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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264 #endif /* PORTMACRO_H */
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