]> git.sur5r.net Git - freertos/blob - Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc
Update to FreeRTOS V6.1.0 release candidate.
[freertos] / Source / portable / RVDS / ARM7_LPC21xx / portmacro.inc
1 ;/*\r
2 ;    FreeRTOS V6.1.0 - Copyright (C) 2010 Real Time Engineers Ltd.\r
3 ;\r
4 ;    ***************************************************************************\r
5 ;    *                                                                         *\r
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22 ;    *                                                                         *\r
23 ;    ***************************************************************************\r
24 ;\r
25 ;    This file is part of the FreeRTOS distribution.\r
26 ;\r
27 ;    FreeRTOS is free software; you can redistribute it and/or modify it under\r
28 ;    the terms of the GNU General Public License (version 2) as published by the\r
29 ;    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30 ;    ***NOTE*** The exception to the GPL is included to allow you to distribute\r
31 ;    a combined work that includes FreeRTOS without being obliged to provide the\r
32 ;    source code for proprietary components outside of the FreeRTOS kernel.\r
33 ;    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
34 ;    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
35 ;    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36 ;    more details. You should have received a copy of the GNU General Public \r
37 ;    License and the FreeRTOS license exception along with FreeRTOS; if not it \r
38 ;    can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
39 ;    by writing to Richard Barry, contact details for whom are available on the\r
40 ;    FreeRTOS WEB site.\r
41 ;\r
42 ;    1 tab == 4 spaces!\r
43 ;\r
44 ;    http://www.FreeRTOS.org - Documentation, latest information, license and\r
45 ;    contact details.\r
46 ;\r
47 ;    http://www.SafeRTOS.com - A version that is certified for use in safety\r
48 ;    critical systems.\r
49 ;\r
50 ;    http://www.OpenRTOS.com - Commercial support, development, porting,\r
51 ;    licensing and training services.\r
52 ;*/\r
53 \r
54         IMPORT  ulCriticalNesting               ;\r
55         IMPORT  pxCurrentTCB                    ;\r
56 \r
57 \r
58         MACRO\r
59         portRESTORE_CONTEXT\r
60 \r
61 \r
62         LDR             R0, =pxCurrentTCB               ; Set the LR to the task stack.  The location was...\r
63         LDR             R0, [R0]                                ; ... stored in pxCurrentTCB\r
64         LDR             LR, [R0]\r
65 \r
66         LDR             R0, =ulCriticalNesting  ; The critical nesting depth is the first item on... \r
67         LDMFD   LR!, {R1}                               ; ...the stack.  Load it into the ulCriticalNesting var.\r
68         STR             R1, [R0]                                ;\r
69 \r
70         LDMFD   LR!, {R0}                               ; Get the SPSR from the stack.\r
71         MSR             SPSR_cxsf, R0                   ;\r
72 \r
73         LDMFD   LR, {R0-R14}^                   ; Restore all system mode registers for the task.\r
74         NOP                                                             ;\r
75 \r
76         LDR             LR, [LR, #+60]                  ; Restore the return address\r
77 \r
78                                                                         ; And return - correcting the offset in the LR to obtain ...\r
79         SUBS    PC, LR, #4                              ; ...the correct address.\r
80 \r
81         MEND\r
82 \r
83 ; /**********************************************************************/\r
84 \r
85         MACRO\r
86         portSAVE_CONTEXT\r
87 \r
88 \r
89         STMDB   SP!, {R0}                               ; Store R0 first as we need to use it.\r
90 \r
91         STMDB   SP,{SP}^                                ; Set R0 to point to the task stack pointer.\r
92         NOP                                                             ;\r
93         SUB             SP, SP, #4                              ;\r
94         LDMIA   SP!,{R0}                                ;\r
95 \r
96         STMDB   R0!, {LR}                               ; Push the return address onto the stack.\r
97         MOV             LR, R0                                  ; Now we have saved LR we can use it instead of R0.\r
98         LDMIA   SP!, {R0}                               ; Pop R0 so we can save it onto the system mode stack.\r
99 \r
100         STMDB   LR,{R0-LR}^                             ; Push all the system mode registers onto the task stack.\r
101         NOP                                                             ;\r
102         SUB             LR, LR, #60                             ;\r
103 \r
104         MRS             R0, SPSR                                ; Push the SPSR onto the task stack.\r
105         STMDB   LR!, {R0}                               ;\r
106 \r
107         LDR             R0, =ulCriticalNesting  ;\r
108         LDR             R0, [R0]                                ;\r
109         STMDB   LR!, {R0}                               ;\r
110 \r
111         LDR             R0, =pxCurrentTCB               ; Store the new top of stack for the task.\r
112         LDR             R1, [R0]                                ;                \r
113         STR             LR, [R1]                                ;\r
114         \r
115         MEND\r
116         \r
117         END\r