]> git.sur5r.net Git - freertos/blob - Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc
Update to V5.1.2.
[freertos] / Source / portable / RVDS / ARM7_LPC21xx / portmacro.inc
1 ;/*\r
2 ;       FreeRTOS.org V5.1.2 - Copyright (C) 2003-2009 Richard Barry.\r
3 ;\r
4 ;       This file is part of the FreeRTOS.org distribution.\r
5 ;\r
6 ;       FreeRTOS.org is free software; you can redistribute it and/or modify\r
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9 ;       (at your option) any later version.\r
10 ;\r
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14 ;       GNU General Public License for more details.\r
15 ;\r
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24 ;       can be applied.\r
25 ;\r
26 ;   ***************************************************************************\r
27 ;   ***************************************************************************\r
28 ;   *                                                                         *\r
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33 ;   *                                                                         *\r
34 ;   ***************************************************************************\r
35 ;   ***************************************************************************\r
36 ;\r
37 ;       Please ensure to read the configuration and relevant port sections of the\r
38 ;       online documentation.\r
39 ;\r
40 ;       http://www.FreeRTOS.org - Documentation, latest information, license and \r
41 ;       contact details.\r
42 ;\r
43 ;       http://www.SafeRTOS.com - A version that is certified for use in safety \r
44 ;       critical systems.\r
45 ;\r
46 ;       http://www.OpenRTOS.com - Commercial support, development, porting, \r
47 ;       licensing and training services.\r
48 ;*/\r
49 \r
50         IMPORT  ulCriticalNesting               ;\r
51         IMPORT  pxCurrentTCB                    ;\r
52 \r
53 \r
54         MACRO\r
55         portRESTORE_CONTEXT\r
56 \r
57 \r
58         LDR             R0, =pxCurrentTCB               ; Set the LR to the task stack.  The location was...\r
59         LDR             R0, [R0]                                ; ... stored in pxCurrentTCB\r
60         LDR             LR, [R0]\r
61 \r
62         LDR             R0, =ulCriticalNesting  ; The critical nesting depth is the first item on... \r
63         LDMFD   LR!, {R1}                               ; ...the stack.  Load it into the ulCriticalNesting var.\r
64         STR             R1, [R0]                                ;\r
65 \r
66         LDMFD   LR!, {R0}                               ; Get the SPSR from the stack.\r
67         MSR             SPSR_cxsf, R0                   ;\r
68 \r
69         LDMFD   LR, {R0-R14}^                   ; Restore all system mode registers for the task.\r
70         NOP                                                             ;\r
71 \r
72         LDR             LR, [LR, #+60]                  ; Restore the return address\r
73 \r
74                                                                         ; And return - correcting the offset in the LR to obtain ...\r
75         SUBS    PC, LR, #4                              ; ...the correct address.\r
76 \r
77         MEND\r
78 \r
79 ; /**********************************************************************/\r
80 \r
81         MACRO\r
82         portSAVE_CONTEXT\r
83 \r
84 \r
85         STMDB   SP!, {R0}                               ; Store R0 first as we need to use it.\r
86 \r
87         STMDB   SP,{SP}^                                ; Set R0 to point to the task stack pointer.\r
88         NOP                                                             ;\r
89         SUB             SP, SP, #4                              ;\r
90         LDMIA   SP!,{R0}                                ;\r
91 \r
92         STMDB   R0!, {LR}                               ; Push the return address onto the stack.\r
93         MOV             LR, R0                                  ; Now we have saved LR we can use it instead of R0.\r
94         LDMIA   SP!, {R0}                               ; Pop R0 so we can save it onto the system mode stack.\r
95 \r
96         STMDB   LR,{R0-LR}^                             ; Push all the system mode registers onto the task stack.\r
97         NOP                                                             ;\r
98         SUB             LR, LR, #60                             ;\r
99 \r
100         MRS             R0, SPSR                                ; Push the SPSR onto the task stack.\r
101         STMDB   LR!, {R0}                               ;\r
102 \r
103         LDR             R0, =ulCriticalNesting  ;\r
104         LDR             R0, [R0]                                ;\r
105         STMDB   LR!, {R0}                               ;\r
106 \r
107         LDR             R0, =pxCurrentTCB               ; Store the new top of stack for the task.\r
108         LDR             R1, [R0]                                ;                \r
109         STR             LR, [R1]                                ;\r
110         \r
111         MEND\r
112         \r
113         END\r