]> git.sur5r.net Git - freertos/blob - Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc
Ready for V5.2.0 release.
[freertos] / Source / portable / RVDS / ARM7_LPC21xx / portmacro.inc
1 ;/*\r
2 ;       FreeRTOS.org V5.2.0 - Copyright (C) 2003-2009 Richard Barry.\r
3 ;\r
4 ;       This file is part of the FreeRTOS.org distribution.\r
5 ;\r
6 ;       FreeRTOS.org is free software; you can redistribute it and/or modify it \r
7 ;       under the terms of the GNU General Public License (version 2) as published\r
8 ;       by the Free Software Foundation and modified by the FreeRTOS exception.\r
9 ;\r
10 ;       FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT\r
11 ;       ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or \r
12 ;       FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for \r
13 ;       more details.\r
14 ;\r
15 ;       You should have received a copy of the GNU General Public License along \r
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17 ;       Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
18 ;\r
19 ;       A special exception to the GPL is included to allow you to distribute a \r
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21 ;       the source code for any proprietary components.  See the licensing section\r
22 ;       of http://www.FreeRTOS.org for full details.\r
23 ;\r
24 ;\r
25 ;       ***************************************************************************\r
26 ;       *                                                                         *\r
27 ;       * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *\r
28 ;       *                                                                         *\r
29 ;       * This is a concise, step by step, 'hands on' guide that describes both   *\r
30 ;       * general multitasking concepts and FreeRTOS specifics. It presents and   *\r
31 ;       * explains numerous examples that are written using the FreeRTOS API.     *\r
32 ;       * Full source code for all the examples is provided in an accompanying    *\r
33 ;       * .zip file.                                                              *\r
34 ;       *                                                                         *\r
35 ;       ***************************************************************************\r
36 ;\r
37 ;       1 tab == 4 spaces!\r
38 ;\r
39 ;       Please ensure to read the configuration and relevant port sections of the\r
40 ;       online documentation.\r
41 ;\r
42 ;       http://www.FreeRTOS.org - Documentation, latest information, license and\r
43 ;       contact details.\r
44 ;\r
45 ;       http://www.SafeRTOS.com - A version that is certified for use in safety\r
46 ;       critical systems.\r
47 ;\r
48 ;       http://www.OpenRTOS.com - Commercial support, development, porting,\r
49 ;       licensing and training services.\r
50 ;*/\r
51 \r
52         IMPORT  ulCriticalNesting               ;\r
53         IMPORT  pxCurrentTCB                    ;\r
54 \r
55 \r
56         MACRO\r
57         portRESTORE_CONTEXT\r
58 \r
59 \r
60         LDR             R0, =pxCurrentTCB               ; Set the LR to the task stack.  The location was...\r
61         LDR             R0, [R0]                                ; ... stored in pxCurrentTCB\r
62         LDR             LR, [R0]\r
63 \r
64         LDR             R0, =ulCriticalNesting  ; The critical nesting depth is the first item on... \r
65         LDMFD   LR!, {R1}                               ; ...the stack.  Load it into the ulCriticalNesting var.\r
66         STR             R1, [R0]                                ;\r
67 \r
68         LDMFD   LR!, {R0}                               ; Get the SPSR from the stack.\r
69         MSR             SPSR_cxsf, R0                   ;\r
70 \r
71         LDMFD   LR, {R0-R14}^                   ; Restore all system mode registers for the task.\r
72         NOP                                                             ;\r
73 \r
74         LDR             LR, [LR, #+60]                  ; Restore the return address\r
75 \r
76                                                                         ; And return - correcting the offset in the LR to obtain ...\r
77         SUBS    PC, LR, #4                              ; ...the correct address.\r
78 \r
79         MEND\r
80 \r
81 ; /**********************************************************************/\r
82 \r
83         MACRO\r
84         portSAVE_CONTEXT\r
85 \r
86 \r
87         STMDB   SP!, {R0}                               ; Store R0 first as we need to use it.\r
88 \r
89         STMDB   SP,{SP}^                                ; Set R0 to point to the task stack pointer.\r
90         NOP                                                             ;\r
91         SUB             SP, SP, #4                              ;\r
92         LDMIA   SP!,{R0}                                ;\r
93 \r
94         STMDB   R0!, {LR}                               ; Push the return address onto the stack.\r
95         MOV             LR, R0                                  ; Now we have saved LR we can use it instead of R0.\r
96         LDMIA   SP!, {R0}                               ; Pop R0 so we can save it onto the system mode stack.\r
97 \r
98         STMDB   LR,{R0-LR}^                             ; Push all the system mode registers onto the task stack.\r
99         NOP                                                             ;\r
100         SUB             LR, LR, #60                             ;\r
101 \r
102         MRS             R0, SPSR                                ; Push the SPSR onto the task stack.\r
103         STMDB   LR!, {R0}                               ;\r
104 \r
105         LDR             R0, =ulCriticalNesting  ;\r
106         LDR             R0, [R0]                                ;\r
107         STMDB   LR!, {R0}                               ;\r
108 \r
109         LDR             R0, =pxCurrentTCB               ; Store the new top of stack for the task.\r
110         LDR             R1, [R0]                                ;                \r
111         STR             LR, [R1]                                ;\r
112         \r
113         MEND\r
114         \r
115         END\r