2 FreeRTOS.org V4.1.3 - Copyright (C) 2003-2006 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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30 ***************************************************************************
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34 Changes between V4.0.0 and V4.0.1
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36 + Reduced the code used to setup the initial stack frame.
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37 + The kernel no longer has to install or handle the fault interrupt.
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40 /*-----------------------------------------------------------
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41 * Implementation of functions defined in portable.h for the ARM CM3 port.
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42 *----------------------------------------------------------*/
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44 /* Scheduler includes. */
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45 #include "FreeRTOS.h"
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48 /* Constants required to manipulate the NVIC. */
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49 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned portLONG *) 0xe000e010 )
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50 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned portLONG *) 0xe000e014 )
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51 #define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )
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52 #define portNVIC_SYSPRI2 ( ( volatile unsigned portLONG *) 0xe000ed20 )
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53 #define portNVIC_SYSPRI1 ( ( volatile unsigned portLONG *) 0xe000ed1c )
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54 #define portNVIC_HARD_FAULT_STATUS 0xe000ed2c
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55 #define portNVIC_FORCED_FAULT_BIT 0x40000000
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56 #define portNVIC_SYSTICK_CLK 0x00000004
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57 #define portNVIC_SYSTICK_INT 0x00000002
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58 #define portNVIC_SYSTICK_ENABLE 0x00000001
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59 #define portNVIC_PENDSVSET 0x10000000
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60 #define portNVIC_PENDSV_PRI 0x00ff0000
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61 #define portNVIC_SVCALL_PRI 0xff000000
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62 #define portNVIC_SYSTICK_PRI 0xff000000
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64 /* Constants required to set up the initial stack. */
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65 #define portINITIAL_XPSR ( 0x01000000 )
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67 /* Each task maintains its own interrupt status in the critical nesting
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69 unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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71 /* Constant hardware definitions to assist asm code. */
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72 const unsigned long ulHardFaultStatus = portNVIC_HARD_FAULT_STATUS;
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73 const unsigned long ulNVICIntCtrl = ( unsigned long ) 0xe000ed04;
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74 const unsigned long ulForceFaultBit = portNVIC_FORCED_FAULT_BIT;
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75 const unsigned long ulPendSVBit = portNVIC_PENDSVSET;
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78 * Setup the timer to generate the tick interrupts.
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80 static void prvSetupTimerInterrupt( void );
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83 * Set the MSP/PSP to a known value.
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85 void prvSetMSP( unsigned long ulValue );
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86 void prvSetPSP( unsigned long ulValue );
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88 /*-----------------------------------------------------------*/
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91 * See header file for description.
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93 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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95 /* Simulate the stack frame as it would be created by a context switch
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97 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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99 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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101 *pxTopOfStack = 0xfffffffd; /* LR */
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102 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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103 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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104 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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105 *pxTopOfStack = 0x00000000; /* uxCriticalNesting. */
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107 return pxTopOfStack;
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109 /*-----------------------------------------------------------*/
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111 __asm void prvSetPSP( unsigned long ulValue )
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117 /*-----------------------------------------------------------*/
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119 __asm void prvSetMSP( unsigned long ulValue )
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125 /*-----------------------------------------------------------*/
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128 * See header file for description.
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130 portBASE_TYPE xPortStartScheduler( void )
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132 /* Start the timer that generates the tick ISR. Interrupts are disabled
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134 prvSetupTimerInterrupt();
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136 /* Make PendSV, CallSV and SysTick the lowest priority interrupts. */
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137 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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138 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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139 *(portNVIC_SYSPRI1) |= portNVIC_SVCALL_PRI;
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141 /* Start the first task. */
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143 prvSetMSP( *((unsigned portLONG *) 0 ) );
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144 *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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146 /* Enable interrupts */
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147 portENABLE_INTERRUPTS();
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149 /* Should not get here! */
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152 /*-----------------------------------------------------------*/
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154 void vPortEndScheduler( void )
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156 /* It is unlikely that the CM3 port will require this function as there
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157 is nothing to return to. */
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159 /*-----------------------------------------------------------*/
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161 void vPortYieldFromISR( void )
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163 /* Set a PendSV to request a context switch. */
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164 *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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165 portENABLE_INTERRUPTS();
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167 /*-----------------------------------------------------------*/
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169 __asm void vPortDisableInterrupts( void )
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175 /*-----------------------------------------------------------*/
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177 __asm void vPortEnableInterrupts( void )
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183 /*-----------------------------------------------------------*/
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185 void vPortEnterCritical( void )
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187 vPortDisableInterrupts();
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188 uxCriticalNesting++;
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190 /*-----------------------------------------------------------*/
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192 void vPortExitCritical( void )
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194 uxCriticalNesting--;
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195 if( uxCriticalNesting == 0 )
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197 vPortEnableInterrupts();
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200 /*-----------------------------------------------------------*/
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202 __asm void xPortPendSVHandler( void )
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204 extern uxCriticalNesting;
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205 extern pxCurrentTCB;
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206 extern vTaskSwitchContext;
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210 /* Start first task if the stack has not yet been setup. */
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214 /* Save the context into the TCB. */
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218 ldr r1, =uxCriticalNesting
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221 ldr r1, =pxCurrentTCB
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227 /* Find the task to execute. */
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228 ldr r0, =vTaskSwitchContext
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235 /* Restore the context. */
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236 ldr r1, =pxCurrentTCB
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239 ldm r0, {r1, r4-r11}
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240 ldr r2, =uxCriticalNesting
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247 /* Exit with interrupts in the state required by the task. */
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248 cbnz r2, sv_disable_interrupts
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252 sv_disable_interrupts;
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256 /*-----------------------------------------------------------*/
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258 __asm void xPortSysTickHandler( void )
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260 extern vTaskIncrementTick
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263 /* Call the scheduler tick function. */
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264 ldr r0, =vTaskIncrementTick
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271 /* If using preemption, also force a context switch. */
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272 #if configUSE_PREEMPTION == 1
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273 extern vPortYieldFromISR
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275 ldr r0, =vPortYieldFromISR
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280 /* Exit with interrupts in the correct state. */
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281 ldr r2, =uxCriticalNesting
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283 cbnz r2, tick_disable_interrupts
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287 tick_disable_interrupts;
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291 /*-----------------------------------------------------------*/
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294 * Setup the systick timer to generate the tick interrupts at the required
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297 void prvSetupTimerInterrupt( void )
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299 /* Configure SysTick to interrupt at the requested rate. */
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300 *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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301 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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