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1 #include <msp430x14x.h>\r
2 \r
3 /*\r
4  * Milos Prokic\r
5  */\r
6 \r
7 /**********************************************************\r
8 All Interrupts should follow the naming convention : ISR"name" and declared\r
9 as a normal function in C.\r
10 \r
11 One must not forget to allocate interrupts below (see the line "MSPINT  OsTick"\r
12 below for an example).\r
13 \r
14 By default the ISR will not cause the context switch, but if called in \r
15 conjunction with portENTER_SWITCHING_ISR/portEXIT_SWITCHING_ISR(wakeup), where \r
16 wakeup = TRUE upon exit the ISR will force the context switch via the \r
17 ucReschedule global variable.\r
18 **********************************************************/     \r
19 MSPINT  macro name\r
20 _##name::\r
21                 call    #_portSAVE_CONTEXT              \r
22                 call    #_ISR##name                       \r
23                 br              #_portSWITCH_EXIT                       \r
24                 endm\r
25 \r
26 \r
27 /**********************************************************\r
28 API code\r
29 **********************************************************/     \r
30 \r
31                 .CODE\r
32 _vPortYield::\r
33                 /* Mimic an INT call by pushing SR. */\r
34                 push    SR                      \r
35                 /* no INTs !! */\r
36                 dint                            \r
37                 /* Save the context of the current task. */\r
38                 call    #_portSAVE_CONTEXT                      \r
39                 /* Switch to the highest priority task that is ready to run. */\r
40                 call    #_vTaskSwitchContext            \r
41                 /* Restore the context of the new task. */\r
42                 br              #_portSWITCH_EXIT               \r
43 \r
44 _xPortStartScheduler::\r
45                 /* Setup the hardware to generate the tick.  Interrupts are disabled when\r
46                 this function is called. */\r
47                 call    #_prvSetupTimerInterrupt\r
48 \r
49                 /* Restore the context of the first task that is going to run. */\r
50                 jmp             _portRESTORE_CONTEXT\r
51           \r
52 _portSAVE_CONTEXT::\r
53                 /* Function to save the context.  When this function is called the\r
54                 return address will appear on the stack.  This does not need to be\r
55                 saved so is overwritten by R4 - hence R4 is not saved initially.\r
56 \r
57                 Save the general purpose registers. */\r
58                 push    R5              \r
59                 push    R6              \r
60                 push    R7\r
61                 push    R8              \r
62                 push    R9\r
63                 push    R10             \r
64                 push    R11             \r
65                 push    R12             \r
66                 push    R13             \r
67                 push    R14             \r
68                 push    R15                                     \r
69 \r
70                 /* Now R10 has been saved we can use it to hold the return address, \r
71                 which is about to be overwritten. */\r
72                 mov             22(R1),R10                      \r
73 \r
74                 /* Store R4 where the return address was on the stack. */\r
75                 mov             R4,22(R1)       \r
76 \r
77                 /* Save the critical nesting depth. */\r
78                 mov.w   &_usCriticalNesting, R14   \r
79                 push    R14                             \r
80 \r
81                 /* Finally save the new top of stack. */\r
82                 mov.w   &_pxCurrentTCB, R12     \r
83                 mov.w   R1, @R12\r
84 \r
85                 /* No rescheduling by default. */\r
86                 mov.b   #0,&_ucReschedule       \r
87 \r
88                 /* Return using the saved return address. */\r
89                 br              R10                                     \r
90 \r
91 \r
92 _portSWITCH_EXIT::\r
93                 /* Check ucReschedule to see if a context switch is required. */\r
94                 tst.b   &_ucReschedule\r
95                 jz              _portRESTORE_CONTEXT\r
96                 call    #_vTaskSwitchContext\r
97 _portRESTORE_CONTEXT::           \r
98                 /* Restore the context in the opposite order to the save. */\r
99                 mov.w   &_pxCurrentTCB, R12\r
100                 mov.w   @R12, R1\r
101                 pop             R15\r
102                 mov.w   R15, &_usCriticalNesting\r
103                 pop             R15\r
104                 pop             R14             \r
105                 pop             R13             \r
106                 pop             R12             \r
107                 pop             R11             \r
108                 pop             R10             \r
109                 pop             R9              \r
110                 pop             R8              \r
111                 pop             R7              \r
112                 pop             R6              \r
113                 pop             R5              \r
114                 pop             R4              \r
115                 reti    \r
116       \r
117 \r
118 /**********************************************************\r
119 Allocate Interrupts using the MSPINT macro (defined at the top of this file.\r
120 ex: MSPINT "name"\r
121 **********************************************************/     \r
122         \r
123                 MSPINT  OsTick\r
124                 MSPINT  Com1Rx\r
125                 MSPINT  Com1Tx\r
126                 \r
127 \r
128 /*********************************************************\r
129 Interrupt Vectors\r
130 Timer_A0\r
131 ex: PORT1 would look like:\r
132 ORG PORT1_VECTOR\r
133 DW _"name"\r
134 **********************************************************/     \r
135                 .VECTORS\r
136                 .KEEP\r
137 \r
138                 ORG             TIMERA0_VECTOR\r
139                 DW              _OsTick\r
140 \r
141                 ORG             UART1RX_VECTOR\r
142                 DW              _Com1Rx\r
143 \r
144                 ORG             UART1TX_VECTOR\r
145                 DW              _Com1Tx         \r
146                 \r
147                 END\r