--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l1xx_hal_dma.c\r
+ * @author MCD Application Team\r
+ * @brief DMA HAL module driver.\r
+ * This file provides firmware functions to manage the following\r
+ * functionalities of the Direct Memory Access (DMA) peripheral:\r
+ * + Initialization and de-initialization functions\r
+ * + IO operation functions\r
+ * + Peripheral State and errors functions\r
+ @verbatim\r
+ ==============================================================================\r
+ ##### How to use this driver #####\r
+ ==============================================================================\r
+ [..]\r
+ (#) Enable and configure the peripheral to be connected to the DMA Channel\r
+ (except for internal SRAM / FLASH memories: no initialization is\r
+ necessary). Please refer to the Reference manual for connection between peripherals\r
+ and DMA requests.\r
+\r
+ (#) For a given Channel, program the required configuration through the following parameters:\r
+ Channel request, Transfer Direction, Source and Destination data formats,\r
+ Circular or Normal mode, Channel Priority level, Source and Destination Increment mode\r
+ using HAL_DMA_Init() function.\r
+\r
+ (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error\r
+ detection.\r
+\r
+ (#) Use HAL_DMA_Abort() function to abort the current transfer\r
+\r
+ -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.\r
+ *** Polling mode IO operation ***\r
+ =================================\r
+ [..]\r
+ (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source\r
+ address and destination address and the Length of data to be transferred\r
+ (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this\r
+ case a fixed Timeout can be configured by User depending from his application.\r
+\r
+ *** Interrupt mode IO operation ***\r
+ ===================================\r
+ [..]\r
+ (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()\r
+ (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()\r
+ (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of\r
+ Source address and destination address and the Length of data to be transferred.\r
+ In this case the DMA interrupt is configured\r
+ (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine\r
+ (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can\r
+ add his own function to register callbacks with HAL_DMA_RegisterCallback().\r
+\r
+ *** DMA HAL driver macros list ***\r
+ =============================================\r
+ [..]\r
+ Below the list of macros in DMA HAL driver.\r
+\r
+ (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.\r
+ (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.\r
+ (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.\r
+ (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.\r
+ (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.\r
+ (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.\r
+ (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt is enabled or not.\r
+\r
+ [..]\r
+ (@) You can refer to the DMA HAL driver header file for more useful macros\r
+\r
+ @endverbatim\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
+ * All rights reserved.</center></h2>\r
+ *\r
+ * This software component is licensed by ST under BSD 3-Clause license,\r
+ * the "License"; You may not use this file except in compliance with the\r
+ * License. You may obtain a copy of the License at:\r
+ * opensource.org/licenses/BSD-3-Clause\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l1xx_hal.h"\r
+\r
+/** @addtogroup STM32L1xx_HAL_Driver\r
+ * @{\r
+ */\r
+\r
+/** @defgroup DMA DMA\r
+ * @brief DMA HAL module driver\r
+ * @{\r
+ */\r
+\r
+#ifdef HAL_DMA_MODULE_ENABLED\r
+\r
+/* Private typedef -----------------------------------------------------------*/\r
+/* Private define ------------------------------------------------------------*/\r
+/* Private macro -------------------------------------------------------------*/\r
+/* Private variables ---------------------------------------------------------*/\r
+/* Private function prototypes -----------------------------------------------*/\r
+/** @defgroup DMA_Private_Functions DMA Private Functions\r
+ * @{\r
+ */\r
+\r
+static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported functions ---------------------------------------------------------*/\r
+\r
+/** @defgroup DMA_Exported_Functions DMA Exported Functions\r
+ * @{\r
+ */\r
+\r
+/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions\r
+ * @brief Initialization and de-initialization functions\r
+ *\r
+@verbatim\r
+ ===============================================================================\r
+ ##### Initialization and de-initialization functions #####\r
+ ===============================================================================\r
+ [..]\r
+ This section provides functions allowing to initialize the DMA Channel source\r
+ and destination addresses, incrementation and data sizes, transfer direction,\r
+ circular/normal mode selection, memory-to-memory mode selection and Channel priority value.\r
+ [..]\r
+ The HAL_DMA_Init() function follows the DMA configuration procedures as described in\r
+ reference manual.\r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Initialize the DMA according to the specified\r
+ * parameters in the DMA_InitTypeDef and initialize the associated handle.\r
+ * @param hdma Pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)\r
+{\r
+ uint32_t tmp;\r
+\r
+ /* Check the DMA handle allocation */\r
+ if(hdma == NULL)\r
+ {\r
+ return HAL_ERROR;\r
+ }\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));\r
+ assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));\r
+ assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));\r
+ assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));\r
+ assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));\r
+ assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));\r
+ assert_param(IS_DMA_MODE(hdma->Init.Mode));\r
+ assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));\r
+\r
+#if defined (DMA2)\r
+ /* Compute the channel index */\r
+ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))\r
+ {\r
+ /* DMA1 */\r
+ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;\r
+ hdma->DmaBaseAddress = DMA1;\r
+ }\r
+ else\r
+ {\r
+ /* DMA2 */\r
+ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;\r
+ hdma->DmaBaseAddress = DMA2;\r
+ }\r
+#else\r
+ /* calculation of the channel index */\r
+ /* DMA1 */\r
+ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;\r
+ hdma->DmaBaseAddress = DMA1;\r
+#endif\r
+\r
+ /* Change DMA peripheral state */\r
+ hdma->State = HAL_DMA_STATE_BUSY;\r
+\r
+ /* Get the CR register value */\r
+ tmp = hdma->Instance->CCR;\r
+\r
+ /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */\r
+ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE |\r
+ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |\r
+ DMA_CCR_DIR | DMA_CCR_MEM2MEM));\r
+\r
+ /* Prepare the DMA Channel configuration */\r
+ tmp |= hdma->Init.Direction |\r
+ hdma->Init.PeriphInc | hdma->Init.MemInc |\r
+ hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |\r
+ hdma->Init.Mode | hdma->Init.Priority;\r
+\r
+ /* Write to DMA Channel CR register */\r
+ hdma->Instance->CCR = tmp;\r
+\r
+ /* Initialise the error code */\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NONE;\r
+\r
+ /* Initialize the DMA state*/\r
+ hdma->State = HAL_DMA_STATE_READY;\r
+\r
+ /* Allocate lock resource and initialize it */\r
+ hdma->Lock = HAL_UNLOCKED;\r
+\r
+ return HAL_OK;\r
+}\r
+\r
+/**\r
+ * @brief DeInitialize the DMA peripheral.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)\r
+{\r
+\r
+ /* Check the DMA handle allocation */\r
+ if (NULL == hdma )\r
+ {\r
+ return HAL_ERROR;\r
+ }\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));\r
+\r
+ /* Disable the selected DMA Channelx */\r
+ __HAL_DMA_DISABLE(hdma);\r
+\r
+#if defined (DMA2)\r
+ /* Compute the channel index */\r
+ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))\r
+ {\r
+ /* DMA1 */\r
+ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;\r
+ hdma->DmaBaseAddress = DMA1;\r
+ }\r
+ else\r
+ {\r
+ /* DMA2 */\r
+ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;\r
+ hdma->DmaBaseAddress = DMA2;\r
+ }\r
+#else\r
+ /* calculation of the channel index */\r
+ /* DMA1 */\r
+ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;\r
+ hdma->DmaBaseAddress = DMA1;\r
+#endif\r
+\r
+ /* Reset DMA Channel CR register */\r
+ hdma->Instance->CCR = 0U;\r
+\r
+ /* Clear all flags */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));\r
+\r
+ /* Clean callbacks */\r
+ hdma->XferCpltCallback = NULL;\r
+ hdma->XferHalfCpltCallback = NULL;\r
+ hdma->XferErrorCallback = NULL;\r
+ hdma->XferAbortCallback = NULL;\r
+\r
+ /* Initialise the error code */\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NONE;\r
+\r
+ /* Initialize the DMA state */\r
+ hdma->State = HAL_DMA_STATE_RESET;\r
+\r
+ /* Release Lock */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return HAL_OK;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions\r
+ * @brief Input and Output operation functions\r
+ *\r
+@verbatim\r
+ ===============================================================================\r
+ ##### IO operation functions #####\r
+ ===============================================================================\r
+ [..] This section provides functions allowing to:\r
+ (+) Configure the source, destination address and data length and Start DMA transfer\r
+ (+) Configure the source, destination address and data length and\r
+ Start DMA transfer with interrupt\r
+ (+) Abort DMA transfer\r
+ (+) Poll for transfer complete\r
+ (+) Handle DMA interrupt request\r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Start the DMA Transfer.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @param SrcAddress The source memory Buffer address\r
+ * @param DstAddress The destination memory Buffer address\r
+ * @param DataLength The length of data to be transferred from source to destination\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)\r
+{\r
+ HAL_StatusTypeDef status = HAL_OK;\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_DMA_BUFFER_SIZE(DataLength));\r
+\r
+ /* Process locked */\r
+ __HAL_LOCK(hdma);\r
+\r
+ if(HAL_DMA_STATE_READY == hdma->State)\r
+ {\r
+ /* Change DMA peripheral state */\r
+ hdma->State = HAL_DMA_STATE_BUSY;\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NONE;\r
+\r
+ /* Disable the peripheral */\r
+ __HAL_DMA_DISABLE(hdma);\r
+\r
+ /* Configure the source, destination address and the data length & clear flags*/\r
+ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);\r
+\r
+ /* Enable the Peripheral */\r
+ __HAL_DMA_ENABLE(hdma);\r
+ }\r
+ else\r
+ {\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+ status = HAL_BUSY;\r
+ }\r
+ return status;\r
+}\r
+\r
+/**\r
+ * @brief Start the DMA Transfer with interrupt enabled.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @param SrcAddress The source memory Buffer address\r
+ * @param DstAddress The destination memory Buffer address\r
+ * @param DataLength The length of data to be transferred from source to destination\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)\r
+{\r
+ HAL_StatusTypeDef status = HAL_OK;\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_DMA_BUFFER_SIZE(DataLength));\r
+\r
+ /* Process locked */\r
+ __HAL_LOCK(hdma);\r
+\r
+ if(HAL_DMA_STATE_READY == hdma->State)\r
+ {\r
+ /* Change DMA peripheral state */\r
+ hdma->State = HAL_DMA_STATE_BUSY;\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NONE;\r
+\r
+ /* Disable the peripheral */\r
+ __HAL_DMA_DISABLE(hdma);\r
+\r
+ /* Configure the source, destination address and the data length & clear flags*/\r
+ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);\r
+\r
+ /* Enable the transfer complete interrupt */\r
+ /* Enable the transfer Error interrupt */\r
+ if(NULL != hdma->XferHalfCpltCallback )\r
+ {\r
+ /* Enable the Half transfer complete interrupt as well */\r
+ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));\r
+ }\r
+ else\r
+ {\r
+ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);\r
+ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));\r
+ }\r
+\r
+ /* Enable the Peripheral */\r
+ __HAL_DMA_ENABLE(hdma);\r
+ }\r
+ else\r
+ {\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ /* Remain BUSY */\r
+ status = HAL_BUSY;\r
+ }\r
+ return status;\r
+}\r
+\r
+/**\r
+ * @brief Abort the DMA Transfer.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)\r
+{\r
+ HAL_StatusTypeDef status = HAL_OK;\r
+\r
+ /* Check the DMA peripheral state */\r
+ if(hdma->State != HAL_DMA_STATE_BUSY)\r
+ {\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;\r
+\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return HAL_ERROR;\r
+ }\r
+ else\r
+ {\r
+ /* Disable DMA IT */\r
+ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));\r
+\r
+ /* Disable the channel */\r
+ __HAL_DMA_DISABLE(hdma);\r
+\r
+ /* Clear all flags */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));\r
+\r
+ /* Change the DMA state */\r
+ hdma->State = HAL_DMA_STATE_READY;\r
+\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return status;\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief Aborts the DMA Transfer in Interrupt mode.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)\r
+{\r
+ HAL_StatusTypeDef status = HAL_OK;\r
+\r
+ if(HAL_DMA_STATE_BUSY != hdma->State)\r
+ {\r
+ /* no transfer ongoing */\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;\r
+\r
+ status = HAL_ERROR;\r
+ }\r
+ else\r
+ {\r
+ /* Disable DMA IT */\r
+ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));\r
+\r
+ /* Disable the channel */\r
+ __HAL_DMA_DISABLE(hdma);\r
+\r
+ /* Clear all flags */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));\r
+\r
+ /* Change the DMA state */\r
+ hdma->State = HAL_DMA_STATE_READY;\r
+\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ /* Call User Abort callback */\r
+ if(hdma->XferAbortCallback != NULL)\r
+ {\r
+ hdma->XferAbortCallback(hdma);\r
+ }\r
+ }\r
+ return status;\r
+}\r
+\r
+/**\r
+ * @brief Polling for transfer complete.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @param CompleteLevel Specifies the DMA level complete.\r
+ * @param Timeout Timeout duration.\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)\r
+{\r
+ uint32_t temp;\r
+ uint32_t tickstart;\r
+\r
+ if(HAL_DMA_STATE_BUSY != hdma->State)\r
+ {\r
+ /* no transfer ongoing */\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;\r
+ __HAL_UNLOCK(hdma);\r
+ return HAL_ERROR;\r
+ }\r
+\r
+ /* Polling mode not supported in circular mode */\r
+ if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U)\r
+ {\r
+ hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;\r
+ return HAL_ERROR;\r
+ }\r
+\r
+ /* Get the level transfer complete flag */\r
+ if (HAL_DMA_FULL_TRANSFER == CompleteLevel)\r
+ {\r
+ /* Transfer Complete flag */\r
+ temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU);\r
+ }\r
+ else\r
+ {\r
+ /* Half Transfer Complete flag */\r
+ temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU);\r
+ }\r
+\r
+ /* Get tick */\r
+ tickstart = HAL_GetTick();\r
+\r
+ while((hdma->DmaBaseAddress->ISR & temp) == 0U)\r
+ {\r
+ if((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex& 0x1CU))) != 0U)\r
+ {\r
+ /* When a DMA transfer error occurs */\r
+ /* A hardware clear of its EN bits is performed */\r
+ /* Clear all flags */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));\r
+\r
+ /* Update error code */\r
+ hdma->ErrorCode = HAL_DMA_ERROR_TE;\r
+\r
+ /* Change the DMA state */\r
+ hdma->State= HAL_DMA_STATE_READY;\r
+\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return HAL_ERROR;\r
+ }\r
+ /* Check for the Timeout */\r
+ if(Timeout != HAL_MAX_DELAY)\r
+ {\r
+ if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))\r
+ {\r
+ /* Update error code */\r
+ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;\r
+\r
+ /* Change the DMA state */\r
+ hdma->State = HAL_DMA_STATE_READY;\r
+\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return HAL_ERROR;\r
+ }\r
+ }\r
+ }\r
+\r
+ if(HAL_DMA_FULL_TRANSFER == CompleteLevel)\r
+ {\r
+ /* Clear the transfer complete flag */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU));\r
+\r
+ /* The selected Channelx EN bit is cleared (DMA is disabled and\r
+ all transfers are complete) */\r
+ hdma->State = HAL_DMA_STATE_READY;\r
+ }\r
+ else\r
+ {\r
+ /* Clear the half transfer complete flag */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU));\r
+ }\r
+\r
+ /* Process unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return HAL_OK;\r
+}\r
+\r
+/**\r
+ * @brief Handle DMA interrupt request.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @retval None\r
+ */\r
+void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)\r
+{\r
+ uint32_t flag_it = hdma->DmaBaseAddress->ISR;\r
+ uint32_t source_it = hdma->Instance->CCR;\r
+\r
+ /* Half Transfer Complete Interrupt management ******************************/\r
+ if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT) != 0U))\r
+ {\r
+ /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */\r
+ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)\r
+ {\r
+ /* Disable the half transfer interrupt */\r
+ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);\r
+ }\r
+ /* Clear the half transfer complete flag */\r
+ hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU);\r
+\r
+ /* DMA peripheral state is not updated in Half Transfer */\r
+ /* but in Transfer Complete case */\r
+\r
+ if(hdma->XferHalfCpltCallback != NULL)\r
+ {\r
+ /* Half transfer callback */\r
+ hdma->XferHalfCpltCallback(hdma);\r
+ }\r
+ }\r
+\r
+ /* Transfer Complete Interrupt management ***********************************/\r
+ else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TC) != 0U))\r
+ {\r
+ \r
+ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)\r
+ {\r
+ /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */\r
+ /* Disable the transfer complete and error interrupt */\r
+ /* if the DMA mode is not CIRCULAR */\r
+ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);\r
+\r
+ /* Change the DMA state */\r
+ hdma->State = HAL_DMA_STATE_READY;\r
+ }\r
+ /* Clear the transfer complete flag */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU));\r
+\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ if(hdma->XferCpltCallback != NULL)\r
+ {\r
+ /* Transfer complete callback */\r
+ hdma->XferCpltCallback(hdma);\r
+ }\r
+ }\r
+\r
+ /* Transfer Error Interrupt management **************************************/\r
+ else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TE) != 0U))\r
+ {\r
+ /* When a DMA transfer error occurs */\r
+ /* A hardware clear of its EN bits is performed */\r
+ /* Disable ALL DMA IT */\r
+ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));\r
+\r
+ /* Clear all flags */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));\r
+\r
+ /* Update error code */\r
+ hdma->ErrorCode = HAL_DMA_ERROR_TE;\r
+\r
+ /* Change the DMA state */\r
+ hdma->State = HAL_DMA_STATE_READY;\r
+\r
+ /* Process Unlocked */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ if (hdma->XferErrorCallback != NULL)\r
+ {\r
+ /* Transfer error callback */\r
+ hdma->XferErrorCallback(hdma);\r
+ }\r
+ }\r
+ else\r
+ {\r
+ /* Nothing To Do */\r
+ }\r
+ return;\r
+}\r
+\r
+/**\r
+ * @brief Register callbacks\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @param CallbackID User Callback identifer\r
+ * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.\r
+ * @param pCallback pointer to private callbacsk function which has pointer to\r
+ * a DMA_HandleTypeDef structure as parameter.\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))\r
+{\r
+ HAL_StatusTypeDef status = HAL_OK;\r
+\r
+ /* Process locked */\r
+ __HAL_LOCK(hdma);\r
+\r
+ if(HAL_DMA_STATE_READY == hdma->State)\r
+ {\r
+ switch (CallbackID)\r
+ {\r
+ case HAL_DMA_XFER_CPLT_CB_ID:\r
+ hdma->XferCpltCallback = pCallback;\r
+ break;\r
+\r
+ case HAL_DMA_XFER_HALFCPLT_CB_ID:\r
+ hdma->XferHalfCpltCallback = pCallback;\r
+ break;\r
+\r
+ case HAL_DMA_XFER_ERROR_CB_ID:\r
+ hdma->XferErrorCallback = pCallback;\r
+ break;\r
+\r
+ case HAL_DMA_XFER_ABORT_CB_ID:\r
+ hdma->XferAbortCallback = pCallback;\r
+ break;\r
+\r
+ default:\r
+ status = HAL_ERROR;\r
+ break;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ status = HAL_ERROR;\r
+ }\r
+\r
+ /* Release Lock */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return status;\r
+}\r
+\r
+/**\r
+ * @brief UnRegister callbacks\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @param CallbackID User Callback identifer\r
+ * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.\r
+ * @retval HAL status\r
+ */\r
+HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)\r
+{\r
+ HAL_StatusTypeDef status = HAL_OK;\r
+\r
+ /* Process locked */\r
+ __HAL_LOCK(hdma);\r
+\r
+ if(HAL_DMA_STATE_READY == hdma->State)\r
+ {\r
+ switch (CallbackID)\r
+ {\r
+ case HAL_DMA_XFER_CPLT_CB_ID:\r
+ hdma->XferCpltCallback = NULL;\r
+ break;\r
+\r
+ case HAL_DMA_XFER_HALFCPLT_CB_ID:\r
+ hdma->XferHalfCpltCallback = NULL;\r
+ break;\r
+\r
+ case HAL_DMA_XFER_ERROR_CB_ID:\r
+ hdma->XferErrorCallback = NULL;\r
+ break;\r
+\r
+ case HAL_DMA_XFER_ABORT_CB_ID:\r
+ hdma->XferAbortCallback = NULL;\r
+ break;\r
+\r
+ case HAL_DMA_XFER_ALL_CB_ID:\r
+ hdma->XferCpltCallback = NULL;\r
+ hdma->XferHalfCpltCallback = NULL;\r
+ hdma->XferErrorCallback = NULL;\r
+ hdma->XferAbortCallback = NULL;\r
+ break;\r
+\r
+ default:\r
+ status = HAL_ERROR;\r
+ break;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ status = HAL_ERROR;\r
+ }\r
+\r
+ /* Release Lock */\r
+ __HAL_UNLOCK(hdma);\r
+\r
+ return status;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+\r
+\r
+/** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions\r
+ * @brief Peripheral State and Errors functions\r
+ *\r
+@verbatim\r
+ ===============================================================================\r
+ ##### Peripheral State and Errors functions #####\r
+ ===============================================================================\r
+ [..]\r
+ This subsection provides functions allowing to\r
+ (+) Check the DMA state\r
+ (+) Get error code\r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Return the DMA handle state.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @retval HAL state\r
+ */\r
+HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)\r
+{\r
+ /* Return DMA handle state */\r
+ return hdma->State;\r
+}\r
+\r
+/**\r
+ * @brief Return the DMA error code.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @retval DMA Error Code\r
+ */\r
+uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)\r
+{\r
+ return hdma->ErrorCode;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup DMA_Private_Functions\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Sets the DMA Transfer parameter.\r
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains\r
+ * the configuration information for the specified DMA Channel.\r
+ * @param SrcAddress The source memory Buffer address\r
+ * @param DstAddress The destination memory Buffer address\r
+ * @param DataLength The length of data to be transferred from source to destination\r
+ * @retval HAL status\r
+ */\r
+static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)\r
+{\r
+ /* Clear all flags */\r
+ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));\r
+\r
+ /* Configure DMA Channel data length */\r
+ hdma->Instance->CNDTR = DataLength;\r
+\r
+ /* Memory to Peripheral */\r
+ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)\r
+ {\r
+ /* Configure DMA Channel destination address */\r
+ hdma->Instance->CPAR = DstAddress;\r
+\r
+ /* Configure DMA Channel source address */\r
+ hdma->Instance->CMAR = SrcAddress;\r
+ }\r
+ /* Peripheral to Memory */\r
+ else\r
+ {\r
+ /* Configure DMA Channel source address */\r
+ hdma->Instance->CPAR = SrcAddress;\r
+\r
+ /* Configure DMA Channel destination address */\r
+ hdma->Instance->CMAR = DstAddress;\r
+ }\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+#endif /* HAL_DMA_MODULE_ENABLED */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
projects / freertos / blobdiff