Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351.

[freertos] / FreeRTOS / Source / portable / ARMv8M / non_secure / portable / IAR / ARM_CM33_NTZ / portasm.s

diff --git a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
index 25089e511788e9972b1382abce245a42345b9c88..c57ec988d63fd67f1090793d0f0e55839ddbfa41 100644 (file)
--- a/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
+++ b/FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
@@ -78,6 +78,12 @@ vRestoreContextOfFirstTask:
        ldr  r0, [r1]                                                   /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */\r
 \r
 #if ( configENABLE_MPU == 1 )\r
+       dmb                                                                             /* Complete outstanding transfers before disabling MPU. */\r
+       ldr r2, =0xe000ed94                                             /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+       ldr r4, [r2]                                                    /* Read the value of MPU_CTRL. */\r
+       bic r4, r4, #1                                                  /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */\r
+       str r4, [r2]                                                    /* Disable MPU. */\r
+\r
        adds r1, #4                                                             /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */\r
        ldr r3, [r1]                                                    /* r3 = *r1 i.e. r3 = MAIR0. */\r
        ldr r2, =0xe000edc0                                             /* r2 = 0xe000edc0 [Location of MAIR0]. */\r
@@ -89,6 +95,12 @@ vRestoreContextOfFirstTask:
        ldr r2, =0xe000ed9c                                             /* r2 = 0xe000ed9c [Location of RBAR]. */\r
        ldmia r1!, {r4-r11}                                             /* Read 4 sets of RBAR/RLAR registers from TCB. */\r
        stmia r2!, {r4-r11}                                             /* Write 4 set of RBAR/RLAR registers using alias registers. */\r
+\r
+       ldr r2, =0xe000ed94                                             /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+       ldr r4, [r2]                                                    /* Read the value of MPU_CTRL. */\r
+       orr r4, r4, #1                                                  /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */\r
+       str r4, [r2]                                                    /* Enable MPU. */\r
+       dsb                                                                             /* Force memory writes before continuing. */\r
 #endif /* configENABLE_MPU */\r
 \r
 #if ( configENABLE_MPU == 1 )\r
@@ -172,6 +184,12 @@ PendSV_Handler:
        ldr r0, [r1]                                                    /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */\r
 \r
 #if ( configENABLE_MPU == 1 )\r
+       dmb                                                                             /* Complete outstanding transfers before disabling MPU. */\r
+       ldr r2, =0xe000ed94                                             /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+       ldr r4, [r2]                                                    /* Read the value of MPU_CTRL. */\r
+       bic r4, r4, #1                                                  /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */\r
+       str r4, [r2]                                                    /* Disable MPU. */\r
+\r
        adds r1, #4                                                             /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */\r
        ldr r3, [r1]                                                    /* r3 = *r1 i.e. r3 = MAIR0. */\r
        ldr r2, =0xe000edc0                                             /* r2 = 0xe000edc0 [Location of MAIR0]. */\r
@@ -183,6 +201,12 @@ PendSV_Handler:
        ldr r2, =0xe000ed9c                                             /* r2 = 0xe000ed9c [Location of RBAR]. */\r
        ldmia r1!, {r4-r11}                                             /* Read 4 sets of RBAR/RLAR registers from TCB. */\r
        stmia r2!, {r4-r11}                                             /* Write 4 set of RBAR/RLAR registers using alias registers. */\r
+\r
+       ldr r2, =0xe000ed94                                             /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+       ldr r4, [r2]                                                    /* Read the value of MPU_CTRL. */\r
+       orr r4, r4, #1                                                  /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */\r
+       str r4, [r2]                                                    /* Enable MPU. */\r
+       dsb                                                                             /* Force memory writes before continuing. */\r
 #endif /* configENABLE_MPU */\r
 \r
 #if ( configENABLE_MPU == 1 )\r