Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRES...

[freertos] / FreeRTOS / Source / portable / GCC / RISC-V / port.c

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/port.c b/FreeRTOS/Source/portable/GCC/RISC-V/port.c
index ff72e4755388a5ad9a03356db106c38dad0a04f6..acd579ffa3fd411c8f514901a22b0199ff4d4572 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/port.c
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/port.c
@@ -37,8 +37,16 @@
 /* Standard includes. */\r
 #include "string.h"\r
 \r
-#ifndef configCLINT_BASE_ADDRESS\r
-       #warning configCLINT_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a Core Local Interrupter (CLINT) then set configCLINT_BASE_ADDRESS to the CLINT base address.  Otherwise set configCLINT_BASE_ADDRESS to 0.\r
+#ifdef configCLINT_BASE_ADDRESS\r
+       #warning The configCLINT_BASE_ADDRESS constant has been deprecated.  configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from configCLINT_BASE_ADDRESS.  Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS.\r
+#endif\r
+\r
+#ifndef configMTIME_BASE_ADDRESS\r
+       #warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address.  Otherwise set configMTIME_BASE_ADDRESS to 0.\r
+#endif\r
+\r
+#ifndef configMTIMECMP_BASE_ADDRESS\r
+       #warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h.  If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address.  Otherwise set configMTIMECMP_BASE_ADDRESS to 0.\r
 #endif\r
 \r
 /* Let the user override the pre-loading of the initial LR with the address of\r
@@ -83,7 +91,7 @@ void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
 uint64_t ullNextTime = 0ULL;\r
 const uint64_t *pullNextTime = &ullNextTime;\r
 const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */\r
-uint32_t const ullMachineTimerCompareRegisterBase = ( uint64_t const ) ( ( configCLINT_BASE_ADDRESS ) + 0x4000 );\r
+uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS;\r
 volatile uint64_t * pullMachineTimerCompareRegister = NULL;\r
 \r
 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task\r
@@ -108,13 +116,13 @@ task stack, not the ISR stack). */
 \r
 /*-----------------------------------------------------------*/\r
 \r
-#if( configCLINT_BASE_ADDRESS != 0 )\r
+#if( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )\r
 \r
        void vPortSetupTimerInterrupt( void )\r
        {\r
        uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;\r
-       volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );\r
-       volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );\r
+       volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte typer so high 32-bit word is 4 bytes up. */\r
+       volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );\r
        volatile uint32_t ulHartId;\r
 \r
                __asm volatile( "csrr %0, mhartid" : "=r"( ulHartId ) );\r
@@ -127,7 +135,7 @@ task stack, not the ISR stack). */
                } while( ulCurrentTimeHigh != *pulTimeHigh );\r
 \r
                ullNextTime = ( uint64_t ) ulCurrentTimeHigh;\r
-               ullNextTime <<= 32ULL;\r
+               ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */\r
                ullNextTime |= ( uint64_t ) ulCurrentTimeLow;\r
                ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;\r
                *pullMachineTimerCompareRegister = ullNextTime;\r
@@ -136,7 +144,7 @@ task stack, not the ISR stack). */
                ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;\r
        }\r
 \r
-#endif /* ( configCLINT_BASE_ADDRESS != 0 ) */\r
+#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */\r
 /*-----------------------------------------------------------*/\r
 \r
 BaseType_t xPortStartScheduler( void )\r
@@ -170,7 +178,7 @@ extern void xPortStartFirstTask( void );
        configure whichever clock is to be used to generate the tick interrupt. */\r
        vPortSetupTimerInterrupt();\r
 \r
-       #if( configCLINT_BASE_ADDRESS != 0 )\r
+       #if( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )\r
        {\r
                /* Enable mtime and external interrupts.  1<<7 for timer interrupt, 1<<11\r
                for external interrupt.  _RB_ What happens here when mtime is not present as\r
@@ -182,7 +190,7 @@ extern void xPortStartFirstTask( void );
                /* Enable external interrupts. */\r
                __asm volatile( "csrs mie, %0" :: "r"(0x800) );\r
        }\r
-       #endif /* configCLINT_BASE_ADDRESS */\r
+       #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */\r
 \r
        xPortStartFirstTask();\r
 \r