/*\r
- * FreeRTOS Kernel V10.2.0\r
+ * FreeRTOS Kernel V10.2.1\r
* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
*\r
* Permission is hereby granted, free of charge, to any person obtaining a copy of\r
\r
/* Check the freertos_risc_v_chip_specific_extensions.h and/or command line\r
definitions. */\r
-#ifndef portasmHAS_CLINT\r
- #error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_CLINT to either 1 (CLINT present) or 0 (clint not present).\r
+#if defined( portasmHAS_CLINT ) && defined( portasmHAS_MTIME )\r
+ #error The portasmHAS_CLINT constant has been depracted. Please replace it with portasmHAS_CLINT. portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once.\r
+#endif\r
+\r
+#ifdef portasmHAS_CLINT\r
+ #warning The portasmHAS_CLINT constant has been depracted. Please replace it with portasmHAS_CLINT. For now portasmHAS_MTIME is derived from portasmHAS_CLINT.\r
+ #define portasmHAS_MTIME portasmHAS_CLINT\r
+#endif\r
+\r
+#ifndef portasmHAS_MTIME\r
+ #error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present).\r
#endif\r
\r
#ifndef portasmHANDLE_INTERRUPT\r
.extern pxCurrentTCB\r
.extern ulPortTrapHandler\r
.extern vTaskSwitchContext\r
+.extern xTaskIncrementTick\r
.extern Timer_IRQHandler\r
.extern pullMachineTimerCompareRegister\r
.extern pullNextTime\r
.extern uxTimerIncrementsForOneTick /* size_t type so 32-bit on 32-bit core and 64-bits on 64-bit core. */\r
.extern xISRStackTop\r
+.extern portasmHANDLE_INTERRUPT\r
\r
/*-----------------------------------------------------------*/\r
\r
\r
handle_asynchronous:\r
\r
-#if( portasmHAS_CLINT != 0 )\r
+#if( portasmHAS_MTIME != 0 )\r
\r
test_if_mtimer: /* If there is a CLINT then the mtimer is used to generate the tick interrupt. */\r
\r
#if( __riscv_xlen == 32 )\r
\r
/* Update the 64-bit mtimer compare match value in two 32-bit writes. */\r
+ li t4, -1\r
lw t2, 0(t1) /* Load the low word of ullNextTime into t2. */\r
lw t3, 4(t1) /* Load the high word of ullNextTime into t3. */\r
+ sw t4, 0(t0) /* Low word no smaller than old value to start with - will be overwritten below. */\r
+ sw t3, 4(t0) /* Store high word of ullNextTime into compare register. No smaller than new value. */\r
sw t2, 0(t0) /* Store low word of ullNextTime into compare register. */\r
- sw t3, 4(t0) /* Store high word of ullNextTime into compare register. */\r
lw t0, uxTimerIncrementsForOneTick /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pullNextTime?). */\r
add t4, t0, t2 /* Add the low word of ullNextTime to the timer increments for one tick (assumes timer increment for one tick fits in 32-bits). */\r
sltu t5, t4, t2 /* See if the sum of low words overflowed (what about the zero case?). */\r
addi t1, t1, 4 /* 0x80000007 + 4 = 0x8000000b == Machine external interrupt. */\r
bne a0, t1, as_yet_unhandled /* Something as yet unhandled. */\r
\r
-#endif /* portasmHAS_CLINT */\r
+#endif /* portasmHAS_MTIME */\r
\r
load_x sp, xISRStackTop /* Switch to ISR stack before function call. */\r
jal portasmHANDLE_INTERRUPT /* Jump to the interrupt handler if there is no CLINT or if there is a CLINT and it has been determined that an external interrupt is pending. */\r
j processed_source\r
\r
is_exception:\r
- ebreak\r
- j is_exception\r
+ csrr t0, mcause /* For viewing in the debugger only. */\r
+ csrr t1, mepc /* For viewing in the debugger only */\r
+ csrr t2, mstatus\r
+ j is_exception /* No other exceptions handled yet. */\r
\r
as_yet_unhandled:\r
- ebreak\r
+ csrr t0, mcause /* For viewing in the debugger only. */\r
j as_yet_unhandled\r
\r
processed_source:\r
.func\r
xPortStartFirstTask:\r
\r
-#if( portasmHAS_CLINT != 0 )\r
+#if( portasmHAS_MTIME != 0 )\r
/* If there is a clint then interrupts can branch directly to the FreeRTOS\r
trap handler. Otherwise the interrupt controller will need to be configured\r
outside of this file. */\r
portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */\r
\r
load_x t0, 29 * portWORD_SIZE( sp ) /* mstatus */\r
+ addi t0, t0, 0x08 /* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */\r
csrrw x0, mstatus, t0 /* Interrupts enabled from here! */\r
\r
load_x x5, 2 * portWORD_SIZE( sp ) /* t0 */\r
projects / freertos / blobdiff