Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351.

[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM33 / non_secure / portasm.s

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s
index a8253c9cca80a0fd58126a3be5ec56efab8d1ff8..efe626b3ca00097669d526ab2956f4aa1fd0f2e6 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s
@@ -88,6 +88,12 @@ vRestoreContextOfFirstTask:
        ldr  r0, [r3]                                                   /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */\r
 \r
 #if ( configENABLE_MPU == 1 )\r
+       dmb                                                                             /* Complete outstanding transfers before disabling MPU. */\r
+       ldr r2, =0xe000ed94                                             /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+       ldr r4, [r2]                                                    /* Read the value of MPU_CTRL. */\r
+       bic r4, r4, #1                                                  /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */\r
+       str r4, [r2]                                                    /* Disable MPU. */\r
+\r
        adds r3, #4                                                             /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */\r
        ldr  r4, [r3]                                                   /* r4 = *r3 i.e. r4 = MAIR0. */\r
        ldr  r2, =0xe000edc0                                    /* r2 = 0xe000edc0 [Location of MAIR0]. */\r
@@ -99,6 +105,12 @@ vRestoreContextOfFirstTask:
        ldr  r2, =0xe000ed9c                                    /* r2 = 0xe000ed9c [Location of RBAR]. */\r
        ldmia r3!, {r4-r11}                                             /* Read 4 set of RBAR/RLAR registers from TCB. */\r
        stmia r2!, {r4-r11}                                             /* Write 4 set of RBAR/RLAR registers using alias registers. */\r
+\r
+       ldr r2, =0xe000ed94                                             /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+       ldr r4, [r2]                                                    /* Read the value of MPU_CTRL. */\r
+       orr r4, r4, #1                                                  /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */\r
+       str r4, [r2]                                                    /* Enable MPU. */\r
+       dsb                                                                             /* Force memory writes before continuing. */\r
 #endif /* configENABLE_MPU */\r
 \r
 #if ( configENABLE_MPU == 1 )\r
@@ -224,6 +236,12 @@ PendSV_Handler:
                ldr r1, [r3]                                            /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */\r
 \r
        #if ( configENABLE_MPU == 1 )\r
+               dmb                                                                     /* Complete outstanding transfers before disabling MPU. */\r
+               ldr r2, =0xe000ed94                                     /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+               ldr r4, [r2]                                            /* Read the value of MPU_CTRL. */\r
+               bic r4, r4, #1                                          /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */\r
+               str r4, [r2]                                            /* Disable MPU. */\r
+\r
                adds r3, #4                                                     /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */\r
                ldr r4, [r3]                                            /* r4 = *r3 i.e. r4 = MAIR0. */\r
                ldr r2, =0xe000edc0                                     /* r2 = 0xe000edc0 [Location of MAIR0]. */\r
@@ -235,6 +253,12 @@ PendSV_Handler:
                ldr  r2, =0xe000ed9c                            /* r2 = 0xe000ed9c [Location of RBAR]. */\r
                ldmia r3!, {r4-r11}                                     /* Read 4 sets of RBAR/RLAR registers from TCB. */\r
                stmia r2!, {r4-r11}                                     /* Write 4 set of RBAR/RLAR registers using alias registers. */\r
+\r
+               ldr r2, =0xe000ed94                                     /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */\r
+               ldr r4, [r2]                                            /* Read the value of MPU_CTRL. */\r
+               orr r4, r4, #1                                          /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */\r
+               str r4, [r2]                                            /* Enable MPU. */\r
+               dsb                                                                     /* Force memory writes before continuing. */\r
        #endif /* configENABLE_MPU */\r
 \r
        #if ( configENABLE_MPU == 1 )\r