extern uint32_t * __privileged_functions_start__;\r
extern uint32_t * __privileged_functions_end__;\r
extern uint32_t * __syscalls_flash_start__;\r
+ extern uint32_t * __syscalls_flash_end__;\r
+ extern uint32_t * __unprivileged_flash_start__;\r
extern uint32_t * __unprivileged_flash_end__;\r
extern uint32_t * __privileged_sram_start__;\r
extern uint32_t * __privileged_sram_end__;\r
extern uint32_t __privileged_functions_start__[];\r
extern uint32_t __privileged_functions_end__[];\r
extern uint32_t __syscalls_flash_start__[];\r
+ extern uint32_t __syscalls_flash_end__[];\r
+ extern uint32_t __unprivileged_flash_start__[];\r
extern uint32_t __unprivileged_flash_end__[];\r
extern uint32_t __privileged_sram_start__[];\r
extern uint32_t __privileged_sram_end__[];\r
( portMPU_RLAR_ATTR_INDEX0 ) |\r
( portMPU_RLAR_REGION_ENABLE );\r
\r
- /* Setup unprivileged flash and system calls flash as Read Only by\r
- * both privileged and unprivileged tasks. All tasks can read it but\r
- * no-one can modify. */\r
+ /* Setup unprivileged flash as Read Only by both privileged and\r
+ * unprivileged tasks. All tasks can read it but no-one can modify. */\r
portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION;\r
- portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |\r
+ portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |\r
( portMPU_REGION_NON_SHAREABLE ) |\r
( portMPU_REGION_READ_ONLY );\r
portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |\r
( portMPU_RLAR_ATTR_INDEX0 ) |\r
( portMPU_RLAR_REGION_ENABLE );\r
\r
+ /* Setup unprivileged syscalls flash as Read Only by both privileged\r
+ * and unprivileged tasks. All tasks can read it but no-one can modify. */\r
+ portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION;\r
+ portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |\r
+ ( portMPU_REGION_NON_SHAREABLE ) |\r
+ ( portMPU_REGION_READ_ONLY );\r
+ portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) |\r
+ ( portMPU_RLAR_ATTR_INDEX0 ) |\r
+ ( portMPU_RLAR_REGION_ENABLE );\r
+\r
/* Setup RAM containing kernel data for privileged access only. */\r
portMPU_RNR_REG = portPRIVILEGED_RAM_REGION;\r
portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |\r
( portMPU_RLAR_ATTR_INDEX0 ) |\r
( portMPU_RLAR_REGION_ENABLE );\r
\r
- /* By default allow everything to access the general peripherals.\r
- * The system peripherals and registers are protected. */\r
- portMPU_RNR_REG = portUNPRIVILEGED_DEVICE_REGION;\r
- portMPU_RBAR_REG = ( ( ( uint32_t ) portDEVICE_REGION_START_ADDRESS ) & portMPU_RBAR_ADDRESS_MASK ) |\r
- ( portMPU_REGION_NON_SHAREABLE ) |\r
- ( portMPU_REGION_READ_WRITE ) |\r
- ( portMPU_REGION_EXECUTE_NEVER );\r
- portMPU_RLAR_REG = ( ( ( uint32_t ) portDEVICE_REGION_END_ADDRESS ) & portMPU_RLAR_ADDRESS_MASK ) |\r
- ( portMPU_RLAR_ATTR_INDEX1 ) |\r
- ( portMPU_RLAR_REGION_ENABLE );\r
-\r
/* Enable mem fault. */\r
portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;\r
\r