Add more "memory" clobbers into the MPU ports to make them robust to more aggressive...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2500 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
index be041538d43b7a672404644fed22ad63c6471670..e95e8c95bb8ca426af7dbc7988618e7141a17359 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
@@ -86,6 +86,16 @@ task.h is included from an application file. */
 \r
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
 \r
+#ifndef configSYSTICK_CLOCK_HZ\r
+       #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ\r
+       /* Ensure the SysTick is clocked at the same frequency as the core. */\r
+       #define portNVIC_SYSTICK_CLK    ( 1UL << 2UL )\r
+#else\r
+       /* The way the SysTick is clocked is not modified in case it is not the same\r
+       as the core. */\r
+       #define portNVIC_SYSTICK_CLK    ( 0 )\r
+#endif\r
+\r
 /* Constants required to access and manipulate the NVIC. */\r
 #define portNVIC_SYSTICK_CTRL_REG                              ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
 #define portNVIC_SYSTICK_LOAD_REG                              ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
@@ -110,7 +120,6 @@ task.h is included from an application file. */
 #define portPERIPHERALS_END_ADDRESS                            0x5FFFFFFFUL\r
 \r
 /* Constants required to access and manipulate the SysTick. */\r
-#define portNVIC_SYSTICK_CLK                                   ( 0x00000004UL )\r
 #define portNVIC_SYSTICK_INT                                   ( 0x00000002UL )\r
 #define portNVIC_SYSTICK_ENABLE                                        ( 0x00000001UL )\r
 #define portNVIC_PENDSV_PRI                                            ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
@@ -139,16 +148,6 @@ task.h is included from an application file. */
 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */\r
 #define portSTART_ADDRESS_MASK                         ( ( StackType_t ) 0xfffffffeUL )\r
 \r
-/* Each task maintains its own interrupt status in the critical nesting\r
-variable.  Note this is not saved as part of the task context as context\r
-switches can only occur when uxCriticalNesting is zero. */\r
-static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
-\r
-/*\r
- * Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /*\r
  * Configure a number of standard MPU regions that are used by all tasks.\r
  */\r
@@ -168,6 +167,13 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVI
  */\r
 BaseType_t xPortRaisePrivilege( void ) __attribute__(( naked ));\r
 \r
+/*\r
+ * Setup the timer to generate the tick interrupts.  The implementation in this\r
+ * file is weak to allow application writers to change the timer used to\r
+ * generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void );\r
+\r
 /*\r
  * Standard FreeRTOS exception handlers.\r
  */\r
@@ -186,6 +192,13 @@ static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVIL
  */\r
 static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 \r
+/*-----------------------------------------------------------*/\r
+\r
+/* Each task maintains its own interrupt status in the critical nesting\r
+variable.  Note this is not saved as part of the task context as context\r
+switches can only occur when uxCriticalNesting is zero. */\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
+\r
 /*\r
  * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure\r
  * FreeRTOS API functions are not called from interrupts that have been assigned\r
@@ -243,7 +256,7 @@ void vPortSVCHandler( void )
                        "       mrs r0, psp                                             \n"\r
                #endif\r
                        "       b %0                                                    \n"\r
-                       ::"i"(prvSVCHandler):"r0"\r
+                       ::"i"(prvSVCHandler):"r0", "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -266,7 +279,7 @@ uint8_t ucSVCNumber;
                                                                                        but do ensure the code is completely\r
                                                                                        within the specified behaviour for the\r
                                                                                        architecture. */\r
-                                                                                       __asm volatile( "dsb" );\r
+                                                                                       __asm volatile( "dsb" ::: "memory" );\r
                                                                                        __asm volatile( "isb" );\r
 \r
                                                                                        break;\r
@@ -276,7 +289,7 @@ uint8_t ucSVCNumber;
                                                                                                "       mrs r1, control         \n" /* Obtain current control value. */\r
                                                                                                "       bic r1, #1                      \n" /* Set privilege bit. */\r
                                                                                                "       msr control, r1         \n" /* Write back new control value. */\r
-                                                                                               :::"r1"\r
+                                                                                               ::: "r1", "memory"\r
                                                                                        );\r
                                                                                        break;\r
 \r
@@ -357,6 +370,24 @@ BaseType_t xPortStartScheduler( void )
                        ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
                }\r
 \r
+               #ifdef __NVIC_PRIO_BITS\r
+               {\r
+                       /* Check the CMSIS configuration that defines the number of\r
+                       priority bits matches the number of priority bits actually queried\r
+                       from the hardware. */\r
+                       configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );\r
+               }\r
+               #endif\r
+\r
+               #ifdef configPRIO_BITS\r
+               {\r
+                       /* Check the FreeRTOS configuration that defines the number of\r
+                       priority bits matches the number of priority bits actually queried\r
+                       from the hardware. */\r
+                       configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );\r
+               }\r
+               #endif\r
+\r
                /* Shift the priority group value back to its position within the AIRCR\r
                register. */\r
                ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;\r
@@ -379,7 +410,7 @@ BaseType_t xPortStartScheduler( void )
 \r
        /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
        here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialise the critical nesting count ready for the first task. */\r
        uxCriticalNesting = 0;\r
@@ -396,7 +427,7 @@ BaseType_t xPortStartScheduler( void )
                                        " isb                                   \n"\r
                                        " svc %0                                \n" /* System call to start first task. */\r
                                        " nop                                   \n"\r
-                                       :: "i" (portSVC_START_SCHEDULER) );\r
+                                       :: "i" (portSVC_START_SCHEDULER) : "memory" );\r
 \r
        /* Should not get here! */\r
        return 0;\r
@@ -454,6 +485,8 @@ void xPortPendSVHandler( void )
                "       stmdb sp!, {r3, r14}                            \n"\r
                "       mov r0, %0                                                      \n"\r
                "       msr basepri, r0                                         \n"\r
+               "       dsb                                                                     \n"\r
+               "       isb                                                                     \n"\r
                "       bl vTaskSwitchContext                           \n"\r
                "       mov r0, #0                                                      \n"\r
                "       msr basepri, r0                                         \n"\r
@@ -499,15 +532,15 @@ uint32_t ulDummy;
  * Setup the systick timer to generate the tick interrupts at the required\r
  * frequency.\r
  */\r
-static void prvSetupTimerInterrupt( void )\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void )\r
 {\r
-       /* Reset the SysTick timer. */\r
+       /* Stop and clear the SysTick. */\r
        portNVIC_SYSTICK_CTRL_REG = 0UL;\r
        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
 \r
        /* Configure SysTick to interrupt at the requested rate. */\r
-       portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
-       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
+       portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
+       portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -609,7 +642,7 @@ BaseType_t xPortRaisePrivilege( void )
                "       svcne %0                                                        \n" /* Switch to privileged. */\r
                "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
                "       bx lr                                                           \n"\r
-               :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
+               :: "i" (portSVC_RAISE_PRIVILEGE) : "r0", "memory"\r
        );\r
 \r
        return 0;\r
@@ -720,7 +753,7 @@ uint32_t ul;
        uint8_t ucCurrentPriority;\r
 \r
                /* Obtain the number of the currently executing interrupt. */\r
-               __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
+               __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
 \r
                /* Is the interrupt number a user defined interrupt? */\r
                if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )\r

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c
index c52078ed1217500bd00f081772db3f7e84f0f348..32943ff59828455316d19963035c077ab12f9425 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c
@@ -88,6 +88,16 @@ task.h is included from an application file. */
 \r
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
 \r
+#ifndef configSYSTICK_CLOCK_HZ\r
+       #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ\r
+       /* Ensure the SysTick is clocked at the same frequency as the core. */\r
+       #define portNVIC_SYSTICK_CLK    ( 1UL << 2UL )\r
+#else\r
+       /* The way the SysTick is clocked is not modified in case it is not the same\r
+       as the core. */\r
+       #define portNVIC_SYSTICK_CLK    ( 0 )\r
+#endif\r
+\r
 /* Constants required to access and manipulate the NVIC. */\r
 #define portNVIC_SYSTICK_CTRL_REG                              ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
 #define portNVIC_SYSTICK_LOAD_REG                              ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
@@ -112,7 +122,6 @@ task.h is included from an application file. */
 #define portPERIPHERALS_END_ADDRESS                            0x5FFFFFFFUL\r
 \r
 /* Constants required to access and manipulate the SysTick. */\r
-#define portNVIC_SYSTICK_CLK                                   ( 0x00000004UL )\r
 #define portNVIC_SYSTICK_INT                                   ( 0x00000002UL )\r
 #define portNVIC_SYSTICK_ENABLE                                        ( 0x00000001UL )\r
 #define portNVIC_PENDSV_PRI                                            ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
@@ -146,16 +155,6 @@ task.h is included from an application file. */
 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */\r
 #define portSTART_ADDRESS_MASK                         ( ( StackType_t ) 0xfffffffeUL )\r
 \r
-/* Each task maintains its own interrupt status in the critical nesting\r
-variable.  Note this is not saved as part of the task context as context\r
-switches can only occur when uxCriticalNesting is zero. */\r
-static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
-\r
-/*\r
- * Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /*\r
  * Configure a number of standard MPU regions that are used by all tasks.\r
  */\r
@@ -175,6 +174,13 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVI
  */\r
 BaseType_t xPortRaisePrivilege( void ) __attribute__(( naked ));\r
 \r
+/*\r
+ * Setup the timer to generate the tick interrupts.  The implementation in this\r
+ * file is weak to allow application writers to change the timer used to\r
+ * generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void );\r
+\r
 /*\r
  * Standard FreeRTOS exception handlers.\r
  */\r
@@ -198,6 +204,13 @@ static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline ))
  */\r
  static void vPortEnableVFP( void ) __attribute__ (( naked ));\r
 \r
+/*-----------------------------------------------------------*/\r
+\r
+/* Each task maintains its own interrupt status in the critical nesting\r
+variable.  Note this is not saved as part of the task context as context\r
+switches can only occur when uxCriticalNesting is zero. */\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
+\r
 /*\r
  * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure\r
  * FreeRTOS API functions are not called from interrupts that have been assigned\r
@@ -261,7 +274,7 @@ void vPortSVCHandler( void )
                        "       mrs r0, psp                                             \n"\r
                #endif\r
                        "       b %0                                                    \n"\r
-                       ::"i"(prvSVCHandler):"r0"\r
+                       ::"i"(prvSVCHandler):"r0", "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -284,7 +297,7 @@ uint8_t ucSVCNumber;
                                                                                        but do ensure the code is completely\r
                                                                                        within the specified behaviour for the\r
                                                                                        architecture. */\r
-                                                                                       __asm volatile( "dsb" );\r
+                                                                                       __asm volatile( "dsb" ::: "memory" );\r
                                                                                        __asm volatile( "isb" );\r
 \r
                                                                                        break;\r
@@ -294,7 +307,7 @@ uint8_t ucSVCNumber;
                                                                                                "       mrs r1, control         \n" /* Obtain current control value. */\r
                                                                                                "       bic r1, #1                      \n" /* Set privilege bit. */\r
                                                                                                "       msr control, r1         \n" /* Write back new control value. */\r
-                                                                                               :::"r1"\r
+                                                                                               ::: "r1", "memory"\r
                                                                                        );\r
                                                                                        break;\r
 \r
@@ -414,7 +427,7 @@ BaseType_t xPortStartScheduler( void )
 \r
        /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
        here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialise the critical nesting count ready for the first task. */\r
        uxCriticalNesting = 0;\r
@@ -425,9 +438,9 @@ BaseType_t xPortStartScheduler( void )
        /* Lazy save always. */\r
        *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;\r
 \r
-       /* Start the first task.  This also clears the bit that indicates the FPU is \r
-       in use in case the FPU was used before the scheduler was started - which \r
-       would otherwise result in the unnecessary leaving of space in the SVC stack \r
+       /* Start the first task.  This also clears the bit that indicates the FPU is\r
+       in use in case the FPU was used before the scheduler was started - which\r
+       would otherwise result in the unnecessary leaving of space in the SVC stack\r
        for lazy saving of FPU registers. */\r
        __asm volatile(\r
                                        " ldr r0, =0xE000ED08   \n" /* Use the NVIC offset register to locate the stack. */\r
@@ -442,7 +455,7 @@ BaseType_t xPortStartScheduler( void )
                                        " isb                                   \n"\r
                                        " svc %0                                \n" /* System call to start first task. */\r
                                        " nop                                   \n"\r
-                                       :: "i" (portSVC_START_SCHEDULER) );\r
+                                       :: "i" (portSVC_START_SCHEDULER) : "memory" );\r
 \r
        /* Should not get here! */\r
        return 0;\r
@@ -555,15 +568,15 @@ uint32_t ulDummy;
  * Setup the systick timer to generate the tick interrupts at the required\r
  * frequency.\r
  */\r
-static void prvSetupTimerInterrupt( void )\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void )\r
 {\r
-       /* Clear the SysTick. */\r
+       /* Stop and clear the SysTick. */\r
        portNVIC_SYSTICK_CTRL_REG = 0UL;\r
        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
 \r
        /* Configure SysTick to interrupt at the requested rate. */\r
-       portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
-       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
+       portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
+       portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -680,7 +693,7 @@ BaseType_t xPortRaisePrivilege( void )
                "       svcne %0                                                        \n" /* Switch to privileged. */\r
                "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
                "       bx lr                                                           \n"\r
-               :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
+               :: "i" (portSVC_RAISE_PRIVILEGE) : "r0", "memory"\r
        );\r
 \r
        return 0;\r
@@ -791,7 +804,7 @@ uint32_t ul;
        uint8_t ucCurrentPriority;\r
 \r
                /* Obtain the number of the currently executing interrupt. */\r
-               __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
+               __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
 \r
                /* Is the interrupt number a user defined interrupt? */\r
                if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )\r