Update SAM4L_low_power_tick_management.c to use xTaskIncrementTick() in place of...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1911 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c
index 230f7ae5829f9d6d7c027c57da18bf52fd6f84fd..5f34553d223d9fc130511b36876bb082c59a9acb 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c
@@ -116,7 +116,7 @@ within the Cortex-M core itself. */
  */\r
 void AST_ALARM_Handler(void);\r
 \r
-/* \r
+/*\r
  * Functions that disable and enable the AST respectively, not returning until\r
  * the operation is known to have taken effect.\r
  */\r
@@ -150,18 +150,13 @@ clears the interrupt, which is specific to the clock being used to generate the
 tick. */\r
 void AST_ALARM_Handler(void)\r
 {\r
-       /* If using preemption, also force a context switch by pending the PendSV\r
-       interrupt. */\r
-       #if configUSE_PREEMPTION == 1\r
-       {\r
-               portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
-       }\r
-       #endif\r
-\r
        /* Protect incrementing the tick with an interrupt safe critical section. */\r
        ( void ) portSET_INTERRUPT_MASK_FROM_ISR();\r
        {\r
-               vTaskIncrementTick();\r
+               if( xTaskIncrementTick() != pdFALSE )\r
+               {\r
+                       portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+               }\r
 \r
                /* Just completely clear the interrupt mask on exit by passing 0 because\r
                it is known that this interrupt will only ever execute with the lowest\r
@@ -262,8 +257,8 @@ static void prvEnableAST( void )
 /*-----------------------------------------------------------*/\r
 \r
 /* Override the default definition of vPortSuppressTicksAndSleep() that is weakly\r
-defined in the FreeRTOS Cortex-M3 port layet with a version that manages the \r
-asynchronous timer (AST), as the tick is generated from the low power AST and \r
+defined in the FreeRTOS Cortex-M3 port layet with a version that manages the\r
+asynchronous timer (AST), as the tick is generated from the low power AST and\r
 not the SysTick as would normally be the case on a Cortex-M. */\r
 void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
 {\r