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</sections>\r
- <sections name=".ustack">\r
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- </sections>\r
- <sections name=".istack">\r
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- <contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_istack"/>\r
- </sections>\r
<sections name=".data">\r
- <sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="516"/>\r
+ <sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="1028"/>\r
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_data"/>\r
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".data"/>\r
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".data.*"/>\r
<reservedMemAddress xsi:type="com.renesas.linkersection.model:ReferencedLabelAddress" label="//@sections.10/@contents.12"/>\r
</sections>\r
<sections name=".gcc_exc">\r
- <sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.13"/>\r
+ <sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.11"/>\r
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".gcc_exc"/>\r
</sections>\r
<sections name=".bss">\r
- <sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.14"/>\r
+ <sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.12"/>\r
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_bss"/>\r
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".bss"/>\r
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".bss.**"/>\r
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_ebss"/>\r
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_end"/>\r
</sections>\r
+ <sections name=".ustack">\r
+ <sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="1024"/>\r
+ <contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_ustack"/>\r
+ </sections>\r
+ <sections name=".istack">\r
+ <sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="512"/>\r
+ <contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_istack"/>\r
+ </sections>\r
</com.renesas.linkersection.model:SectionContainer>\r
<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
-<?fileVersion 4.0.0?>\r
-\r
-<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">\r
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">\r
<storageModule moduleId="org.eclipse.cdt.core.settings">\r
<cconfiguration id="%com.renesas.cdt.rx.hardwaredebug.win32.configuration.Id.606469687">\r
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<externalSettings/>\r
<extensions>\r
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<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
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<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
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<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+ <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>\r
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</extensions>\r
</storageModule>\r
<storageModule moduleId="cdtBuildSystem" version="4.0.0">\r
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+ <configuration artifactName="RTOSDemo" buildArtefactType="com.renesas.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug,org.eclipse.cdt.build.core.buildArtefactType=com.renesas.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf *.lst *.lis *.lpp *.map" description="" errorParsers="org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.VCErrorParser" id="%com.renesas.cdt.rx.hardwaredebug.win32.configuration.Id.606469687" name="HardwareDebug" parent="%com.renesas.cdt.rx.hardwaredebug.win32.configuration.Id">\r
<folderInfo id="%com.renesas.cdt.rx.hardwaredebug.win32.configuration.Id.606469687." name="/" resourcePath="">\r
- <toolChain id="%com.renesas.cdt.rx.hardwaredebug.win32.toolChain.Id.804086182" name="KPIT GNURX-ELF Toolchain" superClass="%com.renesas.cdt.rx.hardwaredebug.win32.toolChain.Id">\r
+ <toolChain errorParsers="" id="%com.renesas.cdt.rx.hardwaredebug.win32.toolChain.Id.804086182" name="KPIT GNURX-ELF Toolchain" superClass="%com.renesas.cdt.rx.hardwaredebug.win32.toolChain.Id">\r
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.PE" id="com.renesas.cdt.rx.hardwaredebug.win32.targetPlatform.Id.1441458979" osList="win32" superClass="com.renesas.cdt.rx.hardwaredebug.win32.targetPlatform.Id"/>\r
- <builder buildPath="${workspace_loc:/RTOSDemo}/HardwareDebug" id="com.renesas.cdt.rx.hardwaredebug.win32.builder.Id.476907861" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.renesas.cdt.rx.hardwaredebug.win32.builder.Id"/>\r
- <tool command="rx-elf-libgen" id="com.renesas.cdt.rx.hardwaredebug.win32.tool.libgen.Id.2057566942" name="Library Generator" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.libgen.Id">\r
+ <builder buildPath="${workspace_loc:/RTOSDemo}/HardwareDebug" errorParsers="org.eclipse.cdt.core.GmakeErrorParser" id="com.renesas.cdt.rx.hardwaredebug.win32.builder.Id.476907861" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.renesas.cdt.rx.hardwaredebug.win32.builder.Id"/>\r
+ <tool command="rx-elf-libgen" errorParsers="" id="com.renesas.cdt.rx.hardwaredebug.win32.tool.libgen.Id.2057566942" name="Library Generator" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.libgen.Id">\r
<option id="com.renesas.cdt.core.LibraryGenerator.option.math.2039618467" name="math.h : Performs numeric calculations such as trigonometric functions" superClass="com.renesas.cdt.core.LibraryGenerator.option.math" value="true" valueType="boolean"/>\r
<option id="com.renesas.cdt.core.LibraryGenerator.option.stdio.2055452080" name="stdio.h : Performs input/output handling" superClass="com.renesas.cdt.core.LibraryGenerator.option.stdio" value="true" valueType="boolean"/>\r
<option id="com.renesas.cdt.core.LibraryGenerator.option.stdlib.321901636" name="stdlib.h : Performs C program standard processing such as storage area management" superClass="com.renesas.cdt.core.LibraryGenerator.option.stdlib" value="true" valueType="boolean"/>\r
<option id="com.renesas.cdt.core.LibraryGenerator.option.selectLibrary.236583299" name="Select library" superClass="com.renesas.cdt.core.LibraryGenerator.option.selectLibrary" value="Optimized" valueType="enumerated"/>\r
<option id="com.renesas.cdt.core.LibraryGenerator.option.libraryType.1090078057" name="Library type" superClass="com.renesas.cdt.core.LibraryGenerator.option.libraryType" value="Project-Built" valueType="enumerated"/>\r
</tool>\r
- <tool id="com.renesas.cdt.rx.hardwaredebug.win32.tool.compiler.Id.315385351" name="Compiler" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.compiler.Id">\r
+ <tool errorParsers="org.eclipse.cdt.core.GCCErrorParser" id="com.renesas.cdt.rx.hardwaredebug.win32.tool.compiler.Id.315385351" name="Compiler" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.compiler.Id">\r
<option defaultValue="true" id="com.renesas.cdt.core.Compiler.option.misc2.945596144" name="Don't search standard system directories for header files(-nostdinc)" superClass="com.renesas.cdt.core.Compiler.option.misc2" value="false" valueType="boolean"/>\r
<option id="com.renesas.cdt.rx.HardwareDebug.Compiler.option.macroDefines.1508551089" name="Macro Defines" superClass="com.renesas.cdt.rx.HardwareDebug.Compiler.option.macroDefines" valueType="definedSymbols">\r
<listOptionValue builtIn="false" value="__RX_LITTLE_ENDIAN__=1"/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/FreeRTOS/Source/include}""/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/Common_Demo_Tasks/include}""/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/FreeRTOS/Source/portable/GCC/RX600v2}""/>\r
- <listOptionValue builtIn="false" value=""${TCINSTALL}\rx-elf\optlibinc""/>\r
+ <listOptionValue builtIn="false" value=""${TCINSTALL}/rx-elf/optlibinc""/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src}""/>\r
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/RenesasCode}""/>\r
+ <listOptionValue builtIn="false" value=""${workspace_loc:/RTOSDemo/src/RenesasCode/cg_src}""/>\r
</option>\r
<option id="com.renesas.cdt.core.Compiler.option.CPUSeries.1945733388" name="Cpu Series" superClass="com.renesas.cdt.core.Compiler.option.CPUSeries" value="RX64M" valueType="string"/>\r
<option id="com.renesas.cdt.core.Compiler.option.warning14.1219627871" name="Print extra warning messages(-Wextra)" superClass="com.renesas.cdt.core.Compiler.option.warning14" value="true" valueType="boolean"/>\r
+ <option command="-mcpu=rx64m" commandFalse="-mcpu=rx600" id="com.renesas.cdt.rx.HardwareDebug.Compiler.option.genCodeForRX64M.2046419337" name="Generate code for RX64M target" superClass="com.renesas.cdt.rx.HardwareDebug.Compiler.option.genCodeForRX64M" value="true" valueType="boolean"/>\r
+ <option id="com.renesas.cdt.rx.HardwareDebug.Compiler.option.optimizationLevel.68724734" name="Optimization level" superClass="com.renesas.cdt.rx.HardwareDebug.Compiler.option.optimizationLevel" value="com.renesas.cdt.rx.HardwareDebug.Compiler.option.optimizationLevel.none" valueType="enumerated"/>\r
<inputType id="%Base.Compiler.C.InputType.Id.1746322545" name="C Input" superClass="%Base.Compiler.C.InputType.Id"/>\r
<inputType id="Base.Compiler.CPP.InputType.Id.1052891014" name="C++ Input" superClass="Base.Compiler.CPP.InputType.Id"/>\r
</tool>\r
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+ <tool errorParsers="org.eclipse.cdt.core.GASErrorParser" id="com.renesas.cdt.rx.hardwaredebug.win32.tool.assembler.Id.508016564" name="Assembler" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.assembler.Id">\r
<option id="com.renesas.cdt.rx.HardwareDebug.Assembler.option.dataEndian.735581335" name="Data Endian" superClass="com.renesas.cdt.rx.HardwareDebug.Assembler.option.dataEndian" value="Little-endian data" valueType="enumerated"/>\r
<option id="com.renesas.cdt.core.Assembler.option.includeFileDirectories.286633038" name="Include file directories" superClass="com.renesas.cdt.core.Assembler.option.includeFileDirectories" valueType="includePath">\r
- <listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}}\src""/>\r
+ <listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}}/src""/>\r
</option>\r
<inputType id="%Base.Assembler.inputType.Id.1966626285" name="Assembler InputType" superClass="%Base.Assembler.inputType.Id"/>\r
</tool>\r
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+ <tool command="rx-elf-ld" commandLinePattern="${COMMAND} ${OUTPUT_FLAG}${OUTPUT_PREFIX} ${OUTPUT}${INPUTS} ${FLAGS}" errorParsers="org.eclipse.cdt.core.GLDErrorParser" id="com.renesas.cdt.rx.hardwaredebug.win32.tool.linker.Id.1075007051" name="Linker" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.linker.Id">\r
<option id="com.renesas.cdt.rx.HardwareDebug.Linker.option.dataEndian.233227307" name="Data Endian" superClass="com.renesas.cdt.rx.HardwareDebug.Linker.option.dataEndian" value="Little-endian data" valueType="enumerated"/>\r
<option id="com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveSearchDirectories.1899007176" name="Archive search directories" superClass="com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveSearchDirectories" valueType="stringList">\r
<listOptionValue builtIn="false" value=""${CONFIGDIR}""/>\r
- <listOptionValue builtIn="false" value=""${TCINSTALL}\lib\gcc\rx-elf\\${GCC_VERSION}""/>\r
+ <listOptionValue builtIn="false" value=""${TCINSTALL}/lib/gcc/rx-elf//${GCC_VERSION}""/>\r
</option>\r
<option id="com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveLibraryFiles.821809154" name="Archive (library) files" superClass="com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveLibraryFiles" valueType="stringList">\r
- <listOptionValue builtIn="false" value="${ProjName}"/>\r
+ <listOptionValue builtIn="false" value="${BuildArtifactFileBaseName}"/>\r
<listOptionValue builtIn="false" value="gcc"/>\r
</option>\r
<option id="com.renesas.cdt.core.Linker.option.userDefinedOptions.1112264479" name="User defined options" superClass="com.renesas.cdt.core.Linker.option.userDefinedOptions" valueType="stringList">\r
<listOptionValue builtIn="false" value="".\libRTOSDemo.a""/>\r
</option>\r
</tool>\r
- <tool id="com.renesas.cdt.rx.hardwaredebug.win32.tool.objcopy.Id.2054059721" name="Objcopy" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.objcopy.Id"/>\r
+ <tool errorParsers="" id="com.renesas.cdt.rx.hardwaredebug.win32.tool.objcopy.Id.2054059721" name="Objcopy" superClass="com.renesas.cdt.rx.hardwaredebug.win32.tool.objcopy.Id"/>\r
</toolChain>\r
</folderInfo>\r
<sourceEntries>\r
- <entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>\r
+ <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>\r
</sourceEntries>\r
</configuration>\r
</storageModule>\r
TOOL_CHAIN=KPIT GNURX-ELF Toolchain
VERSION=v14.01
-TC_INSTALL=C:\Program Files\KPIT\GNURXv14.01-ELF\rx-ELF\rx-ELF\
+TC_INSTALL=C:\devtools\KPIT\GNURXv14.01-ELF\rx-ELF\rx-ELF\
GCC_STRING=4.7-GNURX_v14.01
-VERSION_IDE=3.06.02.004
-E2STUDIO_VERSION=2.1.0.21
-ACTIVE_CONFIGURATION=HardwareDebug
\ No newline at end of file
+VERSION_IDE=
+ACTIVE_CONFIGURATION=HardwareDebug
+E2STUDIO_VERSION=3.0.0.22
</linkedResources>\r
<filteredResources>\r
<filter>\r
- <id>1395316906017</id>\r
+ <id>1401803846285</id>\r
<name>src/Common_Demo_Tasks</name>\r
<type>22</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1395316906049</id>\r
+ <id>1401803846295</id>\r
<name>src/Common_Demo_Tasks</name>\r
<type>22</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
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- <matcher>\r
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- <arguments>1.0-name-matches-false-false-Int*.*</arguments>\r
- </matcher>\r
- </filter>\r
- <filter>\r
- <id>1395316906080</id>\r
+ <id>1401803846295</id>\r
<name>src/Common_Demo_Tasks</name>\r
<type>22</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1395316906096</id>\r
+ <id>1401803846295</id>\r
<name>src/Common_Demo_Tasks</name>\r
<type>22</type>\r
<matcher>\r
com.renesas.cdt.rx.HardwareDebug.Compiler.option.macroDefines=__RX_LITTLE_ENDIAN__\=1;\r
com.renesas.cdt.rx.HardwareDebug.Compiler.option.make64bitDouble=false\r
com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveLibraryFiles=${ProjName};gcc;\r
-com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveSearchDirectories.1899007176="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rx-elf\\\\${GCC_VERSION}";\r
+com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveSearchDirectories.1899007176="${CONFIGDIR}";"${TCINSTALL}/lib/gcc/rx-elf//${GCC_VERSION}";"${TCINSTALL}/lib/gcc/rx-elf/${GCC_VERSION}";\r
eclipse.preferences.version=1\r
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">\r
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>\r
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>\r
- <provider class="com.renesas.cdt.common.build.spec.RXGCCBuiltinSpecsDetector" console="false" id="RXGCCBuiltinSpecsDetector" keep-relative-paths="false" name="Renesas GCCBuildinCompilerSettings" parameter="rx-elf-gcc -E -P -v -dD ${INPUTS} -mcpu=rx600 -mlittle-endian-data" prefer-non-shared="true">\r
+ <provider class="com.renesas.cdt.common.build.spec.RXGCCBuiltinSpecsDetector" console="false" env-hash="-1879026215548195910" id="RXGCCBuiltinSpecsDetector" keep-relative-paths="false" name="Renesas GCCBuildinCompilerSettings" options-hash="1142094570" parameter="rx-elf-gcc -E -P -v -dD ${INPUTS} -mcpu=rx600 -mlittle-endian-data" prefer-non-shared="true">\r
<language-scope id="org.eclipse.cdt.core.gcc"/>\r
<language-scope id="org.eclipse.cdt.core.g++"/>\r
</provider>\r
<stringAttribute key="com.renesas.cdt.core.optionInitCommands" value=""/>\r
<intAttribute key="com.renesas.cdt.core.portNumber" value="61234"/>\r
<stringAttribute key="com.renesas.cdt.core.runCommands" value=""/>\r
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+<stringAttribute key="com.renesas.cdt.core.serverParam" value="-g E1 -l 0 -t R5F564ML -p 61234 -d 61236 -uClockSrcHoco= 0 -uInputClock= 12.0000 -uAllowClockSourceInternal= 1 -uUseFine= 0 -uJTagClockFreq= 16.5 -w 1 -z 0 -uRegisterSetting= 0 -uModePin= 0 -uDebugMode= 0 -uExecuteProgram= 0 -uIdCode= FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF -b -n 0 -uWorkRamAddress= 1000 -uProgReWriteIRom= 0 -uProgReWriteDFlash= 0"/>\r
<booleanAttribute key="com.renesas.cdt.core.setResume" value="true"/>\r
<booleanAttribute key="com.renesas.cdt.core.setStopAt" value="true"/>\r
<booleanAttribute key="com.renesas.cdt.core.startServer" value="true"/>\r
<stringAttribute key="com.renesas.cdt.debug.realtimemanager.memory.mruRanges" value=""/>\r
<stringAttribute key="com.renesas.cdt.launch.dsf.IO_MAP" value="${eclipse_home}..\internal\IoFiles\RX\RX64M.sfrx"/>\r
<booleanAttribute key="com.renesas.cdt.launch.dsf.USE_DEFAULT_IO_MAP" value="true"/>\r
+<listAttribute key="com.renesas.cdt.launch.dsf.downloadImages">\r
+<listEntry value="|true|true|true||true"/>\r
+</listAttribute>\r
+<booleanAttribute key="com.renesas.cdt.launch.dsf.downloadImagesUpgradedV30" value="true"/>\r
<stringAttribute key="com.renesas.cdt.launch.dsf.launchSeqType" value="com.renesas.cdt.launch.dsf.launchSequence.e2GdbServer"/>\r
<stringAttribute key="com.renesas.cdt.launch.dsf.serverPath" value="${eclipse_home}../DebugComp/e2-server-gdb.exe"/>\r
<booleanAttribute key="com.renesas.hardwaredebug.e1.allow.clock.source.internal" value="true"/>\r
<intAttribute key="com.renesas.hardwaredebug.e1.clock_source" value="0"/>\r
<stringAttribute key="com.renesas.hardwaredebug.e1.connection.mode" value="0"/>\r
-<booleanAttribute key="com.renesas.hardwaredebug.e1.e1_pwr" value="false"/>\r
+<booleanAttribute key="com.renesas.hardwaredebug.e1.e1_pwr" value="true"/>\r
+<booleanAttribute key="com.renesas.hardwaredebug.e1.enable.hot.plug" value="false"/>\r
<booleanAttribute key="com.renesas.hardwaredebug.e1.enable_external_flash" value="false"/>\r
<booleanAttribute key="com.renesas.hardwaredebug.e1.execute.program" value="false"/>\r
<listAttribute key="com.renesas.hardwaredebug.e1.ext_flash_definitions"/>\r
<booleanAttribute key="com.renesas.hardwaredebug.e20.le" value="true"/>\r
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>\r
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>\r
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX600_RX64M_RSK_GCC_e2studio\HardwareDebug\RTOSDemo.x"/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>\r
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>\r
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>\r
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>\r
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX600_RX64M_RSK_GCC_e2studio\HardwareDebug\RTOSDemo.x"/>\r
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>\r
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>\r
# Automatically-generated file. Do not edit!\r
################################################################################\r
\r
-PATH := $(PATH):C:\PROGRA~1\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\bin;C:\PROGRA~1\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\libexec\gcc\rx-elf\4.7-GNURX_v14.01
\ No newline at end of file
+PATH := $(PATH):C:\devtools\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\bin;C:\devtools\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\libexec\gcc\rx-elf\4.7-GNURX_v14.01
\ No newline at end of file
#ifndef FREERTOS_CONFIG_H\r
#define FREERTOS_CONFIG_H\r
\r
+/* Hardware specifics. */\r
+#include "iodefine.h"\r
+\r
/* Prevent Renesas headers redefining some stdint.h types. */\r
#define __TYPEDEF__ 1\r
\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/*\r
+ * This file contains the non-portable and therefore RX64M specific parts of\r
+ * the IntQueue standard demo task - namely the configuration of the timers\r
+ * that generate the interrupts and the interrupt entry points.\r
+ */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "IntQueueTimer.h"\r
+#include "IntQueue.h"\r
+\r
+#define IPR_PERIB_INTB128 128\r
+#define IPR_PERIB_INTB129 129\r
+#define IER_PERIB_INTB128 0x10\r
+#define IER_PERIB_INTB129 0x10\r
+#define IEN_PERIB_INTB128 IEN0\r
+#define IEN_PERIB_INTB129 IEN1\r
+#define IR_PERIB_INTB128 128\r
+#define IR_PERIB_INTB129 129\r
+\r
+void vIntQTimerISR0( void ) __attribute__ ((interrupt));\r
+void vIntQTimerISR1( void ) __attribute__ ((interrupt));\r
+\r
+#define tmrTIMER_0_1_FREQUENCY ( 2000UL )\r
+#define tmrTIMER_2_3_FREQUENCY ( 2001UL )\r
+\r
+void vInitialiseTimerForIntQueueTest( void )\r
+{\r
+ /* Ensure interrupts do not start until full configuration is complete. */\r
+ portENTER_CRITICAL();\r
+ {\r
+ /* Give write access. */\r
+ SYSTEM.PRCR.WORD = 0xa502;\r
+\r
+ /* Cascade two 8bit timer channels to generate the interrupts. \r
+ 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are\r
+ utilised for this test. */\r
+\r
+ /* Enable the timers. */\r
+ SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;\r
+ SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;\r
+\r
+ /* Enable compare match A interrupt request. */\r
+ TMR0.TCR.BIT.CMIEA = 1;\r
+ TMR2.TCR.BIT.CMIEA = 1;\r
+\r
+ /* Clear the timer on compare match A. */\r
+ TMR0.TCR.BIT.CCLR = 1;\r
+ TMR2.TCR.BIT.CCLR = 1;\r
+\r
+ /* Set the compare match value. */\r
+ TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );\r
+ TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );\r
+\r
+ /* 16 bit operation ( count from timer 1,2 ). */\r
+ TMR0.TCCR.BIT.CSS = 3;\r
+ TMR2.TCCR.BIT.CSS = 3;\r
+ \r
+ /* Use PCLK as the input. */\r
+ TMR1.TCCR.BIT.CSS = 1;\r
+ TMR3.TCCR.BIT.CSS = 1;\r
+ \r
+ /* Divide PCLK by 8. */\r
+ TMR1.TCCR.BIT.CKS = 2;\r
+ TMR3.TCCR.BIT.CKS = 2;\r
+\r
+ /* Enable TMR 0, 2 interrupts. */\r
+ TMR0.TCR.BIT.CMIEA = 1;\r
+ TMR2.TCR.BIT.CMIEA = 1;\r
+\r
+ /* Map TMR0 CMIA0 interrupt to vector slot B number 128 and set\r
+ priority above the kernel's priority, but below the max syscall\r
+ priority. */\r
+ ICU.SLIBXR128.BYTE = 3; /* Three is TMR0 compare match A. */\r
+ IPR( PERIB, INTB128 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;\r
+ IEN( PERIB, INTB128 ) = 1;\r
+\r
+ /* Ensure that the flag is set to 0, otherwise the interrupt will not be\r
+ accepted. */\r
+ IR( PERIB, INTB128 ) = 0;\r
+\r
+ /* Do the same for TMR2, but to vector 129. */\r
+ ICU.SLIBXR129.BYTE = 9; /* Nine is TMR2 compare match A. */\r
+ IPR( PERIB, INTB129 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2;\r
+ IEN( PERIB, INTB129 ) = 1;\r
+ IR( PERIB, INTB129 ) = 0;\r
+ }\r
+ portEXIT_CRITICAL();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* On vector 128. */\r
+void vIntQTimerISR0( void )\r
+{\r
+ /* Enable interrupts to allow interrupt nesting. */\r
+ __asm volatile( "setpsw i" );\r
+\r
+ portYIELD_FROM_ISR( xFirstTimerHandler() );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* On vector 129. */\r
+void vIntQTimerISR1( void )\r
+{\r
+ /* Enable interrupts to allow interrupt nesting. */\r
+ __asm volatile( "setpsw i" );\r
+\r
+ portYIELD_FROM_ISR( xSecondTimerHandler() );\r
+}\r
+\r
+\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+#ifndef INT_QUEUE_TIMER_H\r
+#define INT_QUEUE_TIMER_H\r
+\r
+void vInitialiseTimerForIntQueueTest( void );\r
+portBASE_TYPE xTimer0Handler( void );\r
+portBASE_TYPE xTimer1Handler( void );\r
+\r
+#endif\r
+\r
#include "partest.h"\r
\r
/* Hardware specifics. */\r
-//#include "iodefine.h"\r
+#include "rskrx64mdef.h"\r
\r
#define partestNUM_LEDS ( 4 )\r
\r
\r
void vParTestInitialise( void )\r
{\r
- /* Port pin configuration is done by the low level set up prior to this\r
- function being called. */\r
+ /* First set the data levels. */\r
+ LED0 = LED_OFF;\r
+ LED1 = LED_OFF;\r
+ LED2 = LED_OFF;\r
+ LED3 = LED_OFF;\r
+\r
+ /* Set port direction registers. */\r
+ LED0_PIN_DIR = OUTPUT_PIN;\r
+ LED1_PIN_DIR = OUTPUT_PIN;\r
+ LED2_PIN_DIR = OUTPUT_PIN;\r
+ LED3_PIN_DIR = OUTPUT_PIN;\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vParTestSetLED( unsigned long ulLED, signed long xValue )\r
{\r
-#if 0\r
if( ulLED < partestNUM_LEDS )\r
{\r
if( xValue != 0 )\r
taskEXIT_CRITICAL();\r
}\r
}\r
-#endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vParTestToggleLED( unsigned long ulLED )\r
{\r
-#if 0\r
if( ulLED < partestNUM_LEDS )\r
{\r
taskENTER_CRITICAL();\r
}\r
taskEXIT_CRITICAL();\r
}\r
-#endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
long lParTestGetLEDState( unsigned long ulLED )\r
{\r
long lReturn = pdTRUE;\r
-#if 0\r
+\r
if( ulLED < partestNUM_LEDS )\r
{\r
switch( ulLED )\r
break;\r
}\r
}\r
-#endif\r
+\r
return lReturn;\r
}\r
/*-----------------------------------------------------------*/\r
--- /dev/null
+;/*\r
+; FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+; All rights reserved\r
+;\r
+; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+;\r
+; ***************************************************************************\r
+; * *\r
+; * FreeRTOS provides completely free yet professionally developed, *\r
+; * robust, strictly quality controlled, supported, and cross *\r
+; * platform software that has become a de facto standard. *\r
+; * *\r
+; * Help yourself get started quickly and support the FreeRTOS *\r
+; * project by purchasing a FreeRTOS tutorial book, reference *\r
+; * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+; * *\r
+; * Thank you! *\r
+; * *\r
+; ***************************************************************************\r
+;\r
+; This file is part of the FreeRTOS distribution.\r
+;\r
+; FreeRTOS is free software; you can redistribute it and/or modify it under\r
+; the terms of the GNU General Public License (version 2) as published by the\r
+; Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+;\r
+; >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+; >>! a combined work that includes FreeRTOS without being obliged to provide\r
+; >>! the source code for proprietary components outside of the FreeRTOS\r
+; >>! kernel.\r
+;\r
+; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+; FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+; link: http://www.freertos.org/a00114.html\r
+;\r
+; 1 tab == 4 spaces!\r
+;\r
+; ***************************************************************************\r
+; * *\r
+; * Having a problem? Start by reading the FAQ "My application does *\r
+; * not run, what could be wrong?" *\r
+; * *\r
+; * http://www.FreeRTOS.org/FAQHelp.html *\r
+; * *\r
+; ***************************************************************************\r
+;\r
+; http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+; license and Real Time Engineers Ltd. contact details.;\r
+;\r
+; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+; including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+; compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+;\r
+; http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+; Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+; licenses offer ticketed support, indemnification and middleware.\r
+;\r
+; http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+; engineered and independently SIL3 certified version for use in safety and\r
+; mission critical applications that require provable dependability.\r
+;\r
+; 1 tab == 4 spaces!\r
+;*/\r
+\r
+ .global _vRegTest1Implementation\r
+ .global _vRegTest2Implementation\r
+\r
+ .extern _ulRegTest1LoopCounter\r
+ .extern _ulRegTest2LoopCounter\r
+\r
+ .text\r
+\r
+\r
+;/* This function is explained in the comments at the top of main.c. */\r
+_vRegTest1Implementation:\r
+\r
+ ;/* Put a known value in the guard byte of the accumulators. */\r
+ MOV.L #10, R1\r
+ MVTACGU R1, A0\r
+ MOV.L #20, R1\r
+ MVTACGU R1, A1\r
+\r
+ ;/* Put a known value in each register. */\r
+ MOV.L #1, R1\r
+ MOV.L #2, R2\r
+ MOV.L #3, R3\r
+ MOV.L #4, R4\r
+ MOV.L #5, R5\r
+ MOV.L #6, R6\r
+ MOV.L #7, R7\r
+ MOV.L #8, R8\r
+ MOV.L #9, R9\r
+ MOV.L #10, R10\r
+ MOV.L #11, R11\r
+ MOV.L #12, R12\r
+ MOV.L #13, R13\r
+ MOV.L #14, R14\r
+ MOV.L #15, R15\r
+ \r
+ ;/* Put a known value in the hi and low of the accumulators. */\r
+ MVTACHI R1, A0\r
+ MVTACLO R2, A0\r
+ MVTACHI R3, A1\r
+ MVTACLO R4, A1\r
+\r
+ ;/* Loop, checking each itteration that each register still contains the\r
+ ;expected value. */\r
+TestLoop1: \r
+\r
+ ;/* Push the registers that are going to get clobbered. */\r
+ PUSHM R14-R15 \r
+ \r
+ ;/* Increment the loop counter to show this task is still getting CPU time. */\r
+ MOV.L #_ulRegTest1LoopCounter, R14\r
+ MOV.L [ R14 ], R15\r
+ ADD #1, R15 \r
+ MOV.L R15, [ R14 ]\r
+ \r
+ ;/* Yield to extend the text coverage. Set the bit in the ITU SWINTR register. */\r
+ MOV.L #1, R14\r
+ MOV.L #0872E0H, R15\r
+ MOV.B R14, [R15]\r
+ NOP \r
+ NOP \r
+ \r
+ ;/* Check accumulators. */\r
+ MVFACHI #0, A0, R15\r
+ CMP #1, R15\r
+ BNE RegTest1Error\r
+ MVFACLO #0, A0, R15\r
+ CMP #2, R15\r
+ BNE RegTest1Error\r
+ MVFACGU #0, A0, R15\r
+ CMP #10, R15\r
+ BNE RegTest1Error\r
+ MVFACHI #0, A1, R15\r
+ CMP #3, R15\r
+ BNE RegTest1Error\r
+ MVFACLO #0, A1, R15\r
+ CMP #4, R15\r
+ BNE RegTest1Error\r
+ MVFACGU #0, A1, R15\r
+ CMP #20, R15\r
+ BNE RegTest1Error\r
+\r
+ ;/* Restore the clobbered registers. */\r
+ POPM R14-R15 \r
+ \r
+ ;/* Now compare each register to ensure it still contains the value that was\r
+ ;set before this loop was entered. */\r
+ CMP #1, R1 \r
+ BNE RegTest1Error \r
+ CMP #2, R2 \r
+ BNE RegTest1Error \r
+ CMP #3, R3 \r
+ BNE RegTest1Error \r
+ CMP #4, R4 \r
+ BNE RegTest1Error \r
+ CMP #5, R5 \r
+ BNE RegTest1Error \r
+ CMP #6, R6 \r
+ BNE RegTest1Error \r
+ CMP #7, R7 \r
+ BNE RegTest1Error \r
+ CMP #8, R8 \r
+ BNE RegTest1Error \r
+ CMP #9, R9 \r
+ BNE RegTest1Error \r
+ CMP #10, R10 \r
+ BNE RegTest1Error \r
+ CMP #11, R11 \r
+ BNE RegTest1Error \r
+ CMP #12, R12 \r
+ BNE RegTest1Error \r
+ CMP #13, R13 \r
+ BNE RegTest1Error \r
+ CMP #14, R14 \r
+ BNE RegTest1Error \r
+ CMP #15, R15 \r
+ BNE RegTest1Error \r
+\r
+ ;/* All comparisons passed, start a new itteratio of this loop. */\r
+ BRA TestLoop1 \r
+ \r
+RegTest1Error: \r
+ ;/* A compare failed, just loop here so the loop counter stops incrementing\r
+ ;- causing the check task to indicate the error. */\r
+ BRA RegTest1Error \r
+;/*-----------------------------------------------------------*/\r
+\r
+;/* This function is explained in the comments at the top of main.c. */\r
+_vRegTest2Implementation:\r
+\r
+ ;/* Put a known value in the guard byte of the accumulators. */\r
+ MOV.L #1H, R1\r
+ MVTACGU R1, A0\r
+ MOV.L #2H, R1\r
+ MVTACGU R1, A1\r
+\r
+ ;/* Put a known value in each general purpose register. */\r
+ MOV.L #10H, R1\r
+ MOV.L #20H, R2\r
+ MOV.L #30H, R3\r
+ MOV.L #40H, R4\r
+ MOV.L #50H, R5\r
+ MOV.L #60H, R6\r
+ MOV.L #70H, R7\r
+ MOV.L #80H, R8\r
+ MOV.L #90H, R9\r
+ MOV.L #100H, R10\r
+ MOV.L #110H, R11\r
+ MOV.L #120H, R12\r
+ MOV.L #130H, R13\r
+ MOV.L #140H, R14\r
+ MOV.L #150H, R15\r
+\r
+ ;/* Put a known value in the hi and low of the accumulators. */\r
+ MVTACHI R1, A0\r
+ MVTACLO R2, A0\r
+ MVTACHI R3, A1\r
+ MVTACLO R4, A1\r
+\r
+ ;/* Loop, checking each itteration that each register still contains the\r
+ ;expected value. */\r
+TestLoop2: \r
+\r
+ ;/* Push the registers that are going to get clobbered. */\r
+ PUSHM R14-R15 \r
+ \r
+ ;/* Increment the loop counter to show this task is still getting CPU time. */\r
+ MOV.L #_ulRegTest2LoopCounter, R14\r
+ MOV.L [ R14 ], R15\r
+ ADD #1, R15 \r
+ MOV.L R15, [ R14 ]\r
+ \r
+ ;/* Check accumulators. */\r
+ MVFACHI #0, A0, R15\r
+ CMP #10H, R15\r
+ BNE RegTest1Error\r
+ MVFACLO #0, A0, R15\r
+ CMP #20H, R15\r
+ BNE RegTest1Error\r
+ MVFACGU #0, A0, R15\r
+ CMP #1H, R15\r
+ BNE RegTest1Error\r
+ MVFACHI #0, A1, R15\r
+ CMP #30H, R15\r
+ BNE RegTest1Error\r
+ MVFACLO #0, A1, R15\r
+ CMP #40H, R15\r
+ BNE RegTest1Error\r
+ MVFACGU #0, A1, R15\r
+ CMP #2H, R15\r
+ BNE RegTest1Error\r
+\r
+ ;/* Restore the clobbered registers. */\r
+ POPM R14-R15 \r
+ \r
+ ;/* Now compare each register to ensure it still contains the value that was\r
+ ;set before this loop was entered. */\r
+ CMP #10H, R1 \r
+ BNE RegTest2Error \r
+ CMP #20H, R2 \r
+ BNE RegTest2Error \r
+ CMP #30H, R3 \r
+ BNE RegTest2Error \r
+ CMP #40H, R4 \r
+ BNE RegTest2Error \r
+ CMP #50H, R5 \r
+ BNE RegTest2Error \r
+ CMP #60H, R6 \r
+ BNE RegTest2Error \r
+ CMP #70H, R7 \r
+ BNE RegTest2Error \r
+ CMP #80H, R8 \r
+ BNE RegTest2Error \r
+ CMP #90H, R9 \r
+ BNE RegTest2Error \r
+ CMP #100H, R10 \r
+ BNE RegTest2Error \r
+ CMP #110H, R11 \r
+ BNE RegTest2Error \r
+ CMP #120H, R12 \r
+ BNE RegTest2Error \r
+ CMP #130H, R13 \r
+ BNE RegTest2Error \r
+ CMP #140H, R14 \r
+ BNE RegTest2Error \r
+ CMP #150H, R15 \r
+ BNE RegTest2Error \r
+\r
+ ;/* All comparisons passed, start a new itteratio of this loop. */\r
+ BRA TestLoop2 \r
+ \r
+RegTest2Error: \r
+ ;/* A compare failed, just loop here so the loop counter stops incrementing\r
+ ;- causing the check task to indicate the error. */\r
+ BRA RegTest2Error \r
+\r
+ \r
+ .END\r
/* File Version: V1.00 */\r
/* Date Generated: 08/07/2013 */\r
/************************************************************************/\r
-\r
+
#include "iodefine.h"\r
#ifdef __cplusplus\r
extern "C" {\r
#ifdef __cplusplus\r
}\r
#endif\r
+
+
+#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */
+#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */
+#define _52_CGC_MOSCWTCR_VALUE (0x52U) /* Main Clock Oscillator Wait Time */
+#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */
+#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */
+#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */
+#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */
+#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */
+#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */
+#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */
+#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */
+#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */
+#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */
+#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */
+
+void R_CGC_Create(void)
+{
+ /* Set main clock control registers */
+ SYSTEM.MOFCR.BYTE = _00_CGC_MAINOSC_RESONATOR | _00_CGC_MAINOSC_UNDER24M;
+ SYSTEM.MOSCWTCR.BYTE = _52_CGC_MOSCWTCR_VALUE;
+
+ /* Set main clock operation */
+ SYSTEM.MOSCCR.BIT.MOSTP = 0U;
+
+ /* Wait for main clock oscillator wait counter overflow */
+ while (1U != SYSTEM.OSCOVFSR.BIT.MOOVF);
+
+ /* Set system clock */
+ SYSTEM.SCKCR.LONG = _00000001_CGC_PCLKD_DIV_2 | _00000010_CGC_PCLKC_DIV_2 | _00000100_CGC_PCLKB_DIV_2 |
+ _00001000_CGC_PCLKA_DIV_2 | _00010000_CGC_BCLK_DIV_2 | _01000000_CGC_ICLK_DIV_2 |
+ _10000000_CGC_FCLK_DIV_2;
+
+ /* Set PLL circuit */
+ SYSTEM.PLLCR2.BIT.PLLEN = 0U;
+ SYSTEM.PLLCR.BIT.PLLSRCSEL = 0U;
+ SYSTEM.PLLCR.WORD = _0001_CGC_PLL_FREQ_DIV_2 | _1300_CGC_PLL_FREQ_MUL_10_0;
+
+ /* Wait for PLL wait counter overflow */
+ while (1U != SYSTEM.OSCOVFSR.BIT.PLOVF);
+
+
+ /* Disable sub-clock */
+ SYSTEM.SOSCCR.BIT.SOSTP = 1U;
+
+ /* Wait for the register modification to complete */
+ while (1U != SYSTEM.SOSCCR.BIT.SOSTP);
+
+ /* Set LOCO */
+ SYSTEM.LOCOCR.BIT.LCSTP = 0U;
+
+ /* Set UCLK */
+ SYSTEM.SCKCR2.WORD = _0020_CGC_UCLK_DIV_3;
+
+ /* Set SDCLK */
+ SYSTEM.SCKCR.BIT.PSTOP0 = 1U;
+
+ /* Set clock source */
+ SYSTEM.SCKCR3.WORD = _0400_CGC_CLOCKSOURCE_PLL;
+}
+
\r
void HardwareSetup(void)\r
{\r
-/*\r
- BSC.CS0MOD.WORD = 0x1234;\r
- BSC.CS7CNT.WORD = 0x5678;\r
- \r
- SCI0.SCR.BIT.TE = 0;\r
- SCI0.SCR.BIT.RE = 0;\r
- SCI0.SCR.BIT.TE = 1;\r
- SCI2.SSR.BIT.PER = 0;\r
+ /* Enable writing to registers related to operating modes, LPC, CGC and software reset */
+ SYSTEM.PRCR.WORD = 0xA50BU;
+
+ /* Enable writing to MPC pin function control registers */
+ MPC.PWPR.BIT.B0WI = 0U;
+ MPC.PWPR.BIT.PFSWE = 1U;
+
+ /* Set peripheral settings */
+ R_CGC_Create();
+
+ /* Disable writing to MPC pin function control registers */
+ MPC.PWPR.BIT.PFSWE = 0U;
+ MPC.PWPR.BIT.B0WI = 1U;
+
+ /* Enable protection */
+ SYSTEM.PRCR.WORD = 0xA500U;
+}
+
\r
- TMR0.TCR.BYTE = 0x12;\r
- TMR1.TCR.BYTE = 0x12;\r
- TMR2.TCR.BYTE = 0x12;\r
- \r
- P0.DDR.BYTE = 0x12;\r
- P1.DDR.BYTE = 0x12;\r
-*/\r
-}\r
#include "interrupt_handlers.h"\r
\r
// Exception(Supervisor Instruction)\r
-void INT_Excep_SuperVisorInst(void){/* brk(); */}\r
+void INT_Excep_SuperVisorInst(void){ __asm volatile( "brk"); }\r
\r
// Exception(Access Instruction)\r
-void INT_Excep_AccessInst(void){/* brk(); */}\r
+void INT_Excep_AccessInst(void){ __asm volatile( "brk"); }\r
\r
// Exception(Undefined Instruction)\r
-void INT_Excep_UndefinedInst(void){/* brk(); */}\r
+void INT_Excep_UndefinedInst(void){ __asm volatile( "brk"); }\r
\r
// Exception(Floating Point)\r
-void INT_Excep_FloatingPoint(void){/* brk(); */}\r
+void INT_Excep_FloatingPoint(void){ __asm volatile( "brk"); }\r
\r
// NMI\r
-void INT_NonMaskableInterrupt(void){/* brk(); */}\r
+void INT_NonMaskableInterrupt(void){ __asm volatile( "brk"); }\r
\r
// Dummy\r
-void Dummy(void){/* brk(); */}\r
+void Dummy(void){ __asm volatile( "brk"); }\r
\r
// BRK\r
void INT_Excep_BRK(void){ /*wait();*/ }\r
//;0x003C Reserved\r
\r
//;0x0040 BUSERR\r
-void INT_Excep_BSC_BUSERR(void){ }\r
+void INT_Excep_BSC_BUSERR(void){ __asm volatile( "brk"); }\r
//;0x0044 Reserved\r
\r
//;0x0048 RAMERR\r
-void INT_Excep_RAM_RAMERR(void){ };\r
+void INT_Excep_RAM_RAMERR(void){ __asm volatile( "brk"); };\r
//;0x004C Reserved\r
\r
//;0x0050 Reserved\r
\r
//;0x0054 FIFERR\r
-void INT_Excep_FCU_FIFERR(void){ };\r
+void INT_Excep_FCU_FIFERR(void){ __asm volatile( "brk"); };\r
//;0x0058 Reserved\r
\r
//;0x005C FRDYI\r
-void INT_Excep_FCU_FRDYI(void){ };\r
+void INT_Excep_FCU_FRDYI(void){ __asm volatile( "brk"); };\r
//;0x0060 Reserved\r
\r
//;0x0064 Reserved\r
\r
//;0x0068 SWINT2\r
-void INT_Excep_ICU_SWINT2(void){ };\r
+void INT_Excep_ICU_SWINT2(void){ __asm volatile( "brk"); };\r
\r
//;0x006C SWINT\r
-void INT_Excep_ICU_SWINT(void){ };\r
+void INT_Excep_ICU_SWINT(void){ __asm volatile( "brk"); };\r
\r
//;0x0070 CMI0\r
-void INT_Excep_CMT0_CMI0(void){ };\r
+void INT_Excep_CMT0_CMI0(void){ __asm volatile( "brk"); };\r
\r
//;0x0074 CMI1\r
-void INT_Excep_CMT1_CMI1(void){ };\r
+void INT_Excep_CMT1_CMI1(void){ __asm volatile( "brk"); };\r
\r
//;0x0078 CMWI0\r
-void INT_Excep_CMTW0_CMWI0(void){ };\r
+void INT_Excep_CMTW0_CMWI0(void){ __asm volatile( "brk"); };\r
\r
//;0x007C CMWI1\r
-void INT_Excep_CMTW1_CMWI1(void){ };\r
+void INT_Excep_CMTW1_CMWI1(void){ __asm volatile( "brk"); };\r
\r
//;0x0080 D0FIFO2\r
-void INT_Excep_USBHS_D0FIFO2(void){ };\r
+void INT_Excep_USBHS_D0FIFO2(void){ __asm volatile( "brk"); };\r
\r
//;0x0084 D1FIFO2\r
-void INT_Excep_USBHS_D1FIFO2(void){ };\r
+void INT_Excep_USBHS_D1FIFO2(void){ __asm volatile( "brk"); };\r
\r
//;0x0088 D0FIFO0\r
-void INT_Excep_USB0_D0FIFO0(void){ };\r
+void INT_Excep_USB0_D0FIFO0(void){ __asm volatile( "brk"); };\r
\r
//;0x008C D1FIFO0\r
-void INT_Excep_USB0_D1FIFO0(void){ };\r
+void INT_Excep_USB0_D1FIFO0(void){ __asm volatile( "brk"); };\r
//;0x0090 Reserved\r
\r
//;0x0094 Reserved\r
\r
//;0x0098 SPRI0\r
-void INT_Excep_RSPI0_SPRI0(void){ };\r
+void INT_Excep_RSPI0_SPRI0(void){ __asm volatile( "brk"); };\r
\r
//;0x009C SPTI0\r
-void INT_Excep_RSPI0_SPTI0(void){ };\r
+void INT_Excep_RSPI0_SPTI0(void){ __asm volatile( "brk"); };\r
//;0x00A0 Reserved\r
\r
//;0x00A4 Reserved\r
\r
//;0x00A8 SPRI\r
-void INT_Excep_QSPI_SPRI(void){ };\r
+void INT_Excep_QSPI_SPRI(void){ __asm volatile( "brk"); };\r
\r
//;0x00AC SPTI\r
-void INT_Excep_QSPI_SPTI(void){ };\r
+void INT_Excep_QSPI_SPTI(void){ __asm volatile( "brk"); };\r
\r
//;0x00B0 SBFAI\r
-void INT_Excep_SHDI_SBFAI(void){ };\r
+void INT_Excep_SHDI_SBFAI(void){ __asm volatile( "brk"); };\r
\r
//;0x00B4 MBFAI\r
-void INT_Excep_MMC_MBFAI(void){ };\r
+void INT_Excep_MMC_MBFAI(void){ __asm volatile( "brk"); };\r
\r
//;0x00B8 SSITX0\r
-void INT_Excep_SSI0_SSITXI0(void){ };\r
+void INT_Excep_SSI0_SSITXI0(void){ __asm volatile( "brk"); };\r
\r
//;0x00BC SSIRX0\r
-void INT_Excep_SSI0_SSIRXI0(void){ };\r
+void INT_Excep_SSI0_SSIRXI0(void){ __asm volatile( "brk"); };\r
\r
//;0x00C0 SSIRTI1\r
-void INT_Excep_SSI1_SSIRTI1(void){ };\r
+void INT_Excep_SSI1_SSIRTI1(void){ __asm volatile( "brk"); };\r
//;0x00C4 Reserved\r
\r
//;0x00C8 IDEI\r
-void INT_Excep_SRC_IDEI(void){ };\r
+void INT_Excep_SRC_IDEI(void){ __asm volatile( "brk"); };\r
\r
//;0x00CC ODFI\r
-void INT_Excep_SRC_ODFI(void){ };\r
+void INT_Excep_SRC_ODFI(void){ __asm volatile( "brk"); };\r
\r
//;0x00D0 RXI0\r
-void INT_Excep_RIIC0_RXI0(void){ };\r
+void INT_Excep_RIIC0_RXI0(void){ __asm volatile( "brk"); };\r
\r
//;0x00D4C TXI0\r
-void INT_Excep_RIIC0_TXI0(void){ };\r
+void INT_Excep_RIIC0_TXI0(void){ __asm volatile( "brk"); };\r
\r
//;0x00D8 RXI2\r
-void INT_Excep_RIIC2_RXI2(void){ };\r
+void INT_Excep_RIIC2_RXI2(void){ __asm volatile( "brk"); };\r
\r
//;0x00DC TXI2\r
-void INT_Excep_RIIC2_TXI2(void){ };\r
+void INT_Excep_RIIC2_TXI2(void){ __asm volatile( "brk"); };\r
//;0x00E0 Reserved\r
\r
//;0x00E4 Reserved\r
\r
//;0x00E8 RXI0\r
-void INT_Excep_SCI0_RXI0(void){ };\r
+void INT_Excep_SCI0_RXI0(void){ __asm volatile( "brk"); };\r
\r
//;0x00EC TXI0\r
-void INT_Excep_SCI0_TXI0(void){ };\r
+void INT_Excep_SCI0_TXI0(void){ __asm volatile( "brk"); };\r
\r
//;0x00F0 RXI1\r
-void INT_Excep_SCI1_RXI1(void){ };\r
+void INT_Excep_SCI1_RXI1(void){ __asm volatile( "brk"); };\r
\r
//;0x00F4 TXI1\r
-void INT_Excep_SCI1_TXI1(void){ };\r
+void INT_Excep_SCI1_TXI1(void){ __asm volatile( "brk"); };\r
\r
//;0x00F8 RXI2\r
-void INT_Excep_SCI2_RXI2(void){ };\r
+void INT_Excep_SCI2_RXI2(void){ __asm volatile( "brk"); };\r
\r
//;0x00FC TXI2\r
-void INT_Excep_SCI2_TXI2(void){ };\r
+void INT_Excep_SCI2_TXI2(void){ __asm volatile( "brk"); };\r
\r
//;0x0100 IRQ0\r
-void INT_Excep_ICU_IRQ0(void){ };\r
+void INT_Excep_ICU_IRQ0(void){ __asm volatile( "brk"); };\r
\r
//;0x0104 IRQ1\r
-void INT_Excep_ICU_IRQ1(void){ };\r
+void INT_Excep_ICU_IRQ1(void){ __asm volatile( "brk"); };\r
\r
//;0x0108 IRQ2\r
-void INT_Excep_ICU_IRQ2(void){ };\r
+void INT_Excep_ICU_IRQ2(void){ __asm volatile( "brk"); };\r
\r
//;0x010C IRQ3\r
-void INT_Excep_ICU_IRQ3(void){ };\r
+void INT_Excep_ICU_IRQ3(void){ __asm volatile( "brk"); };\r
\r
//;0x0110 IRQ4\r
-void INT_Excep_ICU_IRQ4(void){ };\r
+void INT_Excep_ICU_IRQ4(void){ __asm volatile( "brk"); };\r
\r
//;0x0114 IRQ5\r
-void INT_Excep_ICU_IRQ5(void){ };\r
+void INT_Excep_ICU_IRQ5(void){ __asm volatile( "brk"); };\r
\r
//;0x0118 IRQ6\r
-void INT_Excep_ICU_IRQ6(void){ };\r
+void INT_Excep_ICU_IRQ6(void){ __asm volatile( "brk"); };\r
\r
//;0x011C IRQ7\r
-void INT_Excep_ICU_IRQ7(void){ };\r
+void INT_Excep_ICU_IRQ7(void){ __asm volatile( "brk"); };\r
\r
//;0x0120 IRQ8\r
-void INT_Excep_ICU_IRQ8(void){ };\r
+void INT_Excep_ICU_IRQ8(void){ __asm volatile( "brk"); };\r
\r
//;0x0124 IRQ9\r
-void INT_Excep_ICU_IRQ9(void){ };\r
+void INT_Excep_ICU_IRQ9(void){ __asm volatile( "brk"); };\r
\r
//;0x0128 IRQ10\r
-void INT_Excep_ICU_IRQ10(void){ };\r
+void INT_Excep_ICU_IRQ10(void){ __asm volatile( "brk"); };\r
\r
//;0x012C IRQ11\r
-void INT_Excep_ICU_IRQ11(void){ };\r
+void INT_Excep_ICU_IRQ11(void){ __asm volatile( "brk"); };\r
\r
//;0x0130 IRQ12\r
-void INT_Excep_ICU_IRQ12(void){ };\r
+void INT_Excep_ICU_IRQ12(void){ __asm volatile( "brk"); };\r
\r
//;0x0134 IRQ13\r
-void INT_Excep_ICU_IRQ13(void){ };\r
+void INT_Excep_ICU_IRQ13(void){ __asm volatile( "brk"); };\r
\r
//;0x0138 IRQ14\r
-void INT_Excep_ICU_IRQ14(void){ };\r
+void INT_Excep_ICU_IRQ14(void){ __asm volatile( "brk"); };\r
\r
//;0x013C IRQ15\r
-void INT_Excep_ICU_IRQ15(void){ };\r
+void INT_Excep_ICU_IRQ15(void){ __asm volatile( "brk"); };\r
\r
//;0x0140 RXI3\r
-void INT_Excep_SCI3_RXI3(void){ };\r
+void INT_Excep_SCI3_RXI3(void){ __asm volatile( "brk"); };\r
\r
//;0x0144 TXI3\r
-void INT_Excep_SCI3_TXI3(void){ };\r
+void INT_Excep_SCI3_TXI3(void){ __asm volatile( "brk"); };\r
\r
//;0x0148 RXI4\r
-void INT_Excep_SCI4_RXI4(void){ };\r
+void INT_Excep_SCI4_RXI4(void){ __asm volatile( "brk"); };\r
\r
//;0x014C TXI4\r
-void INT_Excep_SCI4_TXI4(void){ };\r
+void INT_Excep_SCI4_TXI4(void){ __asm volatile( "brk"); };\r
\r
//;0x0150 RXI5\r
-void INT_Excep_SCI5_RXI5(void){ };\r
+void INT_Excep_SCI5_RXI5(void){ __asm volatile( "brk"); };\r
\r
//;0x0154 TXI5\r
-void INT_Excep_SCI5_TXI5(void){ };\r
+void INT_Excep_SCI5_TXI5(void){ __asm volatile( "brk"); };\r
\r
//;0x0158 RXI6\r
-void INT_Excep_SCI6_RXI6(void){ };\r
+void INT_Excep_SCI6_RXI6(void){ __asm volatile( "brk"); };\r
\r
//;0x015C TXI6\r
-void INT_Excep_SCI6_TXI6(void){ };\r
+void INT_Excep_SCI6_TXI6(void){ __asm volatile( "brk"); };\r
\r
//;0x0160 COMPA1\r
-void INT_Excep_LVD1_COMPA1(void){ };\r
+void INT_Excep_LVD1_COMPA1(void){ __asm volatile( "brk"); };\r
\r
//;0x0164 COMPA2\r
-void INT_Excep_LVD2_COMPA2(void){ };\r
+void INT_Excep_LVD2_COMPA2(void){ __asm volatile( "brk"); };\r
\r
//;0x0168 USBR0\r
-void INT_Excep_USB_USBR0(void){ };\r
+void INT_Excep_USB_USBR0(void){ __asm volatile( "brk"); };\r
//;0x016C Reserved\r
\r
//;0x0170 ALM\r
-void INT_Excep_RTC_ALM(void){ };\r
+void INT_Excep_RTC_ALM(void){ __asm volatile( "brk"); };\r
\r
//;0x0174 PRD\r
-void INT_Excep_RTC_PRD(void){ };\r
+void INT_Excep_RTC_PRD(void){ __asm volatile( "brk"); };\r
\r
//;0x0178 HSUSBR\r
-void INT_Excep_USBHS_USBHSR(void){ };\r
+void INT_Excep_USBHS_USBHSR(void){ __asm volatile( "brk"); };\r
\r
//;0x017C IWUNI\r
-void INT_Excep_IWDT_IWUNI(void){ };\r
+void INT_Excep_IWDT_IWUNI(void){ __asm volatile( "brk"); };\r
\r
//;0x0180 WUNI\r
-void INT_Excep_WDT_WUNI(void){ };\r
+void INT_Excep_WDT_WUNI(void){ __asm volatile( "brk"); };\r
\r
//;0x0184 PCDFI\r
-void INT_Excep_PDC_PCDFI(void){ };\r
+void INT_Excep_PDC_PCDFI(void){ __asm volatile( "brk"); };\r
\r
//;0x0188 RXI7\r
-void INT_Excep_SCI7_RXI7(void){ };\r
+void INT_Excep_SCI7_RXI7(void){ __asm volatile( "brk"); };\r
\r
//;0x018C TXI7\r
-void INT_Excep_SCI7_TXI7(void){ };\r
+void INT_Excep_SCI7_TXI7(void){ __asm volatile( "brk"); };\r
\r
//;0x0190 RXIF8\r
-void INT_Excep_SCIF8_RXIF8(void){ };\r
+void INT_Excep_SCIF8_RXIF8(void){ __asm volatile( "brk"); };\r
\r
//;0x0194 TXIF8\r
-void INT_Excep_SCIF8_TXIF8(void){ };\r
+void INT_Excep_SCIF8_TXIF8(void){ __asm volatile( "brk"); };\r
\r
//;0x0198 RXIF9\r
-void INT_Excep_SCIF9_RXIF9(void){ };\r
+void INT_Excep_SCIF9_RXIF9(void){ __asm volatile( "brk"); };\r
\r
//;0x019C TXIF9\r
-void INT_Excep_SCIF9_TXIF9(void){ };\r
+void INT_Excep_SCIF9_TXIF9(void){ __asm volatile( "brk"); };\r
\r
//;0x01A0 RXIF10\r
-void INT_Excep_SCIF10_RXIF10(void){ };\r
+void INT_Excep_SCIF10_RXIF10(void){ __asm volatile( "brk"); };\r
\r
//;0x01A4 TXIF10\r
-void INT_Excep_SCIF10_TXIF10(void){ };\r
+void INT_Excep_SCIF10_TXIF10(void){ __asm volatile( "brk"); };\r
\r
//;0x01A8 GROUPBE0\r
-void INT_Excep_ICU_GROUPBE0(void){ };\r
+void INT_Excep_ICU_GROUPBE0(void){ __asm volatile( "brk"); };\r
//;0x01AC Reserved \r
\r
//;0x01B0 Reserved \r
//;0x01B4 Reserved \r
\r
//;0x01B8 GROUPBL0\r
-void INT_Excep_ICU_GROUPBL0(void){ };\r
+void INT_Excep_ICU_GROUPBL0(void){ __asm volatile( "brk"); };\r
\r
//;0x01BC GROUPBL1\r
-void INT_Excep_ICU_GROUPBL1(void){ };\r
+void INT_Excep_ICU_GROUPBL1(void){ __asm volatile( "brk"); };\r
\r
//;0x01C0 GROUPAL0\r
-void INT_Excep_ICU_GROUPAL0(void){ };\r
+void INT_Excep_ICU_GROUPAL0(void){ __asm volatile( "brk"); };\r
\r
//;0x01C4 GROUPAL1\r
-void INT_Excep_ICU_GROUPAL1(void){ };\r
+void INT_Excep_ICU_GROUPAL1(void){ __asm volatile( "brk"); };\r
\r
//;0x01C8 RXIF11\r
-void INT_Excep_SCIF11_RXIF11(void){ };\r
+void INT_Excep_SCIF11_RXIF11(void){ __asm volatile( "brk"); };\r
\r
//;0x01CC TXIF11\r
-void INT_Excep_SCIF11_TXIF11(void){ };\r
+void INT_Excep_SCIF11_TXIF11(void){ __asm volatile( "brk"); };\r
\r
//;0x01D0 RXIF12\r
-void INT_Excep_SCIF12_RXIF12(void){ };\r
+void INT_Excep_SCIF12_RXIF12(void){ __asm volatile( "brk"); };\r
\r
//;0x01D4 TXIF12\r
-void INT_Excep_SCIF12_TXIF12(void){ };\r
+void INT_Excep_SCIF12_TXIF12(void){ __asm volatile( "brk"); };\r
\r
//;0x01D8 Reserved\r
\r
//;0x01DC Reserved\r
\r
//;0x01E0 DMAC0I\r
-void INT_Excep_DMAC_DMAC0I(void){ };\r
+void INT_Excep_DMAC_DMAC0I(void){ __asm volatile( "brk"); };\r
\r
//;0x01E4 DMAC1I\r
-void INT_Excep_DMAC_DMAC1I(void){ };\r
+void INT_Excep_DMAC_DMAC1I(void){ __asm volatile( "brk"); };\r
\r
//;0x01E8 DMAC2I\r
-void INT_Excep_DMAC_DMAC2I(void){ };\r
+void INT_Excep_DMAC_DMAC2I(void){ __asm volatile( "brk"); };\r
\r
//;0x01EC DMAC3I\r
-void INT_Excep_DMAC_DMAC3I(void){ };\r
+void INT_Excep_DMAC_DMAC3I(void){ __asm volatile( "brk"); };\r
\r
//;0x01F0 DMAC74I\r
-void INT_Excep_DMAC_DMAC74I(void){ };\r
+void INT_Excep_DMAC_DMAC74I(void){ __asm volatile( "brk"); };\r
\r
//;0x01F4 OST\r
-void INT_Excep_ICU_OST(void){ };\r
+void INT_Excep_ICU_OST(void){ __asm volatile( "brk"); };\r
\r
//;0x01F8 EXDMAC0I\r
-void INT_Excep_EXDMAC_EXDMAC0I(void){ };\r
+void INT_Excep_EXDMAC_EXDMAC0I(void){ __asm volatile( "brk"); };\r
\r
//;0x01FC EXDMAC1I\r
-void INT_Excep_EXDMAC_EXDMAC1I(void){ };\r
+void INT_Excep_EXDMAC_EXDMAC1I(void){ __asm volatile( "brk"); };\r
\r
//;0x0200 INTB128\r
-void INT_Excep_PERIB_INTB128(void){ };\r
+void INT_Excep_PERIB_INTB128(void){ __asm volatile( "brk"); };\r
\r
//;0x0204 INTB129\r
-void INT_Excep_PERIB_INTB129(void){ };\r
+void INT_Excep_PERIB_INTB129(void){ __asm volatile( "brk"); };\r
\r
//;0x0208 INTB130\r
-void INT_Excep_PERIB_INTB130(void){ };\r
+void INT_Excep_PERIB_INTB130(void){ __asm volatile( "brk"); };\r
\r
//;0x020C INTB131\r
-void INT_Excep_PERIB_INTB131(void){ };\r
+void INT_Excep_PERIB_INTB131(void){ __asm volatile( "brk"); };\r
\r
//;0x0210 INTB132\r
-void INT_Excep_PERIB_INTB132(void){ };\r
+void INT_Excep_PERIB_INTB132(void){ __asm volatile( "brk"); };\r
\r
//;0x0214 INTB133\r
-void INT_Excep_PERIB_INTB133(void){ };\r
+void INT_Excep_PERIB_INTB133(void){ __asm volatile( "brk"); };\r
\r
//;0x0218 INTB134\r
-void INT_Excep_PERIB_INTB134(void){ };\r
+void INT_Excep_PERIB_INTB134(void){ __asm volatile( "brk"); };\r
\r
//;0x021C INTB135\r
-void INT_Excep_PERIB_INTB135(void){ };\r
+void INT_Excep_PERIB_INTB135(void){ __asm volatile( "brk"); };\r
\r
//;0x0220 INTB136\r
-void INT_Excep_PERIB_INTB136(void){ };\r
+void INT_Excep_PERIB_INTB136(void){ __asm volatile( "brk"); };\r
\r
//;0x0224 INTB137\r
-void INT_Excep_PERIB_INTB137(void){ };\r
+void INT_Excep_PERIB_INTB137(void){ __asm volatile( "brk"); };\r
\r
//;0x0228 INTB138\r
-void INT_Excep_PERIB_INTB138(void){ };\r
+void INT_Excep_PERIB_INTB138(void){ __asm volatile( "brk"); };\r
\r
//;0x022C INTB139\r
-void INT_Excep_PERIB_INTB139(void){ };\r
+void INT_Excep_PERIB_INTB139(void){ __asm volatile( "brk"); };\r
\r
//;0x0230 INTB140\r
-void INT_Excep_PERIB_INTB140(void){ };\r
+void INT_Excep_PERIB_INTB140(void){ __asm volatile( "brk"); };\r
\r
//;0x0234 INTB141\r
-void INT_Excep_PERIB_INTB141(void){ };\r
+void INT_Excep_PERIB_INTB141(void){ __asm volatile( "brk"); };\r
\r
//;0x0238 INTB142\r
-void INT_Excep_PERIB_INTB142(void){ };\r
+void INT_Excep_PERIB_INTB142(void){ __asm volatile( "brk"); };\r
\r
//;0x023C INTB143\r
-void INT_Excep_PERIB_INTB143(void){ };\r
+void INT_Excep_PERIB_INTB143(void){ __asm volatile( "brk"); };\r
\r
//;0x0240 INTB144\r
-void INT_Excep_PERIB_INTB144(void){ };\r
+void INT_Excep_PERIB_INTB144(void){ __asm volatile( "brk"); };\r
\r
//;0x0244 INTB145\r
-void INT_Excep_PERIB_INTB145(void){ };\r
+void INT_Excep_PERIB_INTB145(void){ __asm volatile( "brk"); };\r
\r
//;0x0248 INTB146\r
-void INT_Excep_PERIB_INTB146(void){ };\r
+void INT_Excep_PERIB_INTB146(void){ __asm volatile( "brk"); };\r
\r
//;0x024C INTB147\r
-void INT_Excep_PERIB_INTB147(void){ };\r
+void INT_Excep_PERIB_INTB147(void){ __asm volatile( "brk"); };\r
\r
//;0x0250 INTB148\r
-void INT_Excep_PERIB_INTB148(void){ };\r
+void INT_Excep_PERIB_INTB148(void){ __asm volatile( "brk"); };\r
\r
//;0x02540 INTB149\r
-void INT_Excep_PERIB_INTB149(void){ };\r
+void INT_Excep_PERIB_INTB149(void){ __asm volatile( "brk"); };\r
\r
//;0x0258 INTB150\r
-void INT_Excep_PERIB_INTB150(void){ };\r
+void INT_Excep_PERIB_INTB150(void){ __asm volatile( "brk"); };\r
\r
//;0x025C INTB151\r
-void INT_Excep_PERIB_INTB151(void){ };\r
+void INT_Excep_PERIB_INTB151(void){ __asm volatile( "brk"); };\r
\r
//;0x0260 INTB152\r
-void INT_Excep_PERIB_INTB152(void){ };\r
+void INT_Excep_PERIB_INTB152(void){ __asm volatile( "brk"); };\r
\r
//;0x0264 INTB153\r
-void INT_Excep_PERIB_INTB153(void){ };\r
+void INT_Excep_PERIB_INTB153(void){ __asm volatile( "brk"); };\r
\r
//;0x0268 INTB154\r
-void INT_Excep_PERIB_INTB154(void){ };\r
+void INT_Excep_PERIB_INTB154(void){ __asm volatile( "brk"); };\r
\r
//;0x026C INTB155\r
-void INT_Excep_PERIB_INTB155(void){ };\r
+void INT_Excep_PERIB_INTB155(void){ __asm volatile( "brk"); };\r
\r
//;0x0270 INTB156\r
-void INT_Excep_PERIB_INTB156(void){ };\r
+void INT_Excep_PERIB_INTB156(void){ __asm volatile( "brk"); };\r
\r
//;0x0274 INTB157\r
-void INT_Excep_PERIB_INTB157(void){ };\r
+void INT_Excep_PERIB_INTB157(void){ __asm volatile( "brk"); };\r
\r
//;0x0278 INTB158\r
-void INT_Excep_PERIB_INTB158(void){ };\r
+void INT_Excep_PERIB_INTB158(void){ __asm volatile( "brk"); };\r
\r
//;0x027C INTB159\r
-void INT_Excep_PERIB_INTB159(void){ };\r
+void INT_Excep_PERIB_INTB159(void){ __asm volatile( "brk"); };\r
\r
//;0x0280 INTB160\r
-void INT_Excep_PERIB_INTB160(void){ };\r
+void INT_Excep_PERIB_INTB160(void){ __asm volatile( "brk"); };\r
\r
//;0x0284 INTB161\r
-void INT_Excep_PERIB_INTB161(void){ };\r
+void INT_Excep_PERIB_INTB161(void){ __asm volatile( "brk"); };\r
\r
//;0x0288 INTB162\r
-void INT_Excep_PERIB_INTB162(void){ };\r
+void INT_Excep_PERIB_INTB162(void){ __asm volatile( "brk"); };\r
\r
//;0x028C INTB163\r
-void INT_Excep_PERIB_INTB163(void){ };\r
+void INT_Excep_PERIB_INTB163(void){ __asm volatile( "brk"); };\r
\r
//;0x0290 INTB164\r
-void INT_Excep_PERIB_INTB164(void){ };\r
+void INT_Excep_PERIB_INTB164(void){ __asm volatile( "brk"); };\r
\r
//;0x0294 PERIB INTB165\r
-void INT_Excep_PERIB_INTB165(void){ };\r
+void INT_Excep_PERIB_INTB165(void){ __asm volatile( "brk"); };\r
\r
//;0x0298 PERIB INTB166\r
-void INT_Excep_PERIB_INTB166(void){ };\r
+void INT_Excep_PERIB_INTB166(void){ __asm volatile( "brk"); };\r
\r
//;0x029C PERIB INTB167\r
-void INT_Excep_PERIB_INTB167(void){ };\r
+void INT_Excep_PERIB_INTB167(void){ __asm volatile( "brk"); };\r
\r
//;0x02A0 PERIB INTB168\r
-void INT_Excep_PERIB_INTB168(void){ };\r
+void INT_Excep_PERIB_INTB168(void){ __asm volatile( "brk"); };\r
\r
//;0x02A4 PERIB INTB169\r
-void INT_Excep_PERIB_INTB169(void){ };\r
+void INT_Excep_PERIB_INTB169(void){ __asm volatile( "brk"); };\r
\r
//;0x02A8 PERIB INTB170\r
-void INT_Excep_PERIB_INTB170(void){ };\r
+void INT_Excep_PERIB_INTB170(void){ __asm volatile( "brk"); };\r
\r
//;0x02AC PERIB INTB171\r
-void INT_Excep_PERIB_INTB171(void){ };\r
+void INT_Excep_PERIB_INTB171(void){ __asm volatile( "brk"); };\r
\r
//;0x02B0 PERIB INTB172\r
-void INT_Excep_PERIB_INTB172(void){ };\r
+void INT_Excep_PERIB_INTB172(void){ __asm volatile( "brk"); };\r
\r
//;0x02B4 PERIB INTB173\r
-void INT_Excep_PERIB_INTB173(void){ };\r
+void INT_Excep_PERIB_INTB173(void){ __asm volatile( "brk"); };\r
\r
//;0x02B8 PERIB INTB174\r
-void INT_Excep_PERIB_INTB174(void){ };\r
+void INT_Excep_PERIB_INTB174(void){ __asm volatile( "brk"); };\r
\r
//;0x02BC PERIB INTB175\r
-void INT_Excep_PERIB_INTB175(void){ };\r
+void INT_Excep_PERIB_INTB175(void){ __asm volatile( "brk"); };\r
\r
//;0x02C0 PERIB INTB176\r
-void INT_Excep_PERIB_INTB176(void){ };\r
+void INT_Excep_PERIB_INTB176(void){ __asm volatile( "brk"); };\r
\r
//;0x02C4 PERIB INTB177\r
-void INT_Excep_PERIB_INTB177(void){ };\r
+void INT_Excep_PERIB_INTB177(void){ __asm volatile( "brk"); };\r
\r
//;0x02C8 PERIB INTB178\r
-void INT_Excep_PERIB_INTB178(void){ };\r
+void INT_Excep_PERIB_INTB178(void){ __asm volatile( "brk"); };\r
\r
//;0x02CC PERIB INTB179\r
-void INT_Excep_PERIB_INTB179(void){ };\r
+void INT_Excep_PERIB_INTB179(void){ __asm volatile( "brk"); };\r
\r
//;0x02D0 PERIB INTB180\r
-void INT_Excep_PERIB_INTB180(void){ };\r
+void INT_Excep_PERIB_INTB180(void){ __asm volatile( "brk"); };\r
\r
//;0x02D4 PERIB INTB181\r
-void INT_Excep_PERIB_INTB181(void){ };\r
+void INT_Excep_PERIB_INTB181(void){ __asm volatile( "brk"); };\r
\r
//;0x02D8 PERIB INTB182\r
-void INT_Excep_PERIB_INTB182(void){ };\r
+void INT_Excep_PERIB_INTB182(void){ __asm volatile( "brk"); };\r
\r
//;0x02DC PERIB INTB183\r
-void INT_Excep_PERIB_INTB183(void){ };\r
+void INT_Excep_PERIB_INTB183(void){ __asm volatile( "brk"); };\r
\r
//;0x02E0 PERIB INTB184\r
-void INT_Excep_PERIB_INTB184(void){ };\r
+void INT_Excep_PERIB_INTB184(void){ __asm volatile( "brk"); };\r
\r
//;0x02E4 PERIB INTB185\r
-void INT_Excep_PERIB_INTB185(void){ };\r
+void INT_Excep_PERIB_INTB185(void){ __asm volatile( "brk"); };\r
\r
//;0x02E8 PERIB INTB186\r
-void INT_Excep_PERIB_INTB186(void){ };\r
+void INT_Excep_PERIB_INTB186(void){ __asm volatile( "brk"); };\r
\r
//;0x02EC PERIB INTB187\r
-void INT_Excep_PERIB_INTB187(void){ };\r
+void INT_Excep_PERIB_INTB187(void){ __asm volatile( "brk"); };\r
\r
//;0x02F0 PERIB INTB188\r
-void INT_Excep_PERIB_INTB188(void){ };\r
+void INT_Excep_PERIB_INTB188(void){ __asm volatile( "brk"); };\r
\r
//;0x02F4 PERIB INTB189\r
-void INT_Excep_PERIB_INTB189(void){ };\r
+void INT_Excep_PERIB_INTB189(void){ __asm volatile( "brk"); };\r
\r
//;0x02F8 PERIB INTB190\r
-void INT_Excep_PERIB_INTB190(void){ };\r
+void INT_Excep_PERIB_INTB190(void){ __asm volatile( "brk"); };\r
\r
//;0x02FC PERIB INTB191\r
-void INT_Excep_PERIB_INTB191(void){ };\r
+void INT_Excep_PERIB_INTB191(void){ __asm volatile( "brk"); };\r
\r
//;0x0300 PERIB INTB192\r
-void INT_Excep_PERIB_INTB192(void){ };\r
+void INT_Excep_PERIB_INTB192(void){ __asm volatile( "brk"); };\r
\r
//;0x0304 PERIB INTB193\r
-void INT_Excep_PERIB_INTB193(void){ };\r
+void INT_Excep_PERIB_INTB193(void){ __asm volatile( "brk"); };\r
\r
//;0x0308 PERIB INTB194\r
-void INT_Excep_PERIB_INTB194(void){ };\r
+void INT_Excep_PERIB_INTB194(void){ __asm volatile( "brk"); };\r
\r
//;0x030C PERIB INTB195\r
-void INT_Excep_PERIB_INTB195(void){ };\r
+void INT_Excep_PERIB_INTB195(void){ __asm volatile( "brk"); };\r
\r
//;0x0310 PERIB INTB196\r
-void INT_Excep_PERIB_INTB196(void){ };\r
+void INT_Excep_PERIB_INTB196(void){ __asm volatile( "brk"); };\r
\r
//;0x0314 PERIB INTB197\r
-void INT_Excep_PERIB_INTB197(void){ };\r
+void INT_Excep_PERIB_INTB197(void){ __asm volatile( "brk"); };\r
\r
//;0x0318 PERIB INTB198\r
-void INT_Excep_PERIB_INTB198(void){ };\r
+void INT_Excep_PERIB_INTB198(void){ __asm volatile( "brk"); };\r
\r
//;0x031C PERIB INTB199\r
-void INT_Excep_PERIB_INTB199(void){ };\r
+void INT_Excep_PERIB_INTB199(void){ __asm volatile( "brk"); };\r
\r
//;0x0320 PERIB INTB200\r
-void INT_Excep_PERIB_INTB200(void){ };\r
+void INT_Excep_PERIB_INTB200(void){ __asm volatile( "brk"); };\r
\r
//;0x0324 PERIB INTB201\r
-void INT_Excep_PERIB_INTB201(void){ };\r
+void INT_Excep_PERIB_INTB201(void){ __asm volatile( "brk"); };\r
\r
//;0x0328 PERIB INTB202\r
-void INT_Excep_PERIB_INTB202(void){ };\r
+void INT_Excep_PERIB_INTB202(void){ __asm volatile( "brk"); };\r
\r
//;0x032C PERIB INTB203\r
-void INT_Excep_PERIB_INTB203(void){ };\r
+void INT_Excep_PERIB_INTB203(void){ __asm volatile( "brk"); };\r
\r
//;0x0320 PERIB INTB204\r
-void INT_Excep_PERIB_INTB204(void){ };\r
+void INT_Excep_PERIB_INTB204(void){ __asm volatile( "brk"); };\r
\r
//;0x0334 PERIB INTB205\r
-void INT_Excep_PERIB_INTB205(void){ };\r
+void INT_Excep_PERIB_INTB205(void){ __asm volatile( "brk"); };\r
\r
//;0x0338 PERIB INTB206\r
-void INT_Excep_PERIB_INTB206(void){ };\r
+void INT_Excep_PERIB_INTB206(void){ __asm volatile( "brk"); };\r
\r
//;0x033C PERIB INTB207\r
-void INT_Excep_PERIB_INTB207(void){ };\r
+void INT_Excep_PERIB_INTB207(void){ __asm volatile( "brk"); };\r
\r
//;0x0340 PERIA INTA208\r
-void INT_Excep_PERIA_INTA208(void){ };\r
+void INT_Excep_PERIA_INTA208(void){ __asm volatile( "brk"); };\r
\r
//;0x0344 PERIA INTA209\r
-void INT_Excep_PERIA_INTA209(void){ };\r
+void INT_Excep_PERIA_INTA209(void){ __asm volatile( "brk"); };\r
\r
//;0x0348 PERIA INTA210\r
-void INT_Excep_PERIA_INTA210(void){ };\r
+void INT_Excep_PERIA_INTA210(void){ __asm volatile( "brk"); };\r
\r
//;0x034C PERIA INTA211\r
-void INT_Excep_PERIA_INTA211(void){ };\r
+void INT_Excep_PERIA_INTA211(void){ __asm volatile( "brk"); };\r
\r
//;0x0350 PERIA INTA212\r
-void INT_Excep_PERIA_INTA212(void){ };\r
+void INT_Excep_PERIA_INTA212(void){ __asm volatile( "brk"); };\r
\r
//;0x0354 PERIA INTA213\r
-void INT_Excep_PERIA_INTA213(void){ };\r
+void INT_Excep_PERIA_INTA213(void){ __asm volatile( "brk"); };\r
\r
//;0x0358 PERIA INTA214\r
-void INT_Excep_PERIA_INTA214(void){ };\r
+void INT_Excep_PERIA_INTA214(void){ __asm volatile( "brk"); };\r
\r
//;0x035C PERIA INTA215\r
-void INT_Excep_PERIA_INTA215(void){ };\r
+void INT_Excep_PERIA_INTA215(void){ __asm volatile( "brk"); };\r
\r
//;0x0360 PERIA INTA216\r
-void INT_Excep_PERIA_INTA216(void){ };\r
+void INT_Excep_PERIA_INTA216(void){ __asm volatile( "brk"); };\r
\r
//;0x0364 PERIA INTA217\r
-void INT_Excep_PERIA_INTA217(void){ };\r
+void INT_Excep_PERIA_INTA217(void){ __asm volatile( "brk"); };\r
\r
//;0x0368 PERIA INTA218\r
-void INT_Excep_PERIA_INTA218(void){ };\r
+void INT_Excep_PERIA_INTA218(void){ __asm volatile( "brk"); };\r
\r
//;0x036C PERIA INTA219\r
-void INT_Excep_PERIA_INTA219(void){ };\r
+void INT_Excep_PERIA_INTA219(void){ __asm volatile( "brk"); };\r
\r
//;0x0370 PERIA INTA220\r
-void INT_Excep_PERIA_INTA220(void){ };\r
+void INT_Excep_PERIA_INTA220(void){ __asm volatile( "brk"); };\r
\r
//;0x0374 PERIA INTA221\r
-void INT_Excep_PERIA_INTA221(void){ };\r
+void INT_Excep_PERIA_INTA221(void){ __asm volatile( "brk"); };\r
\r
//;0x0378 PERIA INTA222\r
-void INT_Excep_PERIA_INTA222(void){ };\r
+void INT_Excep_PERIA_INTA222(void){ __asm volatile( "brk"); };\r
\r
//;0x037C PERIA INTA223\r
-void INT_Excep_PERIA_INTA223(void){ };\r
+void INT_Excep_PERIA_INTA223(void){ __asm volatile( "brk"); };\r
\r
//;0x0380 PERIA INTA224\r
-void INT_Excep_PERIA_INTA224(void){ };\r
+void INT_Excep_PERIA_INTA224(void){ __asm volatile( "brk"); };\r
\r
//;0x0384 PERIA INTA225\r
-void INT_Excep_PERIA_INTA225(void){ };\r
+void INT_Excep_PERIA_INTA225(void){ __asm volatile( "brk"); };\r
\r
//;0x0388 PERIA INTA226\r
-void INT_Excep_PERIA_INTA226(void){ };\r
+void INT_Excep_PERIA_INTA226(void){ __asm volatile( "brk"); };\r
\r
//;0x038C PERIA INTA227\r
-void INT_Excep_PERIA_INTA227(void){ };\r
+void INT_Excep_PERIA_INTA227(void){ __asm volatile( "brk"); };\r
\r
//;0x0390 PERIA INTA228\r
-void INT_Excep_PERIA_INTA228(void){ };\r
+void INT_Excep_PERIA_INTA228(void){ __asm volatile( "brk"); };\r
\r
//;0x0394 PERIA INTA229\r
-void INT_Excep_PERIA_INTA229(void){ };\r
+void INT_Excep_PERIA_INTA229(void){ __asm volatile( "brk"); };\r
\r
//;0x0398 PERIA INTA230\r
-void INT_Excep_PERIA_INTA230(void){ };\r
+void INT_Excep_PERIA_INTA230(void){ __asm volatile( "brk"); };\r
\r
//;0x039C PERIA INTA231\r
-void INT_Excep_PERIA_INTA231(void){ };\r
+void INT_Excep_PERIA_INTA231(void){ __asm volatile( "brk"); };\r
\r
//;0x03A0 PERIA INTA232\r
-void INT_Excep_PERIA_INTA232(void){ };\r
+void INT_Excep_PERIA_INTA232(void){ __asm volatile( "brk"); };\r
\r
//;0x03A4 PERIA INTA233\r
-void INT_Excep_PERIA_INTA233(void){ };\r
+void INT_Excep_PERIA_INTA233(void){ __asm volatile( "brk"); };\r
\r
//;0x03A8 PERIA INTA234\r
-void INT_Excep_PERIA_INTA234(void){ };\r
+void INT_Excep_PERIA_INTA234(void){ __asm volatile( "brk"); };\r
\r
//;0x03AC PERIA INTA235\r
-void INT_Excep_PERIA_INTA235(void){ };\r
+void INT_Excep_PERIA_INTA235(void){ __asm volatile( "brk"); };\r
\r
//;0x03B0 PERIA INTA236\r
-void INT_Excep_PERIA_INTA236(void){ };\r
+void INT_Excep_PERIA_INTA236(void){ __asm volatile( "brk"); };\r
\r
//;0x04B4 PERIA INTA237\r
-void INT_Excep_PERIA_INTA237(void){ };\r
+void INT_Excep_PERIA_INTA237(void){ __asm volatile( "brk"); };\r
\r
//;0x03B8 PERIA INTA238\r
-void INT_Excep_PERIA_INTA238(void){ };\r
+void INT_Excep_PERIA_INTA238(void){ __asm volatile( "brk"); };\r
\r
//;0x03BC PERIA INTA239\r
-void INT_Excep_PERIA_INTA239(void){ };\r
+void INT_Excep_PERIA_INTA239(void){ __asm volatile( "brk"); };\r
\r
//;0x03C0 PERIA INTA240\r
-void INT_Excep_PERIA_INTA240(void){ };\r
+void INT_Excep_PERIA_INTA240(void){ __asm volatile( "brk"); };\r
\r
//;0x03C4 PERIA INTA241\r
-void INT_Excep_PERIA_INTA241(void){ };\r
+void INT_Excep_PERIA_INTA241(void){ __asm volatile( "brk"); };\r
\r
//;0x03C8 PERIA INTA242\r
-void INT_Excep_PERIA_INTA242(void){ };\r
+void INT_Excep_PERIA_INTA242(void){ __asm volatile( "brk"); };\r
\r
//;0x03CC PERIA INTA243\r
-void INT_Excep_PERIA_INTA243(void){ };\r
+void INT_Excep_PERIA_INTA243(void){ __asm volatile( "brk"); };\r
\r
//;0x03D0 PERIA INTA244\r
-void INT_Excep_PERIA_INTA244(void){ };\r
+void INT_Excep_PERIA_INTA244(void){ __asm volatile( "brk"); };\r
\r
//;0x03D4 PERIA INTA245\r
-void INT_Excep_PERIA_INTA245(void){ };\r
+void INT_Excep_PERIA_INTA245(void){ __asm volatile( "brk"); };\r
\r
//;0x03D8 PERIA INTA246\r
-void INT_Excep_PERIA_INTA246(void){ };\r
+void INT_Excep_PERIA_INTA246(void){ __asm volatile( "brk"); };\r
\r
//;0x03DC PERIA INTA247\r
-void INT_Excep_PERIA_INTA247(void){ };\r
+void INT_Excep_PERIA_INTA247(void){ __asm volatile( "brk"); };\r
\r
//;0x03E0 PERIA INTA248\r
-void INT_Excep_PERIA_INTA248(void){ };\r
+void INT_Excep_PERIA_INTA248(void){ __asm volatile( "brk"); };\r
\r
//;0x03E4 PERIA INTA249\r
-void INT_Excep_PERIA_INTA249(void){ };\r
+void INT_Excep_PERIA_INTA249(void){ __asm volatile( "brk"); };\r
\r
//;0x03E8 PERIA INTA250\r
-void INT_Excep_PERIA_INTA250(void){ };\r
+void INT_Excep_PERIA_INTA250(void){ __asm volatile( "brk"); };\r
\r
//;0x03EC PERIA INTA251\r
-void INT_Excep_PERIA_INTA251(void){ };\r
+void INT_Excep_PERIA_INTA251(void){ __asm volatile( "brk"); };\r
\r
//;0x03F0 PERIA INTA252\r
-void INT_Excep_PERIA_INTA252(void){ };\r
+void INT_Excep_PERIA_INTA252(void){ __asm volatile( "brk"); };\r
\r
//;0x03F4 PERIA INTA253\r
-void INT_Excep_PERIA_INTA253(void){ };\r
+void INT_Excep_PERIA_INTA253(void){ __asm volatile( "brk"); };\r
\r
//;0x03F8 PERIA INTA254\r
-void INT_Excep_PERIA_INTA254(void){ };\r
+void INT_Excep_PERIA_INTA254(void){ __asm volatile( "brk"); };\r
\r
//;0x03FC PERIA INTA255\r
-void INT_Excep_PERIA_INTA255(void){ };\r
+void INT_Excep_PERIA_INTA255(void){ __asm volatile( "brk"); };\r
\r
/* change PSW PM to user-mode */\r
MVFC PSW,R1\r
- OR #00100000h,R1\r
+/* DON'T CHANGE TO USER MODE OR #00100000h,R1 */\r
PUSH.L R1\r
MVFC PC,R1\r
ADD #10,R1\r
--- /dev/null
+/*******************************************************************************\r
+* DISCLAIMER\r
+* This software is supplied by Renesas Electronics Corporation and is only \r
+* intended for use with Renesas products. No other uses are authorized. This \r
+* software is owned by Renesas Electronics Corporation and is protected under\r
+* all applicable laws, including copyright laws.\r
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING\r
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT\r
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE \r
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.\r
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS \r
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE \r
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR\r
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE\r
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.\r
+* Renesas reserves the right, without notice, to make changes to this software\r
+* and to discontinue the availability of this software. By using this software,\r
+* you agree to the additional terms and conditions found by accessing the \r
+* following link:\r
+* http://www.renesas.com/disclaimer\r
+*******************************************************************************/\r
+/*******************************************************************************\r
+* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved. */\r
+/*******************************************************************************\r
+* File Name : rskrx64mdef.h\r
+* Version : 1.00\r
+* Device : R5F564ML\r
+* Tool-Chain : Renesas RX Standard 2.01.0\r
+* H/W Platform : RSK+RX64M\r
+* Description : Defines macros relating to the RX64M user LEDs and switches\r
+*******************************************************************************/\r
+/*******************************************************************************\r
+* History : 20 Mar. 2014 Ver. 0.00 Alpha Release\r
+*******************************************************************************/\r
+\r
+/*******************************************************************************\r
+* Macro Definitions\r
+*******************************************************************************/\r
+/* Multiple inclusion prevention macro */\r
+#ifndef RSKRX64MDEF_H\r
+#define RSKRX64MDEF_H\r
+\r
+/*******************************************************************************\r
+* User Includes (Project Level Includes)\r
+*******************************************************************************/\r
+\r
+/* General Values */\r
+#define LED_ON (0)\r
+#define LED_OFF (1)\r
+#define SET_BIT_HIGH (1)\r
+#define SET_BIT_LOW (0)\r
+#define SET_BYTE_HIGH (0xFF)\r
+#define SET_BYTE_LOW (0x00)\r
+#define OUTPUT_PIN (1)\r
+#define INPUT_PIN (0)\r
+\r
+/* Switch port pins data direction */\r
+#define SW1_PIN_DIR (PORT1.PDR.BIT.B5)\r
+#define SW2_PIN_DIR (PORT1.PDR.BIT.B2)\r
+#define SW3_PIN_DIR (PORT0.PDR.BIT.B7)\r
+\r
+/* Switches */\r
+#define SW1 (PORT1.PIDR.BIT.B5)\r
+#define SW2 (PORT1.PIDR.BIT.B2)\r
+#define SW3 (PORT0.PIDR.BIT.B7)\r
+\r
+/* LED data direction */\r
+#define LED0_PIN_DIR (PORT0.PDR.BIT.B3)\r
+#define LED1_PIN_DIR (PORT0.PDR.BIT.B5)\r
+#define LED2_PIN_DIR (PORT2.PDR.BIT.B6)\r
+#define LED3_PIN_DIR (PORT2.PDR.BIT.B7)\r
+\r
+/* LED ouptut pin settings */\r
+#define LED0 (PORT0.PODR.BIT.B3)\r
+#define LED1 (PORT0.PODR.BIT.B5)\r
+#define LED2 (PORT2.PODR.BIT.B6)\r
+#define LED3 (PORT2.PODR.BIT.B7)\r
+\r
+/* End of multiple inclusion prevention macro */\r
+#endif\r
\r
typedef void (*fp) (void);\r
extern void PowerON_Reset (void);\r
-extern void stack (void);\r
+extern void stack (void);
+extern void vTickISR( void );
+extern void vSoftwareInterruptISR( void );
+extern void vIntQTimerISR0( void );
+extern void vIntQTimerISR1( void );\r
\r
#define FVECT_SECT __attribute__ ((section (".fvectors")))\r
\r
\r
const fp RelocatableVectors[] RVECT_SECT = {\r
//;0x0000 Reserved\r
- \r
+ (fp)0,\r
//;0x0004 Reserved\r
- \r
+ (fp)0,\r
//;0x0008 Reserved\r
- \r
+ (fp)0,\r
//;0x000C Reserved\r
- \r
+ (fp)0,\r
//;0x0010 Reserved\r
- \r
+ (fp)0,\r
//;0x0014 Reserved\r
- \r
+ (fp)0,\r
//;0x0018 Reserved\r
- \r
+ (fp)0,\r
//;0x001C Reserved\r
- \r
+ (fp)0,\r
//;0x0020 Reserved\r
- \r
+ (fp)0,\r
//;0x0024 Reserved\r
- \r
+ (fp)0,\r
//;0x0028 Reserved\r
- \r
+ (fp)0,\r
//;0x002C Reserved\r
- \r
+ (fp)0,\r
//;0x0030 Reserved\r
- \r
+ (fp)0,\r
//;0x0034 Reserved\r
- \r
+ (fp)0,\r
//;0x0038 Reserved\r
- \r
+ (fp)0,\r
//;0x003C Reserved\r
-\r
+ (fp)0,\r
//;0x0040 BUSERR\r
(fp)INT_Excep_BSC_BUSERR,\r
//;0x0044 Reserved\r
-\r
+ (fp)0,\r
//;0x0048 RAMERR\r
(fp)INT_Excep_RAM_RAMERR,\r
//;0x004C Reserved\r
-\r
+ (fp)0,\r
//;0x0050 Reserved\r
-\r
+ (fp)0,\r
//;0x0054 FIFERR\r
(fp)INT_Excep_FCU_FIFERR,\r
//;0x0058 Reserved\r
-\r
+ (fp)0,\r
//;0x005C FRDYI\r
(fp)INT_Excep_FCU_FRDYI,\r
//;0x0060 Reserved\r
-\r
+ (fp)0,\r
//;0x0064 Reserved\r
-\r
+ (fp)0,\r
//;0x0068 SWINT2\r
(fp)INT_Excep_ICU_SWINT2,\r
\r
//;0x006C SWINT\r
- (fp)INT_Excep_ICU_SWINT,\r
+ (fp)vSoftwareInterruptISR,\r
\r
//;0x0070 CMI0\r
- (fp)INT_Excep_CMT0_CMI0,\r
+ (fp)vTickISR,\r
\r
//;0x0074 CMI1\r
(fp)INT_Excep_CMT1_CMI1,\r
//;0x008C D1FIFO0\r
(fp)INT_Excep_USB0_D1FIFO0,\r
//;0x0090 Reserved\r
-\r
+ (fp)0,\r
//;0x0094 Reserved\r
-\r
+ (fp)0,\r
//;0x0098 SPRI0\r
(fp)INT_Excep_RSPI0_SPRI0,\r
\r
//;0x009C SPTI0\r
(fp)INT_Excep_RSPI0_SPTI0,\r
//;0x00A0 Reserved\r
-\r
+ (fp)0,\r
//;0x00A4 Reserved\r
-\r
+ (fp)0,\r
//;0x00A8 SPRI\r
(fp)INT_Excep_QSPI_SPRI,\r
\r
//;0x00C0 SSIRTI1\r
(fp)INT_Excep_SSI1_SSIRTI1,\r
//;0x00C4 Reserved\r
-\r
+ (fp)0,\r
//;0x00C8 IDEI\r
(fp)INT_Excep_SRC_IDEI,\r
\r
//;0x00DC TXI2\r
(fp)INT_Excep_RIIC2_TXI2,\r
//;0x00E0 Reserved\r
-\r
+ (fp)0,\r
//;0x00E4 Reserved\r
-\r
+ (fp)0,\r
//;0x00E8 RXI0\r
(fp)INT_Excep_SCI0_RXI0,\r
\r
//;0x0168 USBR0\r
(fp)INT_Excep_USB_USBR0,\r
//;0x016C Reserved\r
-\r
+ (fp)0,\r
//;0x0170 ALM\r
(fp)INT_Excep_RTC_ALM,\r
\r
//;0x01A8 GROUPBE0\r
(fp)INT_Excep_ICU_GROUPBE0,\r
//;0x01AC Reserved \r
-\r
+ (fp)0,\r
//;0x01B0 Reserved \r
-\r
+ (fp)0,\r
//;0x01B4 Reserved \r
-\r
+ (fp)0,\r
//;0x01B8 GROUPBL0\r
(fp)INT_Excep_ICU_GROUPBL0,\r
\r
(fp)INT_Excep_SCIF12_TXIF12,\r
\r
//;0x01D8 Reserved\r
-\r
+ (fp)0,\r
//;0x01DC Reserved\r
-\r
+ (fp)0,\r
//;0x01E0 DMAC0I\r
(fp)INT_Excep_DMAC_DMAC0I,\r
\r
(fp)INT_Excep_EXDMAC_EXDMAC1I,\r
\r
//;0x0200 INTB128\r
- (fp)INT_Excep_PERIB_INTB128,\r
+ (fp)vIntQTimerISR0,\r
\r
//;0x0204 INTB129\r
- (fp)INT_Excep_PERIB_INTB129,\r
+ (fp)vIntQTimerISR1,\r
\r
//;0x0208 INTB130\r
(fp)INT_Excep_PERIB_INTB130,\r
#include "QueueOverwrite.h"\r
#include "EventGroupsDemo.h"\r
\r
-/* Renesas includes. */\r
-#include "iodefine.h"\r
-\r
/* Set option bytes */\r
#pragma address OFS0_location = 0xFFFFFF8CUL\r
#pragma address OFS1_location = 0xFFFFFF88UL\r
\r
static void prvSetupHardware( void )\r
{\r
+ /* Set up the ports used by the LED outputs (the name ParTest is now\r
+ obsolete - it originally came from "parallel port test"). */\r
+ vParTestInitialise();\r
}\r
/*-----------------------------------------------------------*/\r
\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the comprehensive test and demo version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * full demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ *\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates all the demo application tasks and software timers, then\r
+ * starts the scheduler. The web documentation provides more details of the\r
+ * standard demo application tasks, which provide no particular functionality,\r
+ * but do provide a good example of how to use the FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Reg test" tasks - These fill the core registers with known values, then\r
+ * check that each register maintains its expected value for the lifetime of the\r
+ * task. Each task uses a different set of values. The reg test tasks execute\r
+ * with a very low priority, so get preempted very frequently. A register\r
+ * containing an unexpected value is indicative of an error in the context\r
+ * switching mechanism.\r
+ *\r
+ * "Check" task - The check task period is initially set to three seconds. The\r
+ * task checks that all the standard demo tasks, and the register check tasks,\r
+ * are not only still executing, but are executing without reporting any errors.\r
+ * If the check task discovers that a task has either stalled, or reported an\r
+ * error, then it changes its own execution period from the initial three\r
+ * seconds, to just 200ms. The check task also toggles an LED each time it is\r
+ * called. This provides a visual indication of the system status: If the LED\r
+ * toggles every three seconds, then no issues have been discovered. If the LED\r
+ * toggles every 200ms, then an issue has been discovered with at least one\r
+ * task.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "timers.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo application includes. */\r
+#include "flop.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "death.h"\r
+#include "partest.h"\r
+#include "comtest2.h"\r
+#include "serial.h"\r
+#include "TimerDemo.h"\r
+#include "QueueOverwrite.h"\r
+#include "IntQueue.h"\r
+#include "EventGroupsDemo.h"\r
+#include "flash.h"\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL )\r
+#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )\r
+#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )\r
+#define mainFLASH_PRIORITY ( tskIDLE_PRIORITY )\r
+\r
+/* The priority used by the UART command console task. */\r
+#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\r
+\r
+/* The LED used by the check timer. */\r
+#define mainCHECK_LED ( 3 )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK ( 0UL )\r
+\r
+/* The period after which the check timer will expire, in ms, provided no errors\r
+have been reported by any of the standard demo tasks. ms are converted to the\r
+equivalent in ticks using the portTICK_PERIOD_MS constant. */\r
+#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS )\r
+\r
+/* The period at which the check timer will expire, in ms, if an error has been\r
+reported in one of the standard demo tasks. ms are converted to the equivalent\r
+in ticks using the portTICK_PERIOD_MS constant. */\r
+#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS )\r
+\r
+/* Parameters that are passed into the register check tasks solely for the\r
+purpose of ensuring parameters are passed into tasks correctly. */\r
+#define mainREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x12345678 )\r
+#define mainREG_TEST_TASK_2_PARAMETER ( ( void * ) 0x87654321 )\r
+\r
+/* The base period used by the timer test tasks. */\r
+#define mainTIMER_TEST_PERIOD ( 50 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Called by main() to run the full demo (as opposed to the blinky demo) when\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.\r
+ */\r
+void main_full( void );\r
+\r
+/*\r
+ * The check task, as described at the top of this file.\r
+ */\r
+static void prvCheckTask( void *pvParameters );\r
+\r
+/*\r
+ * Register check tasks, and the tasks used to write over and check the contents\r
+ * of the FPU registers, as described at the top of this file. The nature of\r
+ * these files necessitates that they are written in an assembly file, but the\r
+ * entry points are kept in the C file for the convenience of checking the task\r
+ * parameter.\r
+ */\r
+static void prvRegTestTaskEntry1( void *pvParameters );\r
+extern void vRegTest1Implementation( void );\r
+static void prvRegTestTaskEntry2( void *pvParameters );\r
+extern void vRegTest2Implementation( void );\r
+\r
+/*\r
+ * Register commands that can be used with FreeRTOS+CLI. The commands are\r
+ * defined in CLI-Commands.c and File-Related-CLI-Command.c respectively.\r
+ */\r
+extern void vRegisterSampleCLICommands( void );\r
+\r
+/*\r
+ * The task that manages the FreeRTOS+CLI input and output.\r
+ */\r
+extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );\r
+\r
+/*\r
+ * A high priority task that does nothing other than execute at a pseudo random\r
+ * time to ensure the other test tasks don't just execute in a repeating\r
+ * pattern.\r
+ */\r
+static void prvPseudoRandomiser( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The following two variables are used to communicate the status of the\r
+register check tasks to the check task. If the variables keep incrementing,\r
+then the register check tasks has not discovered any errors. If a variable\r
+stops incrementing, then an error has been found. */\r
+volatile uint32_t ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+ /* Start all the other standard demo/test tasks. They have not particular\r
+ functionality, but do demonstrate how to use the FreeRTOS API and test the\r
+ kernel port. */\r
+ vStartInterruptQueueTasks();\r
+ vStartDynamicPriorityTasks();\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vCreateBlockTimeTasks();\r
+ vStartCountingSemaphoreTasks();\r
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+ vStartRecursiveMutexTasks();\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
+ vStartTimerDemoTask( mainTIMER_TEST_PERIOD );\r
+ vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY );\r
+ vStartEventGroupTasks();\r
+ vStartLEDFlashTasks( mainFLASH_PRIORITY );\r
+\r
+ /* Create the register check tasks, as described at the top of this file */\r
+ xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL );\r
+\r
+ /* Create the task that just adds a little random behaviour. */\r
+ xTaskCreate( prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );\r
+\r
+ /* Create the task that performs the 'check' functionality, as described at\r
+ the top of this file. */\r
+ xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
+\r
+ /* The set of tasks created by the following function call have to be\r
+ created last as they keep account of the number of tasks they expect to see\r
+ running. */\r
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+\r
+ /* If all is well, the scheduler will now be running, and the following\r
+ line will never be reached. If the following line does execute, then\r
+ there was either insufficient FreeRTOS heap memory available for the idle\r
+ and/or timer tasks to be created, or vTaskStartScheduler() was called from\r
+ User mode. See the memory management section on the FreeRTOS web site for\r
+ more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The\r
+ mode from which main() is called is set in the C start up code and must be\r
+ a privileged mode (not user mode). */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTask( void *pvParameters )\r
+{\r
+TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;\r
+TickType_t xLastExecutionTime;\r
+static uint32_t ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
+uint32_t ulErrorFound = pdFALSE;\r
+\r
+ /* Just to stop compiler warnings. */\r
+ ( void ) pvParameters;\r
+\r
+ /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()\r
+ works correctly. */\r
+ xLastExecutionTime = xTaskGetTickCount();\r
+\r
+ /* Cycle for ever, delaying then checking all the other tasks are still\r
+ operating without error. The onboard LED is toggled on each iteration.\r
+ If an error is detected then the delay period is decreased from\r
+ mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the\r
+ effect of increasing the rate at which the onboard LED toggles, and in so\r
+ doing gives visual feedback of the system status. */\r
+ for( ;; )\r
+ {\r
+ /* Delay until it is time to execute again. */\r
+ vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );\r
+\r
+ /* Check all the demo tasks (other than the flash tasks) to ensure\r
+ that they are all still running, and that none have detected an error. */\r
+ if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xIsQueueOverwriteTaskStillRunning() != pdPASS )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreEventGroupTasksStillRunning() != pdPASS )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ /* Check that the register test 1 task is still running. */\r
+ if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest1Value = ulRegTest1LoopCounter;\r
+\r
+ /* Check that the register test 2 task is still running. */\r
+ if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest2Value = ulRegTest2LoopCounter;\r
+\r
+ /* Toggle the check LED to give an indication of the system status. If\r
+ the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then\r
+ everything is ok. A faster toggle indicates an error. */\r
+ vParTestToggleLED( mainCHECK_LED );\r
+\r
+ if( ulErrorFound != pdFALSE )\r
+ {\r
+ /* An error has been detected in one of the tasks - flash the LED\r
+ at a higher frequency to give visible feedback that something has\r
+ gone wrong (it might just be that the loop back connector required\r
+ by the comtest tasks has not been fitted). */\r
+ xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTestTaskEntry1( void *pvParameters )\r
+{\r
+ /* Although the regtest task is written in assembler, its entry point is\r
+ written in C for convenience of checking the task parameter is being passed\r
+ in correctly. */\r
+ if( pvParameters == mainREG_TEST_TASK_1_PARAMETER )\r
+ {\r
+ /* Start the part of the test that is written in assembler. */\r
+ vRegTest1Implementation();\r
+ }\r
+\r
+ /* The following line will only execute if the task parameter is found to\r
+ be incorrect. The check timer will detect that the regtest loop counter is\r
+ not being incremented and flag an error. */\r
+ vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTestTaskEntry2( void *pvParameters )\r
+{\r
+ /* Although the regtest task is written in assembler, its entry point is\r
+ written in C for convenience of checking the task parameter is being passed\r
+ in correctly. */\r
+ if( pvParameters == mainREG_TEST_TASK_2_PARAMETER )\r
+ {\r
+ /* Start the part of the test that is written in assembler. */\r
+ vRegTest2Implementation();\r
+ }\r
+\r
+ /* The following line will only execute if the task parameter is found to\r
+ be incorrect. The check timer will detect that the regtest loop counter is\r
+ not being incremented and flag an error. */\r
+ vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvPseudoRandomiser( void *pvParameters )\r
+{\r
+const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS );\r
+volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue;\r
+\r
+ /* This task does nothing other than ensure there is a little bit of\r
+ disruption in the scheduling pattern of the other tasks. Normally this is\r
+ done by generating interrupts at pseudo random times. */\r
+ for( ;; )\r
+ {\r
+ ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement;\r
+ ulValue = ( ulNextRand >> 16UL ) & 0xffUL;\r
+\r
+ if( ulValue < ulMinDelay )\r
+ {\r
+ ulValue = ulMinDelay;\r
+ }\r
+\r
+ vTaskDelay( ulValue );\r
+\r
+ while( ulValue > 0 )\r
+ {\r
+ __asm volatile( "NOP" );\r
+ __asm volatile( "NOP" );\r
+ __asm volatile( "NOP" );\r
+\r
+ ulValue--;\r
+ }\r
+ }\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
#ifndef FREERTOS_CONFIG_H\r
#define FREERTOS_CONFIG_H\r
\r
+/* Hardware specifics. */\r
+#include "r_cg_iodefine.h"\r
+\r
/* Prevent Renesas headers redefining some stdint.h types. */\r
#define __TYPEDEF__ 1\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-#pragma interrupt ( Excep_PERIB_INTB128( vect = 128 ) )\r
+#pragma interrupt ( Excep_PERIB_INTB128( vect = 128, enable ) )\r
void Excep_PERIB_INTB128( void )\r
{\r
portYIELD_FROM_ISR( xFirstTimerHandler() );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-#pragma interrupt ( Excep_PERIB_INTB129( vect = 129 ) )\r
+#pragma interrupt ( Excep_PERIB_INTB129( vect = 129, enable ) )\r
void Excep_PERIB_INTB129( void )\r
{\r
portYIELD_FROM_ISR( xSecondTimerHandler() );\r
void vApplicationTickHook( void );\r
\r
/*-----------------------------------------------------------*/\r
-\r
+uint32_t ul1, ul2;\r
int main( void )\r
{\r
/* Configure the hardware ready to run the demo. */\r
projects / freertos / commitdiff