--- /dev/null
+/*\r
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *\r
+ * See http://www.freertos.org/a00110.html.\r
+ *----------------------------------------------------------*/\r
+\r
+/* The MPU version of port.c includes and excludes functions depending on the\r
+settings within this file. Therefore, to ensure all the functions in port.c\r
+build, this configuration file has all options turned on. */\r
+\r
+#define configUSE_PREEMPTION 1\r
+#define configTICK_RATE_HZ ( 1000 )\r
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#define configUSE_QUEUE_SETS 1\r
+#define configUSE_IDLE_HOOK 1\r
+#define configUSE_TICK_HOOK 1\r
+#define configCPU_CLOCK_HZ 48000000\r
+#define configMAX_PRIORITIES ( 5 )\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 120 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 16 * 1024 ) )\r
+#define configMAX_TASK_NAME_LEN ( 10 )\r
+#define configUSE_TRACE_FACILITY 1\r
+#define configUSE_16_BIT_TICKS 0\r
+#define configIDLE_SHOULD_YIELD 1\r
+#define configUSE_MUTEXES 1\r
+#define configQUEUE_REGISTRY_SIZE 5\r
+#define configCHECK_FOR_STACK_OVERFLOW 2\r
+#define configUSE_RECURSIVE_MUTEXES 1\r
+#define configUSE_MALLOC_FAILED_HOOK 1\r
+#define configUSE_APPLICATION_TASK_TAG 1\r
+#define configUSE_COUNTING_SEMAPHORES 1\r
+#define configUSE_TICKLESS_IDLE 0\r
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 2\r
+\r
+/* This demo shows the MPU being used without any dynamic memory allocation. */\r
+#define configSUPPORT_STATIC_ALLOCATION 1\r
+#define configSUPPORT_DYNAMIC_ALLOCATION 0\r
+\r
+/* Run time stats gathering definitions. */\r
+#define configGENERATE_RUN_TIME_STATS 1\r
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\r
+#define portGET_RUN_TIME_COUNTER_VALUE() 0\r
+\r
+/* This demo makes use of one or more example stats formatting functions. These\r
+format the raw data provided by the uxTaskGetSystemState() function in to human\r
+readable ASCII form. See the notes in the implementation of vTaskList() within\r
+FreeRTOS/Source/tasks.c for limitations. */\r
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES 0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Software timer definitions. */\r
+#define configUSE_TIMERS 1\r
+#define configTIMER_TASK_PRIORITY ( 2 )\r
+#define configTIMER_QUEUE_LENGTH 5\r
+#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+#define INCLUDE_vTaskPrioritySet 1\r
+#define INCLUDE_uxTaskPriorityGet 1\r
+#define INCLUDE_vTaskDelete 1\r
+#define INCLUDE_vTaskCleanUpResources 1\r
+#define INCLUDE_vTaskSuspend 1\r
+#define INCLUDE_vTaskDelayUntil 1\r
+#define INCLUDE_vTaskDelay 1\r
+#define INCLUDE_eTaskGetState 1\r
+#define INCLUDE_xTimerPendFunctionCall 0\r
+#define INCLUDE_xSemaphoreGetMutexHolder 1\r
+#define INCLUDE_xTaskGetHandle 1\r
+#define INCLUDE_xTaskGetCurrentTaskHandle 1\r
+#define INCLUDE_xTaskGetIdleTaskHandle 1\r
+#define INCLUDE_xTaskAbortDelay 1\r
+#define INCLUDE_xTaskGetSchedulerState 1\r
+#define INCLUDE_xTaskGetIdleTaskHandle 1\r
+#define INCLUDE_uxTaskGetStackHighWaterMark 1\r
+\r
+/* Cortex-M specific definitions. */\r
+#ifdef __NVIC_PRIO_BITS\r
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */\r
+ #define configPRIO_BITS __NVIC_PRIO_BITS\r
+#else\r
+ #define configPRIO_BITS 4 /* 15 priority levels */\r
+#endif\r
+\r
+/* The lowest interrupt priority that can be used in a call to a "set priority"\r
+function. */\r
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0xf\r
+\r
+/* The highest interrupt priority that can be used by any interrupt service\r
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL\r
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER\r
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */\r
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5\r
+\r
+/* Interrupt priorities used by the kernel port layer itself. These are generic\r
+to all Cortex-M ports, and do not rely on any particular library functions. */\r
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )\r
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!\r
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */\r
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )\r
+\r
+\r
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS\r
+standard names. */\r
+#define xPortPendSVHandler PendSV_Handler\r
+#define vPortSVCHandler SVC_Handler\r
+#define xPortSysTickHandler SysTick_Handler\r
+\r
+/* Normal assert() semantics without relying on the provision of an assert.h\r
+header file. */\r
+#define configASSERT( x ) if( ( x ) == 0UL ) { taskDISABLE_INTERRUPTS(); for( ;; ); }\r
+\r
+/* LED not used at present, so just increment a variable to keep a count of the\r
+number of times the LED would otherwise have been toggled. */\r
+#define configTOGGLE_LED() ulLED++\r
+\r
+/* Definitions for the messages that can be sent to the check task. */\r
+#define configREG_TEST_1_STILL_EXECUTING ( 0 )\r
+#define configREG_TEST_2_STILL_EXECUTING ( 1 )\r
+#define configTIMER_STILL_EXECUTING ( 2 )\r
+#define configPRINT_SYSTEM_STATUS ( 3 )\r
+\r
+/* Parameters that are passed into the third and fourth register check tasks\r
+solely for the purpose of ensuring parameters are passed into tasks correctly. */\r
+#define configREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x11112222 )\r
+#define configREG_TEST_TASK_3_PARAMETER ( ( void * ) 0x12345678 )\r
+#define configREG_TEST_TASK_4_PARAMETER ( ( void * ) 0x87654321 )\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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+
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+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
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+ <aExt></aExt>
+ <oExt>*.obj</oExt>
+ <lExt>*.lib</lExt>
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+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
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+ </DaveTm>
+
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+ <TargetName>RTOSDemo_GCC_MPU</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
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+ </OPTHX>
+ <OPTLEX>
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+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\Listings\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
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+ <CCond>1</CCond>
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+ </ListingPage>
+ <OPTXL>
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+ <LPubSym>1</LPubSym>
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+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
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+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
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+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=1215,201,1680,501,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=120,149,354,683,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-UV1115SAE -O2983 -S0 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO11 -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <WatchWindow1>
+ <Ww>
+ <count>0</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>xTickCount</ItemText>
+ </Ww>
+ <Ww>
+ <count>1</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>ulCycleCount</ItemText>
+ </Ww>
+ </WatchWindow1>
+ <MemoryWindow1>
+ <Mm>
+ <WinNumber>1</WinNumber>
+ <SubType>2</SubType>
+ <ItemText>0x100000</ItemText>
+ <AccSizeX>4</AccSizeX>
+ </Mm>
+ </MemoryWindow1>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
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+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <Lin2Executable></Lin2Executable>
+ <Lin2ConfigFile></Lin2ConfigFile>
+ <bLin2Auto>0</bLin2Auto>
+ <DebugDescription>
+ <Enable>1</Enable>
+ <EnableLog>0</EnableLog>
+ <Protocol>2</Protocol>
+ <DbgClock>10000000</DbgClock>
+ </DebugDescription>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>System</GroupName>
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+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+</ProjectOpt>
--- /dev/null
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+ <SchemaVersion>2.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>RTOSDemo_GCC_MPU</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <pCCUsed>5060061::V5.06 update 1 (build 61)::ARMCC</pCCUsed>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM4_FP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.0.0-Beta4</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
+ <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\Objects\</OutputDirectory>
+ <OutputName>RTOSDemo</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>0</BrowseInformation>
+ <ListingPath>.\Listings\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopB1X>0</nStopB1X>
+ <nStopB2X>0</nStopB2X>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopA1X>0</nStopA1X>
+ <nStopA2X>0</nStopA2X>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArm>
+ <ArmMisc>
+ <asLst>1</asLst>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>1</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <GCPUTYP>"Cortex-M4"</GCPUTYP>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <IRAM2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </IRAM2>
+ <IROM2>
+ <Type>1</Type>
+ <StartAddress>0x200000</StartAddress>
+ <Size>0x4000</Size>
+ </IROM2>
+ </OnChipMemories>
+ </ArmMisc>
+ <Carm>
+ <arpcs>1</arpcs>
+ <stkchk>0</stkchk>
+ <reentr>0</reentr>
+ <interw>1</interw>
+ <bigend>0</bigend>
+ <Strict>0</Strict>
+ <Optim>0</Optim>
+ <wLevel>2</wLevel>
+ <uThumb>1</uThumb>
+ <VariousControls>
+ <MiscControls>-mfloat-abi=softfp -mfpu=fpv4-sp-d16 -ffunction-sections -fdata-sections -O0 -g</MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath>..;..\..\..\Source\include;..\..\..\Source\portable\GCC\ARM_CM4_MPU;..\..\Common\include;..\peripheral_library;..\CMSIS;..\main_full;..\peripheral_library\interrupt</IncludePath>
+ </VariousControls>
+ </Carm>
+ <Aarm>
+ <bBE>0</bBE>
+ <interw>1</interw>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aarm>
+ <LDarm>
+ <umfTarg>1</umfTarg>
+ <enaGarb>0</enaGarb>
+ <noStart>1</noStart>
+ <noStLib>0</noStLib>
+ <uMathLib>1</uMathLib>
+ <TextAddressRange></TextAddressRange>
+ <DataAddressRange></DataAddressRange>
+ <BSSAddressRange></BSSAddressRange>
+ <IncludeLibs></IncludeLibs>
+ <IncludeDir></IncludeDir>
+ <Misc>-Xlinker --gc-sections</Misc>
+ <ScatterFile>.\sections.ld</ScatterFile>
+ </LDarm>
+ </TargetArm>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>System</GroupName>
+ <Files>
+ <File>
+ <FileName>startup_ARMCM4.S</FileName>
+ <FileType>2</FileType>
+ <FilePath>.\startup_ARMCM4.S</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>application_and_config</GroupName>
+ <Files>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\main.c</FilePath>
+ </File>
+ <File>
+ <FileName>FreeRTOSConfig.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\FreeRTOSConfig.h</FilePath>
+ </File>
+ <File>
+ <FileName>RegTest.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\RegTest.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>FreeRTOS_Source</GroupName>
+ <Files>
+ <File>
+ <FileName>event_groups.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\event_groups.c</FilePath>
+ </File>
+ <File>
+ <FileName>list.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\list.c</FilePath>
+ </File>
+ <File>
+ <FileName>queue.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\queue.c</FilePath>
+ </File>
+ <File>
+ <FileName>tasks.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\tasks.c</FilePath>
+ </File>
+ <File>
+ <FileName>timers.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\timers.c</FilePath>
+ </File>
+ <File>
+ <FileName>mpu_wrappers.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\portable\Common\mpu_wrappers.c</FilePath>
+ </File>
+ <File>
+ <FileName>port.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\portable\GCC\ARM_CM4_MPU\port.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
--- /dev/null
+/*\r
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/* FreeRTOS includes. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+\r
+/*\r
+ * "Reg test" tasks - These fill the registers with known values, then check\r
+ * that each register maintains its expected value for the lifetime of the\r
+ * task. Each task uses a different set of values. The reg test tasks execute\r
+ * with a very low priority, so get preempted very frequently. A register\r
+ * containing an unexpected value is indicative of an error in the context\r
+ * switching mechanism.\r
+ */\r
+\r
+void vRegTest1Implementation( void *pvParameters );\r
+void vRegTest2Implementation( void *pvParameters );\r
+void vRegTest3Implementation( void ) __attribute__ ((naked));\r
+void vRegTest4Implementation( void ) __attribute__ ((naked));\r
+\r
+/*\r
+ * Used as an easy way of deleting a task from inline assembly.\r
+ */\r
+extern void vMainDeleteMe( void ) __attribute__((noinline));\r
+\r
+/*\r
+ * Used by the first two reg test tasks and a software timer callback function\r
+ * to send messages to the check task. The message just lets the check task\r
+ * know that the tasks and timer are still functioning correctly. If a reg test\r
+ * task detects an error it will delete itself, and in so doing prevent itself\r
+ * from sending any more 'I'm Alive' messages to the check task.\r
+ */\r
+extern void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );\r
+\r
+/* The queue used to send a message to the check task. */\r
+extern QueueHandle_t xGlobalScopeCheckQueue;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vRegTest1Implementation( void *pvParameters )\r
+{\r
+/* This task is created in privileged mode so can access the file scope\r
+queue variable. Take a stack copy of this before the task is set into user\r
+mode. Once this task is in user mode the file scope queue variable will no\r
+longer be accessible but the stack copy will. */\r
+QueueHandle_t xQueue = xGlobalScopeCheckQueue;\r
+\r
+ /* Now the queue handle has been obtained the task can switch to user\r
+ mode. This is just one method of passing a handle into a protected\r
+ task, the other reg test task uses the task parameter instead. */\r
+ portSWITCH_TO_USER_MODE();\r
+\r
+ /* First check that the parameter value is as expected. */\r
+ if( pvParameters != ( void * ) configREG_TEST_TASK_1_PARAMETER )\r
+ {\r
+ /* Error detected. Delete the task so it stops communicating with\r
+ the check task. */\r
+ vMainDeleteMe();\r
+ }\r
+\r
+ for( ;; )\r
+ {\r
+ /* This task tests the kernel context switch mechanism by reading and\r
+ writing directly to registers - which requires the test to be written\r
+ in assembly code. */\r
+ __asm volatile\r
+ (\r
+ " MOV R4, #104 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */\r
+ " MOV R5, #105 \n"\r
+ " MOV R6, #106 \n"\r
+ " MOV R8, #108 \n"\r
+ " MOV R9, #109 \n"\r
+ " MOV R10, #110 \n"\r
+ " MOV R11, #111 \n"\r
+ "reg1loop: \n"\r
+ " MOV R0, #100 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
+ " MOV R1, #101 \n"\r
+ " MOV R2, #102 \n"\r
+ " MOV R3, #103 \n"\r
+ " MOV R12, #112 \n"\r
+ " SVC #1 \n" /* Yield just to increase test coverage. */\r
+ " CMP R0, #100 \n" /* Check all the registers still contain their expected values. */\r
+ " BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */\r
+ " CMP R1, #101 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R2, #102 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R3, #103 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R4, #104 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R5, #105 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R6, #106 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R8, #108 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R9, #109 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R10, #110 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R11, #111 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R12, #112 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
+ );\r
+\r
+ /* Send configREG_TEST_1_STILL_EXECUTING to the check task to indicate that this\r
+ task is still functioning. */\r
+ vMainSendImAlive( xQueue, configREG_TEST_1_STILL_EXECUTING );\r
+\r
+ /* Go back to check all the register values again. */\r
+ __asm volatile( " B reg1loop " );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vRegTest2Implementation( void *pvParameters )\r
+{\r
+/* The queue handle is passed in as the task parameter. This is one method of\r
+passing data into a protected task, the other reg test task uses a different\r
+method. */\r
+QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters;\r
+\r
+ for( ;; )\r
+ {\r
+ /* This task tests the kernel context switch mechanism by reading and\r
+ writing directly to registers - which requires the test to be written\r
+ in assembly code. */\r
+ __asm volatile\r
+ (\r
+ " MOV R4, #4 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */\r
+ " MOV R5, #5 \n"\r
+ " MOV R6, #6 \n"\r
+ " MOV R8, #8 \n" /* Frame pointer is omitted as it must not be changed. */\r
+ " MOV R9, #9 \n"\r
+ " MOV R10, 10 \n"\r
+ " MOV R11, #11 \n"\r
+ "reg2loop: \n"\r
+ " MOV R0, #13 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
+ " MOV R1, #1 \n"\r
+ " MOV R2, #2 \n"\r
+ " MOV R3, #3 \n"\r
+ " MOV R12, #12 \n"\r
+ " CMP R0, #13 \n" /* Check all the registers still contain their expected values. */\r
+ " BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task */\r
+ " CMP R1, #1 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R2, #2 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R3, #3 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R4, #4 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R5, #5 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R6, #6 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R8, #8 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R9, #9 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R10, #10 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R11, #11 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R12, #12 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
+ );\r
+\r
+ /* Send configREG_TEST_2_STILL_EXECUTING to the check task to indicate that this\r
+ task is still functioning. */\r
+ vMainSendImAlive( xQueue, configREG_TEST_2_STILL_EXECUTING );\r
+\r
+ /* Go back to check all the register values again. */\r
+ __asm volatile( " B reg2loop " );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vRegTest3Implementation( void )\r
+{\r
+ __asm volatile\r
+ (\r
+ ".extern pulRegTest3LoopCounter \n"\r
+ "/* Fill the core registers with known values. */ \n"\r
+ "mov r0, #100 \n"\r
+ "mov r1, #101 \n"\r
+ "mov r2, #102 \n"\r
+ "mov r3, #103 \n"\r
+ "mov r4, #104 \n"\r
+ "mov r5, #105 \n"\r
+ "mov r6, #106 \n"\r
+ "mov r7, #107 \n"\r
+ "mov r8, #108 \n"\r
+ "mov r9, #109 \n"\r
+ "mov r10, #110 \n"\r
+ "mov r11, #111 \n"\r
+ "mov r12, #112 \n"\r
+\r
+ "/* Fill the VFP registers with known values. */ \n"\r
+ "vmov d0, r0, r1 \n"\r
+ "vmov d1, r2, r3 \n"\r
+ "vmov d2, r4, r5 \n"\r
+ "vmov d3, r6, r7 \n"\r
+ "vmov d4, r8, r9 \n"\r
+ "vmov d5, r10, r11 \n"\r
+ "vmov d6, r0, r1 \n"\r
+ "vmov d7, r2, r3 \n"\r
+ "vmov d8, r4, r5 \n"\r
+ "vmov d9, r6, r7 \n"\r
+ "vmov d10, r8, r9 \n"\r
+ "vmov d11, r10, r11 \n"\r
+ "vmov d12, r0, r1 \n"\r
+ "vmov d13, r2, r3 \n"\r
+ "vmov d14, r4, r5 \n"\r
+ "vmov d15, r6, r7 \n"\r
+\r
+ "reg1_loop: \n"\r
+ "/* Check all the VFP registers still contain the values set above. \n"\r
+ "First save registers that are clobbered by the test. */ \n"\r
+ "push { r0-r1 } \n"\r
+\r
+ "vmov r0, r1, d0 \n"\r
+ "cmp r0, #100 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #101 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d1 \n"\r
+ "cmp r0, #102 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #103 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d2 \n"\r
+ "cmp r0, #104 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #105 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d3 \n"\r
+ "cmp r0, #106 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #107 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d4 \n"\r
+ "cmp r0, #108 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #109 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d5 \n"\r
+ "cmp r0, #110 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #111 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d6 \n"\r
+ "cmp r0, #100 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #101 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d7 \n"\r
+ "cmp r0, #102 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #103 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d8 \n"\r
+ "cmp r0, #104 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #105 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d9 \n"\r
+ "cmp r0, #106 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #107 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d10 \n"\r
+ "cmp r0, #108 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #109 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d11 \n"\r
+ "cmp r0, #110 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #111 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d12 \n"\r
+ "cmp r0, #100 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #101 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d13 \n"\r
+ "cmp r0, #102 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #103 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d14 \n"\r
+ "cmp r0, #104 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #105 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "vmov r0, r1, d15 \n"\r
+ "cmp r0, #106 \n"\r
+ "bne reg1_error_loopf \n"\r
+ "cmp r1, #107 \n"\r
+ "bne reg1_error_loopf \n"\r
+\r
+ "/* Restore the registers that were clobbered by the test. */ \n"\r
+ "pop {r0-r1} \n"\r
+\r
+ "/* VFP register test passed. Jump to the core register test. */ \n"\r
+ "b reg1_loopf_pass \n"\r
+\r
+ "reg1_error_loopf: \n"\r
+ "/* If this line is hit then a VFP register value was found to be incorrect. */ \n"\r
+ "b reg1_error_loopf \n"\r
+\r
+ "reg1_loopf_pass: \n"\r
+\r
+ "cmp r0, #100 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r1, #101 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r2, #102 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r3, #103 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r4, #104 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r5, #105 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r6, #106 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r7, #107 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r8, #108 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r9, #109 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r10, #110 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r11, #111 \n"\r
+ "bne reg1_error_loop \n"\r
+ "cmp r12, #112 \n"\r
+ "bne reg1_error_loop \n"\r
+\r
+ "/* Everything passed, increment the loop counter. */ \n"\r
+ "push { r0-r1 } \n"\r
+ "ldr r0, =pulRegTest3LoopCounter \n"\r
+ "ldr r0, [r0] \n"\r
+ "ldr r1, [r0] \n"\r
+ "adds r1, r1, #1 \n"\r
+ "str r1, [r0] \n"\r
+ "pop { r0-r1 } \n"\r
+\r
+ "/* Start again. */ \n"\r
+ "b reg1_loop \n"\r
+\r
+ "reg1_error_loop: \n"\r
+ "/* If this line is hit then there was an error in a core register value. \n"\r
+ "The loop ensures the loop counter stops incrementing. */ \n"\r
+ "b reg1_error_loop \n"\r
+ "nop "\r
+ ); /* __asm volatile. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vRegTest4Implementation( void )\r
+{\r
+ __asm volatile\r
+ (\r
+ ".extern pulRegTest4LoopCounter \n"\r
+ "/* Set all the core registers to known values. */ \n"\r
+ "mov r0, #-1 \n"\r
+ "mov r1, #1 \n"\r
+ "mov r2, #2 \n"\r
+ "mov r3, #3 \n"\r
+ "mov r4, #4 \n"\r
+ "mov r5, #5 \n"\r
+ "mov r6, #6 \n"\r
+ "mov r7, #7 \n"\r
+ "mov r8, #8 \n"\r
+ "mov r9, #9 \n"\r
+ "mov r10, #10 \n"\r
+ "mov r11, #11 \n"\r
+ "mov r12, #12 \n"\r
+\r
+ "/* Set all the VFP to known values. */ \n"\r
+ "vmov d0, r0, r1 \n"\r
+ "vmov d1, r2, r3 \n"\r
+ "vmov d2, r4, r5 \n"\r
+ "vmov d3, r6, r7 \n"\r
+ "vmov d4, r8, r9 \n"\r
+ "vmov d5, r10, r11 \n"\r
+ "vmov d6, r0, r1 \n"\r
+ "vmov d7, r2, r3 \n"\r
+ "vmov d8, r4, r5 \n"\r
+ "vmov d9, r6, r7 \n"\r
+ "vmov d10, r8, r9 \n"\r
+ "vmov d11, r10, r11 \n"\r
+ "vmov d12, r0, r1 \n"\r
+ "vmov d13, r2, r3 \n"\r
+ "vmov d14, r4, r5 \n"\r
+ "vmov d15, r6, r7 \n"\r
+\r
+ "reg2_loop: \n"\r
+\r
+ "/* Check all the VFP registers still contain the values set above. \n"\r
+ "First save registers that are clobbered by the test. */ \n"\r
+ "push { r0-r1 } \n"\r
+\r
+ "vmov r0, r1, d0 \n"\r
+ "cmp r0, #-1 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #1 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d1 \n"\r
+ "cmp r0, #2 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #3 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d2 \n"\r
+ "cmp r0, #4 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #5 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d3 \n"\r
+ "cmp r0, #6 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #7 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d4 \n"\r
+ "cmp r0, #8 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #9 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d5 \n"\r
+ "cmp r0, #10 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #11 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d6 \n"\r
+ "cmp r0, #-1 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #1 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d7 \n"\r
+ "cmp r0, #2 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #3 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d8 \n"\r
+ "cmp r0, #4 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #5 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d9 \n"\r
+ "cmp r0, #6 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #7 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d10 \n"\r
+ "cmp r0, #8 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #9 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d11 \n"\r
+ "cmp r0, #10 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #11 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d12 \n"\r
+ "cmp r0, #-1 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #1 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d13 \n"\r
+ "cmp r0, #2 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #3 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d14 \n"\r
+ "cmp r0, #4 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #5 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "vmov r0, r1, d15 \n"\r
+ "cmp r0, #6 \n"\r
+ "bne reg2_error_loopf \n"\r
+ "cmp r1, #7 \n"\r
+ "bne reg2_error_loopf \n"\r
+\r
+ "/* Restore the registers that were clobbered by the test. */ \n"\r
+ "pop {r0-r1} \n"\r
+\r
+ "/* VFP register test passed. Jump to the core register test. */ \n"\r
+ "b reg2_loopf_pass \n"\r
+\r
+ "reg2_error_loopf: \n"\r
+ "/* If this line is hit then a VFP register value was found to be \n"\r
+ "incorrect. */ \n"\r
+ "b reg2_error_loopf \n"\r
+\r
+ "reg2_loopf_pass: \n"\r
+\r
+ "cmp r0, #-1 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r1, #1 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r2, #2 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r3, #3 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r4, #4 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r5, #5 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r6, #6 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r7, #7 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r8, #8 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r9, #9 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r10, #10 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r11, #11 \n"\r
+ "bne reg2_error_loop \n"\r
+ "cmp r12, #12 \n"\r
+ "bne reg2_error_loop \n"\r
+\r
+ "/* Increment the loop counter so the check task knows this task is \n"\r
+ "still running. */ \n"\r
+ "push { r0-r1 } \n"\r
+ "ldr r0, =pulRegTest4LoopCounter \n"\r
+ "ldr r0, [r0] \n"\r
+ "ldr r1, [r0] \n"\r
+ "adds r1, r1, #1 \n"\r
+ "str r1, [r0] \n"\r
+ "pop { r0-r1 } \n"\r
+\r
+ "/* Yield to increase test coverage. */ \n"\r
+ "SVC #1 \n"\r
+\r
+ "/* Start again. */ \n"\r
+ "b reg2_loop \n"\r
+\r
+ "reg2_error_loop: \n"\r
+ "/* If this line is hit then there was an error in a core register value. \n"\r
+ "This loop ensures the loop counter variable stops incrementing. */ \n"\r
+ "b reg2_error_loop \n"\r
+ ); /* __asm volatile */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Fault handlers are here for convenience as they use compiler specific syntax\r
+and this file is specific to the GCC compiler. */\r
+void hard_fault_handler( uint32_t * hardfault_args )\r
+{\r
+volatile uint32_t stacked_r0;\r
+volatile uint32_t stacked_r1;\r
+volatile uint32_t stacked_r2;\r
+volatile uint32_t stacked_r3;\r
+volatile uint32_t stacked_r12;\r
+volatile uint32_t stacked_lr;\r
+volatile uint32_t stacked_pc;\r
+volatile uint32_t stacked_psr;\r
+\r
+ stacked_r0 = ((uint32_t) hardfault_args[ 0 ]);\r
+ stacked_r1 = ((uint32_t) hardfault_args[ 1 ]);\r
+ stacked_r2 = ((uint32_t) hardfault_args[ 2 ]);\r
+ stacked_r3 = ((uint32_t) hardfault_args[ 3 ]);\r
+\r
+ stacked_r12 = ((uint32_t) hardfault_args[ 4 ]);\r
+ stacked_lr = ((uint32_t) hardfault_args[ 5 ]);\r
+ stacked_pc = ((uint32_t) hardfault_args[ 6 ]);\r
+ stacked_psr = ((uint32_t) hardfault_args[ 7 ]);\r
+\r
+ /* Inspect stacked_pc to locate the offending instruction. */\r
+ for( ;; );\r
+\r
+ ( void ) stacked_psr;\r
+ ( void ) stacked_pc;\r
+ ( void ) stacked_lr;\r
+ ( void ) stacked_r12;\r
+ ( void ) stacked_r0;\r
+ ( void ) stacked_r1;\r
+ ( void ) stacked_r2;\r
+ ( void ) stacked_r3;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void HardFault_Handler( void ) __attribute__((naked));\r
+void HardFault_Handler( void )\r
+{\r
+ __asm volatile\r
+ (\r
+ " tst lr, #4 \n"\r
+ " ite eq \n"\r
+ " mrseq r0, msp \n"\r
+ " mrsne r0, psp \n"\r
+ " ldr r1, [r0, #24] \n"\r
+ " ldr r2, handler_address_const \n"\r
+ " bx r2 \n"\r
+ " handler_address_const: .word hard_fault_handler \n"\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MemManage_Handler( void ) __attribute__((naked));\r
+void MemManage_Handler( void )\r
+{\r
+ __asm volatile\r
+ (\r
+ " tst lr, #4 \n"\r
+ " ite eq \n"\r
+ " mrseq r0, msp \n"\r
+ " mrsne r0, psp \n"\r
+ " ldr r1, [r0, #24] \n"\r
+ " ldr r2, handler2_address_const \n"\r
+ " bx r2 \n"\r
+ " handler2_address_const: .word hard_fault_handler \n"\r
+ );\r
+}/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+/* Default memory layout. */\r
+MEMORY\r
+{\r
+ ROM (rx) : ORIGIN = 0x00, LENGTH = 0x80000\r
+ RAM (rw) : ORIGIN = 0x20000000, LENGTH = 0x8000\r
+}\r
+\r
+/* Variables used by FreeRTOS-MPU. */\r
+_Privileged_Functions_Region_Size = 32K;\r
+_Privileged_Data_Region_Size = 2048;\r
+\r
+__FLASH_segment_start__ = ORIGIN( ROM );\r
+__FLASH_segment_end__ = __FLASH_segment_start__ + LENGTH( ROM );\r
+\r
+__privileged_functions_start__ = ORIGIN( ROM );\r
+__privileged_functions_end__ = __privileged_functions_start__ + _Privileged_Functions_Region_Size;\r
+\r
+__SRAM_segment_start__ = ORIGIN( RAM );\r
+__SRAM_segment_end__ = __SRAM_segment_start__ + LENGTH( RAM );\r
+\r
+__privileged_data_start__ = ORIGIN( RAM );\r
+__privileged_data_end__ = ORIGIN( RAM ) + _Privileged_Data_Region_Size;\r
+\r
+\r
+/*\r
+ * The '__stack' definition is required by crt0, do not remove it.\r
+ */\r
+__stack = ORIGIN(RAM) + LENGTH(RAM);\r
+_estack = __stack;\r
+\r
+/*\r
+ * Default stack sizes.\r
+ * These are used by the startup in order to allocate stacks\r
+ * for the different modes.\r
+ */\r
+\r
+__Main_Stack_Size = 2048 ;\r
+\r
+PROVIDE ( _Main_Stack_Size = __Main_Stack_Size ) ;\r
+\r
+__Main_Stack_Limit = __stack - __Main_Stack_Size ;\r
+\r
+/*"PROVIDE" allows to easily override these values from an object file or the command line. */\r
+PROVIDE ( _Main_Stack_Limit = __Main_Stack_Limit ) ;\r
+\r
+/*\r
+ * There will be a link error if there is not this amount of\r
+ * RAM free at the end.\r
+ */\r
+_Minimum_Stack_Size = 1024 ;\r
+\r
+/*\r
+ * Default heap definitions.\r
+ * The heap start immediately after the last statically allocated\r
+ * .sbss/.noinit section, and extends up to the main stack limit.\r
+ */\r
+PROVIDE ( _Heap_Begin = _end_noinit ) ;\r
+PROVIDE ( _Heap_Limit = __stack - __Main_Stack_Size ) ;\r
+\r
+/*\r
+ * The entry point is informative, for debuggers and simulators,\r
+ * since the Cortex-M vector points to it anyway.\r
+ */\r
+ENTRY(_start)\r
+\r
+/* Sections Definitions */\r
+\r
+SECTIONS\r
+{\r
+ /*\r
+ * For Cortex-M devices, the beginning of the startup code is stored in\r
+ * the .isr_vector section, which goes to ROM\r
+ */\r
+ privileged_functions :\r
+ {\r
+ . = ALIGN(4);\r
+ _isr_vector = .;\r
+ KEEP(*(.isr_vector))\r
+ *(privileged_functions)\r
+ . = ALIGN(4);\r
+\r
+ /* Non privileged code is after _Privileged_Functions_Region_Size. */\r
+ __privileged_functions_actual_end__ = .;\r
+ . = _Privileged_Functions_Region_Size;\r
+ } > ROM\r
+\r
+\r
+\r
+ .text :\r
+ {\r
+ . = ALIGN(4);\r
+\r
+\r
+ /*\r
+ * This section is here for convenience, to store the\r
+ * startup code at the beginning of the flash area, hoping that\r
+ * this will increase the readability of the listing.\r
+ */\r
+ KEEP(*(.after_vectors .after_vectors.*)) /* Startup code and ISR */\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * These are the old initialisation sections, intended to contain\r
+ * naked code, with the prologue/epilogue added by crti.o/crtn.o\r
+ * when linking with startup files. The standalone startup code\r
+ * currently does not run these, better use the init arrays below.\r
+ */\r
+ KEEP(*(.init))\r
+ KEEP(*(.fini))\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * The preinit code, i.e. an array of pointers to initialisation\r
+ * functions to be performed before constructors.\r
+ */\r
+ PROVIDE_HIDDEN (__preinit_array_start = .);\r
+\r
+ /*\r
+ * Used to run the SystemInit() before anything else.\r
+ */\r
+ KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))\r
+\r
+ /*\r
+ * Used for other platform inits.\r
+ */\r
+ KEEP(*(.preinit_array_platform .preinit_array_platform.*))\r
+\r
+ /*\r
+ * The application inits. If you need to enforce some order in\r
+ * execution, create new sections, as before.\r
+ */\r
+ KEEP(*(.preinit_array .preinit_array.*))\r
+\r
+ PROVIDE_HIDDEN (__preinit_array_end = .);\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * The init code, i.e. an array of pointers to static constructors.\r
+ */\r
+ PROVIDE_HIDDEN (__init_array_start = .);\r
+ KEEP(*(SORT(.init_array.*)))\r
+ KEEP(*(.init_array))\r
+ PROVIDE_HIDDEN (__init_array_end = .);\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * The fini code, i.e. an array of pointers to static destructors.\r
+ */\r
+ PROVIDE_HIDDEN (__fini_array_start = .);\r
+ KEEP(*(SORT(.fini_array.*)))\r
+ KEEP(*(.fini_array))\r
+ PROVIDE_HIDDEN (__fini_array_end = .);\r
+ . = ALIGN(4);\r
+\r
+ . = ALIGN(4);\r
+\r
+ *(.text*) /* all remaining code */\r
+\r
+ *(vtable) /* C++ virtual tables */\r
+\r
+ } >ROM\r
+\r
+ .rodata :\r
+ {\r
+ *(.rodata*) /* read-only data (constants) */\r
+ } >ROM\r
+\r
+ .glue :\r
+ {\r
+ KEEP(*(.eh_frame*))\r
+\r
+ /*\r
+ * Stub sections generated by the linker, to glue together\r
+ * ARM and Thumb code. .glue_7 is used for ARM code calling\r
+ * Thumb code, and .glue_7t is used for Thumb code calling\r
+ * ARM code. Apparently always generated by the linker, for some\r
+ * architectures, so better leave them here.\r
+ */\r
+ *(.glue_7)\r
+ *(.glue_7t)\r
+ } >ROM\r
+\r
+ /* ARM magic sections */\r
+ .ARM.extab :\r
+ {\r
+ *(.ARM.extab* .gnu.linkonce.armextab.*)\r
+ } > ROM\r
+\r
+ __exidx_start = .;\r
+ .ARM.exidx :\r
+ {\r
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
+ } > ROM\r
+ __exidx_end = .;\r
+\r
+ . = ALIGN(4);\r
+ _etext = .;\r
+ __etext = .;\r
+\r
+ /*\r
+ * This address is used by the startup code to\r
+ * initialise the .data section.\r
+ */\r
+ _sidata = _etext;\r
+\r
+ /* MEMORY_ARRAY */\r
+ /*\r
+ .ROarraySection :\r
+ {\r
+ *(.ROarraySection .ROarraySection.*)\r
+ } >MEMORY_ARRAY\r
+ */\r
+\r
+\r
+ privileged_data :\r
+ {\r
+ *(privileged_data)\r
+ /* Non kernel data is kept out of the first _Privileged_Data_Region_Size\r
+ bytes of SRAM. */\r
+ __privileged_data_actual_end__ = .;\r
+ . = _Privileged_Data_Region_Size;\r
+ } > RAM\r
+\r
+ /*\r
+ * The initialised data section.\r
+ * The program executes knowing that the data is in the RAM\r
+ * but the loader puts the initial values in the ROM (inidata).\r
+ * It is one task of the startup to copy the initial values from\r
+ * ROM to RAM.\r
+ */\r
+ .data : AT ( _sidata )\r
+ {\r
+ . = ALIGN(4);\r
+\r
+ /* This is used by the startup code to initialise the .data section */\r
+ _sdata = . ; /* STM specific definition */\r
+ __data_start__ = . ;\r
+ *(.data_begin .data_begin.*)\r
+\r
+ *(.data .data.*)\r
+\r
+ *(.data_end .data_end.*)\r
+ . = ALIGN(4);\r
+\r
+ /* This is used by the startup code to initialise the .data section */\r
+ _edata = . ; /* STM specific definition */\r
+ __data_end__ = . ;\r
+\r
+ } >RAM\r
+\r
+\r
+ /*\r
+ * The uninitialised data section. NOLOAD is used to avoid\r
+ * the "section `.bss' type changed to PROGBITS" warning\r
+ */\r
+ .bss (NOLOAD) :\r
+ {\r
+ . = ALIGN(4);\r
+ __bss_start__ = .; /* standard newlib definition */\r
+ _sbss = .; /* STM specific definition */\r
+ *(.bss_begin .bss_begin.*)\r
+\r
+ *(.bss .bss.*)\r
+ *(COMMON)\r
+\r
+ *(.bss_end .bss_end.*)\r
+ . = ALIGN(4);\r
+ __bss_end__ = .; /* standard newlib definition */\r
+ _ebss = . ; /* STM specific definition */\r
+ } >RAM\r
+\r
+ .noinit (NOLOAD) :\r
+ {\r
+ . = ALIGN(4);\r
+ _noinit = .;\r
+\r
+ *(.noinit .noinit.*)\r
+\r
+ . = ALIGN(4) ;\r
+ _end_noinit = .;\r
+ } > RAM\r
+\r
+ /* Mandatory to be word aligned, _sbrk assumes this */\r
+ PROVIDE ( end = _end_noinit ); /* was _ebss */\r
+ PROVIDE ( _end = _end_noinit );\r
+ PROVIDE ( __end = _end_noinit );\r
+ PROVIDE ( __end__ = _end_noinit );\r
+ PROVIDE ( ROM_DATA_START = __data_start__ );\r
+\r
+ /*\r
+ * Used for validation only, do not allocate anything here!\r
+ *\r
+ * This is just to check that there is enough RAM left for the Main\r
+ * stack. It should generate an error if it's full.\r
+ */\r
+ ._check_stack :\r
+ {\r
+ . = ALIGN(4);\r
+\r
+ . = . + _Minimum_Stack_Size ;\r
+\r
+ . = ALIGN(4);\r
+ } >RAM\r
+\r
+ /* After that there are only debugging sections. */\r
+\r
+ /* This can remove the debugging information from the standard libraries */\r
+ /*\r
+ DISCARD :\r
+ {\r
+ libc.a ( * )\r
+ libm.a ( * )\r
+ libgcc.a ( * )\r
+ }\r
+ */\r
+\r
+ /* Stabs debugging sections. */\r
+ .stab 0 : { *(.stab) }\r
+ .stabstr 0 : { *(.stabstr) }\r
+ .stab.excl 0 : { *(.stab.excl) }\r
+ .stab.exclstr 0 : { *(.stab.exclstr) }\r
+ .stab.index 0 : { *(.stab.index) }\r
+ .stab.indexstr 0 : { *(.stab.indexstr) }\r
+ .comment 0 : { *(.comment) }\r
+ /*\r
+ * DWARF debug sections.\r
+ * Symbols in the DWARF debugging sections are relative to the beginning\r
+ * of the section so we begin them at 0.\r
+ */\r
+ /* DWARF 1 */\r
+ .debug 0 : { *(.debug) }\r
+ .line 0 : { *(.line) }\r
+ /* GNU DWARF 1 extensions */\r
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
+ .debug_sfnames 0 : { *(.debug_sfnames) }\r
+ /* DWARF 1.1 and DWARF 2 */\r
+ .debug_aranges 0 : { *(.debug_aranges) }\r
+ .debug_pubnames 0 : { *(.debug_pubnames) }\r
+ /* DWARF 2 */\r
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+ .debug_abbrev 0 : { *(.debug_abbrev) }\r
+ .debug_line 0 : { *(.debug_line) }\r
+ .debug_frame 0 : { *(.debug_frame) }\r
+ .debug_str 0 : { *(.debug_str) }\r
+ .debug_loc 0 : { *(.debug_loc) }\r
+ .debug_macinfo 0 : { *(.debug_macinfo) }\r
+ /* SGI/MIPS DWARF 2 extensions */\r
+ .debug_weaknames 0 : { *(.debug_weaknames) }\r
+ .debug_funcnames 0 : { *(.debug_funcnames) }\r
+ .debug_typenames 0 : { *(.debug_typenames) }\r
+ .debug_varnames 0 : { *(.debug_varnames) }\r
+}\r
--- /dev/null
+/* File: startup_ARMCM4.S
+ * Purpose: startup file for Cortex-M4 devices. Should use with
+ * GCC for ARM Embedded Processors
+ * Version: V2.0
+ * Date: 16 August 2013
+ *
+/* Copyright (c) 2011 - 2013 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+ .syntax unified
+ .arch armv7e-m
+
+ .extern __SRAM_segment_end__
+
+ .section .isr_vector
+ .align 4
+ .globl __isr_vector
+__isr_vector:
+ .long __SRAM_segment_end__ - 4 /* Top of Stack at top of RAM*/
+ .long Reset_Handler /* Reset Handler */
+ .long NMI_Handler /* NMI Handler */
+ .long HardFault_Handler /* Hard Fault Handler */
+ .long MemManage_Handler /* MPU Fault Handler */
+ .long BusFault_Handler /* Bus Fault Handler */
+ .long UsageFault_Handler /* Usage Fault Handler */
+ .long 0 /* Reserved */
+ .long 0 /* Reserved */
+ .long 0 /* Reserved */
+ .long 0 /* Reserved */
+ .long SVC_Handler /* SVCall Handler */
+ .long DebugMon_Handler /* Debug Monitor Handler */
+ .long 0 /* Reserved */
+ .long PendSV_Handler /* PendSV Handler */
+ .long SysTick_Handler /* SysTick Handler */
+
+ /* External interrupts */
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+ .long DummyHandler
+
+
+ .text
+ .thumb
+ .thumb_func
+ .align 2
+ .globl _start
+ .extern main
+ .globl Reset_Handler
+ .type Reset_Handler, %function
+_start:
+Reset_Handler:
+/* Firstly it copies data from read only memory to RAM. There are two schemes
+ * to copy. One can copy more than one sections. Another can only copy
+ * one section. The former scheme needs more instructions and read-only
+ * data to implement than the latter.
+ * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
+
+/* Single section scheme.
+ *
+ * The ranges of copy from/to are specified by following symbols
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to
+ * __data_end__: VMA of end of the section to copy to
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ ldr r1, =__etext
+ ldr r2, =__data_start__
+ ldr r3, =__data_end__
+
+.L_loop1:
+ cmp r2, r3
+ ittt lt
+ ldrlt r0, [r1], #4
+ strlt r0, [r2], #4
+ blt .L_loop1
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define this macro to enable it in this startup.
+ *
+ * There are two schemes too. One can clear multiple BSS sections. Another
+ * can only clear one section. The former is more size expensive than the
+ * latter.
+ *
+ * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+
+ /* Single BSS section scheme.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * Both addresses must be aligned to 4 bytes boundary.
+ */
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+
+ movs r0, 0
+.L_loop3:
+ cmp r1, r2
+ itt lt
+ strlt r0, [r1], #4
+ blt .L_loop3
+
+#ifndef __NO_SYSTEM_INIT
+/* bl SystemInit */
+#endif
+
+ bl main
+
+ .pool
+ .size Reset_Handler, . - Reset_Handler
+
+ .align 1
+ .thumb_func
+ .weak Default_Handler
+ .type Default_Handler, %function
+Default_Handler:
+ b .
+ .size Default_Handler, . - Default_Handler
+
+/* Macro to define default handlers. Default handler
+ * will be weak symbol and just dead loops. They can be
+ * overwritten by other handlers */
+ .macro def_irq_handler handler_name
+ .weak \handler_name
+ .set \handler_name, Default_Handler
+ .endm
+
+ def_irq_handler NMI_Handler
+ def_irq_handler HardFault_Handler
+ def_irq_handler MemManage_Handler
+ def_irq_handler BusFault_Handler
+ def_irq_handler UsageFault_Handler
+ def_irq_handler SVC_Handler
+ def_irq_handler DebugMon_Handler
+ def_irq_handler PendSV_Handler
+ def_irq_handler SysTick_Handler
+ def_irq_handler DEF_IRQHandler
+ def_irq_handler DummyHandler
+
+
+ .end
--- /dev/null
+; *************************************************************\r
+; *** Scatter-Loading Description File generated by uVision ***\r
+; *************************************************************\r
+\r
+\r
+LR_IROM1 0x00000000 { ; load region size_region\r
+ ER_IROM1 0x00000000 { ; load address = execution address\r
+ *.o (RESET, +First)\r
+ *(InRoot$$Sections)\r
+ *( privileged_functions )\r
+ }\r
+ ER_IROM2 0x8000 FIXED {\r
+ .ANY (+RO)\r
+ }\r
+ RW_IRAM1 0x20000000 { ; RW data\r
+ *( privileged_data )\r
+ }\r
+ RW_IRAM2 0x20000800 { ; RW data\r
+ .ANY (+RW +ZI)\r
+ }\r
+}\r
+\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>RTOSDemo</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>48000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\Listings\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=1231,224,1641,767,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=1199,245,1664,545,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-UV1115SAE -O3047 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC48000000 -TP21 -TDS8028 -TDT0 -TDC1F -TIE1 -TIP8 -FO11 -FD118000 -FC8000 -FN1 -FF0NEW_DEVICE.FLM -FS0E0000 -FL038000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <WatchWindow1>
+ <Ww>
+ <count>0</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>ulCycleCount</ItemText>
+ </Ww>
+ </WatchWindow1>
+ <MemoryWindow1>
+ <Mm>
+ <WinNumber>1</WinNumber>
+ <SubType>2</SubType>
+ <ItemText>0xe000e284</ItemText>
+ <AccSizeX>4</AccSizeX>
+ </Mm>
+ </MemoryWindow1>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <Lin2Executable></Lin2Executable>
+ <Lin2ConfigFile></Lin2ConfigFile>
+ <bLin2Auto>0</bLin2Auto>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>System</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
+ <FileType>2</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\startup_MPS_CM4.S</PathWithFileName>
+ <FilenameWithoutPath>startup_MPS_CM4.S</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>main_and_config</GroupName>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>2</GroupNumber>
+ <FileNumber>2</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
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+</ProjectOpt>
--- /dev/null
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+ <SchemaVersion>2.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>RTOSDemo</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <pCCUsed>5060183::V5.06 update 2 (build 183)::ARMCC</pCCUsed>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>ARMCM4_FP</Device>
+ <Vendor>ARM</Vendor>
+ <PackID>ARM.CMSIS.5.0.0-Beta4</PackID>
+ <PackURL>http://www.keil.com/pack/</PackURL>
+ <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile></StartupFile>
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+ <DeviceId>0</DeviceId>
+ <RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\Objects\</OutputDirectory>
+ <OutputName>RTOSDemo</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>1</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\Listings\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
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+ <nStopU1X>0</nStopU1X>
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+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
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+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
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+ </BeforeMake>
+ <AfterMake>
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+ <nStopA1X>0</nStopA1X>
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+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
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+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments> -MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments> -MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4096</DriverSelection>
+ </Flash1>
+ <bUseTDR>1</bUseTDR>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
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+ <AdsANop>0</AdsANop>
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+ <AdsLLst>1</AdsLLst>
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+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>1</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
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+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
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+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
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+ <Ra1Chk>0</Ra1Chk>
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+ <Im1Chk>1</Im1Chk>
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+ <OnChipMemories>
+ <Ocm1>
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+ <StartAddress>0x0</StartAddress>
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+ </Ocm1>
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+ </Ocm2>
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+ </Ocm3>
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+ </Ocm4>
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+ </Ocm5>
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+ </Ocm6>
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+ <StartAddress>0x20000000</StartAddress>
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+ <IROM>
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+ <StartAddress>0x0</StartAddress>
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+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
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+ </OCR_RVCT2>
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+ </OCR_RVCT4>
+ <OCR_RVCT5>
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+ <StartAddress>0x0</StartAddress>
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+ </OCR_RVCT5>
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+ <StartAddress>0x0</StartAddress>
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+ </OCR_RVCT6>
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+ <StartAddress>0x20000000</StartAddress>
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+ </OCR_RVCT9>
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+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
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+ <Cads>
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+ </VariousControls>
+ </Cads>
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+ <MiscControls></MiscControls>
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+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
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+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>System</GroupName>
+ <Files>
+ <File>
+ <FileName>startup_MPS_CM4.S</FileName>
+ <FileType>2</FileType>
+ <FilePath>.\startup_MPS_CM4.S</FilePath>
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+ <GroupName>main_and_config</GroupName>
+ <Files>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\main.c</FilePath>
+ </File>
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+ <FileName>FreeRTOSConfig.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\FreeRTOSConfig.h</FilePath>
+ </File>
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+ <FileName>RegTest.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\RegTest.c</FilePath>
+ </File>
+ </Files>
+ </Group>
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+ <GroupName>FreeRTOS_Source</GroupName>
+ <Files>
+ <File>
+ <FileName>event_groups.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\event_groups.c</FilePath>
+ </File>
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+ <FileName>list.c</FileName>
+ <FileType>1</FileType>
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+ </File>
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+ <FileName>queue.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\queue.c</FilePath>
+ </File>
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+ <FileName>tasks.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\tasks.c</FilePath>
+ </File>
+ <File>
+ <FileName>timers.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\timers.c</FilePath>
+ </File>
+ <File>
+ <FileName>port.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\portable\RVDS\ARM_CM4_MPU\port.c</FilePath>
+ </File>
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+ <FileName>mpu_wrappers.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\Source\portable\Common\mpu_wrappers.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
--- /dev/null
+/*\r
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/* FreeRTOS includes. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+#include "task.h"\r
+\r
+/*\r
+ * "Reg test" tasks - These fill the registers with known values, then check\r
+ * that each register maintains its expected value for the lifetime of the\r
+ * task. Each task uses a different set of values. The reg test tasks execute\r
+ * with a very low priority, so get preempted very frequently. A register\r
+ * containing an unexpected value is indicative of an error in the context\r
+ * switching mechanism.\r
+ */\r
+\r
+void vRegTest1Implementation( void *pvParameters );\r
+void vRegTest2Implementation( void *pvParameters );\r
+void vRegTest3Implementation( void );\r
+void vRegTest4Implementation( void );\r
+\r
+/*\r
+ * Used as an easy way of deleting a task from inline assembly.\r
+ */\r
+extern void vMainDeleteMe( void ) __attribute__((noinline));\r
+\r
+/*\r
+ * Used by the first two reg test tasks and a software timer callback function\r
+ * to send messages to the check task. The message just lets the check task\r
+ * know that the tasks and timer are still functioning correctly. If a reg test\r
+ * task detects an error it will delete itself, and in so doing prevent itself\r
+ * from sending any more 'I'm Alive' messages to the check task.\r
+ */\r
+extern void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );\r
+\r
+/* The queue used to send a message to the check task. */\r
+extern QueueHandle_t xGlobalScopeCheckQueue;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vRegTest1Implementation( void *pvParameters )\r
+{\r
+/* This task is created in privileged mode so can access the file scope\r
+queue variable. Take a stack copy of this before the task is set into user\r
+mode. Once this task is in user mode the file scope queue variable will no\r
+longer be accessible but the stack copy will. */\r
+QueueHandle_t xQueue = xGlobalScopeCheckQueue;\r
+const TickType_t xDelayTime = pdMS_TO_TICKS( 100UL );\r
+\r
+ /* Now the queue handle has been obtained the task can switch to user\r
+ mode. This is just one method of passing a handle into a protected\r
+ task, the other reg test task uses the task parameter instead. */\r
+ portSWITCH_TO_USER_MODE();\r
+\r
+ /* First check that the parameter value is as expected. */\r
+ if( pvParameters != ( void * ) configREG_TEST_TASK_1_PARAMETER )\r
+ {\r
+ /* Error detected. Delete the task so it stops communicating with\r
+ the check task. */\r
+ vMainDeleteMe();\r
+ }\r
+\r
+ for( ;; )\r
+ {\r
+ #if defined ( __GNUC__ )\r
+ {\r
+ /* This task tests the kernel context switch mechanism by reading and\r
+ writing directly to registers - which requires the test to be written\r
+ in assembly code. */\r
+ __asm volatile\r
+ (\r
+ " MOV R4, #104 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */\r
+ " MOV R5, #105 \n"\r
+ " MOV R6, #106 \n"\r
+ " MOV R8, #108 \n"\r
+ " MOV R9, #109 \n"\r
+ " MOV R10, #110 \n"\r
+ " MOV R11, #111 \n"\r
+ "reg1loop: \n"\r
+ " MOV R0, #100 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
+ " MOV R1, #101 \n"\r
+ " MOV R2, #102 \n"\r
+ " MOV R3, #103 \n"\r
+ " MOV R12, #112 \n"\r
+ " SVC #1 \n" /* Yield just to increase test coverage. */\r
+ " CMP R0, #100 \n" /* Check all the registers still contain their expected values. */\r
+ " BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */\r
+ " CMP R1, #101 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R2, #102 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R3, #103 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R4, #104 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R5, #105 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R6, #106 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R8, #108 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R9, #109 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R10, #110 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R11, #111 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R12, #112 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
+ );\r
+ }\r
+ #endif /* __GNUC__ */\r
+\r
+ /* Send configREG_TEST_1_STILL_EXECUTING to the check task to indicate that this\r
+ task is still functioning. */\r
+ vMainSendImAlive( xQueue, configREG_TEST_1_STILL_EXECUTING );\r
+ vTaskDelay( xDelayTime );\r
+\r
+ #if defined ( __GNUC__ )\r
+ {\r
+ /* Go back to check all the register values again. */\r
+ __asm volatile( " B reg1loop " );\r
+ }\r
+ #endif /* __GNUC__ */\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vRegTest2Implementation( void *pvParameters )\r
+{\r
+/* The queue handle is passed in as the task parameter. This is one method of\r
+passing data into a protected task, the other reg test task uses a different\r
+method. */\r
+QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters;\r
+const TickType_t xDelayTime = pdMS_TO_TICKS( 100UL );\r
+\r
+ for( ;; )\r
+ {\r
+ #if defined ( __GNUC__ )\r
+ {\r
+ /* This task tests the kernel context switch mechanism by reading and\r
+ writing directly to registers - which requires the test to be written\r
+ in assembly code. */\r
+ __asm volatile\r
+ (\r
+ " MOV R4, #4 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */\r
+ " MOV R5, #5 \n"\r
+ " MOV R6, #6 \n"\r
+ " MOV R8, #8 \n" /* Frame pointer is omitted as it must not be changed. */\r
+ " MOV R9, #9 \n"\r
+ " MOV R10, 10 \n"\r
+ " MOV R11, #11 \n"\r
+ "reg2loop: \n"\r
+ " MOV R0, #13 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
+ " MOV R1, #1 \n"\r
+ " MOV R2, #2 \n"\r
+ " MOV R3, #3 \n"\r
+ " MOV R12, #12 \n"\r
+ " CMP R0, #13 \n" /* Check all the registers still contain their expected values. */\r
+ " BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task */\r
+ " CMP R1, #1 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R2, #2 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R3, #3 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R4, #4 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R5, #5 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R6, #6 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R8, #8 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R9, #9 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R10, #10 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R11, #11 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ " CMP R12, #12 \n"\r
+ " BNE vMainDeleteMe \n"\r
+ :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
+ );\r
+ }\r
+ #endif /* __GNUC__ */\r
+\r
+ /* Send configREG_TEST_2_STILL_EXECUTING to the check task to indicate\r
+ that this task is still functioning. */\r
+ vMainSendImAlive( xQueue, configREG_TEST_2_STILL_EXECUTING );\r
+ vTaskDelay( xDelayTime );\r
+\r
+ #if defined ( __GNUC__ )\r
+ {\r
+ /* Go back to check all the register values again. */\r
+ __asm volatile( " B reg2loop " );\r
+ }\r
+ #endif /* __GNUC__ */\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+__asm void vRegTest3Implementation( void )\r
+{\r
+ extern pulRegTest3LoopCounter\r
+\r
+ PRESERVE8\r
+\r
+ /* Fill the core registers with known values. */\r
+ mov r0, #100\r
+ mov r1, #101\r
+ mov r2, #102\r
+ mov r3, #103\r
+ mov r4, #104\r
+ mov r5, #105\r
+ mov r6, #106\r
+ mov r7, #107\r
+ mov r8, #108\r
+ mov r9, #109\r
+ mov r10, #110\r
+ mov r11, #111\r
+ mov r12, #112\r
+\r
+ /* Fill the VFP registers with known values. */\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+\r
+reg1_loop\r
+\r
+ /* Check all the VFP registers still contain the values set above.\r
+ First save registers that are clobbered by the test. */\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #100\r
+ bne reg1_error_loopf\r
+ cmp r1, #101\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #102\r
+ bne reg1_error_loopf\r
+ cmp r1, #103\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #104\r
+ bne reg1_error_loopf\r
+ cmp r1, #105\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #106\r
+ bne reg1_error_loopf\r
+ cmp r1, #107\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #108\r
+ bne reg1_error_loopf\r
+ cmp r1, #109\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #110\r
+ bne reg1_error_loopf\r
+ cmp r1, #111\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #100\r
+ bne reg1_error_loopf\r
+ cmp r1, #101\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #102\r
+ bne reg1_error_loopf\r
+ cmp r1, #103\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #104\r
+ bne reg1_error_loopf\r
+ cmp r1, #105\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #106\r
+ bne reg1_error_loopf\r
+ cmp r1, #107\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #108\r
+ bne reg1_error_loopf\r
+ cmp r1, #109\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #110\r
+ bne reg1_error_loopf\r
+ cmp r1, #111\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #100\r
+ bne reg1_error_loopf\r
+ cmp r1, #101\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #102\r
+ bne reg1_error_loopf\r
+ cmp r1, #103\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #104\r
+ bne reg1_error_loopf\r
+ cmp r1, #105\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #106\r
+ bne reg1_error_loopf\r
+ cmp r1, #107\r
+ bne reg1_error_loopf\r
+\r
+ /* Restore the registers that were clobbered by the test. */\r
+ pop {r0-r1}\r
+\r
+ /* VFP register test passed. Jump to the core register test. */\r
+ b reg1_loopf_pass\r
+\r
+reg1_error_loopf\r
+ /* If this line is hit then a VFP register value was found to be incorrect. */\r
+ b reg1_error_loopf\r
+\r
+reg1_loopf_pass\r
+\r
+ cmp r0, #100\r
+ bne reg1_error_loop\r
+ cmp r1, #101\r
+ bne reg1_error_loop\r
+ cmp r2, #102\r
+ bne reg1_error_loop\r
+ cmp r3, #103\r
+ bne reg1_error_loop\r
+ cmp r4, #104\r
+ bne reg1_error_loop\r
+ cmp r5, #105\r
+ bne reg1_error_loop\r
+ cmp r6, #106\r
+ bne reg1_error_loop\r
+ cmp r7, #107\r
+ bne reg1_error_loop\r
+ cmp r8, #108\r
+ bne reg1_error_loop\r
+ cmp r9, #109\r
+ bne reg1_error_loop\r
+ cmp r10, #110\r
+ bne reg1_error_loop\r
+ cmp r11, #111\r
+ bne reg1_error_loop\r
+ cmp r12, #112\r
+ bne reg1_error_loop\r
+\r
+ /* Everything passed, increment the loop counter. */\r
+ push { r0-r1 }\r
+ ldr r0, =pulRegTest3LoopCounter\r
+ ldr r0, [r0]\r
+ ldr r1, [r0]\r
+ adds r1, r1, #1\r
+ str r1, [r0]\r
+ pop { r0-r1 }\r
+\r
+ /* Start again. */\r
+ b reg1_loop\r
+\r
+reg1_error_loop\r
+ /* If this line is hit then there was an error in a core register value.\r
+ The loop ensures the loop counter stops incrementing. */\r
+ b reg1_error_loop\r
+ nop\r
+ nop\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+__asm void vRegTest4Implementation( void )\r
+{\r
+ extern pulRegTest4LoopCounter;\r
+\r
+ PRESERVE8\r
+\r
+ /* Set all the core registers to known values. */\r
+ mov r0, #-1\r
+ mov r1, #1\r
+ mov r2, #2\r
+ mov r3, #3\r
+ mov r4, #4\r
+ mov r5, #5\r
+ mov r6, #6\r
+ mov r7, #7\r
+ mov r8, #8\r
+ mov r9, #9\r
+ mov r10, #10\r
+ mov r11, #11\r
+ mov r12, #12\r
+\r
+ /* Set all the VFP to known values. */\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+\r
+reg2_loop\r
+\r
+ /* Check all the VFP registers still contain the values set above.\r
+ First save registers that are clobbered by the test. */\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #-1\r
+ bne reg2_error_loopf\r
+ cmp r1, #1\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #2\r
+ bne reg2_error_loopf\r
+ cmp r1, #3\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #4\r
+ bne reg2_error_loopf\r
+ cmp r1, #5\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #6\r
+ bne reg2_error_loopf\r
+ cmp r1, #7\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #8\r
+ bne reg2_error_loopf\r
+ cmp r1, #9\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #10\r
+ bne reg2_error_loopf\r
+ cmp r1, #11\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #-1\r
+ bne reg2_error_loopf\r
+ cmp r1, #1\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #2\r
+ bne reg2_error_loopf\r
+ cmp r1, #3\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #4\r
+ bne reg2_error_loopf\r
+ cmp r1, #5\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #6\r
+ bne reg2_error_loopf\r
+ cmp r1, #7\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #8\r
+ bne reg2_error_loopf\r
+ cmp r1, #9\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #10\r
+ bne reg2_error_loopf\r
+ cmp r1, #11\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #-1\r
+ bne reg2_error_loopf\r
+ cmp r1, #1\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #2\r
+ bne reg2_error_loopf\r
+ cmp r1, #3\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #4\r
+ bne reg2_error_loopf\r
+ cmp r1, #5\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #6\r
+ bne reg2_error_loopf\r
+ cmp r1, #7\r
+ bne reg2_error_loopf\r
+\r
+ /* Restore the registers that were clobbered by the test. */\r
+ pop {r0-r1}\r
+\r
+ /* VFP register test passed. Jump to the core register test. */\r
+ b reg2_loopf_pass\r
+\r
+reg2_error_loopf\r
+ /* If this line is hit then a VFP register value was found to be\r
+ incorrect. */\r
+ b reg2_error_loopf\r
+\r
+reg2_loopf_pass\r
+\r
+ cmp r0, #-1\r
+ bne reg2_error_loop\r
+ cmp r1, #1\r
+ bne reg2_error_loop\r
+ cmp r2, #2\r
+ bne reg2_error_loop\r
+ cmp r3, #3\r
+ bne reg2_error_loop\r
+ cmp r4, #4\r
+ bne reg2_error_loop\r
+ cmp r5, #5\r
+ bne reg2_error_loop\r
+ cmp r6, #6\r
+ bne reg2_error_loop\r
+ cmp r7, #7\r
+ bne reg2_error_loop\r
+ cmp r8, #8\r
+ bne reg2_error_loop\r
+ cmp r9, #9\r
+ bne reg2_error_loop\r
+ cmp r10, #10\r
+ bne reg2_error_loop\r
+ cmp r11, #11\r
+ bne reg2_error_loop\r
+ cmp r12, #12\r
+ bne reg2_error_loop\r
+\r
+ /* Increment the loop counter so the check task knows this task is\r
+ still running. */\r
+ push { r0-r1 }\r
+ ldr r0, =pulRegTest4LoopCounter\r
+ ldr r0, [r0]\r
+ ldr r1, [r0]\r
+ adds r1, r1, #1\r
+ str r1, [r0]\r
+ pop { r0-r1 }\r
+\r
+ /* Yield to increase test coverage. */\r
+ SVC #1\r
+\r
+ /* Start again. */\r
+ b reg2_loop\r
+\r
+reg2_error_loop\r
+ /* If this line is hit then there was an error in a core register value.\r
+ This loop ensures the loop counter variable stops incrementing. */\r
+ b reg2_error_loop\r
+ nop\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Fault handlers are here for convenience as they use compiler specific syntax\r
+and this file is specific to the Keil compiler. */\r
+void hard_fault_handler( uint32_t * hardfault_args )\r
+{\r
+volatile uint32_t stacked_r0;\r
+volatile uint32_t stacked_r1;\r
+volatile uint32_t stacked_r2;\r
+volatile uint32_t stacked_r3;\r
+volatile uint32_t stacked_r12;\r
+volatile uint32_t stacked_lr;\r
+volatile uint32_t stacked_pc;\r
+volatile uint32_t stacked_psr;\r
+\r
+ stacked_r0 = ((uint32_t) hardfault_args[ 0 ]);\r
+ stacked_r1 = ((uint32_t) hardfault_args[ 1 ]);\r
+ stacked_r2 = ((uint32_t) hardfault_args[ 2 ]);\r
+ stacked_r3 = ((uint32_t) hardfault_args[ 3 ]);\r
+\r
+ stacked_r12 = ((uint32_t) hardfault_args[ 4 ]);\r
+ stacked_lr = ((uint32_t) hardfault_args[ 5 ]);\r
+ stacked_pc = ((uint32_t) hardfault_args[ 6 ]);\r
+ stacked_psr = ((uint32_t) hardfault_args[ 7 ]);\r
+\r
+ /* Inspect stacked_pc to locate the offending instruction. */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void HardFault_Handler( void );\r
+__asm void HardFault_Handler( void )\r
+{\r
+ extern hard_fault_handler\r
+\r
+ tst lr, #4\r
+ ite eq\r
+ mrseq r0, msp\r
+ mrsne r0, psp\r
+ ldr r1, [r0, #24]\r
+ ldr r2, hard_fault_handler\r
+ bx r2\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MemManage_Handler( void );\r
+__asm void MemManage_Handler( void )\r
+{\r
+ extern hard_fault_handler\r
+\r
+ tst lr, #4\r
+ ite eq\r
+ mrseq r0, msp\r
+ mrsne r0, psp\r
+ ldr r1, [r0, #24]\r
+ ldr r2, hard_fault_handler\r
+ bx r2\r
+}\r
+/*-----------------------------------------------------------*/\r
--- /dev/null
+;/*****************************************************************************\r
+; * @file: startup_MPS_CM4.s\r
+; * @purpose: CMSIS Cortex-M4 Core Device Startup File\r
+; * for the ARM 'Microcontroller Prototyping System'\r
+; * @version: V1.00\r
+; * @date: 1. Jun. 2010\r
+; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------\r
+; *\r
+; * Copyright (C) 2008-2010 ARM Limited. All rights reserved.\r
+; * ARM Limited (ARM) is supplying this software for use with Cortex-M4\r
+; * processor based microcontrollers. This file can be freely distributed\r
+; * within development tools that are supporting such ARM based processors.\r
+; *\r
+; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+; *\r
+; ****************************************************************************/\r
+\r
+\r
+; <h> Stack Configuration\r
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+; </h>\r
+Stack_Size EQU 0x00000800\r
+\r
+ AREA STACK, NOINIT, READWRITE, ALIGN=3\r
+Stack_Mem SPACE Stack_Size\r
+__initial_sp\r
+\r
+\r
+; <h> Heap Configuration\r
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
+; </h>\r
+\r
+Heap_Size EQU 0x00000000\r
+\r
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3\r
+__heap_base\r
+Heap_Mem SPACE Heap_Size\r
+__heap_limit\r
+\r
+\r
+ PRESERVE8\r
+ THUMB\r
+\r
+\r
+; Vector Table Mapped to Address 0 at Reset\r
+\r
+ AREA RESET, DATA, READONLY\r
+ EXPORT __Vectors\r
+\r
+__Vectors DCD __initial_sp ; Top of Stack\r
+ DCD Reset_Handler ; Reset Handler\r
+ DCD NMI_Handler ; NMI Handler\r
+ DCD HardFault_Handler ; Hard Fault Handler\r
+ DCD MemManage_Handler ; MPU Fault Handler\r
+ DCD BusFault_Handler ; Bus Fault Handler\r
+ DCD UsageFault_Handler ; Usage Fault Handler\r
+ DCD 0 ; Reserved\r
+ DCD 0 ; Reserved\r
+ DCD 0 ; Reserved\r
+ DCD 0 ; Reserved\r
+ DCD SVC_Handler ; SVCall Handler\r
+ DCD DebugMon_Handler ; Debug Monitor Handler\r
+ DCD 0 ; Reserved\r
+ DCD PendSV_Handler ; PendSV Handler\r
+ DCD SysTick_Handler ; SysTick Handler\r
+\r
+\r
+ AREA |.text|, CODE, READONLY\r
+; AREA RESET, CODE, READONLY\r
+\r
+; Reset Handler\r
+\r
+Reset_Handler PROC\r
+ EXPORT Reset_Handler [WEAK]\r
+ IMPORT __main\r
+\r
+ ; Remap vector table\r
+ LDR R0, =__Vectors\r
+ LDR R1, =0xE000ED08\r
+ STR R0, [r1]\r
+ NOP\r
+\r
+ IF {CPU} = "Cortex-M4.fp"\r
+ LDR R0, =0xE000ED88 ; Enable CP10,CP11\r
+ LDR R1,[R0]\r
+ ORR R1,R1,#(0xF << 20)\r
+ STR R1,[R0]\r
+ ENDIF\r
+\r
+ LDR R0, =__main\r
+ BX R0\r
+ ENDP\r
+\r
+\r
+; Dummy Exception Handlers (infinite loops which can be modified)\r
+\r
+NMI_Handler PROC\r
+ EXPORT NMI_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+HardFault_Handler\\r
+ PROC\r
+ EXPORT HardFault_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+MemManage_Handler\\r
+ PROC\r
+ EXPORT MemManage_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+BusFault_Handler\\r
+ PROC\r
+ EXPORT BusFault_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+UsageFault_Handler\\r
+ PROC\r
+ EXPORT UsageFault_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+SVC_Handler PROC\r
+ EXPORT SVC_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+DebugMon_Handler\\r
+ PROC\r
+ EXPORT DebugMon_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+PendSV_Handler PROC\r
+ EXPORT PendSV_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+SysTick_Handler PROC\r
+ EXPORT SysTick_Handler [WEAK]\r
+ B .\r
+ ENDP\r
+\r
+\r
+ ALIGN\r
+\r
+\r
+; User Initial Stack & Heap\r
+\r
+ IF :DEF:__MICROLIB\r
+\r
+ EXPORT __initial_sp\r
+ EXPORT __heap_base\r
+ EXPORT __heap_limit\r
+\r
+ ELSE\r
+\r
+ IMPORT __use_two_region_memory\r
+ EXPORT __user_initial_stackheap\r
+__user_initial_stackheap\r
+\r
+ LDR R0, = Heap_Mem\r
+ LDR R1, =(Stack_Mem + Stack_Size)\r
+ LDR R2, = (Heap_Mem + Heap_Size)\r
+ LDR R3, = Stack_Mem\r
+ BX LR\r
+\r
+ ALIGN\r
+\r
+ ENDIF\r
+\r
+\r
+ END\r
--- /dev/null
+/*\r
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+\r
+/*\r
+ * This file demonstrates the use of FreeRTOS-MPU in a completely statically\r
+ * allocated application (with configSUPPORT_DYNAMIC_ALLOCATION set to 0). It\r
+ * creates tasks in both User mode and Privileged mode, and using both the\r
+ * xTaskCreateStatic() and xTaskCreateRestrictedStatic() API functions. The\r
+ * purpose of each created task is documented in the comments above the task\r
+ * function prototype (in this file), with the task behaviour demonstrated and\r
+ * documented within the task function itself.\r
+ *\r
+ * In addition a queue is used to demonstrate passing data between\r
+ * protected/restricted tasks as well as passing data between an interrupt and\r
+ * a protected/restricted task. A software timer is also used.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include "string.h"\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+#include "timers.h"\r
+#include "event_groups.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Misc constants. */\r
+#define mainDONT_BLOCK ( 0 )\r
+\r
+/* GCC specifics. */\r
+#define mainALIGN_TO( x ) __attribute__((aligned(x)))\r
+\r
+/* Hardware register addresses. */\r
+#define mainVTOR ( * ( volatile uint32_t * ) 0xE000ED08 )\r
+\r
+/* The period of the timer must be less than the rate at which\r
+configPRINT_SYSTEM_STATUS messages are sent to the check task - otherwise the\r
+check task will think the timer has stopped. */\r
+#define mainTIMER_PERIOD pdMS_TO_TICKS( 200 )\r
+\r
+/* The name of the task that is deleted by the Idle task is used in a couple of\r
+places, so is #defined. */\r
+#define mainTASK_TO_DELETE_NAME "DeleteMe"\r
+\r
+/*-----------------------------------------------------------*/\r
+/* Prototypes for functions that implement tasks. -----------*/\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * NOTE: The filling and checking of the registers in the following two tasks\r
+ * is only actually performed when the GCC compiler is used. Use of the\r
+ * queue to communicate with the check task is done with all compilers.\r
+ *\r
+ * Prototype for the first two register test tasks, which execute in User mode.\r
+ * Amongst other things, these fill the CPU registers (other than the FPU\r
+ * registers) with known values before checking that the registers still contain\r
+ * the expected values. Each of the two tasks use different values so an error\r
+ * in the context switch mechanism can be caught. Both tasks execute at the\r
+ * idle priority so will get preempted regularly. Each task repeatedly sends a\r
+ * message on a queue to a 'check' task so the check task knows the register\r
+ * check task is still executing and has not detected any errors. If an error\r
+ * is detected within the task the task is simply deleted so it no longer sends\r
+ * messages.\r
+ *\r
+ * For demonstration and test purposes, both tasks obtain access to the queue\r
+ * handle in different ways; vRegTest1Implementation() is created in Privileged\r
+ * mode and copies the queue handle to its local stack before setting itself to\r
+ * User mode, and vRegTest2Implementation() receives the task handle using its\r
+ * parameter.\r
+ */\r
+extern void vRegTest1Implementation( void *pvParameters );\r
+extern void vRegTest2Implementation( void *pvParameters );\r
+\r
+/*\r
+ * The second two register test tasks are similar to the first two, but do test\r
+ * the floating point registers, execute in Privileged mode, and signal their\r
+ * execution status to the 'check' task by incrementing a loop counter on each\r
+ * iteration instead of sending a message on a queue. The loop counters use a\r
+ * memory region to which the User mode 'check' task has read access.\r
+ *\r
+ * The functions ending 'Implementation' are called by the register check tasks.\r
+ *\r
+ * The tasks are created with xTaskCreateStatic(), so the stack and variables\r
+ * used to hold the task's data structures also have to be provided.\r
+ */\r
+static StackType_t xRegTest3Stack[ configMINIMAL_STACK_SIZE ], xRegTest4Stack[ configMINIMAL_STACK_SIZE ];\r
+static StaticTask_t xRegTest3Buffer, xRegTest4Buffer;\r
+static void prvRegTest3Task( void *pvParameters );\r
+extern void vRegTest3Implementation( void );\r
+static void prvRegTest4Task( void *pvParameters );\r
+extern void vRegTest4Implementation( void );\r
+\r
+/*\r
+ * Prototype for the check task. The check task demonstrates various features\r
+ * of the MPU before entering a loop where it waits for messages to arrive on a\r
+ * queue.\r
+ *\r
+ * Two types of messages can be processes:\r
+ *\r
+ * 1) "I'm Alive" messages sent from the first two register test tasks and a\r
+ * software timer callback, as described above.\r
+ *\r
+ * 2) "Print Status commands" sent periodically by the tick hook function (and\r
+ * therefore from within an interrupt) which commands the check task to write\r
+ * either pass or fail to the terminal, depending on the status of the reg\r
+ * test tasks (no write is performed in the simulator!).\r
+ */\r
+static void prvCheckTask( void *pvParameters );\r
+\r
+/*\r
+ * Prototype for a task created in User mode using vTaskCreateStatic() API\r
+ * function. The task demonstrates the characteristics of such a task,\r
+ * before simply deleting itself. As the task is created without using any\r
+ * dynamic memory allocate the stack and variable in which the task's data\r
+ * structure will be stored must also be provided - however the task is\r
+ * unprivileged so the stack cannot be in a privileged section.\r
+ */\r
+static StackType_t xUserModeTaskStack[ configMINIMAL_STACK_SIZE ];\r
+static PRIVILEGED_DATA StaticTask_t xUserModeTaskBuffer;\r
+static void prvOldStyleUserModeTask( void *pvParameters );\r
+\r
+/*\r
+ * Prototype for a task created in Privileged mode using the\r
+ * xTaskCreateStatic() API function. The task demonstrates the characteristics\r
+ * of such a task, before simply deleting itself. As no dynamic memory\r
+ * allocation is used the stack and variable used to hold the task's data\r
+ * structure must also be provided. The task is privileged, so the stack can\r
+ * be in a privileged section.\r
+ */\r
+static PRIVILEGED_DATA StackType_t xPrivilegedModeTaskStack[ configMINIMAL_STACK_SIZE ];\r
+static PRIVILEGED_DATA StaticTask_t xPrivilegedModeTaskBuffer;\r
+static void prvOldStylePrivilegedModeTask( void *pvParameters );\r
+\r
+/*\r
+ * A task that exercises the API of various RTOS objects before being deleted by\r
+ * the Idle task. This is done for MPU API code coverage test purposes.\r
+ */\r
+static void prvTaskToDelete( void *pvParameters );\r
+\r
+/*\r
+ * Functions called by prvTaskToDelete() to exercise the MPU API.\r
+ */\r
+static void prvExerciseEventGroupAPI( void );\r
+static void prvExerciseSemaphoreAPI( void );\r
+static void prvExerciseTaskNotificationAPI( void );\r
+\r
+/*\r
+ * Just configures any clocks and IO necessary.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * Simply deletes the calling task. The function is provided only because it\r
+ * is simpler to call from asm code than the normal vTaskDelete() API function.\r
+ * It has the noinline attribute because it is called from asm code.\r
+ */\r
+void vMainDeleteMe( void ) __attribute__((noinline));\r
+\r
+/*\r
+ * Used by the first two reg test tasks and a software timer callback function\r
+ * to send messages to the check task. The message just lets the check task\r
+ * know that the tasks and timer are still functioning correctly. If a reg test\r
+ * task detects an error it will delete itself, and in so doing prevent itself\r
+ * from sending any more 'I'm Alive' messages to the check task.\r
+ */\r
+void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );\r
+\r
+/*\r
+ * The check task is created with access to three memory regions (plus its\r
+ * stack). Each memory region is configured with different parameters and\r
+ * prvTestMemoryRegions() demonstrates what can and cannot be accessed for each\r
+ * region. prvTestMemoryRegions() also demonstrates a task that was created\r
+ * as a privileged task settings its own privilege level down to that of a user\r
+ * task.\r
+ */\r
+static void prvTestMemoryRegions( void );\r
+\r
+/*\r
+ * Callback function used with the timer that uses the queue to send messages\r
+ * to the check task.\r
+ */\r
+static void prvTimerCallback( TimerHandle_t xExpiredTimer );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The handle of the queue used to communicate between tasks and between tasks\r
+and interrupts. Note that this is a global scope variable that falls outside of\r
+any MPU region. As such other techniques have to be used to allow the tasks\r
+to gain access to the queue. See the comments in the tasks themselves for\r
+further information. */\r
+QueueHandle_t xGlobalScopeCheckQueue = NULL;\r
+\r
+/* xGlobalScopeCheckQueue is created using xQueueCreateStatic(), so the storage\r
+area and variable used to hold the queue data structure must also be provided.\r
+These are placed in a prviliged segment. */\r
+static PRIVILEGED_DATA StaticQueue_t xGlobalScopeQueueBuffer;\r
+uint8_t PRIVILEGED_DATA ucGlobalScopeQueueStorageArea[ 1 * sizeof( uint32_t ) ];\r
+\r
+\r
+/* Holds the handle of a task that is deleted in the idle task hook - this is\r
+done for code coverage test purposes only. */\r
+static TaskHandle_t xTaskToDelete = NULL;\r
+\r
+/* The timer that periodically sends data to the check task on the queue. This\r
+is created with xTimerCreateStatic(), so the variable in which the timer's data\r
+structure will be stored must also be provided. The structure is placed in the\r
+kernel's privileged data region. */\r
+static TimerHandle_t xTimer = NULL;\r
+static PRIVILEGED_DATA StaticTimer_t xTimerBuffer;\r
+\r
+#if defined ( __GNUC__ )\r
+ extern uint32_t __FLASH_segment_start__[];\r
+ extern uint32_t __FLASH_segment_end__[];\r
+ extern uint32_t __SRAM_segment_start__[];\r
+ extern uint32_t __SRAM_segment_end__[];\r
+ extern uint32_t __privileged_functions_start__[];\r
+ extern uint32_t __privileged_functions_end__[];\r
+ extern uint32_t __privileged_data_start__[];\r
+ extern uint32_t __privileged_data_end__[];\r
+ extern uint32_t __privileged_functions_actual_end__[];\r
+ extern uint32_t __privileged_data_actual_end__[];\r
+#else\r
+ const uint32_t * __FLASH_segment_start__ = ( uint32_t * ) 0x00UL;\r
+ const uint32_t * __FLASH_segment_end__ = ( uint32_t * ) 0x00080000UL;\r
+ const uint32_t * __SRAM_segment_start__ = ( uint32_t * ) 0x20000000UL;\r
+ const uint32_t * __SRAM_segment_end__ = ( uint32_t * ) 0x20008000UL;\r
+ const uint32_t * __privileged_functions_start__ = ( uint32_t * ) 0x00UL;\r
+ const uint32_t * __privileged_functions_end__ = ( uint32_t * ) 0x8000UL;\r
+ const uint32_t * __privileged_data_start__ = ( uint32_t * ) 0x20000000UL;\r
+ const uint32_t * __privileged_data_end__ = ( uint32_t * ) 0x20000800UL;\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+/* Data used by the 'check' task. ---------------------------*/\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Define the constants used to allocate the check task stack. Note that the\r
+stack size is defined in words, not bytes. */\r
+#define mainCHECK_TASK_STACK_SIZE_WORDS 128\r
+#define mainCHECK_TASK_STACK_ALIGNMENT ( mainCHECK_TASK_STACK_SIZE_WORDS * sizeof( portSTACK_TYPE ) )\r
+\r
+/* Declare the stack that will be used by the check task. The kernel will\r
+automatically create an MPU region for the stack. The stack alignment must\r
+match its size, so if 128 words are reserved for the stack then it must be\r
+aligned to ( 128 * 4 ) bytes. */\r
+static portSTACK_TYPE xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS ] mainALIGN_TO( mainCHECK_TASK_STACK_ALIGNMENT );\r
+\r
+/* Declare the variable in which the check task's data structures will be\r
+stored. PRIVILEGED_DATA is used to place this in the kernel's RAM segment. */\r
+static PRIVILEGED_DATA StaticTask_t xCheckTaskBuffer;\r
+\r
+/* Declare three arrays - an MPU region will be created for each array\r
+using the TaskParameters_t structure below. THIS IS JUST TO DEMONSTRATE THE\r
+MPU FUNCTIONALITY, the data is not used by the check tasks primary function\r
+of monitoring the reg test tasks and printing out status information.\r
+\r
+Note that the arrays allocate slightly more RAM than is actually assigned to\r
+the MPU region. This is to permit writes off the end of the array to be\r
+detected even when the arrays are placed in adjacent memory locations (with no\r
+gaps between them). The align size must be a power of two. */\r
+#define mainREAD_WRITE_ARRAY_SIZE 130\r
+#define mainREAD_WRITE_ALIGN_SIZE 128\r
+char cReadWriteArray[ mainREAD_WRITE_ARRAY_SIZE ] mainALIGN_TO( mainREAD_WRITE_ALIGN_SIZE );\r
+\r
+#define mainREAD_ONLY_ARRAY_SIZE 260\r
+#define mainREAD_ONLY_ALIGN_SIZE 256\r
+char cReadOnlyArray[ mainREAD_ONLY_ARRAY_SIZE ] mainALIGN_TO( mainREAD_ONLY_ALIGN_SIZE );\r
+\r
+#define mainPRIVILEGED_ONLY_ACCESS_ARRAY_SIZE 130\r
+#define mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE 128\r
+char cPrivilegedOnlyAccessArray[ mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ] mainALIGN_TO( mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE );\r
+\r
+/* The following two variables are used to communicate the status of the second\r
+two register check tasks (tasks 3 and 4) to the check task. If the variables\r
+keep incrementing, then the register check tasks have not discovered any errors.\r
+If a variable stops incrementing, then an error has been found. The variables\r
+overlay the array that the check task has access to so they can be read by the\r
+check task without causing a memory fault. The check task has the highest\r
+priority so will have finished with the array before the register test tasks\r
+start to access it. */\r
+volatile uint32_t *pulRegTest3LoopCounter = ( uint32_t * ) &( cReadWriteArray[ 0 ] ), *pulRegTest4LoopCounter = ( uint32_t * ) &( cReadWriteArray[ 4 ] );\r
+\r
+/* Fill in a TaskParameters_t structure to define the check task - this is the\r
+structure passed to the xTaskCreateRestricted() function. */\r
+static const TaskParameters_t xCheckTaskParameters =\r
+{\r
+ prvCheckTask, /* pvTaskCode - the function that implements the task. */\r
+ "Check", /* pcName */\r
+ mainCHECK_TASK_STACK_SIZE_WORDS, /* usStackDepth - defined in words, not bytes. */\r
+ ( void * ) 0x12121212, /* pvParameters - this value is just to test that the parameter is being passed into the task correctly. */\r
+ ( tskIDLE_PRIORITY + 1 ) | portPRIVILEGE_BIT,/* uxPriority - this is the highest priority task in the system. The task is created in privileged mode to demonstrate accessing the privileged only data. */\r
+ xCheckTaskStack, /* puxStackBuffer - the array to use as the task stack, as declared above. */\r
+\r
+ /* xRegions - In this case the xRegions array is used to create MPU regions\r
+ for all three of the arrays declared directly above. Each MPU region is\r
+ created with different parameters. Again, THIS IS JUST TO DEMONSTRATE THE\r
+ MPU FUNCTIONALITY, the data is not used by the check tasks primary function\r
+ of monitoring the reg test tasks and printing out status information.*/\r
+ {\r
+ /* Base address Length Parameters */\r
+ { cReadWriteArray, mainREAD_WRITE_ALIGN_SIZE, portMPU_REGION_READ_WRITE },\r
+ { cReadOnlyArray, mainREAD_ONLY_ALIGN_SIZE, portMPU_REGION_READ_ONLY },\r
+ { cPrivilegedOnlyAccessArray, mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE, portMPU_REGION_PRIVILEGED_READ_WRITE }\r
+ },\r
+\r
+ &xCheckTaskBuffer /* Additional structure member present when the task is being created without any dynamic memory allocation. */\r
+};\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+/* Data used by the 'reg test' tasks. -----------------------*/\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Define the constants used to allocate the reg test task stacks. Note that\r
+that stack size is defined in words, not bytes. */\r
+#define mainREG_TEST_STACK_SIZE_WORDS 128\r
+#define mainREG_TEST_STACK_ALIGNMENT ( mainREG_TEST_STACK_SIZE_WORDS * sizeof( portSTACK_TYPE ) )\r
+\r
+/* Declare the stacks that will be used by the reg test tasks. The kernel will\r
+automatically create an MPU region for the stack. The stack alignment must\r
+match its size, so if 128 words are reserved for the stack then it must be\r
+aligned to ( 128 * 4 ) bytes. */\r
+static portSTACK_TYPE xRegTest1Stack[ mainREG_TEST_STACK_SIZE_WORDS ] mainALIGN_TO( mainREG_TEST_STACK_ALIGNMENT );\r
+static portSTACK_TYPE xRegTest2Stack[ mainREG_TEST_STACK_SIZE_WORDS ] mainALIGN_TO( mainREG_TEST_STACK_ALIGNMENT );\r
+\r
+/* The reg test tasks are created using the xTaskCreateRestrictedStatic() API\r
+function, so variables that hold the task's data structures must also be\r
+provided. The are placed in the kernel's privileged memory section. */\r
+static PRIVILEGED_DATA StaticTask_t xRegTest1TaskBuffer, xRegTest2TaskBuffer;\r
+\r
+/* Fill in a TaskParameters_t structure per reg test task to define the tasks. */\r
+static const TaskParameters_t xRegTest1Parameters =\r
+{\r
+ vRegTest1Implementation, /* pvTaskCode - the function that implements the task. */\r
+ "RegTest1", /* pcName */\r
+ mainREG_TEST_STACK_SIZE_WORDS, /* usStackDepth */\r
+ ( void * ) configREG_TEST_TASK_1_PARAMETER, /* pvParameters - this value is just to test that the parameter is being passed into the task correctly. */\r
+ tskIDLE_PRIORITY | portPRIVILEGE_BIT, /* uxPriority - note that this task is created with privileges to demonstrate one method of passing a queue handle into the task. */\r
+ xRegTest1Stack, /* puxStackBuffer - the array to use as the task stack, as declared above. */\r
+ { /* xRegions - this task does not use any non-stack data hence all members are zero. */\r
+ /* Base address Length Parameters */\r
+ { 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00 }\r
+ },\r
+\r
+ &xRegTest1TaskBuffer /* Additional parameter required when the task is created with xTaskCreateRestrictedStatic(). */\r
+};\r
+/*-----------------------------------------------------------*/\r
+\r
+static TaskParameters_t xRegTest2Parameters =\r
+{\r
+ vRegTest2Implementation, /* pvTaskCode - the function that implements the task. */\r
+ "RegTest2", /* pcName */\r
+ mainREG_TEST_STACK_SIZE_WORDS, /* usStackDepth */\r
+ ( void * ) NULL, /* pvParameters - this task uses the parameter to pass in a queue handle, but the queue is not created yet. */\r
+ tskIDLE_PRIORITY, /* uxPriority */\r
+ xRegTest2Stack, /* puxStackBuffer - the array to use as the task stack, as declared above. */\r
+ { /* xRegions - this task does not use any non-stack data hence all members are zero. */\r
+ /* Base address Length Parameters */\r
+ { 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00 }\r
+ },\r
+\r
+ &xRegTest2TaskBuffer /* Additional parameter required when the task is created with xTaskCreateRestrictedStatic(). */\r
+};\r
+\r
+/*-----------------------------------------------------------*/\r
+/* Configures the task that is deleted. ---------------------*/\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Define the constants used to allocate the stack of the task that is\r
+deleted. Note that the stack size is defined in words, not bytes. */\r
+#define mainDELETE_TASK_STACK_SIZE_WORDS 128\r
+#define mainTASK_TO_DELETE_STACK_ALIGNMENT ( mainDELETE_TASK_STACK_SIZE_WORDS * sizeof( portSTACK_TYPE ) )\r
+\r
+/* Declare the stack that will be used by the task that gets deleted. The\r
+kernel will automatically create an MPU region for the stack. The stack\r
+alignment must match its size, so if 128 words are reserved for the stack\r
+then it must be aligned to ( 128 * 4 ) bytes. */\r
+static portSTACK_TYPE xDeleteTaskStack[ mainDELETE_TASK_STACK_SIZE_WORDS ] mainALIGN_TO( mainTASK_TO_DELETE_STACK_ALIGNMENT );\r
+\r
+/* The task that gets deleted is created using xTaskCreateRestrictedStatic(),\r
+so the variable that stores the task's data structure must also be provided.\r
+This is placed in the kernel's privileged data segment. */\r
+static PRIVILEGED_DATA StaticTask_t xStaticDeleteTaskBuffer;\r
+\r
+static TaskParameters_t xTaskToDeleteParameters =\r
+{\r
+ prvTaskToDelete, /* pvTaskCode - the function that implements the task. */\r
+ mainTASK_TO_DELETE_NAME, /* pcName */\r
+ mainDELETE_TASK_STACK_SIZE_WORDS, /* usStackDepth */\r
+ ( void * ) NULL, /* pvParameters - this task uses the parameter to pass in a queue handle, but the queue is not created yet. */\r
+ tskIDLE_PRIORITY + 1, /* uxPriority */\r
+ xDeleteTaskStack, /* puxStackBuffer - the array to use as the task stack, as declared above. */\r
+ { /* xRegions - this task does not use any non-stack data hence all members are zero. */\r
+ /* Base address Length Parameters */\r
+ { 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00 }\r
+ },\r
+\r
+ &xStaticDeleteTaskBuffer /* Additional parameter required when xTaskCreateRestrictedStatic() is used. */\r
+};\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+volatile uint32_t ul1 = 0x123, ul2 = 0;\r
+\r
+int main( void )\r
+{\r
+ configASSERT( ul1 == 0x123 );\r
+ configASSERT( ul2 == 0 );\r
+ prvSetupHardware();\r
+\r
+ /* Create the queue used to pass "I'm alive" messages to the check task. */\r
+ xGlobalScopeCheckQueue = xQueueCreateStatic( 1, sizeof( uint32_t ), ucGlobalScopeQueueStorageArea, &xGlobalScopeQueueBuffer );\r
+\r
+ /* One check task uses the task parameter to receive the queue handle.\r
+ This allows the file scope variable to be accessed from within the task.\r
+ The pvParameters member of xRegTest2Parameters can only be set after the\r
+ queue has been created so is set here. */\r
+ xRegTest2Parameters.pvParameters = xGlobalScopeCheckQueue;\r
+\r
+ /* Create three test tasks. Handles to the created tasks are not required,\r
+ hence the second parameter is NULL. */\r
+ xTaskCreateRestrictedStatic( &xRegTest1Parameters, NULL );\r
+ xTaskCreateRestrictedStatic( &xRegTest2Parameters, NULL );\r
+ xTaskCreateRestrictedStatic( &xCheckTaskParameters, NULL );\r
+\r
+ /* Create a task that does nothing but ensure some of the MPU API functions\r
+ can be called correctly, then get deleted. This is done for code coverage\r
+ test purposes only. The task's handle is saved in xTaskToDelete so it can\r
+ get deleted in the idle task hook. */\r
+ xTaskCreateRestrictedStatic( &xTaskToDeleteParameters, &xTaskToDelete );\r
+\r
+ /* Create the tasks that are created using the original xTaskCreate() API\r
+ function. */\r
+ xTaskCreateStatic( prvOldStyleUserModeTask, /* The function that implements the task. */\r
+ "Task1", /* Text name for the task. */\r
+ 100, /* Stack depth in words. */\r
+ NULL, /* Task parameters. */\r
+ 3, /* Priority and mode (user in this case). */\r
+ xUserModeTaskStack, /* Used as the task's stack. */\r
+ &xUserModeTaskBuffer /* Used to hold the task's data structure. */\r
+ );\r
+\r
+ xTaskCreateStatic( prvOldStylePrivilegedModeTask, /* The function that implements the task. */\r
+ "Task2", /* Text name for the task. */\r
+ 100, /* Stack depth in words. */\r
+ NULL, /* Task parameters. */\r
+ ( 3 | portPRIVILEGE_BIT ), /* Priority and mode. */\r
+ xPrivilegedModeTaskStack, /* Used as the task's stack. */\r
+ &xPrivilegedModeTaskBuffer /* Used to hold the task's data structure. */\r
+ );\r
+\r
+ /* Create the third and fourth register check tasks, as described at the top\r
+ of this file. */\r
+ xTaskCreateStatic( prvRegTest3Task, "Reg3", configMINIMAL_STACK_SIZE, configREG_TEST_TASK_3_PARAMETER, tskIDLE_PRIORITY, xRegTest3Stack, &xRegTest3Buffer );\r
+ xTaskCreateStatic( prvRegTest4Task, "Reg4", configMINIMAL_STACK_SIZE, configREG_TEST_TASK_4_PARAMETER, tskIDLE_PRIORITY, xRegTest4Stack, &xRegTest4Buffer );\r
+\r
+ /* Create and start the software timer. */\r
+ xTimer = xTimerCreateStatic( "Timer", /* Test name for the timer. */\r
+ mainTIMER_PERIOD, /* Period of the timer. */\r
+ pdTRUE, /* The timer will auto-reload itself. */\r
+ ( void * ) 0, /* The timer's ID is used to count the number of times it expires - initialise this to 0. */\r
+ prvTimerCallback, /* The function called when the timer expires. */\r
+ &xTimerBuffer ); /* The variable in which the created timer's data structure will be stored. */\r
+ configASSERT( xTimer );\r
+ xTimerStart( xTimer, mainDONT_BLOCK );\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+\r
+ /* Will only get here if there was insufficient memory to create the idle\r
+ task. */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTask( void *pvParameters )\r
+{\r
+/* This task is created in privileged mode so can access the file scope\r
+queue variable. Take a stack copy of this before the task is set into user\r
+mode. Once that task is in user mode the file scope queue variable will no\r
+longer be accessible but the stack copy will. */\r
+QueueHandle_t xQueue = xGlobalScopeCheckQueue;\r
+int32_t lMessage;\r
+uint32_t ulStillAliveCounts[ 3 ] = { 0 };\r
+const char *pcStatusMessage = "PASS\r\n";\r
+uint32_t ulLastRegTest3CountValue = 0, ulLastRegTest4Value = 0;\r
+\r
+/* The register test tasks that also test the floating point registers increment\r
+a counter on each iteration of their loop. The counters are inside the array\r
+that this task has access to. */\r
+volatile uint32_t *pulOverlaidCounter3 = ( uint32_t * ) &( cReadWriteArray[ 0 ] ), *pulOverlaidCounter4 = ( uint32_t * ) &( cReadWriteArray[ 4 ] );\r
+\r
+/* ulCycleCount is incremented on each cycle of the check task. It can be\r
+viewed updating in the Keil watch window as the simulator does not print to\r
+the ITM port. */\r
+volatile uint32_t ulCycleCount = 0;\r
+\r
+ /* Just to remove compiler warning. */\r
+ ( void ) pvParameters;\r
+\r
+ /* Demonstrate how the various memory regions can and can't be accessed.\r
+ The task privilege level is set down to user mode within this function. */\r
+ prvTestMemoryRegions();\r
+\r
+ /* Clear overlaid reg test counters before entering the loop below. */\r
+ *pulOverlaidCounter3 = 0UL;\r
+ *pulOverlaidCounter4 = 0UL;\r
+\r
+ /* This loop performs the main function of the task, which is blocking\r
+ on a message queue then processing each message as it arrives. */\r
+ for( ;; )\r
+ {\r
+ /* Wait for the next message to arrive. */\r
+ xQueueReceive( xQueue, &lMessage, portMAX_DELAY );\r
+\r
+ switch( lMessage )\r
+ {\r
+ case configREG_TEST_1_STILL_EXECUTING :\r
+ case configREG_TEST_2_STILL_EXECUTING :\r
+ case configTIMER_STILL_EXECUTING :\r
+ /* Message from the first or second register check task, or\r
+ the timer callback function. Increment the count of the\r
+ number of times the message source has sent the message as\r
+ the message source must still be executed. */\r
+ ( ulStillAliveCounts[ lMessage ] )++;\r
+ break;\r
+\r
+ case configPRINT_SYSTEM_STATUS :\r
+ /* Message from tick hook, time to print out the system\r
+ status. If messages have stopped arriving from either of\r
+ the first two reg test task or the timer callback then the\r
+ status must be set to fail. */\r
+ if( ( ulStillAliveCounts[ 0 ] == 0 ) || ( ulStillAliveCounts[ 1 ] == 0 ) || ( ulStillAliveCounts[ 2 ] == 0 ) )\r
+ {\r
+ /* One or both of the test tasks are no longer sending\r
+ 'still alive' messages. */\r
+ pcStatusMessage = "FAIL\r\n";\r
+ }\r
+ else\r
+ {\r
+ /* Reset the count of 'still alive' messages. */\r
+ memset( ( void * ) ulStillAliveCounts, 0x00, sizeof( ulStillAliveCounts ) );\r
+ }\r
+\r
+ /* Check that the register test 3 task is still incrementing\r
+ its counter, and therefore still running. */\r
+ if( ulLastRegTest3CountValue == *pulOverlaidCounter3 )\r
+ {\r
+ pcStatusMessage = "FAIL\r\n";\r
+ }\r
+ ulLastRegTest3CountValue = *pulOverlaidCounter3;\r
+\r
+ /* Check that the register test 4 task is still incrementing\r
+ its counter, and therefore still running. */\r
+ if( ulLastRegTest4Value == *pulOverlaidCounter4 )\r
+ {\r
+ pcStatusMessage = "FAIL\r\n";\r
+ }\r
+ ulLastRegTest4Value = *pulOverlaidCounter4;\r
+\r
+ /**** Print pcStatusMessage here. ****/\r
+ ( void ) pcStatusMessage;\r
+\r
+ /* The cycle count can be viewed updating in the Keil watch\r
+ window if ITM printf is not being used. */\r
+ ulCycleCount++;\r
+ break;\r
+\r
+ default :\r
+ /* Something unexpected happened. Delete this task so the\r
+ error is apparent (no output will be displayed). */\r
+ vMainDeleteMe();\r
+ break;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTestMemoryRegions( void )\r
+{\r
+int32_t x;\r
+char cTemp;\r
+\r
+ /* The check task (from which this function is called) is created in the\r
+ Privileged mode. The privileged array can be both read from and written\r
+ to while this task is privileged. */\r
+ cPrivilegedOnlyAccessArray[ 0 ] = 'a';\r
+ if( cPrivilegedOnlyAccessArray[ 0 ] != 'a' )\r
+ {\r
+ /* Something unexpected happened. Delete this task so the error is\r
+ apparent (no output will be displayed). */\r
+ vMainDeleteMe();\r
+ }\r
+\r
+ /* Writing off the end of the RAM allocated to this task will *NOT* cause a\r
+ protection fault because the task is still executing in a privileged mode.\r
+ Uncomment the following to test. */\r
+ /*cPrivilegedOnlyAccessArray[ mainPRIVILEGED_ONLY_ACCESS_ALIGN_SIZE ] = 'a';*/\r
+\r
+ /* Now set the task into user mode. */\r
+ portSWITCH_TO_USER_MODE();\r
+\r
+ /* Accessing the privileged only array will now cause a fault. Uncomment\r
+ the following line to test. */\r
+ /*cPrivilegedOnlyAccessArray[ 0 ] = 'a';*/\r
+\r
+ /* The read/write array can still be successfully read and written. */\r
+ for( x = 0; x < mainREAD_WRITE_ALIGN_SIZE; x++ )\r
+ {\r
+ cReadWriteArray[ x ] = 'a';\r
+ if( cReadWriteArray[ x ] != 'a' )\r
+ {\r
+ /* Something unexpected happened. Delete this task so the error is\r
+ apparent (no output will be displayed). */\r
+ vMainDeleteMe();\r
+ }\r
+ }\r
+\r
+ /* But attempting to read or write off the end of the RAM allocated to this\r
+ task will cause a fault. Uncomment either of the following two lines to\r
+ test. */\r
+ /* cReadWriteArray[ 0 ] = cReadWriteArray[ -1 ]; */\r
+ /* cReadWriteArray[ mainREAD_WRITE_ALIGN_SIZE ] = 0x00; */\r
+\r
+ /* The read only array can be successfully read... */\r
+ for( x = 0; x < mainREAD_ONLY_ALIGN_SIZE; x++ )\r
+ {\r
+ cTemp = cReadOnlyArray[ x ];\r
+ }\r
+\r
+ /* ...but cannot be written. Uncomment the following line to test. */\r
+ /* cReadOnlyArray[ 0 ] = 'a'; */\r
+\r
+ /* Writing to the first and last locations in the stack array should not\r
+ cause a protection fault. Note that doing this will cause the kernel to\r
+ detect a stack overflow if configCHECK_FOR_STACK_OVERFLOW is greater than\r
+ 1, hence the test is commented out by default. */\r
+ /* xCheckTaskStack[ 0 ] = 0;\r
+ xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS - 1 ] = 0; */\r
+\r
+ /* Writing off either end of the stack array should cause a protection\r
+ fault, uncomment either of the following two lines to test. */\r
+ /* xCheckTaskStack[ -1 ] = 0; */\r
+ /* xCheckTaskStack[ mainCHECK_TASK_STACK_SIZE_WORDS ] = 0; */\r
+\r
+ ( void ) cTemp;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvExerciseEventGroupAPI( void )\r
+{\r
+EventGroupHandle_t xEventGroup;\r
+StaticEventGroup_t xEventGroupBuffer;\r
+EventBits_t xBits;\r
+const EventBits_t xBitsToWaitFor = ( EventBits_t ) 0xff, xBitToClear = ( EventBits_t ) 0x01;\r
+\r
+ /* Exercise some event group functions. */\r
+ xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );\r
+ configASSERT( xEventGroup );\r
+\r
+ /* No bits should be set. */\r
+ xBits = xEventGroupWaitBits( xEventGroup, xBitsToWaitFor, pdTRUE, pdFALSE, mainDONT_BLOCK );\r
+ configASSERT( xBits == ( EventBits_t ) 0 );\r
+\r
+ /* Set bits and read back to ensure the bits were set. */\r
+ xEventGroupSetBits( xEventGroup, xBitsToWaitFor );\r
+ xBits = xEventGroupGetBits( xEventGroup );\r
+ configASSERT( xBits == xBitsToWaitFor );\r
+\r
+ /* Clear a bit and read back again using a different API function. */\r
+ xEventGroupClearBits( xEventGroup, xBitToClear );\r
+ xBits = xEventGroupSync( xEventGroup, 0x00, xBitsToWaitFor, mainDONT_BLOCK );\r
+ configASSERT( xBits == ( xBitsToWaitFor & ~xBitToClear ) );\r
+\r
+ /* Finished with the event group. */\r
+ vEventGroupDelete( xEventGroup );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvExerciseSemaphoreAPI( void )\r
+{\r
+SemaphoreHandle_t xSemaphore;\r
+StaticSemaphore_t xSemaphoreBuffer;\r
+const UBaseType_t uxMaxCount = 5, uxInitialCount = 0;\r
+\r
+ /* Most of the semaphore API is common to the queue API and is already being\r
+ used. This function uses a few semaphore functions that are unique to the\r
+ RTOS objects, rather than generic and used by queues also.\r
+\r
+ First create and use a counting semaphore. */\r
+ xSemaphore = xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, &xSemaphoreBuffer );\r
+ configASSERT( xSemaphore );\r
+\r
+ /* Give the semaphore a couple of times and ensure the count is returned\r
+ correctly. */\r
+ xSemaphoreGive( xSemaphore );\r
+ xSemaphoreGive( xSemaphore );\r
+ configASSERT( uxSemaphoreGetCount( xSemaphore ) == 2 );\r
+ vSemaphoreDelete( xSemaphore );\r
+\r
+ /* Create a recursive mutex, and ensure the mutex holder and count are\r
+ returned returned correctly. */\r
+ xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xSemaphoreBuffer );\r
+ configASSERT( uxSemaphoreGetCount( xSemaphore ) == 1 );\r
+ configASSERT( xSemaphore );\r
+ xSemaphoreTakeRecursive( xSemaphore, mainDONT_BLOCK );\r
+ xSemaphoreTakeRecursive( xSemaphore, mainDONT_BLOCK );\r
+ configASSERT( xSemaphoreGetMutexHolder( xSemaphore ) == xTaskGetCurrentTaskHandle() );\r
+ configASSERT( xSemaphoreGetMutexHolder( xSemaphore ) == xTaskGetHandle( mainTASK_TO_DELETE_NAME ) );\r
+ xSemaphoreGiveRecursive( xSemaphore );\r
+ configASSERT( uxSemaphoreGetCount( xSemaphore ) == 0 );\r
+ xSemaphoreGiveRecursive( xSemaphore );\r
+ configASSERT( uxSemaphoreGetCount( xSemaphore ) == 1 );\r
+ configASSERT( xSemaphoreGetMutexHolder( xSemaphore ) == NULL );\r
+ vSemaphoreDelete( xSemaphore );\r
+\r
+ /* Create a normal mutex, and sure the mutex holder and count are returned\r
+ returned correctly. */\r
+ xSemaphore = xSemaphoreCreateMutexStatic( &xSemaphoreBuffer );\r
+ configASSERT( xSemaphore );\r
+ xSemaphoreTake( xSemaphore, mainDONT_BLOCK );\r
+ xSemaphoreTake( xSemaphore, mainDONT_BLOCK );\r
+ configASSERT( uxSemaphoreGetCount( xSemaphore ) == 0 ); /* Not recursive so can only be 1. */\r
+ configASSERT( xSemaphoreGetMutexHolder( xSemaphore ) == xTaskGetCurrentTaskHandle() );\r
+ xSemaphoreGive( xSemaphore );\r
+ configASSERT( uxSemaphoreGetCount( xSemaphore ) == 1 );\r
+ configASSERT( xSemaphoreGetMutexHolder( xSemaphore ) == NULL );\r
+ vSemaphoreDelete( xSemaphore );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvExerciseTaskNotificationAPI( void )\r
+{\r
+uint32_t ulNotificationValue;\r
+BaseType_t xReturned;\r
+\r
+ /* The task should not yet have a notification pending. */\r
+ xReturned = xTaskNotifyWait( 0, 0, &ulNotificationValue, mainDONT_BLOCK );\r
+ configASSERT( xReturned == pdFAIL );\r
+ configASSERT( ulNotificationValue == 0UL );\r
+\r
+ /* Exercise the 'give' and 'take' versions of the notification API. */\r
+ xTaskNotifyGive( xTaskGetCurrentTaskHandle() );\r
+ xTaskNotifyGive( xTaskGetCurrentTaskHandle() );\r
+ ulNotificationValue = ulTaskNotifyTake( pdTRUE, mainDONT_BLOCK );\r
+ configASSERT( ulNotificationValue == 2 );\r
+\r
+ /* Exercise the 'notify' and 'clear' API. */\r
+ ulNotificationValue = 20;\r
+ xTaskNotify( xTaskGetCurrentTaskHandle(), ulNotificationValue, eSetValueWithOverwrite );\r
+ ulNotificationValue = 0;\r
+ xReturned = xTaskNotifyWait( 0, 0, &ulNotificationValue, mainDONT_BLOCK );\r
+ configASSERT( xReturned == pdPASS );\r
+ configASSERT( ulNotificationValue == 20 );\r
+ xTaskNotify( xTaskGetCurrentTaskHandle(), ulNotificationValue, eSetValueWithOverwrite );\r
+ xReturned = xTaskNotifyStateClear( NULL );\r
+ configASSERT( xReturned == pdTRUE ); /* First time a notification was pending. */\r
+ xReturned = xTaskNotifyStateClear( NULL );\r
+ configASSERT( xReturned == pdFALSE ); /* Second time the notification was already clear. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTaskToDelete( void *pvParameters )\r
+{\r
+ /* Remove compiler warnings about unused parameters. */\r
+ ( void ) pvParameters;\r
+\r
+ /* Check the enter and exit critical macros are working correctly. If the\r
+ SVC priority is below configMAX_SYSCALL_INTERRUPT_PRIORITY then this will\r
+ fault. */\r
+ taskENTER_CRITICAL();\r
+ taskEXIT_CRITICAL();\r
+\r
+ /* Exercise the API of various RTOS objects. */\r
+ prvExerciseEventGroupAPI();\r
+ prvExerciseSemaphoreAPI();\r
+ prvExerciseTaskNotificationAPI();\r
+\r
+ /* For code coverage test purposes it is deleted by the Idle task. */\r
+ configASSERT( uxTaskGetStackHighWaterMark( NULL ) > 0 );\r
+ vTaskSuspend( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationIdleHook( void )\r
+{\r
+volatile const uint32_t *pul;\r
+volatile uint32_t ulReadData;\r
+\r
+ /* The idle task, and therefore this function, run in Supervisor mode and\r
+ can therefore access all memory. Try reading from corners of flash and\r
+ RAM to ensure a memory fault does not occur.\r
+\r
+ Start with the edges of the privileged data area. */\r
+ pul = __privileged_data_start__;\r
+ ulReadData = *pul;\r
+ pul = __privileged_data_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* Next the standard SRAM area. */\r
+ pul = __SRAM_segment_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* And the standard Flash area - the start of which is marked for\r
+ privileged access only. */\r
+ pul = __FLASH_segment_start__;\r
+ ulReadData = *pul;\r
+ pul = __FLASH_segment_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* Reading off the end of Flash or SRAM space should cause a fault.\r
+ Uncomment one of the following two pairs of lines to test. */\r
+\r
+ /* pul = __FLASH_segment_end__ + 4;\r
+ ulReadData = *pul; */\r
+\r
+ /* pul = __SRAM_segment_end__ + 1;\r
+ ulReadData = *pul; */\r
+\r
+ /* One task is created purely so it can be deleted - done for code coverage\r
+ test purposes. */\r
+ if( xTaskToDelete != NULL )\r
+ {\r
+ vTaskDelete( xTaskToDelete );\r
+ xTaskToDelete = NULL;\r
+ }\r
+\r
+ ( void ) ulReadData;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvOldStyleUserModeTask( void *pvParameters )\r
+{\r
+/*const volatile uint32_t *pulStandardPeripheralRegister = ( volatile uint32_t * ) 0x40000000;*/\r
+volatile const uint32_t *pul;\r
+volatile uint32_t ulReadData;\r
+\r
+/* The following lines are commented out to prevent the unused variable\r
+compiler warnings when the tests that use the variable are also commented out. */\r
+/* extern uint32_t __privileged_functions_start__[]; */\r
+/* const volatile uint32_t *pulSystemPeripheralRegister = ( volatile uint32_t * ) 0xe000e014; */\r
+\r
+ ( void ) pvParameters;\r
+\r
+ /* This task is created in User mode using the original xTaskCreate() API\r
+ function. It should have access to all Flash and RAM except that marked\r
+ as Privileged access only. Reading from the start and end of the non-\r
+ privileged RAM should not cause a problem (the privileged RAM is the first\r
+ block at the bottom of the RAM memory). */\r
+ pul = __privileged_data_end__ + 1;\r
+ ulReadData = *pul;\r
+ pul = __SRAM_segment_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* Likewise reading from the start and end of the non-privileged Flash\r
+ should not be a problem (the privileged Flash is the first block at the\r
+ bottom of the Flash memory). */\r
+ pul = __privileged_functions_end__ + 1;\r
+ ulReadData = *pul;\r
+ pul = __FLASH_segment_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* Standard peripherals are accessible. */\r
+ /*ulReadData = *pulStandardPeripheralRegister;*/\r
+\r
+ /* System peripherals are not accessible. Uncomment the following line\r
+ to test. Also uncomment the declaration of pulSystemPeripheralRegister\r
+ at the top of this function.\r
+ ulReadData = *pulSystemPeripheralRegister; */\r
+\r
+ /* Reading from anywhere inside the privileged Flash or RAM should cause a\r
+ fault. This can be tested by uncommenting any of the following pairs of\r
+ lines. Also uncomment the declaration of __privileged_functions_start__\r
+ at the top of this function. */\r
+\r
+ /*pul = __privileged_functions_start__;\r
+ ulReadData = *pul;*/\r
+\r
+ /*pul = __privileged_functions_end__ - 1;\r
+ ulReadData = *pul;*/\r
+\r
+ /*pul = __privileged_data_start__;\r
+ ulReadData = *pul;*/\r
+\r
+ /*pul = __privileged_data_end__ - 1;\r
+ ulReadData = *pul;*/\r
+\r
+ /* Must not just run off the end of a task function, so delete this task.\r
+ Note that because this task was created using xTaskCreate() the stack was\r
+ allocated dynamically and I have not included any code to free it again. */\r
+ vTaskDelete( NULL );\r
+\r
+ ( void ) ulReadData;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvOldStylePrivilegedModeTask( void *pvParameters )\r
+{\r
+volatile const uint32_t *pul;\r
+volatile uint32_t ulReadData;\r
+const volatile uint32_t *pulSystemPeripheralRegister = ( volatile uint32_t * ) 0xe000e014; /* Systick */\r
+/*const volatile uint32_t *pulStandardPeripheralRegister = ( volatile uint32_t * ) 0x40000000;*/\r
+\r
+ ( void ) pvParameters;\r
+\r
+ /* This task is created in Privileged mode using the original xTaskCreate()\r
+ API function. It should have access to all Flash and RAM including that\r
+ marked as Privileged access only. So reading from the start and end of the\r
+ non-privileged RAM should not cause a problem (the privileged RAM is the\r
+ first block at the bottom of the RAM memory). */\r
+ pul = __privileged_data_end__ + 1;\r
+ ulReadData = *pul;\r
+ pul = __SRAM_segment_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* Likewise reading from the start and end of the non-privileged Flash\r
+ should not be a problem (the privileged Flash is the first block at the\r
+ bottom of the Flash memory). */\r
+ pul = __privileged_functions_end__ + 1;\r
+ ulReadData = *pul;\r
+ pul = __FLASH_segment_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* Reading from anywhere inside the privileged Flash or RAM should also\r
+ not be a problem. */\r
+ pul = __privileged_functions_start__;\r
+ ulReadData = *pul;\r
+ pul = __privileged_functions_end__ - 1;\r
+ ulReadData = *pul;\r
+ pul = __privileged_data_start__;\r
+ ulReadData = *pul;\r
+ pul = __privileged_data_end__ - 1;\r
+ ulReadData = *pul;\r
+\r
+ /* Finally, accessing both System and normal peripherals should both be\r
+ possible. */\r
+ ulReadData = *pulSystemPeripheralRegister;\r
+ /*ulReadData = *pulStandardPeripheralRegister;*/\r
+\r
+ /* Must not just run off the end of a task function, so delete this task.\r
+ Note that because this task was created using xTaskCreate() the stack was\r
+ allocated dynamically and I have not included any code to free it again. */\r
+ vTaskDelete( NULL );\r
+\r
+ ( void ) ulReadData;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vMainDeleteMe( void )\r
+{\r
+ vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber )\r
+{\r
+ if( xHandle != NULL )\r
+ {\r
+ xQueueSend( xHandle, &ulTaskNumber, mainDONT_BLOCK );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+static uint32_t ulCallCount = 0;\r
+const uint32_t ulCallsBetweenSends = pdMS_TO_TICKS( 1000 );\r
+const uint32_t ulMessage = configPRINT_SYSTEM_STATUS;\r
+portBASE_TYPE xDummy;\r
+\r
+ /* If configUSE_TICK_HOOK is set to 1 then this function will get called\r
+ from each RTOS tick. It is called from the tick interrupt and therefore\r
+ will be executing in the privileged state. */\r
+\r
+ ulCallCount++;\r
+\r
+ /* Is it time to print out the pass/fail message again? */\r
+ if( ulCallCount >= ulCallsBetweenSends )\r
+ {\r
+ ulCallCount = 0;\r
+\r
+ /* Send a message to the check task to command it to check that all\r
+ the tasks are still running then print out the status.\r
+\r
+ This is running in an ISR so has to use the "FromISR" version of\r
+ xQueueSend(). Because it is in an ISR it is running with privileges\r
+ so can access xGlobalScopeCheckQueue directly. */\r
+ xQueueSendFromISR( xGlobalScopeCheckQueue, &ulMessage, &xDummy );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )\r
+{\r
+ /* If configCHECK_FOR_STACK_OVERFLOW is set to either 1 or 2 then this\r
+ function will automatically get called if a task overflows its stack. */\r
+ ( void ) pxTask;\r
+ ( void ) pcTaskName;\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationMallocFailedHook( void )\r
+{\r
+ /* If configUSE_MALLOC_FAILED_HOOK is set to 1 then this function will\r
+ be called automatically if a call to pvPortMalloc() fails. pvPortMalloc()\r
+ is called automatically when a task, queue or semaphore is created. */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTimerCallback( TaskHandle_t xExpiredTimer )\r
+{\r
+uint32_t ulCount;\r
+\r
+ /* The count of the number of times this timer has expired is saved in the\r
+ timer's ID. Obtain the current count. */\r
+ ulCount = ( uint32_t ) pvTimerGetTimerID( xTimer );\r
+\r
+ /* Increment the count, and save it back into the timer's ID. */\r
+ ulCount++;\r
+ vTimerSetTimerID( xTimer, ( void * ) ulCount );\r
+\r
+ /* Let the check task know the timer is still running. */\r
+ vMainSendImAlive( xGlobalScopeCheckQueue, configTIMER_STILL_EXECUTING );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an\r
+implementation of vApplicationGetIdleTaskMemory() to provide the memory that is\r
+used by the Idle task. */\r
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )\r
+{\r
+/* If the buffers to be provided to the Idle task are declared inside this\r
+function then they must be declared static - otherwise they will be allocated on\r
+the stack and so not exists after this function exits. */\r
+static StaticTask_t xIdleTaskTCB;\r
+static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ];\r
+\r
+ /* Pass out a pointer to the StaticTask_t structure in which the Idle task's\r
+ state will be stored. */\r
+ *ppxIdleTaskTCBBuffer = &xIdleTaskTCB;\r
+\r
+ /* Pass out the array that will be used as the Idle task's stack. */\r
+ *ppxIdleTaskStackBuffer = uxIdleTaskStack;\r
+\r
+ /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.\r
+ Note that, as the array is necessarily of type StackType_t,\r
+ configMINIMAL_STACK_SIZE is specified in words, not bytes. */\r
+ *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the\r
+application must provide an implementation of vApplicationGetTimerTaskMemory()\r
+to provide the memory that is used by the Timer service task. */\r
+void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )\r
+{\r
+/* If the buffers to be provided to the Timer task are declared inside this\r
+function then they must be declared static - otherwise they will be allocated on\r
+the stack and so not exists after this function exits. */\r
+static StaticTask_t xTimerTaskTCB;\r
+static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ];\r
+\r
+ /* Pass out a pointer to the StaticTask_t structure in which the Timer\r
+ task's state will be stored. */\r
+ *ppxTimerTaskTCBBuffer = &xTimerTaskTCB;\r
+\r
+ /* Pass out the array that will be used as the Timer task's stack. */\r
+ *ppxTimerTaskStackBuffer = uxTimerTaskStack;\r
+\r
+ /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.\r
+ Note that, as the array is necessarily of type StackType_t,\r
+ configMINIMAL_STACK_SIZE is specified in words, not bytes. */\r
+ *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTest3Task( void *pvParameters )\r
+{\r
+ /* Although the regtest task is written in assembler, its entry point is\r
+ written in C for convenience of checking the task parameter is being passed\r
+ in correctly. */\r
+ if( pvParameters == configREG_TEST_TASK_3_PARAMETER )\r
+ {\r
+ /* Start the part of the test that is written in assembler. */\r
+ vRegTest3Implementation();\r
+ }\r
+\r
+ /* The following line will only execute if the task parameter is found to\r
+ be incorrect. The check task will detect that the regtest loop counter is\r
+ not being incremented and flag an error. */\r
+ vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTest4Task( void *pvParameters )\r
+{\r
+ /* Although the regtest task is written in assembler, its entry point is\r
+ written in C for convenience of checking the task parameter is being passed\r
+ in correctly. */\r
+ if( pvParameters == configREG_TEST_TASK_4_PARAMETER )\r
+ {\r
+ /* Start the part of the test that is written in assembler. */\r
+ vRegTest4Implementation();\r
+ }\r
+\r
+ /* The following line will only execute if the task parameter is found to\r
+ be incorrect. The check task will detect that the regtest loop counter is\r
+ not being incremented and flag an error. */\r
+ vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask );\r
TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer );\r
BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask );\r
+BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask );\r
void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );\r
void MPU_vTaskDelete( TaskHandle_t xTaskToDelete );\r
void MPU_vTaskDelay( const TickType_t xTicksToDelay );\r
#define xEventGroupSync MPU_xEventGroupSync\r
#define vEventGroupDelete MPU_vEventGroupDelete\r
\r
- /* Remove the privileged function macro. */\r
+ /* Remove the privileged function macro, but keep the PRIVILEGED_DATA\r
+ macro so applications can place data in privileged access sections\r
+ (useful when using statically allocated objects). */\r
#define PRIVILEGED_FUNCTION\r
+ #define PRIVILEGED_DATA __attribute__((section("privileged_data")))\r
\r
#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */\r
\r
UBaseType_t uxPriority;\r
StackType_t *puxStackBuffer;\r
MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];\r
+ #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
+ StaticTask_t * const pxTaskBuffer;\r
+ #endif\r
} TaskParameters_t;\r
\r
/* Used with the uxTaskGetSystemState() function to return the state of each task\r
*<pre>\r
BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );</pre>\r
*\r
+ * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1.\r
+ *\r
* xTaskCreateRestricted() should only be used in systems that include an MPU\r
* implementation.\r
*\r
* The function parameters define the memory regions and associated access\r
* permissions allocated to the task.\r
*\r
+ * See xTaskCreateRestrictedStatic() for a version that does not use any\r
+ * dynamic memory allocation.\r
+ *\r
* @param pxTaskDefinition Pointer to a structure that contains a member\r
* for each of the normal xTaskCreate() parameters (see the xTaskCreate() API\r
* documentation) plus an optional stack buffer and the memory region\r
BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
+/**\r
+ * task. h\r
+ *<pre>\r
+ BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );</pre>\r
+ *\r
+ * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1.\r
+ *\r
+ * xTaskCreateRestrictedStatic() should only be used in systems that include an\r
+ * MPU implementation.\r
+ *\r
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of\r
+ * memory. The first block is used to hold the task's data structures. The\r
+ * second block is used by the task as its stack. If a task is created using\r
+ * xTaskCreateRestricted() then the stack is provided by the application writer,\r
+ * and the memory used to hold the task's data structure is automatically\r
+ * dynamically allocated inside the xTaskCreateRestricted() function. If a task\r
+ * is created using xTaskCreateRestrictedStatic() then the application writer\r
+ * must provide the memory used to hold the task's data structures too.\r
+ * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be\r
+ * created without using any dynamic memory allocation.\r
+ *\r
+ * @param pxTaskDefinition Pointer to a structure that contains a member\r
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API\r
+ * documentation) plus an optional stack buffer and the memory region\r
+ * definitions. If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure\r
+ * contains an additional member, which is used to point to a variable of type\r
+ * StaticTask_t - which is then used to hold the task's data structure.\r
+ *\r
+ * @param pxCreatedTask Used to pass back a handle by which the created task\r
+ * can be referenced.\r
+ *\r
+ * @return pdPASS if the task was successfully created and added to a ready\r
+ * list, otherwise an error code defined in the file projdefs.h\r
+ *\r
+ * Example usage:\r
+ <pre>\r
+// Create an TaskParameters_t structure that defines the task to be created.\r
+// The StaticTask_t variable is only included in the structure when\r
+// configSUPPORT_STATIC_ALLOCATION is set to 1. The PRIVILEGED_DATA macro can\r
+// be used to force the variable into the RTOS kernel's privileged data area.\r
+static PRIVILEGED_DATA StaticTask_t xTaskBuffer;\r
+static const TaskParameters_t xCheckTaskParameters =\r
+{\r
+ vATask, // pvTaskCode - the function that implements the task.\r
+ "ATask", // pcName - just a text name for the task to assist debugging.\r
+ 100, // usStackDepth - the stack size DEFINED IN WORDS.\r
+ NULL, // pvParameters - passed into the task function as the function parameters.\r
+ ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.\r
+ cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.\r
+\r
+ // xRegions - Allocate up to three separate memory regions for access by\r
+ // the task, with appropriate access permissions. Different processors have\r
+ // different memory alignment requirements - refer to the FreeRTOS documentation\r
+ // for full information.\r
+ {\r
+ // Base address Length Parameters\r
+ { cReadWriteArray, 32, portMPU_REGION_READ_WRITE },\r
+ { cReadOnlyArray, 32, portMPU_REGION_READ_ONLY },\r
+ { cPrivilegedOnlyAccessArray, 128, portMPU_REGION_PRIVILEGED_READ_WRITE }\r
+ }\r
+\r
+ &xTaskBuffer; // Holds the task's data structure.\r
+};\r
+\r
+int main( void )\r
+{\r
+TaskHandle_t xHandle;\r
+\r
+ // Create a task from the const structure defined above. The task handle\r
+ // is requested (the second parameter is not NULL) but in this case just for\r
+ // demonstration purposes as its not actually used.\r
+ xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );\r
+\r
+ // Start the scheduler.\r
+ vTaskStartScheduler();\r
+\r
+ // Will only get here if there was insufficient memory to create the idle\r
+ // and/or timer task.\r
+ for( ;; );\r
+}\r
+ </pre>\r
+ * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic\r
+ * \ingroup Tasks\r
+ */\r
+#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
+ BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;\r
+#endif\r
+\r
/**\r
* task. h\r
*<pre>\r
\r
/*-----------------------------------------------------------*/\r
\r
-BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )\r
-{\r
-BaseType_t xReturn;\r
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )\r
+ {\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
\r
- xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask );\r
- vPortResetPrivilege( xRunningPrivileged );\r
- return xReturn;\r
-}\r
+ xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask );\r
+ vPortResetPrivilege( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )\r
+ {\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskCreateRestrictedStatic( pxTaskDefinition, pxCreatedTask );\r
+ vPortResetPrivilege( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )\r
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
void MPU_vTaskList( char *pcWriteBuffer )\r
{\r
BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
-#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )\r
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer )\r
{\r
BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
-#if ( configUSE_QUEUE_SETS == 1 )\r
+#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength )\r
{\r
QueueSetHandle_t xReturn;\r
/*-----------------------------------------------------------*/\r
\r
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
-\r
void *MPU_pvPortMalloc( size_t xSize )\r
{\r
void *pvReturn;\r
\r
return pvReturn;\r
}\r
-\r
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
-\r
void MPU_vPortFree( void *pv )\r
{\r
BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
\r
vPortResetPrivilege( xRunningPrivileged );\r
}\r
-\r
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
-void MPU_vPortInitialiseBlocks( void )\r
-{\r
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ void MPU_vPortInitialiseBlocks( void )\r
+ {\r
+ BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
\r
- vPortInitialiseBlocks();\r
+ vPortInitialiseBlocks();\r
\r
- vPortResetPrivilege( xRunningPrivileged );\r
-}\r
+ vPortResetPrivilege( xRunningPrivileged );\r
+ }\r
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
-size_t MPU_xPortGetFreeHeapSize( void )\r
-{\r
-size_t xReturn;\r
-BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ size_t MPU_xPortGetFreeHeapSize( void )\r
+ {\r
+ size_t xReturn;\r
+ BaseType_t xRunningPrivileged = xPortRaisePrivilege();\r
\r
- xReturn = xPortGetFreeHeapSize();\r
+ xReturn = xPortGetFreeHeapSize();\r
\r
- vPortResetPrivilege( xRunningPrivileged );\r
+ vPortResetPrivilege( xRunningPrivileged );\r
\r
- return xReturn;\r
-}\r
+ return xReturn;\r
+ }\r
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )\r
a statically allocated stack and a dynamically allocated TCB.\r
!!!NOTE!!! If the definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE is\r
changed then the definition of StaticTask_t must also be updated. */\r
-#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE ( ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) || ( portUSING_MPU_WRAPPERS == 1 ) )\r
+#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
#define tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB ( ( uint8_t ) 0 )\r
#define tskSTATICALLY_ALLOCATED_STACK_ONLY ( ( uint8_t ) 1 )\r
#define tskSTATICALLY_ALLOCATED_STACK_AND_TCB ( ( uint8_t ) 2 )\r
#endif /* SUPPORT_STATIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
-#if( portUSING_MPU_WRAPPERS == 1 )\r
+#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
+\r
+ BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )\r
+ {\r
+ TCB_t *pxNewTCB;\r
+ BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;\r
+\r
+ configASSERT( pxTaskDefinition->puxStackBuffer != NULL );\r
+ configASSERT( pxTaskDefinition->pxTaskBuffer != NULL );\r
+\r
+ if( ( pxTaskDefinition->puxStackBuffer != NULL ) && ( pxTaskDefinition->pxTaskBuffer != NULL ) )\r
+ {\r
+ /* Allocate space for the TCB. Where the memory comes from depends\r
+ on the implementation of the port malloc function and whether or\r
+ not static allocation is being used. */\r
+ pxNewTCB = ( TCB_t * ) pxTaskDefinition->pxTaskBuffer;\r
+\r
+ /* Store the stack location in the TCB. */\r
+ pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;\r
+\r
+ #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )\r
+ {\r
+ /* Tasks can be created statically or dynamically, so note this\r
+ task was created statically in case the task is later deleted. */\r
+ pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;\r
+ }\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
+ \r
+ prvInitialiseNewTask( pxTaskDefinition->pvTaskCode,\r
+ pxTaskDefinition->pcName,\r
+ ( uint32_t ) pxTaskDefinition->usStackDepth,\r
+ pxTaskDefinition->pvParameters,\r
+ pxTaskDefinition->uxPriority,\r
+ pxCreatedTask, pxNewTCB,\r
+ pxTaskDefinition->xRegions );\r
+\r
+ prvAddNewTaskToReadyList( pxNewTCB );\r
+ xReturn = pdPASS;\r
+ }\r
+\r
+ return xReturn;\r
+ }\r
+\r
+#endif /* ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
\r
BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )\r
{\r
#endif /* ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) */\r
/*-----------------------------------------------------------*/\r
\r
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )\r
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
\r
void vTaskList( char * pcWriteBuffer )\r
{\r
}\r
}\r
\r
-#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */\r
+#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */\r
/*----------------------------------------------------------*/\r
\r
-#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )\r
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
\r
void vTaskGetRunTimeStats( char *pcWriteBuffer )\r
{\r
}\r
}\r
\r
-#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */\r
+#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */\r
/*-----------------------------------------------------------*/\r
\r
TickType_t uxTaskResetEventItemValue( void )\r
projects / freertos / commitdiff