<option id="com.renesas.cdt.core.Compiler.option.warning11.1438339511" name="Issue Warning if an uninitialised automatic variable is used(-Wuninitialized)" superClass="com.renesas.cdt.core.Compiler.option.warning11" value="true" valueType="boolean"/>\r
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+ <option id="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.debugFormat.2111907264" name="Debug format" superClass="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.debugFormat" value="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.debugFormat.dwarf" valueType="enumerated"/>\r
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+ <option id="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.macroDefines.1975812623" name="Macro Defines" superClass="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.macroDefines" valueType="stringList"/>\r
+ <option id="com.renesas.cdt.core.Compiler.option.includeSymbolTable.1341454572" name="Include Symbol Table(s)" superClass="com.renesas.cdt.core.Compiler.option.includeSymbolTable" value="true" valueType="boolean"/>\r
<inputType id="%Base.Compiler.C.InputType.Id.304532987" name="C Input" superClass="%Base.Compiler.C.InputType.Id"/>\r
</tool>\r
<tool id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.assembler.Id.1483562315" name="Assembler" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.assembler.Id">\r
<option id="com.renesas.cdt.core.Assembler.option.includeFileDirectories.1195749866" name="Include file directories" superClass="com.renesas.cdt.core.Assembler.option.includeFileDirectories" valueType="includePath">\r
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}}\src""/>\r
</option>\r
+ <option id="com.renesas.cdt.core.Assembler.option.includeSymbolTable.139641641" name="Include Symbol Table(-as)" superClass="com.renesas.cdt.core.Assembler.option.includeSymbolTable" value="true" valueType="boolean"/>\r
<inputType id="%Base.Assembler.inputType.Id.1124641218" name="Assembler InputType" superClass="%Base.Assembler.inputType.Id"/>\r
</tool>\r
<tool command="rl78-elf-ld" commandLinePattern="${COMMAND} ${OUTPUT_FLAG}${OUTPUT_PREFIX} ${OUTPUT}${INPUTS} ${FLAGS}" id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.linker.Id.148124689" name="Linker" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.linker.Id">\r
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<listOptionValue builtIn="false" value="-e_PowerON_Reset"/>\r
</option>\r
+ <option command="-stats" id="com.renesas.cdt.core.Linker.option.misc8.1524197031" name="Compute and display statistics about the operation of the linker(-stats)" superClass="com.renesas.cdt.core.Linker.option.misc8" value="true" valueType="boolean"/>\r
</tool>\r
<tool id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.objcopy.Id.1332327082" name="Objcopy" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.objcopy.Id"/>\r
</toolChain>\r
</folderInfo>\r
- <fileInfo id="com.renesas.cdt.RL78.configuration.hardwaredebug.1462655394.1069911675" name="RegTest.S" rcbsApplicability="disable" resourcePath="src/RegTest.S" toolsToInvoke="com.renesas.cdt.rl78.hardwaredebug.win32.tool.compiler.Id.323331132.901443813">\r
- <tool id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.compiler.Id.323331132.901443813" name="Compiler" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.compiler.Id.323331132"/>\r
- </fileInfo>\r
<sourceEntries>\r
<entry excluding="src/RegTest.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>\r
</sourceEntries>\r
<stringAttribute key="com.renesas.cdt.core.optionInitCommands" value=""/>\r
<intAttribute key="com.renesas.cdt.core.portNumber" value="61234"/>\r
<stringAttribute key="com.renesas.cdt.core.runCommands" value=""/>\r
-<stringAttribute key="com.renesas.cdt.core.serverParam" value="-g E1 -l 0 -t R5F10JBC -p 61234 -d 61236 -umFreq= 0 -usFreq= 0 -umClock= 1 -w 1 -usupplyVoltage= 0 -ucommMethod= 0 -usecurityID= 00000000000000000000 -upermitFlash= 1 -uuseWideVoltageMode= 1 -ueraseRom= 1 -uuseOnChipDebug= 0 -uuseUserOptionByte= 0 -ustopTimerEmu= 0 -ustopSerialEmu= 0 -umaskInternalResetSignal= 0 -umaskTargetResetSignal= 0 -n 0 -uverifyOnWritingMemory= 1"/>\r
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<booleanAttribute key="com.renesas.cdt.core.setResume" value="true"/>\r
<booleanAttribute key="com.renesas.cdt.core.setStopAt" value="true"/>\r
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<stringAttribute key="com.renesas.cdt.core.stopAt" value="main"/>\r
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<booleanAttribute key="com.renesas.cdt.launch.dsf.USE_DEFAULT_IO_MAP" value="true"/>\r
<booleanAttribute key="com.renesas.hardwaredebug.e1.le" value="true"/>\r
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-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>\r
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<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>\r
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<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="true"/>\r
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>\r
+<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>\r
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<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="HardwareDebug\RTOSDemo.x"/>\r
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RTOSDemo"/>\r
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<listEntry value="/RTOSDemo"/>\r
</listAttribute>\r
<listEntry value="4"/>\r
</listAttribute>\r
<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="false"/>\r
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/>\r
</launchConfiguration>\r
***************************************************************************\r
\r
\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
fully thread aware and reentrant UDP/IP stack.\r
\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems, who sell the code with commercial support,\r
indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
*/\r
\r
* See http://www.freertos.org/a00110.html.\r
*----------------------------------------------------------*/\r
\r
-/* This #ifdef prevents the enclosed code being included from within an\r
-asm file. It is valid in a C file, but not valid in an asm file. */\r
-#ifdef __IAR_SYSTEMS_ICC__\r
-\r
- #pragma language=extended\r
- #pragma system_include\r
-\r
- #include <intrinsics.h>\r
-\r
- /* Device specific includes. */\r
- #include <ior5f100le.h>\r
- #include <ior5f100le_ext.h>\r
-\r
-#endif /* __IAR_SYSTEMS_ICC__ */\r
-\r
#define configUSE_PREEMPTION 1\r
#define configTICK_RATE_HZ ( ( unsigned short ) 1000 )\r
+#define configCPU_CLOCK_HZ ( ( unsigned long ) 32000000 ) /* Using the internal high speed clock */\r
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 4 )\r
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 80 )\r
#define configMAX_TASK_NAME_LEN ( 10 )\r
#define INCLUDE_xTaskGetIdleTaskHandle 0\r
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0\r
\r
-\r
-/******************************************************************************\r
- * PORT SPECIFIC CONFIGURATION OPTIONS\r
- ******************************************************************************/\r
-\r
-/*\r
- * RL78/G13 Clock Source Configuration\r
- * 1 = use internal High Speed Clock Source (typically 32Mhz on the RL78/G13)\r
- * 0 = use external Clock Source\r
- */\r
-#define configCLOCK_SOURCE 1\r
-\r
-#if configCLOCK_SOURCE == 0\r
- #define configCPU_CLOCK_HZ ( ( unsigned long ) 20000000 ) /* using the external clock source */\r
-#else\r
- #define configCPU_CLOCK_HZ ( ( unsigned long ) 32000000 ) /* using the internal high speed clock */\r
-#endif /* configCLOCK_SOURCE */\r
-\r
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }\r
\r
+#define __DATA_MODEL_FAR__ 0\r
+#define __DATA_MODEL_NEAR__ 1\r
+#define __DATA_MODEL__ __DATA_MODEL_FAR__\r
\r
\r
#endif /* FREERTOS_CONFIG_H */\r
mission critical applications that require provable dependability.\r
*/\r
\r
+#include "FreeRTOSConfig.h"\r
#include "ISR_Support.h"\r
\r
#define CS 0xFFFFC\r
portSAVE_CONTEXT\r
/* Call the scheduler to select the next task. */\r
call !!_vTaskSwitchContext\r
- /*portRESTORE_CONTEXT ; Restore the context of the next task to run.*/\r
+ /* Restore the context of the next task to run. */\r
+ portRESTORE_CONTEXT\r
retb\r
\r
\r
/* Starts the scheduler by restoring the context of the task that will execute\r
first. */\r
_vPortStartFirstTask:\r
- /* portRESTORE_CONTEXT ; Restore the context of whichever task the ... */\r
- reti /*An interrupt stack frame is used so the task */\r
- /* is started using a RETI instruction. */\r
+ /* Restore the context of whichever task will execute first. */\r
+ portRESTORE_CONTEXT\r
+ /* An interrupt stack frame is used so the task is started using RETI. */\r
+ reti\r
\r
/* FreeRTOS tick handler. This is installed as the interval timer interrupt\r
handler. */\r
_vPortTickISR:\r
\r
- /* portSAVE_CONTEXT ; Save the context of the current task. */\r
- call !!_vTaskIncrementTick /* Call the timer tick function. */\r
+ /* Save the context of the currently executing task. */\r
+ portSAVE_CONTEXT\r
+ /* Call the RTOS tick function. */\r
+ call !!_vTaskIncrementTick\r
#if configUSE_PREEMPTION == 1\r
- call !!_vTaskSwitchContext /* Call the scheduler to select the next task. */\r
+ /* Select the next task to run. */\r
+ call !!_vTaskSwitchContext\r
#endif\r
- /* portRESTORE_CONTEXT ; Restore the context of the next task to run. */\r
+ /* Retore the context of whichever task will run next. */\r
+ portRESTORE_CONTEXT\r
reti\r
\r
-\r
-/* Install the interrupt handlers\r
-\r
- COMMON INTVEC:CODE:ROOT(1)\r
- ORG 56\r
- DW vPortTickISR\r
-\r
- COMMON INTVEC:CODE:ROOT(1)\r
- ORG 126\r
- DW vPortYield */\r
-\r
-\r
.end\r
\r
--- /dev/null
+/*\r
+ FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+\r
+ >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
+ details. You should have received a copy of the GNU General Public License\r
+ and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
+ viewed here: http://www.freertos.org/a00114.html and also obtained by\r
+ writing to Real Time Engineers Ltd., contact details for whom are available\r
+ on the FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
+ fully thread aware and reentrant UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems, who sell the code with commercial support,\r
+ indemnification and middleware, under the OpenRTOS brand.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+*/\r
+\r
+\r
+/*\r
+ * The simplest possible implementation of pvPortMalloc(). Note that this\r
+ * implementation does NOT allow allocated memory to be freed again.\r
+ *\r
+ * See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the\r
+ * memory management pages of http://www.FreeRTOS.org for more information.\r
+ */\r
+#include <stdlib.h>\r
+\r
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
+all the API functions to use the MPU wrappers. That should only be done when\r
+task.h is included from an application file. */\r
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
+\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
+\r
+/* A few bytes might be lost to byte aligning the heap start address. */\r
+#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )\r
+\r
+/* Allocate the memory for the heap. */\r
+static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];\r
+static size_t xNextFreeByte = ( size_t ) 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void *pvPortMalloc( size_t xWantedSize )\r
+{\r
+void *pvReturn = NULL;\r
+static unsigned char *pucAlignedHeap = NULL;\r
+\r
+ /* Ensure that blocks are always aligned to the required number of bytes. */\r
+ #if portBYTE_ALIGNMENT != 1\r
+ if( xWantedSize & portBYTE_ALIGNMENT_MASK )\r
+ {\r
+ /* Byte alignment required. */\r
+ xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );\r
+ }\r
+ #endif\r
+\r
+ vTaskSuspendAll();\r
+ {\r
+ if( pucAlignedHeap == NULL )\r
+ {\r
+ /* Ensure the heap starts on a correctly aligned boundary. */\r
+ pucAlignedHeap = ( unsigned char * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
+ }\r
+\r
+ /* Check there is enough room left for the allocation. */\r
+ if( ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&\r
+ ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */\r
+ {\r
+ /* Return the next free byte then increment the index past this\r
+ block. */\r
+ pvReturn = pucAlignedHeap + xNextFreeByte;\r
+ xNextFreeByte += xWantedSize;\r
+ }\r
+ }\r
+ xTaskResumeAll();\r
+\r
+ #if( configUSE_MALLOC_FAILED_HOOK == 1 )\r
+ {\r
+ if( pvReturn == NULL )\r
+ {\r
+ extern void vApplicationMallocFailedHook( void );\r
+ vApplicationMallocFailedHook();\r
+ }\r
+ }\r
+ #endif\r
+\r
+ return pvReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortFree( void *pv )\r
+{\r
+ /* Memory cannot be freed using this scheme. See heap_2.c, heap_3.c and\r
+ heap_4.c for alternative implementations, and the memory management pages of\r
+ http://www.FreeRTOS.org for more information. */\r
+ ( void ) pv;\r
+\r
+ /* Force an assert as it is invalid to call this function. */\r
+ configASSERT( pv == NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortInitialiseBlocks( void )\r
+{\r
+ /* Only required when static memory is not cleared. */\r
+ xNextFreeByte = ( size_t ) 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+size_t xPortGetFreeHeapSize( void )\r
+{\r
+ return ( configADJUSTED_HEAP_SIZE - xNextFreeByte );\r
+}\r
+\r
+\r
+\r
+++ /dev/null
-/*\r
- FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
- mission critical applications that require provable dependability.\r
-*/\r
-\r
-/*\r
- * A sample implementation of pvPortMalloc() and vPortFree() that combines \r
- * (coalescences) adjacent memory blocks as they are freed, and in so doing \r
- * limits memory fragmentation.\r
- *\r
- * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the \r
- * memory management pages of http://www.FreeRTOS.org for more information.\r
- */\r
-#include <stdlib.h>\r
-\r
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
-all the API functions to use the MPU wrappers. That should only be done when\r
-task.h is included from an application file. */\r
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
-\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-\r
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
-\r
-/* Block sizes must not get too small. */\r
-#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )\r
-\r
-/* A few bytes might be lost to byte aligning the heap start address. */\r
-#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )\r
-\r
-/* Allocate the memory for the heap. */\r
-static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];\r
-\r
-/* Define the linked list structure. This is used to link free blocks in order\r
-of their memory address. */\r
-typedef struct A_BLOCK_LINK\r
-{\r
- struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */\r
- size_t xBlockSize; /*<< The size of the free block. */\r
-} xBlockLink;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Inserts a block of memory that is being freed into the correct position in \r
- * the list of free memory blocks. The block being freed will be merged with\r
- * the block in front it and/or the block behind it if the memory blocks are\r
- * adjacent to each other.\r
- */\r
-static void prvInsertBlockIntoFreeList( xBlockLink *pxBlockToInsert );\r
-\r
-/*\r
- * Called automatically to setup the required heap structures the first time\r
- * pvPortMalloc() is called.\r
- */\r
-static void prvHeapInit( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The size of the structure placed at the beginning of each allocated memory\r
-block must by correctly byte aligned. */\r
-static const unsigned short heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + portBYTE_ALIGNMENT - ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) );\r
-\r
-/* Ensure the pxEnd pointer will end up on the correct byte alignment. */\r
-static const size_t xTotalHeapSize = ( ( size_t ) configADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );\r
-\r
-/* Create a couple of list links to mark the start and end of the list. */\r
-static xBlockLink xStart, *pxEnd = NULL;\r
-\r
-/* Keeps track of the number of free bytes remaining, but says nothing about\r
-fragmentation. */\r
-static size_t xFreeBytesRemaining = ( ( size_t ) configADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );\r
-\r
-/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void *pvPortMalloc( size_t xWantedSize )\r
-{\r
-xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink;\r
-void *pvReturn = NULL;\r
-\r
- vTaskSuspendAll();\r
- {\r
- /* If this is the first call to malloc then the heap will require\r
- initialisation to setup the list of free blocks. */\r
- if( pxEnd == NULL )\r
- {\r
- prvHeapInit();\r
- }\r
-\r
- /* The wanted size is increased so it can contain a xBlockLink\r
- structure in addition to the requested amount of bytes. */\r
- if( xWantedSize > 0 )\r
- {\r
- xWantedSize += heapSTRUCT_SIZE;\r
-\r
- /* Ensure that blocks are always aligned to the required number of \r
- bytes. */\r
- if( xWantedSize & portBYTE_ALIGNMENT_MASK )\r
- {\r
- /* Byte alignment required. */\r
- xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );\r
- }\r
- }\r
-\r
- if( ( xWantedSize > 0 ) && ( xWantedSize < xTotalHeapSize ) )\r
- {\r
- /* Traverse the list from the start (lowest address) block until one\r
- of adequate size is found. */\r
- pxPreviousBlock = &xStart;\r
- pxBlock = xStart.pxNextFreeBlock;\r
- while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )\r
- {\r
- pxPreviousBlock = pxBlock;\r
- pxBlock = pxBlock->pxNextFreeBlock;\r
- }\r
-\r
- /* If the end marker was reached then a block of adequate size was\r
- not found. */\r
- if( pxBlock != pxEnd )\r
- {\r
- /* Return the memory space - jumping over the xBlockLink structure\r
- at its start. */\r
- pvReturn = ( void * ) ( ( ( unsigned char * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );\r
-\r
- /* This block is being returned for use so must be taken out of\r
- the list of free blocks. */\r
- pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;\r
-\r
- /* If the block is larger than required it can be split into two. */\r
- if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )\r
- {\r
- /* This block is to be split into two. Create a new block\r
- following the number of bytes requested. The void cast is\r
- used to prevent byte alignment warnings from the compiler. */\r
- pxNewBlockLink = ( void * ) ( ( ( unsigned char * ) pxBlock ) + xWantedSize );\r
-\r
- /* Calculate the sizes of two blocks split from the single\r
- block. */\r
- pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;\r
- pxBlock->xBlockSize = xWantedSize;\r
-\r
- /* Insert the new block into the list of free blocks. */\r
- prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );\r
- }\r
-\r
- xFreeBytesRemaining -= pxBlock->xBlockSize;\r
- }\r
- }\r
- }\r
- xTaskResumeAll();\r
-\r
- #if( configUSE_MALLOC_FAILED_HOOK == 1 )\r
- {\r
- if( pvReturn == NULL )\r
- {\r
- extern void vApplicationMallocFailedHook( void );\r
- vApplicationMallocFailedHook();\r
- }\r
- }\r
- #endif\r
-\r
- return pvReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortFree( void *pv )\r
-{\r
-unsigned char *puc = ( unsigned char * ) pv;\r
-xBlockLink *pxLink;\r
-\r
- if( pv != NULL )\r
- {\r
- /* The memory being freed will have an xBlockLink structure immediately\r
- before it. */\r
- puc -= heapSTRUCT_SIZE;\r
-\r
- /* This casting is to keep the compiler from issuing warnings. */\r
- pxLink = ( void * ) puc;\r
-\r
- vTaskSuspendAll();\r
- {\r
- /* Add this block to the list of free blocks. */\r
- xFreeBytesRemaining += pxLink->xBlockSize;\r
- prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) ); \r
- }\r
- xTaskResumeAll();\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-size_t xPortGetFreeHeapSize( void )\r
-{\r
- return xFreeBytesRemaining;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortInitialiseBlocks( void )\r
-{\r
- /* This just exists to keep the linker quiet. */\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvHeapInit( void )\r
-{\r
-xBlockLink *pxFirstFreeBlock;\r
-unsigned char *pucHeapEnd, *pucAlignedHeap;\r
-\r
- /* Ensure the heap starts on a correctly aligned boundary. */\r
- pucAlignedHeap = ( unsigned char * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
-\r
- /* xStart is used to hold a pointer to the first item in the list of free\r
- blocks. The void cast is used to prevent compiler warnings. */\r
- xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;\r
- xStart.xBlockSize = ( size_t ) 0;\r
-\r
- /* pxEnd is used to mark the end of the list of free blocks and is inserted\r
- at the end of the heap space. */\r
- pucHeapEnd = pucAlignedHeap + xTotalHeapSize;\r
- pucHeapEnd -= heapSTRUCT_SIZE;\r
- pxEnd = ( void * ) pucHeapEnd;\r
- configASSERT( ( ( ( unsigned long ) pxEnd ) & ( ( unsigned long ) portBYTE_ALIGNMENT_MASK ) ) == 0UL );\r
- pxEnd->xBlockSize = 0;\r
- pxEnd->pxNextFreeBlock = NULL;\r
-\r
- /* To start with there is a single free block that is sized to take up the\r
- entire heap space, minus the space taken by pxEnd. */\r
- pxFirstFreeBlock = ( void * ) pucAlignedHeap;\r
- pxFirstFreeBlock->xBlockSize = xTotalHeapSize - heapSTRUCT_SIZE;\r
- pxFirstFreeBlock->pxNextFreeBlock = pxEnd;\r
-\r
- /* The heap now contains pxEnd. */\r
- xFreeBytesRemaining -= heapSTRUCT_SIZE;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvInsertBlockIntoFreeList( xBlockLink *pxBlockToInsert )\r
-{\r
-xBlockLink *pxIterator;\r
-unsigned char *puc;\r
-\r
- /* Iterate through the list until a block is found that has a higher address\r
- than the block being inserted. */\r
- for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )\r
- {\r
- /* Nothing to do here, just iterate to the right position. */\r
- }\r
-\r
- /* Do the block being inserted, and the block it is being inserted after\r
- make a contiguous block of memory? */ \r
- puc = ( unsigned char * ) pxIterator;\r
- if( ( puc + pxIterator->xBlockSize ) == ( unsigned char * ) pxBlockToInsert )\r
- {\r
- pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;\r
- pxBlockToInsert = pxIterator;\r
- }\r
-\r
- /* Do the block being inserted, and the block it is being inserted before\r
- make a contiguous block of memory? */\r
- puc = ( unsigned char * ) pxBlockToInsert;\r
- if( ( puc + pxBlockToInsert->xBlockSize ) == ( unsigned char * ) pxIterator->pxNextFreeBlock )\r
- {\r
- if( pxIterator->pxNextFreeBlock != pxEnd )\r
- {\r
- /* Form one big block from the two blocks. */\r
- pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;\r
- pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;\r
- }\r
- else\r
- {\r
- pxBlockToInsert->pxNextFreeBlock = pxEnd;\r
- }\r
- }\r
- else\r
- {\r
- pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \r
- }\r
-\r
- /* If the block being inserted plugged a gab, so was merged with the block\r
- before and the block after, then it's pxNextFreeBlock pointer will have\r
- already been set, and should not be set here as that would make it point\r
- to itself. */\r
- if( pxIterator != pxBlockToInsert )\r
- {\r
- pxIterator->pxNextFreeBlock = pxBlockToInsert;\r
- }\r
-}\r
-\r
--- /dev/null
+/*\r
+ FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+\r
+ >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
+ details. You should have received a copy of the GNU General Public License\r
+ and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
+ viewed here: http://www.freertos.org/a00114.html and also obtained by\r
+ writing to Real Time Engineers Ltd., contact details for whom are available\r
+ on the FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
+ fully thread aware and reentrant UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems, who sell the code with commercial support,\r
+ indemnification and middleware, under the OpenRTOS brand.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+*/\r
+\r
+/*\r
+ * Board specific macros to initialise and toggle an LED.\r
+ */\r
+\r
+#ifndef LED_IO_H\r
+#define LED_IO_H\r
+\r
+ #ifdef YRPBRL78G13\r
+ #define LED_BIT ( P7_bit.no7 )\r
+ #define LED_INIT() P7 &= 0x7F; PM7 &= 0x7F\r
+ #endif /* YRPBRL78G13 */\r
+\r
+ #ifdef YRDKRL78G14\r
+ #define LED_BIT ( P1_bit.no0 )\r
+ #define LED_INIT() P1 &= 0xFE; PM1 &= 0xFE\r
+ #endif /* YRDKRL78G14 */\r
+\r
+ #ifdef RSKRL78G1C\r
+ #define LED_BIT ( P0_bit.no1 )\r
+ #define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD\r
+ #endif /* RSKRL78G1C */\r
+\r
+ #ifndef LED_BIT\r
+ #error The hardware platform is not defined\r
+ #endif\r
+\r
+#endif /* LED_IO_H */\r
+\r
/* This file is generated by e2studio. */
/* */
/***********************************************************************/
- \r
- \r
- \r
\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-extern void HardwareSetup(void);\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
+/* Scheduler include files. */
+#include "FreeRTOS.h"
+
+/* Hardware includes. */
+#include "port_iodefine.h"
+\r
void HardwareSetup(void)\r
{\r
-\r
-} \r
+unsigned char ucResetFlag = RESF;
+
+ portDISABLE_INTERRUPTS();
+
+ /* Set fMX */
+ CMC = 0x00;
+ MSTOP = 1U;
+
+ /* Set fMAIN */
+ MCM0 = 0U;
+
+ /* Set fSUB */
+ XTSTOP = 1U;
+ OSMC = 0x10;
+
+ /* Set fCLK */
+ CSS = 0U;
+
+ /* Set fIH */
+ HIOSTOP = 0U;
+
+ /* LED port initialization. */
+ LED_INIT();
+}\r
/* PROJECT NAME : RTOSDemo */
/* FILE : interrupt_handlers.c */
/* DESCRIPTION : Interrupt Handler */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
void INT_P5 (void) { }\r
\r
/*\r
- * INT_DMA0 (0x1A)\r
+ * INT_CSI20/INT_IIC20/INT_ST2 (0x14)
*/\r
-void INT_DMA0 (void) { }\r
+void INT_ST2 (void) { }
+//void INT_CSI20 (void) { }
+//void INT_IIC20 (void) { }
+
+/*
+ * INT_CSI21/INT_IIC21/INT_SR2 (0x16)
+ */\r
+void INT_SR2 (void) { }\r
+//void INT_CSI21 (void) { }
+//void INT_IIC21 (void) { }
\r
/*\r
- * INT_DMA1 (0x1C)\r
+ * INT_SRE2/INT_TM11H (0x18)\r
*/\r
-void INT_DMA1 (void) { }\r
+void INT_TM11H (void) { }\r
+//void INT_SRE2 (void) { }
\r
/*\r
* INT_CSI00/INT_IIC00/INT_ST0 (0x1E)\r
//void INT_IIC00 (void) { }\r
\r
/*\r
- * INT_TM00 (0x20)\r
- */\r
-void INT_TM00 (void) { }\r
-\r
-/*\r
- * INT_CSI01/INT_IIC01/INT_SR0 (0x22)\r
+ * INT_CSI01/INT_IIC01/INT_SR0 (0x20)\r
*/\r
void INT_SR0 (void) { }\r
//void INT_CSI01 (void) { }\r
//void INT_IIC01 (void) { }\r
\r
/*\r
- * INT_SRE0/INT_TM01H (0x24)\r
+ * INT_SRE0/INT_TM01H (0x22)\r
*/\r
void INT_TM01H (void) { }\r
//void INT_SRE0 (void) { }\r
\r
/*\r
- * INT_TM03H (0x2A)\r
+ * INT_CSI10/INT_IIC10/INT_ST1 (0x24)
+ */
+void INT_ST1 (void) { }
+//void INT_CSI10 (void) { }
+//void INT_IIC10 (void) { }
+
+/*
+ * INT_CSI11/INT_IIC11/INT_SR1 (0x26)
+ */
+void INT_SR1 (void) { }
+//void INT_CSI11 (void) { }
+//void INT_IIC11 (void) { }
+
+/*
+ * INT_SRE1/INT_TM03H (0x28)\r
*/\r
void INT_TM03H (void) { }\r
+//void INT_SRE1 (void) { }
\r
/*\r
- * INT_IICA0 (0x2C)\r
+ * INT_IICA0 (0x2A)\r
*/\r
void INT_IICA0 (void) { }\r
+
+/*
+ * INT_TM00 (0x2C)
+ */
+void INT_TM00 (void) { }
\r
/*\r
* INT_TM01 (0x2E)\r
void INT_IT (void) { }\r
\r
/*\r
- * INT_USB (0x3C)\r
+ * INT_KR (0x3A)\r
*/\r
-void INT_USB (void) { }\r
+void INT_KR (void) { }
+
+/*
+ * INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
+ */
+void INT_ST3 (void) { }\r
+//void INT_CSI30 (void) { }
+//void INT_IIC30 (void) { }
\r
/*\r
- * INT_RSUM (0x3E)\r
+ * INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
+ */
+void INT_SR3 (void) { }
+//void INT_CSI31 (void) { }
+//void INT_IIC31 (void) { }
+
+/*
+ * INT_TRJ0 (0x40)
+ */
+void INT_TRJ0 (void) { }
+
+/*
+ * INT_TM10 (0x42)
+ */
+void INT_TM10 (void) { }
+
+/*
+ * INT_TM11 (0x44)
+ */
+void INT_TM11 (void) { }
+
+/*
+ * INT_TM12 (0x46)
+ */
+void INT_TM12 (void) { }
+
+/*
+ * INT_TM13 (0x48)\r
*/\r
-void INT_RSUM (void) { }\r
+void INT_TM13 (void) { }\r
\r
/*\r
+ * INT_P6 (0x4A)
+ */
+void INT_P6 (void) { }
+
+/*
+ * INT_P7 (0x4C)
+ */
+void INT_P7 (void) { }
+
+/*
* INT_P8 (0x4E)\r
*/\r
void INT_P8 (void) { }\r
void INT_P9 (void) { }\r
\r
/*\r
- * INT_MD (0x5E)\r
+ * INT_CMP0/INT_P10 (0x52)
+ */
+void INT_P10 (void) { }
+//void INT_CMP0 (void) { }
+
+/*
+ * INT_CMP1/INT_P11 (0x54)
+ */
+void INT_P11 (void) { }
+//void INT_CMP1 (void) { }
+
+/*
+ * INT_TRD0 (0x56)\r
*/\r
-void INT_MD (void) { }\r
+void INT_TRD0 (void) { }\r
\r
/*\r
+ * INT_TRD1 (0x58)
+ */
+void INT_TRD1 (void) { }
+
+/*
+ * INT_TRG (0x5A)
+ */
+void INT_TRG (void) { }
+
+/*
+ * INT_SRE3/INT_TM13H (0x5C)
+ */
+void INT_TM13H (void) { }
+//void INT_SRE3 (void) { }
+
+/*
+ * INT_IICA1 (0x60)
+ */
+void INT_IICA1 (void) { }
+
+/*
* INT_FL (0x62)\r
*/\r
void INT_FL (void) { }\r
/* PROJECT NAME : RTOSDemo */
/* FILE : interrupt_handlers.h */
/* DESCRIPTION : Interrupt Handler Declarations */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
void INT_P5(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_DMA0 (0x1A)\r
+ * INT_CSI20/INT_IIC20/INT_ST2 (0x14)\r
*/\r
-void INT_DMA0(void) __attribute__ ((interrupt));\r
+void INT_ST2(void) __attribute__ ((interrupt));\r
+//void INT_CSI20(void) __attribute__ ((interrupt));\r
+//void INT_IIC20(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_DMA1 (0x1C)\r
+ * INT_CSI21/INT_IIC21/INT_SR2 (0x16)\r
*/\r
-void INT_DMA1(void) __attribute__ ((interrupt));\r
+void INT_SR2(void) __attribute__ ((interrupt));\r
+//void INT_CSI21(void) __attribute__ ((interrupt));\r
+//void INT_IIC21(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_SRE2/INT_TM11H (0x18)\r
+ */\r
+void INT_TM11H(void) __attribute__ ((interrupt));\r
+//void INT_SRE2(void) __attribute__ ((interrupt));\r
\r
/*\r
* INT_CSI00/INT_IIC00/INT_ST0 (0x1E)\r
//void INT_IIC00(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_TM00 (0x20)\r
- */\r
-void INT_TM00(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI01/INT_IIC01/INT_SR0 (0x22)\r
+ * INT_CSI01/INT_IIC01/INT_SR0 (0x20)\r
*/\r
void INT_SR0(void) __attribute__ ((interrupt));\r
//void INT_CSI01(void) __attribute__ ((interrupt));\r
//void INT_IIC01(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_SRE0/INT_TM01H (0x24)\r
+ * INT_SRE0/INT_TM01H (0x22)\r
*/\r
void INT_TM01H(void) __attribute__ ((interrupt));\r
//void INT_SRE0(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_TM03H (0x2A)\r
+ * INT_CSI10/INT_IIC10/INT_ST1 (0x24)\r
+ */\r
+void INT_ST1(void) __attribute__ ((interrupt));\r
+//void INT_CSI10(void) __attribute__ ((interrupt));\r
+//void INT_IIC10(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_CSI11/INT_IIC11/INT_SR1 (0x26)\r
+ */\r
+void INT_SR1(void) __attribute__ ((interrupt));\r
+//void INT_CSI11(void) __attribute__ ((interrupt));\r
+//void INT_IIC11(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_SRE1/INT_TM03H (0x28)\r
*/\r
void INT_TM03H(void) __attribute__ ((interrupt));\r
+//void INT_SRE1(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_IICA0 (0x2C)\r
+ * INT_IICA0 (0x2A)\r
*/\r
void INT_IICA0(void) __attribute__ ((interrupt));\r
\r
+/*\r
+ * INT_TM00 (0x2C)\r
+ */\r
+void INT_TM00(void) __attribute__ ((interrupt));\r
+\r
/*\r
* INT_TM01 (0x2E)\r
*/\r
void INT_IT(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_USB (0x3C)\r
+ * INT_KR (0x3A)\r
+ */\r
+void INT_KR(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_CSI30/INT_IIC30/INT_ST3 (0x3C)\r
+ */\r
+void INT_ST3(void) __attribute__ ((interrupt));\r
+//void INT_CSI30(void) __attribute__ ((interrupt));\r
+//void INT_IIC30(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_CSI31/INT_IIC31/INT_SR3 (0x3E)\r
*/\r
-void INT_USB(void) __attribute__ ((interrupt));\r
+void INT_SR3(void) __attribute__ ((interrupt));\r
+//void INT_CSI31(void) __attribute__ ((interrupt));\r
+//void INT_IIC31(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_RSUM (0x3E)\r
+ * INT_TRJ0 (0x40)\r
*/\r
-void INT_RSUM(void) __attribute__ ((interrupt));\r
+void INT_TRJ0(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_TM10 (0x42)\r
+ */\r
+void INT_TM10(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_TM11 (0x44)\r
+ */\r
+void INT_TM11(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_TM12 (0x46)\r
+ */\r
+void INT_TM12(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_TM13 (0x48)\r
+ */\r
+void INT_TM13(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_P6 (0x4A)\r
+ */\r
+void INT_P6(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_P7 (0x4C)\r
+ */\r
+void INT_P7(void) __attribute__ ((interrupt));\r
\r
/*\r
* INT_P8 (0x4E)\r
void INT_P9(void) __attribute__ ((interrupt));\r
\r
/*\r
- * INT_MD (0x5E)\r
+ * INT_CMP0/INT_P10 (0x52)\r
+ */\r
+void INT_P10(void) __attribute__ ((interrupt));\r
+//void INT_CMP0(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_CMP1/INT_P11 (0x54)\r
+ */\r
+void INT_P11(void) __attribute__ ((interrupt));\r
+//void INT_CMP1(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_TRD0 (0x56)\r
+ */\r
+void INT_TRD0(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_TRD1 (0x58)\r
+ */\r
+void INT_TRD1(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_TRG (0x5A)\r
+ */\r
+void INT_TRG(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_SRE3/INT_TM13H (0x5C)\r
+ */\r
+void INT_TM13H(void) __attribute__ ((interrupt));\r
+//void INT_SRE3(void) __attribute__ ((interrupt));\r
+\r
+/*\r
+ * INT_IICA1 (0x60)\r
*/\r
-void INT_MD(void) __attribute__ ((interrupt));\r
+void INT_IICA1(void) __attribute__ ((interrupt));\r
\r
/*\r
* INT_FL (0x62)\r
/* PROJECT NAME : RTOSDemo */
/* FILE : iodefine.h */
/* DESCRIPTION : Definition of I/O Registers */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
-/***********************************************************************/\r
-\r
+/***********************************************************************/ \r
+ \r
/************************************************************************/\r
/* Header file generated from device file: */\r
-/* DR5F10JBC.DVF */\r
+/* DR5F104PJ.DVF */\r
/* Copyright(C) 2012 Renesas */\r
-/* File Version V1.00 */\r
+/* File Version V2.00 */\r
/* Tool Version 1.9.7121 */\r
/* Date Generated 13/11/2012 */\r
/************************************************************************/\r
-
+\r
#ifndef __IOREG_BIT_STRUCTURES\r
#define __IOREG_BIT_STRUCTURES\r
typedef struct {\r
unsigned char p7;\r
__BITS8 BIT;\r
};\r
+union un_p8 {\r
+ unsigned char p8;\r
+ __BITS8 BIT;\r
+};\r
+union un_p10 {\r
+ unsigned char p10;\r
+ __BITS8 BIT;\r
+};\r
+union un_p11 {\r
+ unsigned char p11;\r
+ __BITS8 BIT;\r
+};\r
union un_p12 {\r
unsigned char p12;\r
__BITS8 BIT;\r
unsigned char p13;\r
__BITS8 BIT;\r
};\r
+union un_p14 {\r
+ unsigned char p14;\r
+ __BITS8 BIT;\r
+};\r
+union un_p15 {\r
+ unsigned char p15;\r
+ __BITS8 BIT;\r
+};\r
union un_pm0 {\r
unsigned char pm0;\r
__BITS8 BIT;\r
unsigned char pm7;\r
__BITS8 BIT;\r
};\r
+union un_pm8 {\r
+ unsigned char pm8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm10 {\r
+ unsigned char pm10;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm11 {\r
+ unsigned char pm11;\r
+ __BITS8 BIT;\r
+};\r
union un_pm12 {\r
unsigned char pm12;\r
__BITS8 BIT;\r
};\r
+union un_pm14 {\r
+ unsigned char pm14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm15 {\r
+ unsigned char pm15;\r
+ __BITS8 BIT;\r
+};\r
union un_adm0 {\r
unsigned char adm0;\r
__BITS8 BIT;\r
unsigned char adm1;\r
__BITS8 BIT;\r
};\r
+union un_dam {\r
+ unsigned char dam;\r
+ __BITS8 BIT;\r
+};\r
+union un_krm {\r
+ unsigned char krm;\r
+ __BITS8 BIT;\r
+};\r
union un_egp0 {\r
unsigned char egp0;\r
__BITS8 BIT;\r
unsigned char iicf0;\r
__BITS8 BIT;\r
};\r
+union un_iics1 {\r
+ unsigned char iics1;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf1 {\r
+ unsigned char iicf1;\r
+ __BITS8 BIT;\r
+};\r
union un_flars {\r
unsigned char flars;\r
__BITS8 BIT;\r
unsigned char asim;\r
__BITS8 BIT;\r
};\r
-union un_dmc0 {\r
- unsigned char dmc0;\r
- __BITS8 BIT;\r
-};\r
-union un_dmc1 {\r
- unsigned char dmc1;\r
- __BITS8 BIT;\r
-};\r
-union un_drc0 {\r
- unsigned char drc0;\r
- __BITS8 BIT;\r
-};\r
-union un_drc1 {\r
- unsigned char drc1;\r
- __BITS8 BIT;\r
-};\r
union un_if2 {\r
unsigned short if2;\r
__BITS16 BIT;\r
#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
+#define P8 (*(volatile union un_p8 *)0xFFF08).p8\r
+#define P8_bit (*(volatile union un_p8 *)0xFFF08).BIT\r
+#define P10 (*(volatile union un_p10 *)0xFFF0A).p10\r
+#define P10_bit (*(volatile union un_p10 *)0xFFF0A).BIT\r
+#define P11 (*(volatile union un_p11 *)0xFFF0B).p11\r
+#define P11_bit (*(volatile union un_p11 *)0xFFF0B).BIT\r
#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
+#define P14 (*(volatile union un_p14 *)0xFFF0E).p14\r
+#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT\r
+#define P15 (*(volatile union un_p15 *)0xFFF0F).p15\r
+#define P15_bit (*(volatile union un_p15 *)0xFFF0F).BIT\r
#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
#define SIO01 (*(volatile unsigned char *)0xFFF12)\r
+#define SDR12 (*(volatile unsigned short *)0xFFF14)\r
+#define SIO30 (*(volatile unsigned char *)0xFFF14)\r
+#define TXD3 (*(volatile unsigned char *)0xFFF14)\r
+#define SDR13 (*(volatile unsigned short *)0xFFF16)\r
+#define RXD3 (*(volatile unsigned char *)0xFFF16)\r
+#define SIO31 (*(volatile unsigned char *)0xFFF16)\r
#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
+#define PM8 (*(volatile union un_pm8 *)0xFFF28).pm8\r
+#define PM8_bit (*(volatile union un_pm8 *)0xFFF28).BIT\r
+#define PM10 (*(volatile union un_pm10 *)0xFFF2A).pm10\r
+#define PM10_bit (*(volatile union un_pm10 *)0xFFF2A).BIT\r
+#define PM11 (*(volatile union un_pm11 *)0xFFF2B).pm11\r
+#define PM11_bit (*(volatile union un_pm11 *)0xFFF2B).BIT\r
#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
+#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14\r
+#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT\r
+#define PM15 (*(volatile union un_pm15 *)0xFFF2F).pm15\r
+#define PM15_bit (*(volatile union un_pm15 *)0xFFF2F).BIT\r
#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
+#define DACS0 (*(volatile unsigned char *)0xFFF34)\r
+#define DACS1 (*(volatile unsigned char *)0xFFF35)\r
+#define DAM (*(volatile union un_dam *)0xFFF36).dam\r
+#define DAM_bit (*(volatile union un_dam *)0xFFF36).BIT\r
+#define KRM (*(volatile union un_krm *)0xFFF37).krm\r
+#define KRM_bit (*(volatile union un_krm *)0xFFF37).BIT\r
#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT\r
#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1\r
#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT\r
+#define SDR02 (*(volatile unsigned short *)0xFFF44)\r
+#define SIO10 (*(volatile unsigned char *)0xFFF44)\r
+#define TXD1 (*(volatile unsigned char *)0xFFF44)\r
+#define SDR03 (*(volatile unsigned short *)0xFFF46)\r
+#define RXD1 (*(volatile unsigned char *)0xFFF46)\r
+#define SIO11 (*(volatile unsigned char *)0xFFF46)\r
+#define SDR10 (*(volatile unsigned short *)0xFFF48)\r
+#define SIO20 (*(volatile unsigned char *)0xFFF48)\r
+#define TXD2 (*(volatile unsigned char *)0xFFF48)\r
+#define SDR11 (*(volatile unsigned short *)0xFFF4A)\r
+#define RXD2 (*(volatile unsigned char *)0xFFF4A)\r
+#define SIO21 (*(volatile unsigned char *)0xFFF4A)\r
#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
-#define CFIFO (*(volatile unsigned short *)0xFFF54)\r
-#define CFIFOL (*(volatile unsigned char *)0xFFF54)\r
-#define D0FIFO (*(volatile unsigned short *)0xFFF58)\r
-#define D0FIFOL (*(volatile unsigned char *)0xFFF58)\r
-#define D1FIFO (*(volatile unsigned short *)0xFFF5C)\r
-#define D1FIFOL (*(volatile unsigned char *)0xFFF5C)\r
+#define IICA1 (*(volatile unsigned char *)0xFFF54)\r
+#define IICS1 (*(volatile union un_iics1 *)0xFFF55).iics1\r
+#define IICS1_bit (*(volatile union un_iics1 *)0xFFF55).BIT\r
+#define IICF1 (*(volatile union un_iicf1 *)0xFFF56).iicf1\r
+#define IICF1_bit (*(volatile union un_iicf1 *)0xFFF56).BIT\r
+#define TRDGRC0 (*(volatile unsigned short *)0xFFF58)\r
+#define TRDGRD0 (*(volatile unsigned short *)0xFFF5A)\r
+#define TRDGRC1 (*(volatile unsigned short *)0xFFF5C)\r
+#define TRDGRD1 (*(volatile unsigned short *)0xFFF5E)\r
+#define TRGGRC (*(volatile unsigned short *)0xFFF60)\r
+#define TRGGRD (*(volatile unsigned short *)0xFFF62)\r
#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
+#define TDR10 (*(volatile unsigned short *)0xFFF70)\r
+#define TDR11 (*(volatile unsigned short *)0xFFF72)\r
+#define TDR11L (*(volatile unsigned char *)0xFFF72)\r
+#define TDR11H (*(volatile unsigned char *)0xFFF73)\r
+#define TDR12 (*(volatile unsigned short *)0xFFF74)\r
+#define TDR13 (*(volatile unsigned short *)0xFFF76)\r
+#define TDR13L (*(volatile unsigned char *)0xFFF76)\r
+#define TDR13H (*(volatile unsigned char *)0xFFF77)\r
#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
-#define DSA0 (*(volatile unsigned char *)0xFFFB0)\r
-#define DSA1 (*(volatile unsigned char *)0xFFFB1)\r
-#define DRA0 (*(volatile unsigned short *)0xFFFB2)\r
-#define DRA0L (*(volatile unsigned char *)0xFFFB2)\r
-#define DRA0H (*(volatile unsigned char *)0xFFFB3)\r
-#define DRA1 (*(volatile unsigned short *)0xFFFB4)\r
-#define DRA1L (*(volatile unsigned char *)0xFFFB4)\r
-#define DRA1H (*(volatile unsigned char *)0xFFFB5)\r
-#define DBC0 (*(volatile unsigned short *)0xFFFB6)\r
-#define DBC0L (*(volatile unsigned char *)0xFFFB6)\r
-#define DBC0H (*(volatile unsigned char *)0xFFFB7)\r
-#define DBC1 (*(volatile unsigned short *)0xFFFB8)\r
-#define DBC1L (*(volatile unsigned char *)0xFFFB8)\r
-#define DBC1H (*(volatile unsigned char *)0xFFFB9)\r
-#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0\r
-#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT\r
-#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1\r
-#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT\r
-#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0\r
-#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT\r
-#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1\r
-#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT\r
#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
-#define MDAL (*(volatile unsigned short *)0xFFFF0)\r
-#define MULA (*(volatile unsigned short *)0xFFFF0)\r
-#define MDAH (*(volatile unsigned short *)0xFFFF2)\r
-#define MULB (*(volatile unsigned short *)0xFFFF2)\r
-#define MDBH (*(volatile unsigned short *)0xFFFF4)\r
-#define MULOH (*(volatile unsigned short *)0xFFFF4)\r
-#define MDBL (*(volatile unsigned short *)0xFFFF6)\r
-#define MULOL (*(volatile unsigned short *)0xFFFF6)\r
+#define MACRL (*(volatile unsigned short *)0xFFFF0)\r
+#define MACRH (*(volatile unsigned short *)0xFFFF2)\r
+#define MDUC (*(volatile unsigned char *)0xFFFFB)\r
#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
\r
*/\r
#define ADCE ADM0_bit.no0\r
#define ADCS ADM0_bit.no7\r
+#define DACE0 DAM_bit.no4\r
+#define DACE1 DAM_bit.no5\r
#define SPD0 IICS0_bit.no0\r
#define STD0 IICS0_bit.no1\r
#define ACKD0 IICS0_bit.no2\r
#define STCEN0 IICF0_bit.no1\r
#define IICBSY0 IICF0_bit.no6\r
#define STCF0 IICF0_bit.no7\r
+#define SPD1 IICS1_bit.no0\r
+#define STD1 IICS1_bit.no1\r
+#define ACKD1 IICS1_bit.no2\r
+#define TRC1 IICS1_bit.no3\r
+#define COI1 IICS1_bit.no4\r
+#define EXC1 IICS1_bit.no5\r
+#define ALD1 IICS1_bit.no6\r
+#define MSTS1 IICS1_bit.no7\r
+#define IICRSV1 IICF1_bit.no0\r
+#define STCEN1 IICF1_bit.no1\r
+#define IICBSY1 IICF1_bit.no6\r
+#define STCF1 IICF1_bit.no7\r
#define FSSTP FSSQ_bit.no6\r
#define SQST FSSQ_bit.no7\r
#define SQEND FSASTH_bit.no6\r
#define ESQEND FSASTH_bit.no7\r
+#define RCLOE1 RTCC0_bit.no5\r
#define RTCE RTCC0_bit.no7\r
#define RWAIT RTCC1_bit.no0\r
#define RWST RTCC1_bit.no1\r
#define WALIE RTCC1_bit.no6\r
#define WALE RTCC1_bit.no7\r
#define HIOSTOP CSC_bit.no0\r
+#define XTSTOP CSC_bit.no6\r
#define MSTOP CSC_bit.no7\r
+#define SDIV CKC_bit.no3\r
#define MCM0 CKC_bit.no4\r
#define MCS CKC_bit.no5\r
+#define CSS CKC_bit.no6\r
+#define CLS CKC_bit.no7\r
#define PCLOE0 CKS0_bit.no7\r
#define PCLOE1 CKS1_bit.no7\r
#define LVIF LVIM_bit.no0\r
#define LVISEN LVIM_bit.no7\r
#define LVILV LVIS_bit.no0\r
#define LVIMD LVIS_bit.no7\r
-#define DWAIT0 DMC0_bit.no4\r
-#define DS0 DMC0_bit.no5\r
-#define DRS0 DMC0_bit.no6\r
-#define STG0 DMC0_bit.no7\r
-#define DWAIT1 DMC1_bit.no4\r
-#define DS1 DMC1_bit.no5\r
-#define DRS1 DMC1_bit.no6\r
-#define STG1 DMC1_bit.no7\r
-#define DST0 DRC0_bit.no0\r
-#define DEN0 DRC0_bit.no7\r
-#define DST1 DRC1_bit.no0\r
-#define DEN1 DRC1_bit.no7\r
+#define TMIF11 IF2_bit.no0\r
+#define TMIF12 IF2_bit.no1\r
+#define TMIF13 IF2_bit.no2\r
+#define PIF6 IF2_bit.no3\r
+#define PIF7 IF2_bit.no4\r
#define PIF8 IF2_bit.no5\r
#define PIF9 IF2_bit.no6\r
-#define MDIF IF2H_bit.no5\r
+#define CMPIF0 IF2_bit.no7\r
+#define PIF10 IF2_bit.no7\r
+#define CMPIF1 IF2H_bit.no0\r
+#define PIF11 IF2H_bit.no0\r
+#define TRDIF0 IF2H_bit.no1\r
+#define TRDIF1 IF2H_bit.no2\r
+#define TRGIF IF2H_bit.no3\r
+#define SREIF3 IF2H_bit.no4\r
+#define TMIF13H IF2H_bit.no4\r
+#define IICAIF1 IF2H_bit.no6\r
#define FLIF IF2H_bit.no7\r
+#define TMMK11 MK2_bit.no0\r
+#define TMMK12 MK2_bit.no1\r
+#define TMMK13 MK2_bit.no2\r
+#define PMK6 MK2_bit.no3\r
+#define PMK7 MK2_bit.no4\r
#define PMK8 MK2_bit.no5\r
#define PMK9 MK2_bit.no6\r
-#define MDMK MK2H_bit.no5\r
+#define CMPMK0 MK2_bit.no7\r
+#define PMK10 MK2_bit.no7\r
+#define CMPMK1 MK2H_bit.no0\r
+#define PMK11 MK2H_bit.no0\r
+#define TRDMK0 MK2H_bit.no1\r
+#define TRDMK1 MK2H_bit.no2\r
+#define TRGMK MK2H_bit.no3\r
+#define SREMK3 MK2H_bit.no4\r
+#define TMMK13H MK2H_bit.no4\r
+#define IICAMK1 MK2H_bit.no6\r
#define FLMK MK2H_bit.no7\r
+#define TMPR011 PR02_bit.no0\r
+#define TMPR012 PR02_bit.no1\r
+#define TMPR013 PR02_bit.no2\r
+#define PPR06 PR02_bit.no3\r
+#define PPR07 PR02_bit.no4\r
#define PPR08 PR02_bit.no5\r
#define PPR09 PR02_bit.no6\r
-#define MDPR0 PR02H_bit.no5\r
+#define CMPPR00 PR02_bit.no7\r
+#define PPR010 PR02_bit.no7\r
+#define CMPPR01 PR02H_bit.no0\r
+#define PPR011 PR02H_bit.no0\r
+#define TRDPR00 PR02H_bit.no1\r
+#define TRDPR01 PR02H_bit.no2\r
+#define TRGPR0 PR02H_bit.no3\r
+#define SREPR03 PR02H_bit.no4\r
+#define TMPR013H PR02H_bit.no4\r
+#define IICAPR01 PR02H_bit.no6\r
#define FLPR0 PR02H_bit.no7\r
+#define TMPR111 PR12_bit.no0\r
+#define TMPR112 PR12_bit.no1\r
+#define TMPR113 PR12_bit.no2\r
+#define PPR16 PR12_bit.no3\r
+#define PPR17 PR12_bit.no4\r
#define PPR18 PR12_bit.no5\r
#define PPR19 PR12_bit.no6\r
-#define MDPR1 PR12H_bit.no5\r
+#define CMPPR10 PR12_bit.no7\r
+#define PPR110 PR12_bit.no7\r
+#define CMPPR11 PR12H_bit.no0\r
+#define PPR111 PR12H_bit.no0\r
+#define TRDPR10 PR12H_bit.no1\r
+#define TRDPR11 PR12H_bit.no2\r
+#define TRGPR1 PR12H_bit.no3\r
+#define SREPR13 PR12H_bit.no4\r
+#define TMPR113H PR12H_bit.no4\r
+#define IICAPR11 PR12H_bit.no6\r
#define FLPR1 PR12H_bit.no7\r
+#define SROIF IF0_bit.no0\r
#define WDTIIF IF0_bit.no0\r
#define LVIIF IF0_bit.no1\r
#define PIF0 IF0_bit.no2\r
#define PIF3 IF0_bit.no5\r
#define PIF4 IF0_bit.no6\r
#define PIF5 IF0_bit.no7\r
-#define DMAIF0 IF0H_bit.no3\r
-#define DMAIF1 IF0H_bit.no4\r
+#define CSIIF20 IF0H_bit.no0\r
+#define IICIF20 IF0H_bit.no0\r
+#define STIF2 IF0H_bit.no0\r
+#define CSIIF21 IF0H_bit.no1\r
+#define IICIF21 IF0H_bit.no1\r
+#define SRIF2 IF0H_bit.no1\r
+#define SREIF2 IF0H_bit.no2\r
+#define TMIF11H IF0H_bit.no2\r
#define CSIIF00 IF0H_bit.no5\r
#define IICIF00 IF0H_bit.no5\r
#define STIF0 IF0H_bit.no5\r
-#define TMIF00 IF0H_bit.no6\r
-#define CSIIF01 IF0H_bit.no7\r
-#define IICIF01 IF0H_bit.no7\r
-#define SRIF0 IF0H_bit.no7\r
-#define SREIF0 IF1_bit.no0\r
-#define TMIF01H IF1_bit.no0\r
-#define TMIF03H IF1_bit.no3\r
-#define IICAIF0 IF1_bit.no4\r
+#define CSIIF01 IF0H_bit.no6\r
+#define IICIF01 IF0H_bit.no6\r
+#define SRIF0 IF0H_bit.no6\r
+#define SREIF0 IF0H_bit.no7\r
+#define TMIF01H IF0H_bit.no7\r
+#define CSIIF10 IF1_bit.no0\r
+#define IICIF10 IF1_bit.no0\r
+#define STIF1 IF1_bit.no0\r
+#define CSIIF11 IF1_bit.no1\r
+#define IICIF11 IF1_bit.no1\r
+#define SRIF1 IF1_bit.no1\r
+#define SREIF1 IF1_bit.no2\r
+#define TMIF03H IF1_bit.no2\r
+#define IICAIF0 IF1_bit.no3\r
+#define TMIF00 IF1_bit.no4\r
#define TMIF01 IF1_bit.no5\r
#define TMIF02 IF1_bit.no6\r
#define TMIF03 IF1_bit.no7\r
#define ADIF IF1H_bit.no0\r
#define RTCIF IF1H_bit.no1\r
#define ITIF IF1H_bit.no2\r
-#define USBIF IF1H_bit.no4\r
-#define RSUIF IF1H_bit.no5\r
+#define KRIF IF1H_bit.no3\r
+#define CSIIF30 IF1H_bit.no4\r
+#define IICIF30 IF1H_bit.no4\r
+#define STIF3 IF1H_bit.no4\r
+#define CSIIF31 IF1H_bit.no5\r
+#define IICIF31 IF1H_bit.no5\r
+#define SRIF3 IF1H_bit.no5\r
+#define TRJIF0 IF1H_bit.no6\r
+#define TMIF10 IF1H_bit.no7\r
+#define SROMK MK0_bit.no0\r
#define WDTIMK MK0_bit.no0\r
#define LVIMK MK0_bit.no1\r
#define PMK0 MK0_bit.no2\r
#define PMK3 MK0_bit.no5\r
#define PMK4 MK0_bit.no6\r
#define PMK5 MK0_bit.no7\r
-#define DMAMK0 MK0H_bit.no3\r
-#define DMAMK1 MK0H_bit.no4\r
+#define CSIMK20 MK0H_bit.no0\r
+#define IICMK20 MK0H_bit.no0\r
+#define STMK2 MK0H_bit.no0\r
+#define CSIMK21 MK0H_bit.no1\r
+#define IICMK21 MK0H_bit.no1\r
+#define SRMK2 MK0H_bit.no1\r
+#define SREMK2 MK0H_bit.no2\r
+#define TMMK11H MK0H_bit.no2\r
#define CSIMK00 MK0H_bit.no5\r
#define IICMK00 MK0H_bit.no5\r
#define STMK0 MK0H_bit.no5\r
-#define TMMK00 MK0H_bit.no6\r
-#define CSIMK01 MK0H_bit.no7\r
-#define IICMK01 MK0H_bit.no7\r
-#define SRMK0 MK0H_bit.no7\r
-#define SREMK0 MK1_bit.no0\r
-#define TMMK01H MK1_bit.no0\r
-#define TMMK03H MK1_bit.no3\r
-#define IICAMK0 MK1_bit.no4\r
+#define CSIMK01 MK0H_bit.no6\r
+#define IICMK01 MK0H_bit.no6\r
+#define SRMK0 MK0H_bit.no6\r
+#define SREMK0 MK0H_bit.no7\r
+#define TMMK01H MK0H_bit.no7\r
+#define CSIMK10 MK1_bit.no0\r
+#define IICMK10 MK1_bit.no0\r
+#define STMK1 MK1_bit.no0\r
+#define CSIMK11 MK1_bit.no1\r
+#define IICMK11 MK1_bit.no1\r
+#define SRMK1 MK1_bit.no1\r
+#define SREMK1 MK1_bit.no2\r
+#define TMMK03H MK1_bit.no2\r
+#define IICAMK0 MK1_bit.no3\r
+#define TMMK00 MK1_bit.no4\r
#define TMMK01 MK1_bit.no5\r
#define TMMK02 MK1_bit.no6\r
#define TMMK03 MK1_bit.no7\r
#define ADMK MK1H_bit.no0\r
#define RTCMK MK1H_bit.no1\r
#define ITMK MK1H_bit.no2\r
-#define USBMK MK1H_bit.no4\r
-#define RSUMK MK1H_bit.no5\r
+#define KRMK MK1H_bit.no3\r
+#define CSIMK30 MK1H_bit.no4\r
+#define IICMK30 MK1H_bit.no4\r
+#define STMK3 MK1H_bit.no4\r
+#define CSIMK31 MK1H_bit.no5\r
+#define IICMK31 MK1H_bit.no5\r
+#define SRMK3 MK1H_bit.no5\r
+#define TRJMK0 MK1H_bit.no6\r
+#define TMMK10 MK1H_bit.no7\r
+#define SROPR0 PR00_bit.no0\r
#define WDTIPR0 PR00_bit.no0\r
#define LVIPR0 PR00_bit.no1\r
#define PPR00 PR00_bit.no2\r
#define PPR03 PR00_bit.no5\r
#define PPR04 PR00_bit.no6\r
#define PPR05 PR00_bit.no7\r
-#define DMAPR00 PR00H_bit.no3\r
-#define DMAPR01 PR00H_bit.no4\r
+#define CSIPR020 PR00H_bit.no0\r
+#define IICPR020 PR00H_bit.no0\r
+#define STPR02 PR00H_bit.no0\r
+#define CSIPR021 PR00H_bit.no1\r
+#define IICPR021 PR00H_bit.no1\r
+#define SRPR02 PR00H_bit.no1\r
+#define SREPR02 PR00H_bit.no2\r
+#define TMPR011H PR00H_bit.no2\r
#define CSIPR000 PR00H_bit.no5\r
#define IICPR000 PR00H_bit.no5\r
#define STPR00 PR00H_bit.no5\r
-#define TMPR000 PR00H_bit.no6\r
-#define CSIPR001 PR00H_bit.no7\r
-#define IICPR001 PR00H_bit.no7\r
-#define SRPR00 PR00H_bit.no7\r
-#define SREPR00 PR01_bit.no0\r
-#define TMPR001H PR01_bit.no0\r
-#define TMPR003H PR01_bit.no3\r
-#define IICAPR00 PR01_bit.no4\r
+#define CSIPR001 PR00H_bit.no6\r
+#define IICPR001 PR00H_bit.no6\r
+#define SRPR00 PR00H_bit.no6\r
+#define SREPR00 PR00H_bit.no7\r
+#define TMPR001H PR00H_bit.no7\r
+#define CSIPR010 PR01_bit.no0\r
+#define IICPR010 PR01_bit.no0\r
+#define STPR01 PR01_bit.no0\r
+#define CSIPR011 PR01_bit.no1\r
+#define IICPR011 PR01_bit.no1\r
+#define SRPR01 PR01_bit.no1\r
+#define SREPR01 PR01_bit.no2\r
+#define TMPR003H PR01_bit.no2\r
+#define IICAPR00 PR01_bit.no3\r
+#define TMPR000 PR01_bit.no4\r
#define TMPR001 PR01_bit.no5\r
#define TMPR002 PR01_bit.no6\r
#define TMPR003 PR01_bit.no7\r
#define ADPR0 PR01H_bit.no0\r
#define RTCPR0 PR01H_bit.no1\r
#define ITPR0 PR01H_bit.no2\r
-#define USBPR0 PR01H_bit.no4\r
-#define RSUPR0 PR01H_bit.no5\r
+#define KRPR0 PR01H_bit.no3\r
+#define CSIPR030 PR01H_bit.no4\r
+#define IICPR030 PR01H_bit.no4\r
+#define STPR03 PR01H_bit.no4\r
+#define CSIPR031 PR01H_bit.no5\r
+#define IICPR031 PR01H_bit.no5\r
+#define SRPR03 PR01H_bit.no5\r
+#define TRJPR00 PR01H_bit.no6\r
+#define TMPR010 PR01H_bit.no7\r
+#define SROPR1 PR10_bit.no0\r
#define WDTIPR1 PR10_bit.no0\r
#define LVIPR1 PR10_bit.no1\r
#define PPR10 PR10_bit.no2\r
#define PPR13 PR10_bit.no5\r
#define PPR14 PR10_bit.no6\r
#define PPR15 PR10_bit.no7\r
-#define DMAPR10 PR10H_bit.no3\r
-#define DMAPR11 PR10H_bit.no4\r
+#define CSIPR120 PR10H_bit.no0\r
+#define IICPR120 PR10H_bit.no0\r
+#define STPR12 PR10H_bit.no0\r
+#define CSIPR121 PR10H_bit.no1\r
+#define IICPR121 PR10H_bit.no1\r
+#define SRPR12 PR10H_bit.no1\r
+#define SREPR12 PR10H_bit.no2\r
+#define TMPR111H PR10H_bit.no2\r
#define CSIPR100 PR10H_bit.no5\r
#define IICPR100 PR10H_bit.no5\r
#define STPR10 PR10H_bit.no5\r
-#define TMPR100 PR10H_bit.no6\r
-#define CSIPR101 PR10H_bit.no7\r
-#define IICPR101 PR10H_bit.no7\r
-#define SRPR10 PR10H_bit.no7\r
-#define SREPR10 PR11_bit.no0\r
-#define TMPR101H PR11_bit.no0\r
-#define TMPR103H PR11_bit.no3\r
-#define IICAPR10 PR11_bit.no4\r
+#define CSIPR101 PR10H_bit.no6\r
+#define IICPR101 PR10H_bit.no6\r
+#define SRPR10 PR10H_bit.no6\r
+#define SREPR10 PR10H_bit.no7\r
+#define TMPR101H PR10H_bit.no7\r
+#define CSIPR110 PR11_bit.no0\r
+#define IICPR110 PR11_bit.no0\r
+#define STPR11 PR11_bit.no0\r
+#define CSIPR111 PR11_bit.no1\r
+#define IICPR111 PR11_bit.no1\r
+#define SRPR11 PR11_bit.no1\r
+#define SREPR11 PR11_bit.no2\r
+#define TMPR103H PR11_bit.no2\r
+#define IICAPR10 PR11_bit.no3\r
+#define TMPR100 PR11_bit.no4\r
#define TMPR101 PR11_bit.no5\r
#define TMPR102 PR11_bit.no6\r
#define TMPR103 PR11_bit.no7\r
#define ADPR1 PR11H_bit.no0\r
#define RTCPR1 PR11H_bit.no1\r
#define ITPR1 PR11H_bit.no2\r
-#define USBPR1 PR11H_bit.no4\r
-#define RSUPR1 PR11H_bit.no5\r
+#define KRPR1 PR11H_bit.no3\r
+#define CSIPR130 PR11H_bit.no4\r
+#define IICPR130 PR11H_bit.no4\r
+#define STPR13 PR11H_bit.no4\r
+#define CSIPR131 PR11H_bit.no5\r
+#define IICPR131 PR11H_bit.no5\r
+#define SRPR13 PR11H_bit.no5\r
+#define TRJPR10 PR11H_bit.no6\r
+#define TMPR110 PR11H_bit.no7\r
#define MAA PMC_bit.no0\r
\r
/*\r
#define INTP3_vect (0xE)\r
#define INTP4_vect (0x10)\r
#define INTP5_vect (0x12)\r
-#define INTDMA0_vect (0x1A)\r
-#define INTDMA1_vect (0x1C)\r
+#define INTCSI20_vect (0x14)\r
+#define INTIIC20_vect (0x14)\r
+#define INTST2_vect (0x14)\r
+#define INTCSI21_vect (0x16)\r
+#define INTIIC21_vect (0x16)\r
+#define INTSR2_vect (0x16)\r
+#define INTSRE2_vect (0x18)\r
+#define INTTM11H_vect (0x18)\r
#define INTCSI00_vect (0x1E)\r
#define INTIIC00_vect (0x1E)\r
#define INTST0_vect (0x1E)\r
-#define INTTM00_vect (0x20)\r
-#define INTCSI01_vect (0x22)\r
-#define INTIIC01_vect (0x22)\r
-#define INTSR0_vect (0x22)\r
-#define INTSRE0_vect (0x24)\r
-#define INTTM01H_vect (0x24)\r
-#define INTTM03H_vect (0x2A)\r
-#define INTIICA0_vect (0x2C)\r
+#define INTCSI01_vect (0x20)\r
+#define INTIIC01_vect (0x20)\r
+#define INTSR0_vect (0x20)\r
+#define INTSRE0_vect (0x22)\r
+#define INTTM01H_vect (0x22)\r
+#define INTCSI10_vect (0x24)\r
+#define INTIIC10_vect (0x24)\r
+#define INTST1_vect (0x24)\r
+#define INTCSI11_vect (0x26)\r
+#define INTIIC11_vect (0x26)\r
+#define INTSR1_vect (0x26)\r
+#define INTSRE1_vect (0x28)\r
+#define INTTM03H_vect (0x28)\r
+#define INTIICA0_vect (0x2A)\r
+#define INTTM00_vect (0x2C)\r
#define INTTM01_vect (0x2E)\r
#define INTTM02_vect (0x30)\r
#define INTTM03_vect (0x32)\r
#define INTAD_vect (0x34)\r
#define INTRTC_vect (0x36)\r
#define INTIT_vect (0x38)\r
-#define INTUSB_vect (0x3C)\r
-#define INTRSUM_vect (0x3E)\r
+#define INTKR_vect (0x3A)\r
+#define INTCSI30_vect (0x3C)\r
+#define INTIIC30_vect (0x3C)\r
+#define INTST3_vect (0x3C)\r
+#define INTCSI31_vect (0x3E)\r
+#define INTIIC31_vect (0x3E)\r
+#define INTSR3_vect (0x3E)\r
+#define INTTRJ0_vect (0x40)\r
+#define INTTM10_vect (0x42)\r
+#define INTTM11_vect (0x44)\r
+#define INTTM12_vect (0x46)\r
+#define INTTM13_vect (0x48)\r
+#define INTP6_vect (0x4A)\r
+#define INTP7_vect (0x4C)\r
#define INTP8_vect (0x4E)\r
#define INTP9_vect (0x50)\r
-#define INTMD_vect (0x5E)\r
+#define INTCMP0_vect (0x52)\r
+#define INTP10_vect (0x52)\r
+#define INTCMP1_vect (0x54)\r
+#define INTP11_vect (0x54)\r
+#define INTTRD0_vect (0x56)\r
+#define INTTRD1_vect (0x58)\r
+#define INTTRG_vect (0x5A)\r
+#define INTSRE3_vect (0x5C)\r
+#define INTTM13H_vect (0x5C)\r
+#define INTIICA1_vect (0x60)\r
#define INTFL_vect (0x62)\r
#define BRK_I_vect (0x7E)\r
#endif\r
/* PROJECT NAME : RTOSDemo */
/* FILE : iodefine_ext.h */
/* DESCRIPTION : Definition of Extended SFRs */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
\r
/************************************************************************/\r
/* Header file generated from device file: */\r
-/* DR5F10JBC.DVF */\r
+/* DR5F104PJ.DVF */\r
/* Copyright(C) 2012 Renesas */\r
-/* File Version V1.00 */\r
+/* File Version V2.00 */\r
/* Tool Version 1.9.7121 */\r
/* Date Generated 13/11/2012 */\r
/************************************************************************/\r
unsigned char adm2;\r
__BITS8 BIT;\r
};\r
-union un_pms {\r
- unsigned char pms;\r
- __BITS8 BIT;\r
-};\r
union un_pu0 {\r
unsigned char pu0;\r
__BITS8 BIT;\r
unsigned char pu5;\r
__BITS8 BIT;\r
};\r
+union un_pu6 {\r
+ unsigned char pu6;\r
+ __BITS8 BIT;\r
+};\r
union un_pu7 {\r
unsigned char pu7;\r
__BITS8 BIT;\r
};\r
+union un_pu8 {\r
+ unsigned char pu8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu10 {\r
+ unsigned char pu10;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu11 {\r
+ unsigned char pu11;\r
+ __BITS8 BIT;\r
+};\r
union un_pu12 {\r
unsigned char pu12;\r
__BITS8 BIT;\r
};\r
+union un_pu14 {\r
+ unsigned char pu14;\r
+ __BITS8 BIT;\r
+};\r
union un_pim0 {\r
unsigned char pim0;\r
__BITS8 BIT;\r
};\r
+union un_pim1 {\r
+ unsigned char pim1;\r
+ __BITS8 BIT;\r
+};\r
union un_pim3 {\r
unsigned char pim3;\r
__BITS8 BIT;\r
};\r
+union un_pim4 {\r
+ unsigned char pim4;\r
+ __BITS8 BIT;\r
+};\r
union un_pim5 {\r
unsigned char pim5;\r
__BITS8 BIT;\r
};\r
+union un_pim8 {\r
+ unsigned char pim8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim14 {\r
+ unsigned char pim14;\r
+ __BITS8 BIT;\r
+};\r
union un_pom0 {\r
unsigned char pom0;\r
__BITS8 BIT;\r
};\r
+union un_pom1 {\r
+ unsigned char pom1;\r
+ __BITS8 BIT;\r
+};\r
union un_pom3 {\r
unsigned char pom3;\r
__BITS8 BIT;\r
};\r
+union un_pom4 {\r
+ unsigned char pom4;\r
+ __BITS8 BIT;\r
+};\r
union un_pom5 {\r
unsigned char pom5;\r
__BITS8 BIT;\r
};\r
+union un_pom7 {\r
+ unsigned char pom7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom8 {\r
+ unsigned char pom8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom14 {\r
+ unsigned char pom14;\r
+ __BITS8 BIT;\r
+};\r
union un_pmc0 {\r
unsigned char pmc0;\r
__BITS8 BIT;\r
};\r
+union un_pmc1 {\r
+ unsigned char pmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc10 {\r
+ unsigned char pmc10;\r
+ __BITS8 BIT;\r
+};\r
union un_pmc12 {\r
unsigned char pmc12;\r
__BITS8 BIT;\r
};\r
+union un_pmc14 {\r
+ unsigned char pmc14;\r
+ __BITS8 BIT;\r
+};\r
union un_nfen0 {\r
unsigned char nfen0;\r
__BITS8 BIT;\r
unsigned char nfen1;\r
__BITS8 BIT;\r
};\r
+union un_nfen2 {\r
+ unsigned char nfen2;\r
+ __BITS8 BIT;\r
+};\r
union un_isc {\r
unsigned char isc;\r
__BITS8 BIT;\r
};\r
+union un_per1 {\r
+ unsigned char per1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pms {\r
+ unsigned char pms;\r
+ __BITS8 BIT;\r
+};\r
+union un_gdidis {\r
+ unsigned char gdidis;\r
+ __BITS8 BIT;\r
+};\r
union un_dflctl {\r
unsigned char dflctl;\r
__BITS8 BIT;\r
unsigned char pfs;\r
__BITS8 BIT;\r
};\r
-union un_mduc {\r
- unsigned char mduc;\r
- __BITS8 BIT;\r
-};\r
union un_per0 {\r
unsigned char per0;\r
__BITS8 BIT;\r
unsigned char soe0l;\r
__BITS8 BIT;\r
};\r
+union un_se1l {\r
+ unsigned char se1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss1l {\r
+ unsigned char ss1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st1l {\r
+ unsigned char st1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe1l {\r
+ unsigned char soe1l;\r
+ __BITS8 BIT;\r
+};\r
union un_te0l {\r
unsigned char te0l;\r
__BITS8 BIT;\r
unsigned char toe0l;\r
__BITS8 BIT;\r
};\r
+union un_te1l {\r
+ unsigned char te1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ts1l {\r
+ unsigned char ts1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_tt1l {\r
+ unsigned char tt1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_toe1l {\r
+ unsigned char toe1l;\r
+ __BITS8 BIT;\r
+};\r
union un_iicctl00 {\r
unsigned char iicctl00;\r
__BITS8 BIT;\r
unsigned char iicctl01;\r
__BITS8 BIT;\r
};\r
-union un_dscctl {\r
- unsigned char dscctl;\r
+union un_iicctl10 {\r
+ unsigned char iicctl10;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl11 {\r
+ unsigned char iicctl11;\r
+ __BITS8 BIT;\r
+};\r
+union un_trjioc0 {\r
+ unsigned char trjioc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trjmr0 {\r
+ unsigned char trjmr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trjisr0 {\r
+ unsigned char trjisr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgmr {\r
+ unsigned char trgmr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgcntc {\r
+ unsigned char trgcntc;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgcr {\r
+ unsigned char trgcr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgier {\r
+ unsigned char trgier;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgsr {\r
+ unsigned char trgsr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgior {\r
+ unsigned char trgior;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdelc {\r
+ unsigned char trdelc;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdmr {\r
+ unsigned char trdmr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdpmr {\r
+ unsigned char trdpmr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdfcr {\r
+ unsigned char trdfcr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdoer1 {\r
+ unsigned char trdoer1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdoer2 {\r
+ unsigned char trdoer2;\r
__BITS8 BIT;\r
};\r
-union un_mckc {\r
- unsigned char mckc;\r
+union un_trdocr {\r
+ unsigned char trdocr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trddf0 {\r
+ unsigned char trddf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trddf1 {\r
+ unsigned char trddf1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdcr0 {\r
+ unsigned char trdcr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiora0 {\r
+ unsigned char trdiora0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiorc0 {\r
+ unsigned char trdiorc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdsr0 {\r
+ unsigned char trdsr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdier0 {\r
+ unsigned char trdier0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdpocr0 {\r
+ unsigned char trdpocr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdcr1 {\r
+ unsigned char trdcr1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiora1 {\r
+ unsigned char trdiora1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiorc1 {\r
+ unsigned char trdiorc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdsr1 {\r
+ unsigned char trdsr1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdier1 {\r
+ unsigned char trdier1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdpocr1 {\r
+ unsigned char trdpocr1;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen0 {\r
+ unsigned char dtcen0;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen1 {\r
+ unsigned char dtcen1;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen2 {\r
+ unsigned char dtcen2;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen3 {\r
+ unsigned char dtcen3;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen4 {\r
+ unsigned char dtcen4;\r
__BITS8 BIT;\r
};\r
union un_crc0ctl {\r
unsigned char crc0ctl;\r
__BITS8 BIT;\r
};\r
+union un_elselr00 {\r
+ unsigned char elselr00;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr01 {\r
+ unsigned char elselr01;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr02 {\r
+ unsigned char elselr02;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr03 {\r
+ unsigned char elselr03;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr04 {\r
+ unsigned char elselr04;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr05 {\r
+ unsigned char elselr05;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr06 {\r
+ unsigned char elselr06;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr07 {\r
+ unsigned char elselr07;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr08 {\r
+ unsigned char elselr08;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr09 {\r
+ unsigned char elselr09;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr10 {\r
+ unsigned char elselr10;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr11 {\r
+ unsigned char elselr11;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr12 {\r
+ unsigned char elselr12;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr13 {\r
+ unsigned char elselr13;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr14 {\r
+ unsigned char elselr14;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr15 {\r
+ unsigned char elselr15;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr16 {\r
+ unsigned char elselr16;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr17 {\r
+ unsigned char elselr17;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr18 {\r
+ unsigned char elselr18;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr19 {\r
+ unsigned char elselr19;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr20 {\r
+ unsigned char elselr20;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr21 {\r
+ unsigned char elselr21;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr22 {\r
+ unsigned char elselr22;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr23 {\r
+ unsigned char elselr23;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr24 {\r
+ unsigned char elselr24;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr25 {\r
+ unsigned char elselr25;\r
+ __BITS8 BIT;\r
+};\r
+union un_compmdr {\r
+ unsigned char compmdr;\r
+ __BITS8 BIT;\r
+};\r
+union un_compfir {\r
+ unsigned char compfir;\r
+ __BITS8 BIT;\r
+};\r
+union un_compocr {\r
+ unsigned char compocr;\r
+ __BITS8 BIT;\r
+};\r
+union un_comptcr {\r
+ unsigned char comptcr;\r
+ __BITS8 BIT;\r
+};\r
\r
#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
#define ADUL (*(volatile unsigned char *)0xF0011)\r
#define ADLL (*(volatile unsigned char *)0xF0012)\r
#define ADTES (*(volatile unsigned char *)0xF0013)\r
-#define PMS (*(volatile union un_pms *)0xF0018).pms\r
-#define PMS_bit (*(volatile union un_pms *)0xF0018).BIT\r
-#define PIOR (*(volatile unsigned char *)0xF001A)\r
#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
+#define PU6 (*(volatile union un_pu6 *)0xF0036).pu6\r
+#define PU6_bit (*(volatile union un_pu6 *)0xF0036).BIT\r
#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
+#define PU8 (*(volatile union un_pu8 *)0xF0038).pu8\r
+#define PU8_bit (*(volatile union un_pu8 *)0xF0038).BIT\r
+#define PU10 (*(volatile union un_pu10 *)0xF003A).pu10\r
+#define PU10_bit (*(volatile union un_pu10 *)0xF003A).BIT\r
+#define PU11 (*(volatile union un_pu11 *)0xF003B).pu11\r
+#define PU11_bit (*(volatile union un_pu11 *)0xF003B).BIT\r
#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
+#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14\r
+#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT\r
#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
+#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1\r
+#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT\r
#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3\r
#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT\r
+#define PIM4 (*(volatile union un_pim4 *)0xF0044).pim4\r
+#define PIM4_bit (*(volatile union un_pim4 *)0xF0044).BIT\r
#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5\r
#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT\r
+#define PIM8 (*(volatile union un_pim8 *)0xF0048).pim8\r
+#define PIM8_bit (*(volatile union un_pim8 *)0xF0048).BIT\r
+#define PIM14 (*(volatile union un_pim14 *)0xF004E).pim14\r
+#define PIM14_bit (*(volatile union un_pim14 *)0xF004E).BIT\r
#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
+#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1\r
+#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT\r
#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3\r
#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT\r
+#define POM4 (*(volatile union un_pom4 *)0xF0054).pom4\r
+#define POM4_bit (*(volatile union un_pom4 *)0xF0054).BIT\r
#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
+#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7\r
+#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT\r
+#define POM8 (*(volatile union un_pom8 *)0xF0058).pom8\r
+#define POM8_bit (*(volatile union un_pom8 *)0xF0058).BIT\r
+#define POM14 (*(volatile union un_pom14 *)0xF005E).pom14\r
+#define POM14_bit (*(volatile union un_pom14 *)0xF005E).BIT\r
#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0\r
#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT\r
+#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1\r
+#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT\r
+#define PMC10 (*(volatile union un_pmc10 *)0xF006A).pmc10\r
+#define PMC10_bit (*(volatile union un_pmc10 *)0xF006A).BIT\r
#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12\r
#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT\r
+#define PMC14 (*(volatile union un_pmc14 *)0xF006E).pmc14\r
+#define PMC14_bit (*(volatile union un_pmc14 *)0xF006E).BIT\r
#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
+#define NFEN2 (*(volatile union un_nfen2 *)0xF0072).nfen2\r
+#define NFEN2_bit (*(volatile union un_nfen2 *)0xF0072).BIT\r
#define ISC (*(volatile union un_isc *)0xF0073).isc\r
#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
#define TIS0 (*(volatile unsigned char *)0xF0074)\r
#define ADPC (*(volatile unsigned char *)0xF0076)\r
-#define IAWCTL (*(volatile unsigned char *)0xF0077)\r
+#define PIOR0 (*(volatile unsigned char *)0xF0077)\r
+#define IAWCTL (*(volatile unsigned char *)0xF0078)\r
+#define PIOR1 (*(volatile unsigned char *)0xF0079)\r
+#define PER1 (*(volatile union un_per1 *)0xF007A).per1\r
+#define PER1_bit (*(volatile union un_per1 *)0xF007A).BIT\r
+#define PMS (*(volatile union un_pms *)0xF007B).pms\r
+#define PMS_bit (*(volatile union un_pms *)0xF007B).BIT\r
+#define GDIDIS (*(volatile union un_gdidis *)0xF007D).gdidis\r
+#define GDIDIS_bit (*(volatile union un_gdidis *)0xF007D).BIT\r
#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
#define MONMOD (*(volatile unsigned char *)0xF0088)\r
+#define BPAL1 (*(volatile unsigned char *)0xF0089)\r
+#define BPAH1 (*(volatile unsigned char *)0xF008A)\r
+#define BPAS1 (*(volatile unsigned char *)0xF008B)\r
+#define BACDVL1 (*(volatile unsigned char *)0xF008C)\r
+#define BACDVH1 (*(volatile unsigned char *)0xF008D)\r
+#define BACDML1 (*(volatile unsigned char *)0xF008E)\r
+#define BACDMH1 (*(volatile unsigned char *)0xF008F)\r
#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
-#define MDCL (*(volatile unsigned short *)0xF00E0)\r
-#define MDCH (*(volatile unsigned short *)0xF00E2)\r
-#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc\r
-#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT\r
#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
#define OSMC (*(volatile unsigned char *)0xF00F3)\r
#define SSR00L (*(volatile unsigned char *)0xF0100)\r
#define SSR01 (*(volatile unsigned short *)0xF0102)\r
#define SSR01L (*(volatile unsigned char *)0xF0102)\r
+#define SSR02 (*(volatile unsigned short *)0xF0104)\r
+#define SSR02L (*(volatile unsigned char *)0xF0104)\r
+#define SSR03 (*(volatile unsigned short *)0xF0106)\r
+#define SSR03L (*(volatile unsigned char *)0xF0106)\r
#define SIR00 (*(volatile unsigned short *)0xF0108)\r
#define SIR00L (*(volatile unsigned char *)0xF0108)\r
#define SIR01 (*(volatile unsigned short *)0xF010A)\r
#define SIR01L (*(volatile unsigned char *)0xF010A)\r
+#define SIR02 (*(volatile unsigned short *)0xF010C)\r
+#define SIR02L (*(volatile unsigned char *)0xF010C)\r
+#define SIR03 (*(volatile unsigned short *)0xF010E)\r
+#define SIR03L (*(volatile unsigned char *)0xF010E)\r
#define SMR00 (*(volatile unsigned short *)0xF0110)\r
#define SMR01 (*(volatile unsigned short *)0xF0112)\r
+#define SMR02 (*(volatile unsigned short *)0xF0114)\r
+#define SMR03 (*(volatile unsigned short *)0xF0116)\r
#define SCR00 (*(volatile unsigned short *)0xF0118)\r
#define SCR01 (*(volatile unsigned short *)0xF011A)\r
+#define SCR02 (*(volatile unsigned short *)0xF011C)\r
+#define SCR03 (*(volatile unsigned short *)0xF011E)\r
#define SE0 (*(volatile unsigned short *)0xF0120)\r
#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
#define EDR00L (*(volatile unsigned char *)0xF012C)\r
#define EDR01 (*(volatile unsigned short *)0xF012E)\r
#define EDR01L (*(volatile unsigned char *)0xF012E)\r
+#define EDR02 (*(volatile unsigned short *)0xF0130)\r
+#define EDR02L (*(volatile unsigned char *)0xF0130)\r
+#define EDR03 (*(volatile unsigned short *)0xF0132)\r
+#define EDR03L (*(volatile unsigned char *)0xF0132)\r
#define SOL0 (*(volatile unsigned short *)0xF0134)\r
#define SOL0L (*(volatile unsigned char *)0xF0134)\r
#define SSC0 (*(volatile unsigned short *)0xF0138)\r
#define SSC0L (*(volatile unsigned char *)0xF0138)\r
+#define SSR10 (*(volatile unsigned short *)0xF0140)\r
+#define SSR10L (*(volatile unsigned char *)0xF0140)\r
+#define SSR11 (*(volatile unsigned short *)0xF0142)\r
+#define SSR11L (*(volatile unsigned char *)0xF0142)\r
+#define SSR12 (*(volatile unsigned short *)0xF0144)\r
+#define SSR12L (*(volatile unsigned char *)0xF0144)\r
+#define SSR13 (*(volatile unsigned short *)0xF0146)\r
+#define SSR13L (*(volatile unsigned char *)0xF0146)\r
+#define SIR10 (*(volatile unsigned short *)0xF0148)\r
+#define SIR10L (*(volatile unsigned char *)0xF0148)\r
+#define SIR11 (*(volatile unsigned short *)0xF014A)\r
+#define SIR11L (*(volatile unsigned char *)0xF014A)\r
+#define SIR12 (*(volatile unsigned short *)0xF014C)\r
+#define SIR12L (*(volatile unsigned char *)0xF014C)\r
+#define SIR13 (*(volatile unsigned short *)0xF014E)\r
+#define SIR13L (*(volatile unsigned char *)0xF014E)\r
+#define SMR10 (*(volatile unsigned short *)0xF0150)\r
+#define SMR11 (*(volatile unsigned short *)0xF0152)\r
+#define SMR12 (*(volatile unsigned short *)0xF0154)\r
+#define SMR13 (*(volatile unsigned short *)0xF0156)\r
+#define SCR10 (*(volatile unsigned short *)0xF0158)\r
+#define SCR11 (*(volatile unsigned short *)0xF015A)\r
+#define SCR12 (*(volatile unsigned short *)0xF015C)\r
+#define SCR13 (*(volatile unsigned short *)0xF015E)\r
+#define SE1 (*(volatile unsigned short *)0xF0160)\r
+#define SE1L (*(volatile union un_se1l *)0xF0160).se1l\r
+#define SE1L_bit (*(volatile union un_se1l *)0xF0160).BIT\r
+#define SS1 (*(volatile unsigned short *)0xF0162)\r
+#define SS1L (*(volatile union un_ss1l *)0xF0162).ss1l\r
+#define SS1L_bit (*(volatile union un_ss1l *)0xF0162).BIT\r
+#define ST1 (*(volatile unsigned short *)0xF0164)\r
+#define ST1L (*(volatile union un_st1l *)0xF0164).st1l\r
+#define ST1L_bit (*(volatile union un_st1l *)0xF0164).BIT\r
+#define SPS1 (*(volatile unsigned short *)0xF0166)\r
+#define SPS1L (*(volatile unsigned char *)0xF0166)\r
+#define SO1 (*(volatile unsigned short *)0xF0168)\r
+#define SOE1 (*(volatile unsigned short *)0xF016A)\r
+#define SOE1L (*(volatile union un_soe1l *)0xF016A).soe1l\r
+#define SOE1L_bit (*(volatile union un_soe1l *)0xF016A).BIT\r
+#define EDR10 (*(volatile unsigned short *)0xF016C)\r
+#define EDR10L (*(volatile unsigned char *)0xF016C)\r
+#define EDR11 (*(volatile unsigned short *)0xF016E)\r
+#define EDR11L (*(volatile unsigned char *)0xF016E)\r
+#define EDR12 (*(volatile unsigned short *)0xF0170)\r
+#define EDR12L (*(volatile unsigned char *)0xF0170)\r
+#define EDR13 (*(volatile unsigned short *)0xF0172)\r
+#define EDR13L (*(volatile unsigned char *)0xF0172)\r
+#define SOL1 (*(volatile unsigned short *)0xF0174)\r
+#define SOL1L (*(volatile unsigned char *)0xF0174)\r
+#define SSC1 (*(volatile unsigned short *)0xF0178)\r
+#define SSC1L (*(volatile unsigned char *)0xF0178)\r
#define TCR00 (*(volatile unsigned short *)0xF0180)\r
#define TCR01 (*(volatile unsigned short *)0xF0182)\r
#define TCR02 (*(volatile unsigned short *)0xF0184)\r
#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
+#define TCR10 (*(volatile unsigned short *)0xF01C0)\r
+#define TCR11 (*(volatile unsigned short *)0xF01C2)\r
+#define TCR12 (*(volatile unsigned short *)0xF01C4)\r
+#define TCR13 (*(volatile unsigned short *)0xF01C6)\r
+#define TMR10 (*(volatile unsigned short *)0xF01D0)\r
+#define TMR11 (*(volatile unsigned short *)0xF01D2)\r
+#define TMR12 (*(volatile unsigned short *)0xF01D4)\r
+#define TMR13 (*(volatile unsigned short *)0xF01D6)\r
+#define TSR10 (*(volatile unsigned short *)0xF01E0)\r
+#define TSR10L (*(volatile unsigned char *)0xF01E0)\r
+#define TSR11 (*(volatile unsigned short *)0xF01E2)\r
+#define TSR11L (*(volatile unsigned char *)0xF01E2)\r
+#define TSR12 (*(volatile unsigned short *)0xF01E4)\r
+#define TSR12L (*(volatile unsigned char *)0xF01E4)\r
+#define TSR13 (*(volatile unsigned short *)0xF01E6)\r
+#define TSR13L (*(volatile unsigned char *)0xF01E6)\r
+#define TE1 (*(volatile unsigned short *)0xF01F0)\r
+#define TE1L (*(volatile union un_te1l *)0xF01F0).te1l\r
+#define TE1L_bit (*(volatile union un_te1l *)0xF01F0).BIT\r
+#define TS1 (*(volatile unsigned short *)0xF01F2)\r
+#define TS1L (*(volatile union un_ts1l *)0xF01F2).ts1l\r
+#define TS1L_bit (*(volatile union un_ts1l *)0xF01F2).BIT\r
+#define TT1 (*(volatile unsigned short *)0xF01F4)\r
+#define TT1L (*(volatile union un_tt1l *)0xF01F4).tt1l\r
+#define TT1L_bit (*(volatile union un_tt1l *)0xF01F4).BIT\r
+#define TPS1 (*(volatile unsigned short *)0xF01F6)\r
+#define TO1 (*(volatile unsigned short *)0xF01F8)\r
+#define TO1L (*(volatile unsigned char *)0xF01F8)\r
+#define TOE1 (*(volatile unsigned short *)0xF01FA)\r
+#define TOE1L (*(volatile union un_toe1l *)0xF01FA).toe1l\r
+#define TOE1L_bit (*(volatile union un_toe1l *)0xF01FA).BIT\r
+#define TOL1 (*(volatile unsigned short *)0xF01FC)\r
+#define TOL1L (*(volatile unsigned char *)0xF01FC)\r
+#define TOM1 (*(volatile unsigned short *)0xF01FE)\r
+#define TOM1L (*(volatile unsigned char *)0xF01FE)\r
#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
#define SVA0 (*(volatile unsigned char *)0xF0234)\r
#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
-#define DSCCTL (*(volatile union un_dscctl *)0xF02E5).dscctl\r
-#define DSCCTL_bit (*(volatile union un_dscctl *)0xF02E5).BIT\r
-#define MCKC (*(volatile union un_mckc *)0xF02E6).mckc\r
-#define MCKC_bit (*(volatile union un_mckc *)0xF02E6).BIT\r
+#define IICCTL10 (*(volatile union un_iicctl10 *)0xF0238).iicctl10\r
+#define IICCTL10_bit (*(volatile union un_iicctl10 *)0xF0238).BIT\r
+#define IICCTL11 (*(volatile union un_iicctl11 *)0xF0239).iicctl11\r
+#define IICCTL11_bit (*(volatile union un_iicctl11 *)0xF0239).BIT\r
+#define IICWL1 (*(volatile unsigned char *)0xF023A)\r
+#define IICWH1 (*(volatile unsigned char *)0xF023B)\r
+#define SVA1 (*(volatile unsigned char *)0xF023C)\r
+#define IICSE1 (*(volatile unsigned char *)0xF023D)\r
+#define TRJCR0 (*(volatile unsigned char *)0xF0240)\r
+#define TRJIOC0 (*(volatile union un_trjioc0 *)0xF0241).trjioc0\r
+#define TRJIOC0_bit (*(volatile union un_trjioc0 *)0xF0241).BIT\r
+#define TRJMR0 (*(volatile union un_trjmr0 *)0xF0242).trjmr0\r
+#define TRJMR0_bit (*(volatile union un_trjmr0 *)0xF0242).BIT\r
+#define TRJISR0 (*(volatile union un_trjisr0 *)0xF0243).trjisr0\r
+#define TRJISR0_bit (*(volatile union un_trjisr0 *)0xF0243).BIT\r
+#define TRGMR (*(volatile union un_trgmr *)0xF0250).trgmr\r
+#define TRGMR_bit (*(volatile union un_trgmr *)0xF0250).BIT\r
+#define TRGCNTC (*(volatile union un_trgcntc *)0xF0251).trgcntc\r
+#define TRGCNTC_bit (*(volatile union un_trgcntc *)0xF0251).BIT\r
+#define TRGCR (*(volatile union un_trgcr *)0xF0252).trgcr\r
+#define TRGCR_bit (*(volatile union un_trgcr *)0xF0252).BIT\r
+#define TRGIER (*(volatile union un_trgier *)0xF0253).trgier\r
+#define TRGIER_bit (*(volatile union un_trgier *)0xF0253).BIT\r
+#define TRGSR (*(volatile union un_trgsr *)0xF0254).trgsr\r
+#define TRGSR_bit (*(volatile union un_trgsr *)0xF0254).BIT\r
+#define TRGIOR (*(volatile union un_trgior *)0xF0255).trgior\r
+#define TRGIOR_bit (*(volatile union un_trgior *)0xF0255).BIT\r
+#define TRG (*(volatile unsigned short *)0xF0256)\r
+#define TRGGRA (*(volatile unsigned short *)0xF0258)\r
+#define TRGGRB (*(volatile unsigned short *)0xF025A)\r
+#define TRGGRCM (*(volatile unsigned short *)0xF025C)\r
+#define TRGGRDM (*(volatile unsigned short *)0xF025E)\r
+#define TRDELC (*(volatile union un_trdelc *)0xF0260).trdelc\r
+#define TRDELC_bit (*(volatile union un_trdelc *)0xF0260).BIT\r
+#define TRDSTR (*(volatile unsigned char *)0xF0263)\r
+#define TRDMR (*(volatile union un_trdmr *)0xF0264).trdmr\r
+#define TRDMR_bit (*(volatile union un_trdmr *)0xF0264).BIT\r
+#define TRDPMR (*(volatile union un_trdpmr *)0xF0265).trdpmr\r
+#define TRDPMR_bit (*(volatile union un_trdpmr *)0xF0265).BIT\r
+#define TRDFCR (*(volatile union un_trdfcr *)0xF0266).trdfcr\r
+#define TRDFCR_bit (*(volatile union un_trdfcr *)0xF0266).BIT\r
+#define TRDOER1 (*(volatile union un_trdoer1 *)0xF0267).trdoer1\r
+#define TRDOER1_bit (*(volatile union un_trdoer1 *)0xF0267).BIT\r
+#define TRDOER2 (*(volatile union un_trdoer2 *)0xF0268).trdoer2\r
+#define TRDOER2_bit (*(volatile union un_trdoer2 *)0xF0268).BIT\r
+#define TRDOCR (*(volatile union un_trdocr *)0xF0269).trdocr\r
+#define TRDOCR_bit (*(volatile union un_trdocr *)0xF0269).BIT\r
+#define TRDDF0 (*(volatile union un_trddf0 *)0xF026A).trddf0\r
+#define TRDDF0_bit (*(volatile union un_trddf0 *)0xF026A).BIT\r
+#define TRDDF1 (*(volatile union un_trddf1 *)0xF026B).trddf1\r
+#define TRDDF1_bit (*(volatile union un_trddf1 *)0xF026B).BIT\r
+#define TRDCR0 (*(volatile union un_trdcr0 *)0xF0270).trdcr0\r
+#define TRDCR0_bit (*(volatile union un_trdcr0 *)0xF0270).BIT\r
+#define TRDIORA0 (*(volatile union un_trdiora0 *)0xF0271).trdiora0\r
+#define TRDIORA0_bit (*(volatile union un_trdiora0 *)0xF0271).BIT\r
+#define TRDIORC0 (*(volatile union un_trdiorc0 *)0xF0272).trdiorc0\r
+#define TRDIORC0_bit (*(volatile union un_trdiorc0 *)0xF0272).BIT\r
+#define TRDSR0 (*(volatile union un_trdsr0 *)0xF0273).trdsr0\r
+#define TRDSR0_bit (*(volatile union un_trdsr0 *)0xF0273).BIT\r
+#define TRDIER0 (*(volatile union un_trdier0 *)0xF0274).trdier0\r
+#define TRDIER0_bit (*(volatile union un_trdier0 *)0xF0274).BIT\r
+#define TRDPOCR0 (*(volatile union un_trdpocr0 *)0xF0275).trdpocr0\r
+#define TRDPOCR0_bit (*(volatile union un_trdpocr0 *)0xF0275).BIT\r
+#define TRD0 (*(volatile unsigned short *)0xF0276)\r
+#define TRDGRA0 (*(volatile unsigned short *)0xF0278)\r
+#define TRDGRB0 (*(volatile unsigned short *)0xF027A)\r
+#define TRDGRC0M (*(volatile unsigned short *)0xF027C)\r
+#define TRDGRD0M (*(volatile unsigned short *)0xF027E)\r
+#define TRDCR1 (*(volatile union un_trdcr1 *)0xF0280).trdcr1\r
+#define TRDCR1_bit (*(volatile union un_trdcr1 *)0xF0280).BIT\r
+#define TRDIORA1 (*(volatile union un_trdiora1 *)0xF0281).trdiora1\r
+#define TRDIORA1_bit (*(volatile union un_trdiora1 *)0xF0281).BIT\r
+#define TRDIORC1 (*(volatile union un_trdiorc1 *)0xF0282).trdiorc1\r
+#define TRDIORC1_bit (*(volatile union un_trdiorc1 *)0xF0282).BIT\r
+#define TRDSR1 (*(volatile union un_trdsr1 *)0xF0283).trdsr1\r
+#define TRDSR1_bit (*(volatile union un_trdsr1 *)0xF0283).BIT\r
+#define TRDIER1 (*(volatile union un_trdier1 *)0xF0284).trdier1\r
+#define TRDIER1_bit (*(volatile union un_trdier1 *)0xF0284).BIT\r
+#define TRDPOCR1 (*(volatile union un_trdpocr1 *)0xF0285).trdpocr1\r
+#define TRDPOCR1_bit (*(volatile union un_trdpocr1 *)0xF0285).BIT\r
+#define TRD1 (*(volatile unsigned short *)0xF0286)\r
+#define TRDGRA1 (*(volatile unsigned short *)0xF0288)\r
+#define TRDGRB1 (*(volatile unsigned short *)0xF028A)\r
+#define TRDGRC1M (*(volatile unsigned short *)0xF028C)\r
+#define TRDGRD1M (*(volatile unsigned short *)0xF028E)\r
+#define DTCBAR (*(volatile unsigned char *)0xF02E0)\r
+#define DTCEN0 (*(volatile union un_dtcen0 *)0xF02E8).dtcen0\r
+#define DTCEN0_bit (*(volatile union un_dtcen0 *)0xF02E8).BIT\r
+#define DTCEN1 (*(volatile union un_dtcen1 *)0xF02E9).dtcen1\r
+#define DTCEN1_bit (*(volatile union un_dtcen1 *)0xF02E9).BIT\r
+#define DTCEN2 (*(volatile union un_dtcen2 *)0xF02EA).dtcen2\r
+#define DTCEN2_bit (*(volatile union un_dtcen2 *)0xF02EA).BIT\r
+#define DTCEN3 (*(volatile union un_dtcen3 *)0xF02EB).dtcen3\r
+#define DTCEN3_bit (*(volatile union un_dtcen3 *)0xF02EB).BIT\r
+#define DTCEN4 (*(volatile union un_dtcen4 *)0xF02EC).dtcen4\r
+#define DTCEN4_bit (*(volatile union un_dtcen4 *)0xF02EC).BIT\r
#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
#define CRCD (*(volatile unsigned short *)0xF02FA)\r
-#define SYSCFG (*(volatile unsigned short *)0xF0400)\r
-#define SYSCFG1 (*(volatile unsigned short *)0xF0402)\r
-#define SYSSTS0 (*(volatile unsigned short *)0xF0404)\r
-#define SYSSTS1 (*(volatile unsigned short *)0xF0406)\r
-#define DVSTCTR0 (*(volatile unsigned short *)0xF0408)\r
-#define DVSTCTR1 (*(volatile unsigned short *)0xF040A)\r
-#define DMA0PCFG (*(volatile unsigned short *)0xF0410)\r
-#define DMA1PCFG (*(volatile unsigned short *)0xF0412)\r
-#define CFIFOM (*(volatile unsigned short *)0xF0414)\r
-#define CFIFOML (*(volatile unsigned char *)0xF0414)\r
-#define D0FIFOM (*(volatile unsigned short *)0xF0418)\r
-#define D0FIFOML (*(volatile unsigned char *)0xF0418)\r
-#define D1FIFOM (*(volatile unsigned short *)0xF041C)\r
-#define D1FIFOML (*(volatile unsigned char *)0xF041C)\r
-#define CFIFOSEL (*(volatile unsigned short *)0xF0420)\r
-#define CFIFOCTR (*(volatile unsigned short *)0xF0422)\r
-#define D0FIFOSEL (*(volatile unsigned short *)0xF0428)\r
-#define D0FIFOCTR (*(volatile unsigned short *)0xF042A)\r
-#define D1FIFOSEL (*(volatile unsigned short *)0xF042C)\r
-#define D1FIFOCTR (*(volatile unsigned short *)0xF042E)\r
-#define INTENB0 (*(volatile unsigned short *)0xF0430)\r
-#define INTENB1 (*(volatile unsigned short *)0xF0432)\r
-#define INTENB2 (*(volatile unsigned short *)0xF0434)\r
-#define BRDYENB (*(volatile unsigned short *)0xF0436)\r
-#define NRDYENB (*(volatile unsigned short *)0xF0438)\r
-#define BEMPENB (*(volatile unsigned short *)0xF043A)\r
-#define SOFCFG (*(volatile unsigned short *)0xF043C)\r
-#define INTSTS0 (*(volatile unsigned short *)0xF0440)\r
-#define INTSTS1 (*(volatile unsigned short *)0xF0442)\r
-#define INTSTS2 (*(volatile unsigned short *)0xF0444)\r
-#define BRDYSTS (*(volatile unsigned short *)0xF0446)\r
-#define NRDYSTS (*(volatile unsigned short *)0xF0448)\r
-#define BEMPSTS (*(volatile unsigned short *)0xF044A)\r
-#define FRMNUM (*(volatile unsigned short *)0xF044C)\r
-#define USBADDR (*(volatile unsigned short *)0xF0450)\r
-#define USBREQ (*(volatile unsigned short *)0xF0454)\r
-#define USBVAL (*(volatile unsigned short *)0xF0456)\r
-#define USBINDX (*(volatile unsigned short *)0xF0458)\r
-#define USBLENG (*(volatile unsigned short *)0xF045A)\r
-#define DCPCFG (*(volatile unsigned short *)0xF045C)\r
-#define DCPMAXP (*(volatile unsigned short *)0xF045E)\r
-#define DCPCTR (*(volatile unsigned short *)0xF0460)\r
-#define PIPESEL (*(volatile unsigned short *)0xF0464)\r
-#define PIPECFG (*(volatile unsigned short *)0xF0468)\r
-#define PIPEMAXP (*(volatile unsigned short *)0xF046C)\r
-#define PIPEPERI (*(volatile unsigned short *)0xF046E)\r
-#define PIPE4CTR (*(volatile unsigned short *)0xF0476)\r
-#define PIPE5CTR (*(volatile unsigned short *)0xF0478)\r
-#define PIPE6CTR (*(volatile unsigned short *)0xF047A)\r
-#define PIPE7CTR (*(volatile unsigned short *)0xF047C)\r
-#define PIPE4TRE (*(volatile unsigned short *)0xF049C)\r
-#define PIPE4TRN (*(volatile unsigned short *)0xF049E)\r
-#define PIPE5TRE (*(volatile unsigned short *)0xF04A0)\r
-#define PIPE5TRN (*(volatile unsigned short *)0xF04A2)\r
-#define USBBCCTRL0 (*(volatile unsigned short *)0xF04B0)\r
-#define USBBCCTRL1 (*(volatile unsigned short *)0xF04B4)\r
-#define USBBCOPT0 (*(volatile unsigned short *)0xF04B8)\r
-#define USBBCOPT1 (*(volatile unsigned short *)0xF04BC)\r
-#define USBMC (*(volatile unsigned short *)0xF04CC)\r
-#define DEVADD0 (*(volatile unsigned short *)0xF04D0)\r
-#define DEVADD1 (*(volatile unsigned short *)0xF04D2)\r
-#define DEVADD2 (*(volatile unsigned short *)0xF04D4)\r
-#define DEVADD3 (*(volatile unsigned short *)0xF04D6)\r
-#define DEVADD4 (*(volatile unsigned short *)0xF04D8)\r
-#define DEVADD5 (*(volatile unsigned short *)0xF04DA)\r
+#define ELSELR00 (*(volatile union un_elselr00 *)0xF0300).elselr00\r
+#define ELSELR00_bit (*(volatile union un_elselr00 *)0xF0300).BIT\r
+#define ELSELR01 (*(volatile union un_elselr01 *)0xF0301).elselr01\r
+#define ELSELR01_bit (*(volatile union un_elselr01 *)0xF0301).BIT\r
+#define ELSELR02 (*(volatile union un_elselr02 *)0xF0302).elselr02\r
+#define ELSELR02_bit (*(volatile union un_elselr02 *)0xF0302).BIT\r
+#define ELSELR03 (*(volatile union un_elselr03 *)0xF0303).elselr03\r
+#define ELSELR03_bit (*(volatile union un_elselr03 *)0xF0303).BIT\r
+#define ELSELR04 (*(volatile union un_elselr04 *)0xF0304).elselr04\r
+#define ELSELR04_bit (*(volatile union un_elselr04 *)0xF0304).BIT\r
+#define ELSELR05 (*(volatile union un_elselr05 *)0xF0305).elselr05\r
+#define ELSELR05_bit (*(volatile union un_elselr05 *)0xF0305).BIT\r
+#define ELSELR06 (*(volatile union un_elselr06 *)0xF0306).elselr06\r
+#define ELSELR06_bit (*(volatile union un_elselr06 *)0xF0306).BIT\r
+#define ELSELR07 (*(volatile union un_elselr07 *)0xF0307).elselr07\r
+#define ELSELR07_bit (*(volatile union un_elselr07 *)0xF0307).BIT\r
+#define ELSELR08 (*(volatile union un_elselr08 *)0xF0308).elselr08\r
+#define ELSELR08_bit (*(volatile union un_elselr08 *)0xF0308).BIT\r
+#define ELSELR09 (*(volatile union un_elselr09 *)0xF0309).elselr09\r
+#define ELSELR09_bit (*(volatile union un_elselr09 *)0xF0309).BIT\r
+#define ELSELR10 (*(volatile union un_elselr10 *)0xF030A).elselr10\r
+#define ELSELR10_bit (*(volatile union un_elselr10 *)0xF030A).BIT\r
+#define ELSELR11 (*(volatile union un_elselr11 *)0xF030B).elselr11\r
+#define ELSELR11_bit (*(volatile union un_elselr11 *)0xF030B).BIT\r
+#define ELSELR12 (*(volatile union un_elselr12 *)0xF030C).elselr12\r
+#define ELSELR12_bit (*(volatile union un_elselr12 *)0xF030C).BIT\r
+#define ELSELR13 (*(volatile union un_elselr13 *)0xF030D).elselr13\r
+#define ELSELR13_bit (*(volatile union un_elselr13 *)0xF030D).BIT\r
+#define ELSELR14 (*(volatile union un_elselr14 *)0xF030E).elselr14\r
+#define ELSELR14_bit (*(volatile union un_elselr14 *)0xF030E).BIT\r
+#define ELSELR15 (*(volatile union un_elselr15 *)0xF030F).elselr15\r
+#define ELSELR15_bit (*(volatile union un_elselr15 *)0xF030F).BIT\r
+#define ELSELR16 (*(volatile union un_elselr16 *)0xF0310).elselr16\r
+#define ELSELR16_bit (*(volatile union un_elselr16 *)0xF0310).BIT\r
+#define ELSELR17 (*(volatile union un_elselr17 *)0xF0311).elselr17\r
+#define ELSELR17_bit (*(volatile union un_elselr17 *)0xF0311).BIT\r
+#define ELSELR18 (*(volatile union un_elselr18 *)0xF0312).elselr18\r
+#define ELSELR18_bit (*(volatile union un_elselr18 *)0xF0312).BIT\r
+#define ELSELR19 (*(volatile union un_elselr19 *)0xF0313).elselr19\r
+#define ELSELR19_bit (*(volatile union un_elselr19 *)0xF0313).BIT\r
+#define ELSELR20 (*(volatile union un_elselr20 *)0xF0314).elselr20\r
+#define ELSELR20_bit (*(volatile union un_elselr20 *)0xF0314).BIT\r
+#define ELSELR21 (*(volatile union un_elselr21 *)0xF0315).elselr21\r
+#define ELSELR21_bit (*(volatile union un_elselr21 *)0xF0315).BIT\r
+#define ELSELR22 (*(volatile union un_elselr22 *)0xF0316).elselr22\r
+#define ELSELR22_bit (*(volatile union un_elselr22 *)0xF0316).BIT\r
+#define ELSELR23 (*(volatile union un_elselr23 *)0xF0317).elselr23\r
+#define ELSELR23_bit (*(volatile union un_elselr23 *)0xF0317).BIT\r
+#define ELSELR24 (*(volatile union un_elselr24 *)0xF0318).elselr24\r
+#define ELSELR24_bit (*(volatile union un_elselr24 *)0xF0318).BIT\r
+#define ELSELR25 (*(volatile union un_elselr25 *)0xF0319).elselr25\r
+#define ELSELR25_bit (*(volatile union un_elselr25 *)0xF0319).BIT\r
+#define COMPMDR (*(volatile union un_compmdr *)0xF0340).compmdr\r
+#define COMPMDR_bit (*(volatile union un_compmdr *)0xF0340).BIT\r
+#define COMPFIR (*(volatile union un_compfir *)0xF0341).compfir\r
+#define COMPFIR_bit (*(volatile union un_compfir *)0xF0341).BIT\r
+#define COMPOCR (*(volatile union un_compocr *)0xF0342).compocr\r
+#define COMPOCR_bit (*(volatile union un_compocr *)0xF0342).BIT\r
+#define COMPTCR (*(volatile union un_comptcr *)0xF0343).comptcr\r
+#define COMPTCR_bit (*(volatile union un_comptcr *)0xF0343).BIT\r
+#define TRJ0 (*(volatile unsigned short *)0xF0500)\r
+#define MONMOD1 (*(volatile unsigned char *)0xF0720)\r
+#define TRCMA (*(volatile unsigned char *)0xF0721)\r
\r
/*\r
Sfr bits\r
#define ADTYP ADM2_bit.no0\r
#define AWC ADM2_bit.no2\r
#define ADRCK ADM2_bit.no3\r
+#define SSIE00 ISC_bit.no7\r
+#define TRJ0EN PER1_bit.no0\r
+#define DTCEN PER1_bit.no3\r
+#define TRD0EN PER1_bit.no4\r
+#define CMPEN PER1_bit.no5\r
+#define TRGEN PER1_bit.no6\r
+#define DACEN PER1_bit.no7\r
#define DFLEN DFLCTL_bit.no0\r
#define BRSAM BECTL_bit.no0\r
#define ESQST FSSE_bit.no7\r
-#define DIVST MDUC_bit.no0\r
-#define MACSF MDUC_bit.no1\r
-#define MACOF MDUC_bit.no2\r
-#define MDSM MDUC_bit.no3\r
-#define MACMODE MDUC_bit.no6\r
-#define DIVMODE MDUC_bit.no7\r
#define TAU0EN PER0_bit.no0\r
+#define TAU1EN PER0_bit.no1\r
#define SAU0EN PER0_bit.no2\r
+#define SAU1EN PER0_bit.no3\r
#define IICA0EN PER0_bit.no4\r
#define ADCEN PER0_bit.no5\r
+#define IICA1EN PER0_bit.no6\r
#define RTCEN PER0_bit.no7\r
#define PAENB RMC_bit.no0\r
#define WDVOL RMC_bit.no7\r
#define DAD0 IICCTL01_bit.no4\r
#define CLD0 IICCTL01_bit.no5\r
#define WUP0 IICCTL01_bit.no7\r
+#define SPT1 IICCTL10_bit.no0\r
+#define STT1 IICCTL10_bit.no1\r
+#define ACKE1 IICCTL10_bit.no2\r
+#define WTIM1 IICCTL10_bit.no3\r
+#define SPIE1 IICCTL10_bit.no4\r
+#define WREL1 IICCTL10_bit.no5\r
+#define LREL1 IICCTL10_bit.no6\r
+#define IICE1 IICCTL10_bit.no7\r
+#define PRS1 IICCTL11_bit.no0\r
+#define DFC1 IICCTL11_bit.no2\r
+#define SMC1 IICCTL11_bit.no3\r
+#define DAD1 IICCTL11_bit.no4\r
+#define CLD1 IICCTL11_bit.no5\r
+#define WUP1 IICCTL11_bit.no7\r
+#define TRGPWM TRGMR_bit.no0\r
+#define TRGMDF TRGMR_bit.no1\r
+#define TRGDFA TRGMR_bit.no2\r
+#define TRGDFB TRGMR_bit.no3\r
+#define TRGDFCK0 TRGMR_bit.no4\r
+#define TRGDFCK1 TRGMR_bit.no5\r
+#define TRGELCICE TRGMR_bit.no6\r
+#define TRGSTART TRGMR_bit.no7\r
+#define TRGTCK0 TRGCR_bit.no0\r
+#define TRGTCK1 TRGCR_bit.no1\r
+#define TRGTCK2 TRGCR_bit.no2\r
+#define TRGCKEG0 TRGCR_bit.no3\r
+#define TRGCKEG1 TRGCR_bit.no4\r
+#define TRGCCLR0 TRGCR_bit.no5\r
+#define TRGCCLR1 TRGCR_bit.no6\r
+#define TRGIMIEA TRGIER_bit.no0\r
+#define TRGIMIEB TRGIER_bit.no1\r
+#define TRGUDIE TRGIER_bit.no2\r
+#define TRGOVIE TRGIER_bit.no3\r
+#define TRGIMFA TRGSR_bit.no0\r
+#define TRGIMFB TRGSR_bit.no1\r
+#define TRGUDF TRGSR_bit.no2\r
+#define TRGOVF TRGSR_bit.no3\r
+#define TRGDIRF TRGSR_bit.no4\r
+#define TRGIOA0 TRGIOR_bit.no0\r
+#define TRGIOA1 TRGIOR_bit.no1\r
+#define TRGIOA2 TRGIOR_bit.no2\r
+#define TRGBUFA TRGIOR_bit.no3\r
+#define TRGIOB0 TRGIOR_bit.no4\r
+#define TRGIOB1 TRGIOR_bit.no5\r
+#define TRGIOB2 TRGIOR_bit.no6\r
+#define TRGBUFB TRGIOR_bit.no7\r
+#define TRDSYNC TRDMR_bit.no0\r
+#define TRDBFC0 TRDMR_bit.no4\r
+#define TRDBFD0 TRDMR_bit.no5\r
+#define TRDBFC1 TRDMR_bit.no6\r
+#define TRDBFD1 TRDMR_bit.no7\r
+#define TRDPWMB0 TRDPMR_bit.no0\r
+#define TRDPWMC0 TRDPMR_bit.no1\r
+#define TRDPWMD0 TRDPMR_bit.no2\r
+#define TRDPWMB1 TRDPMR_bit.no4\r
+#define TRDPWMC1 TRDPMR_bit.no5\r
+#define TRDPWMD1 TRDPMR_bit.no6\r
+#define TRDSHUTS TRDOER2_bit.no0\r
+#define TRDPTO TRDOER2_bit.no7\r
#define CRC0EN CRC0CTL_bit.no7\r
+#define C0ENB COMPMDR_bit.no0\r
+#define C0MON COMPMDR_bit.no3\r
+#define C1ENB COMPMDR_bit.no4\r
+#define C1MON COMPMDR_bit.no7\r
+#define C0IE COMPOCR_bit.no0\r
+#define C0OE COMPOCR_bit.no1\r
+#define C0OP COMPOCR_bit.no2\r
+#define C1IE COMPOCR_bit.no4\r
+#define C1OE COMPOCR_bit.no5\r
+#define C1OP COMPOCR_bit.no6\r
+#define SPDMD COMPOCR_bit.no7\r
+#define TSTMD COMPTCR_bit.no0\r
+#define TMDWE COMPTCR_bit.no7\r
\r
/*\r
Interrupt vector addresses\r
\r
/* Hardware includes. */\r
#include "port_iodefine.h"\r
+#include "port_iodefine_ext.h"\r
+#include "LED.h"\r
\r
/* The period at which the check timer will expire, in ms, provided no errors\r
have been reported by any of the standard demo tasks. ms are converted to the\r
#define mainDEMO_TIMER_INCREMENTS_PER_CHECK_TIMER_TIMEOUT ( 100UL )\r
#define mainDEMO_TIMER_PERIOD_MS ( mainCHECK_TIMER_PERIOD_MS / mainDEMO_TIMER_INCREMENTS_PER_CHECK_TIMER_TIMEOUT )\r
\r
-/* The LED toggled by the check timer. */\r
-#define mainLED_0 P1_bit.no0\r
-\r
/* A block time of zero simple means "don't block". */\r
#define mainDONT_BLOCK ( 0U )\r
\r
*/\r
static void prvDemoTimerCallback( xTimerHandle xTimer );\r
\r
-/*\r
- * This function is called from the C startup routine to setup the processor -\r
- * in particular the clock source.\r
- */\r
-int __low_level_init(void);\r
-\r
/*\r
* Functions that define the RegTest tasks, as described at the top of this file.\r
*/\r
/* This variable is incremented each time the demo timer expires. */\r
static volatile unsigned long ulDemoSoftwareTimerCounter = 0UL;\r
\r
-/* RL78/G13 Option Byte Definition. Watchdog disabled, LVI enabled, OCD interface\r
-enabled. */\r
-#if 0\r
-__root __far const unsigned char OptionByte[] @ 0x00C0 =\r
-{\r
- 0x00U, 0xFFU, 0xF8U, 0x81U\r
-};\r
-\r
-/* Security byte definition */\r
-__root __far const unsigned char ucSecurityCode[] @ 0x00C4 =\r
-{\r
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
-};\r
-#endif\r
-\r
/*-----------------------------------------------------------*/\r
-\r
+volatile unsigned char ucTemp;\r
short main( void )\r
{\r
+ ucTemp = RESF;\r
+ ucTemp = sizeof( char* );\r
+ ucTemp = sizeof( pdTASK_CODE );\r
+\r
/* Creates all the tasks and timers, then starts the scheduler. */\r
\r
/* First create the 'standard demo' tasks. These are used to demonstrate\r
\r
/* Toggle the LED. The toggle rate will depend on whether or not an error\r
has been found in any tasks. */\r
- mainLED_0 = !mainLED_0;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-int __low_level_init(void)\r
-{\r
-unsigned portCHAR ucResetFlag = RESF;\r
-\r
- portDISABLE_INTERRUPTS();\r
-\r
- /* Set fMX */\r
- CMC = 0x00;\r
- MSTOP = 1U;\r
-\r
- /* Set fMAIN */\r
- MCM0 = 0U;\r
-\r
- /* Set fSUB */\r
- XTSTOP = 1U;\r
- OSMC = 0x10;\r
-\r
- /* Set fCLK */\r
- CSS = 0U;\r
-\r
- /* Set fIH */\r
- HIOSTOP = 0U;\r
-\r
- /* LED port initialization - set port register. */\r
-// P7 &= 0x7F;\r
- P1 &= 0xFE;\r
-\r
- /* Set port mode register. */\r
-// PM7 &= 0x7F;\r
- PM1 &= 0xFE;\r
-\r
- /* Switch pin initialization - enable pull-up resistor. */\r
-// PU12_bit.no0 = 1;\r
-\r
- return pdTRUE;\r
+ LED_BIT = !LED_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
RAM. */\r
xFreeHeapSpace = xPortGetFreeHeapSize();\r
}\r
+/*-----------------------------------------------------------*/\r
\r
/* PROJECT NAME : RTOSDemo */
/* FILE : reset_program.asm */
/* DESCRIPTION : Reset Program */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
/* PROJECT NAME : RTOSDemo */
/* FILE : typedefine.h */
/* DESCRIPTION : Aliases of Integer Type */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
/***********************************************************************/
/* */
-/* PROJECT NAME : RTOSDemo */
+/* PROJECT NAME : test */
/* FILE : vector_table.c */
/* DESCRIPTION : Vector Table */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
/***********************************************************************/ \r
- \r
-#include "interrupt_handlers.h"\r
\r
-extern void PowerON_Reset (void);\r
+#include "interrupt_handlers.h"\r
\r
+extern void PowerON_Reset( void );
+extern void vPortTickISR( void );
+extern void vPortYield( void );\r
+
+#warning Check the options bytes.\r
const unsigned char Option_Bytes[] __attribute__ ((section (".option_bytes"))) = {\r
- 0xef, 0xff, 0xe8, 0x85\r
+ 0x6e, 0xff, 0xe8, 0x85 /* 0x00U, 0xFFU, 0xF8U, 0x81U */\r
};\r
\r
const unsigned char Security_Id[] __attribute__ ((section (".security_id"))) = {\r
INT_P4,\r
//INT_P5 (0x12)\r
INT_P5,\r
+ //INT_CSI20/INT_IIC20/INT_ST2 (0x14)
+ INT_ST2,\r
+ //INT_CSI21/INT_IIC21/INT_SR2 (0x16)
+ INT_SR2,\r
+ //INT_SRE2/INT_TM11H (0x18)
+ INT_TM11H,
// Padding\r
(void*)0xFFFF,\r
// Padding\r
(void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- //INT_DMA0 (0x1A)\r
- INT_DMA0,\r
- //INT_DMA1 (0x1C)\r
- INT_DMA1,\r
//INT_CSI00/INT_IIC00/INT_ST0 (0x1E)\r
INT_ST0,\r
- //INT_TM00 (0x20)\r
- INT_TM00,\r
- //INT_CSI01/INT_IIC01/INT_SR0 (0x22)\r
+ //INT_CSI01/INT_IIC01/INT_SR0 (0x20)\r
INT_SR0,\r
- //INT_SRE0/INT_TM01H (0x24)\r
+ //INT_SRE0/INT_TM01H (0x22)\r
INT_TM01H,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- //INT_TM03H (0x2A)\r
+ //INT_CSI10/INT_IIC10/INT_ST1 (0x24)\r
+ INT_ST1,\r
+ //INT_CSI11/INT_IIC11/INT_SR1 (0x26)\r
+ INT_SR1,\r
+ //INT_SRE1/INT_TM03H (0x28)\r
INT_TM03H,\r
- //INT_IICA0 (0x2C)\r
+ //INT_IICA0 (0x2A)\r
INT_IICA0,\r
+ //INT_TM00 (0x2C)
+ INT_TM00,
//INT_TM01 (0x2E)\r
INT_TM01,\r
//INT_TM02 (0x30)\r
//INT_RTC (0x36)\r
INT_RTC,\r
//INT_IT (0x38)\r
- INT_IT,\r
- // Padding\r
- (void*)0xFFFF,\r
- //INT_USB (0x3C)\r
- INT_USB,\r
- //INT_RSUM (0x3E)\r
- INT_RSUM,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
+ vPortTickISR,\r
+ //INT_KR (0x3A)\r
+ INT_KR,\r
+ //INT_CSI30/INT_IIC30/INT_ST3 (0x3C)\r
+ INT_ST3,\r
+ //INT_CSI31/INT_IIC31/INT_SR3 (0x3E)\r
+ INT_SR3,\r
+ //INT_TRJ0 (0x40)\r
+ INT_TRJ0,\r
+ //INT_TM10 (0x42)\r
+ INT_TM10,\r
+ //INT_TM11 (0x44)\r
+ INT_TM11,\r
+ //INT_TM12 (0x46)\r
+ INT_TM12,\r
+ //INT_TM13 (0x48)\r
+ INT_TM13,\r
+ //INT_P6 (0x4A)\r
+ INT_P6,\r
+ //INT_P7 (0x4C)\r
+ INT_P7,\r
//INT_P8 (0x4E)\r
INT_P8,\r
//INT_P9 (0x50)\r
INT_P9,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- //INT_MD (0x5E)\r
- INT_MD,\r
- // Padding\r
- (void*)0xFFFF,\r
+ //INT_CMP0/INT_P10 (0x52)
+ INT_P10,\r
+ //INT_CMP1/INT_P11 (0x54)
+ INT_P11,\r
+ //INT_TRD0 (0x56)\r
+ INT_TRD0,\r
+ //INT_TRD1 (0x58)\r
+ INT_TRD1,\r
+ //INT_TRG (0x5A)\r
+ INT_TRG,\r
+ //INT_SRE3/INT_TM13H (0x5C)\r
+ INT_TM13H,\r
+ // Padding\r
+ (void*)0xFFFF,\r
+ //INT_IICA1 (0x60)\r
+ INT_IICA1,\r
//INT_FL (0x62)\r
INT_FL,\r
// Padding\r
// Padding\r
(void*)0xFFFF,\r
//INT_BRK_I (0x7E)\r
- INT_BRK_I,\r
+ vPortYield,\r
};\r
\r
projects / freertos / commitdiff