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+ <listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}}\src""/>\r
+ </option>\r
+ <option id="com.renesas.cdt.core.Assembler.option.includeSymbolTable.1667734422" name="Include Symbol Table(-as)" superClass="com.renesas.cdt.core.Assembler.option.includeSymbolTable" value="true" valueType="boolean"/>\r
+ <option command="--defsym " id="com.renesas.cdt.core.Assembler.option.symbolDefines.873642275" name="Symbol defines" superClass="com.renesas.cdt.core.Assembler.option.symbolDefines" valueType="stringList"/>\r
+ <inputType id="%Base.Assembler.inputType.Id.1525876099" name="Assembler InputType" superClass="%Base.Assembler.inputType.Id"/>\r
+ </tool>\r
+ <tool command="rl78-elf-ld" commandLinePattern="${COMMAND} ${OUTPUT_FLAG}${OUTPUT_PREFIX} ${OUTPUT}${INPUTS} ${FLAGS}" id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.linker.Id.1741378147" name="Linker" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.linker.Id">\r
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+ <listOptionValue builtIn="false" value=""${CONFIGDIR}""/>\r
+ <listOptionValue builtIn="false" value=""${TCINSTALL}\lib\gcc\rl78-elf\\${GCC_VERSION}""/>\r
+ </option>\r
+ <option id="com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveLibraryFiles.2067366351" name="Archive (library) files" superClass="com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveLibraryFiles" valueType="stringList">\r
+ <listOptionValue builtIn="false" value="${ProjName}"/>\r
+ <listOptionValue builtIn="false" value="gcc"/>\r
+ </option>\r
+ <option id="com.renesas.cdt.core.Linker.option.userDefinedOptions.1076419513" name="User defined options" superClass="com.renesas.cdt.core.Linker.option.userDefinedOptions" valueType="stringList">\r
+ <listOptionValue builtIn="false" value="-e_PowerON_Reset"/>\r
+ </option>\r
+ <option command="-stats" id="com.renesas.cdt.core.Linker.option.misc8.1687098122" name="Compute and display statistics about the operation of the linker(-stats)" superClass="com.renesas.cdt.core.Linker.option.misc8" value="true" valueType="boolean"/>\r
+ </tool>\r
+ <tool id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.objcopy.Id.708363548" name="Objcopy" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.objcopy.Id"/>\r
+ </toolChain>\r
+ </folderInfo>\r
+ <sourceEntries>\r
+ <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>\r
+ </sourceEntries>\r
+ </configuration>\r
+ </storageModule>\r
+ <storageModule moduleId="scannerConfiguration">\r
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>\r
+ <profile id="com.iar.cdt.v850.scanner.IAR_V850_PerProjectProfile">\r
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</storageModule>\r
<storageModule moduleId="cdtBuildSystem" version="4.0.0">\r
<project id="RTOSDemo.com.renesas.cdt.RL78.projectType.1275970009" name="GNURL78" projectType="com.renesas.cdt.RL78.projectType"/>\r
-#Wed Mar 06 15:45:34 GMT 2013\r
+#Tue Mar 19 10:26:50 GMT 2013\r
Library\ Generator\ Command=rl78-elf-libgen\r
com.renesas.cdt.core.Assembler.option.includeFileDirectories="${workspace_loc\:/${ProjName}}\\src";\r
com.renesas.cdt.core.Compiler.option.includeFileDir.1067754383="${TCINSTALL}\\rl78-elf\\optlibinc";\r
com.renesas.cdt.rl78.HardwareDebug.Compiler.option.mmul=None\r
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveLibraryFiles=${ProjName};gcc;\r
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.1960648199="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";\r
+com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.8586332="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";\r
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.970009502="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";\r
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.984802356="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";\r
eclipse.preferences.version=1\r
* See http://www.freertos.org/a00110.html.\r
*----------------------------------------------------------*/\r
\r
+/* Include hardware dependent header files to allow this demo to run on\r
+multiple evaluation boards. */\r
+#include "demo_specific_io.h"\r
+\r
#define configUSE_PREEMPTION 1\r
#define configTICK_RATE_HZ ( ( unsigned short ) 1000 )\r
-#define configCPU_CLOCK_HZ ( ( unsigned long ) 32000000 ) /* Using the internal high speed clock */\r
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 4 )\r
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 90 )\r
#define configMAX_TASK_NAME_LEN ( 10 )\r
#define configUSE_TRACE_FACILITY 0\r
#define configUSE_16_BIT_TICKS 1\r
#define configIDLE_SHOULD_YIELD 1\r
-#define configTOTAL_HEAP_SIZE ( (size_t ) ( 5000 ) )\r
+#define configTOTAL_HEAP_SIZE ( (size_t ) ( 3420 ) )\r
#define configCHECK_FOR_STACK_OVERFLOW 2\r
#define configUSE_MUTEXES 1\r
\r
#include "FreeRTOS.h"\r
#include "task.h"\r
\r
-/* Hardware includes. */\r
-#include "port_iodefine.h"\r
-#include "port_iodefine_ext.h"\r
-\r
/* The critical nesting value is initialised to a non zero value to ensure\r
interrupts don't accidentally become enabled before the scheduler is started. */\r
#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )\r
* |--------------------- Zero Flag set\r
* ---------------------- Global Interrupt Flag set (enabled)\r
*/\r
-//#define portPSW ( 0xc6UL )\r
-#define portPSW ( 0x86UL )\r
+#define portPSW ( 0xc6UL )\r
\r
/* The address of the pxCurrentTCB variable, but don't know or need to know its\r
type. */\r
/*\r
* Sets up the periodic ISR used for the RTOS tick.\r
*/\r
-static void prvSetupTimerInterrupt( void );\r
+__attribute__((weak)) void vApplicationSetupTimerInterrupt( void );\r
\r
/*\r
* Starts the scheduler by loading the context of the first task to run.\r
{\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
this function is called. */\r
- prvSetupTimerInterrupt();\r
+ vApplicationSetupTimerInterrupt();\r
\r
/* Restore the context of the first task that is going to run. */\r
vPortStartFirstTask();\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvSetupTimerInterrupt( void )\r
+__attribute__((weak)) void vApplicationSetupTimerInterrupt( void )\r
{\r
const unsigned short usClockHz = 15000UL; /* Internal clock. */\r
const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;\r
/* Use the internal 15K clock. */\r
OSMC = ( unsigned char ) 0x16;\r
\r
- /* Supply the RTC clock. */\r
- RTCEN = ( unsigned char ) 1U;\r
+ #ifdef RTCEN\r
+ {\r
+ /* Supply the interval timer clock. */\r
+ RTCEN = ( unsigned char ) 1U;\r
+\r
+ /* Disable INTIT interrupt. */\r
+ ITMK = ( unsigned char ) 1;\r
+\r
+ /* Disable ITMC operation. */\r
+ ITMC = ( unsigned char ) 0x0000;\r
+\r
+ /* Clear INIT interrupt. */\r
+ ITIF = ( unsigned char ) 0;\r
\r
- /* Disable ITMC operation. */\r
- ITMC = ( unsigned char ) 0x0000;\r
+ /* Set interval and enable interrupt operation. */\r
+ ITMC = usCompareMatch | 0x8000U;\r
\r
- /* Disable INTIT interrupt. */\r
- ITMK = ( unsigned char ) 1;\r
+ /* Enable INTIT interrupt. */\r
+ ITMK = ( unsigned char ) 0;\r
+ }\r
+ #endif\r
\r
- /* Set INTIT high priority */\r
- ITPR1 = ( unsigned char ) 1;\r
- ITPR0 = ( unsigned char ) 1;\r
+ #ifdef TMKAEN\r
+ {\r
+ /* Supply the interval timer clock. */\r
+ TMKAEN = ( unsigned char ) 1U;\r
\r
- /* Clear INIT interrupt. */\r
- ITIF = ( unsigned char ) 0;\r
+ /* Disable INTIT interrupt. */\r
+ TMKAMK = ( unsigned char ) 1;\r
\r
- /* Set interval and enable interrupt operation. */\r
- ITMC = usCompareMatch | 0x8000U;\r
+ /* Disable ITMC operation. */\r
+ ITMC = ( unsigned char ) 0x0000;\r
\r
- /* Enable INTIT interrupt. */\r
- ITMK = ( unsigned char ) 0;\r
+ /* Clear INIT interrupt. */\r
+ TMKAIF = ( unsigned char ) 0;\r
+\r
+ /* Set interval and enable interrupt operation. */\r
+ ITMC = usCompareMatch | 0x8000U;\r
+\r
+ /* Enable INTIT interrupt. */\r
+ TMKAMK = ( unsigned char ) 0;\r
+ }\r
+ #endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
-\r
+++ /dev/null
-/***********************************************************************/\r
-/* */\r
-/* PROJECT NAME : RTOSDemo */\r
-/* FILE : iodefine.h */\r
-/* DESCRIPTION : Definition of I/O Registers */\r
-/* CPU SERIES : RL78 - G1C */\r
-/* CPU TYPE : R5F10JBC */\r
-/* */\r
-/* This file is generated by e2studio. */\r
-/* */\r
-/***********************************************************************/\r
-\r
-/************************************************************************/\r
-/* Header file generated from device file: */\r
-/* DR5F10JBC.DVF */\r
-/* Copyright(C) 2012 Renesas */\r
-/* File Version V1.00 */\r
-/* Tool Version 1.9.7121 */\r
-/* Date Generated 13/11/2012 */\r
-/************************************************************************/\r
-\r
-#include "port_iodefine_ext.h"\r
-\r
-#ifndef __IOREG_BIT_STRUCTURES\r
-#define __IOREG_BIT_STRUCTURES\r
-typedef struct {\r
- unsigned char no0 :1;\r
- unsigned char no1 :1;\r
- unsigned char no2 :1;\r
- unsigned char no3 :1;\r
- unsigned char no4 :1;\r
- unsigned char no5 :1;\r
- unsigned char no6 :1;\r
- unsigned char no7 :1;\r
-} __BITS8;\r
-\r
-typedef struct {\r
- unsigned short no0 :1;\r
- unsigned short no1 :1;\r
- unsigned short no2 :1;\r
- unsigned short no3 :1;\r
- unsigned short no4 :1;\r
- unsigned short no5 :1;\r
- unsigned short no6 :1;\r
- unsigned short no7 :1;\r
- unsigned short no8 :1;\r
- unsigned short no9 :1;\r
- unsigned short no10 :1;\r
- unsigned short no11 :1;\r
- unsigned short no12 :1;\r
- unsigned short no13 :1;\r
- unsigned short no14 :1;\r
- unsigned short no15 :1;\r
-} __BITS16;\r
-\r
-#endif\r
-\r
-#ifndef IODEFINE_H\r
-#define IODEFINE_H\r
-\r
-/*\r
- IO Registers\r
- */\r
-union un_p0 {\r
- unsigned char p0;\r
- __BITS8 BIT;\r
-};\r
-union un_p1 {\r
- unsigned char p1;\r
- __BITS8 BIT;\r
-};\r
-union un_p2 {\r
- unsigned char p2;\r
- __BITS8 BIT;\r
-};\r
-union un_p3 {\r
- unsigned char p3;\r
- __BITS8 BIT;\r
-};\r
-union un_p4 {\r
- unsigned char p4;\r
- __BITS8 BIT;\r
-};\r
-union un_p5 {\r
- unsigned char p5;\r
- __BITS8 BIT;\r
-};\r
-union un_p6 {\r
- unsigned char p6;\r
- __BITS8 BIT;\r
-};\r
-union un_p7 {\r
- unsigned char p7;\r
- __BITS8 BIT;\r
-};\r
-union un_p12 {\r
- unsigned char p12;\r
- __BITS8 BIT;\r
-};\r
-union un_p13 {\r
- unsigned char p13;\r
- __BITS8 BIT;\r
-};\r
-union un_pm0 {\r
- unsigned char pm0;\r
- __BITS8 BIT;\r
-};\r
-union un_pm1 {\r
- unsigned char pm1;\r
- __BITS8 BIT;\r
-};\r
-union un_pm2 {\r
- unsigned char pm2;\r
- __BITS8 BIT;\r
-};\r
-union un_pm3 {\r
- unsigned char pm3;\r
- __BITS8 BIT;\r
-};\r
-union un_pm4 {\r
- unsigned char pm4;\r
- __BITS8 BIT;\r
-};\r
-union un_pm5 {\r
- unsigned char pm5;\r
- __BITS8 BIT;\r
-};\r
-union un_pm6 {\r
- unsigned char pm6;\r
- __BITS8 BIT;\r
-};\r
-union un_pm7 {\r
- unsigned char pm7;\r
- __BITS8 BIT;\r
-};\r
-union un_pm12 {\r
- unsigned char pm12;\r
- __BITS8 BIT;\r
-};\r
-union un_adm0 {\r
- unsigned char adm0;\r
- __BITS8 BIT;\r
-};\r
-union un_ads {\r
- unsigned char ads;\r
- __BITS8 BIT;\r
-};\r
-union un_adm1 {\r
- unsigned char adm1;\r
- __BITS8 BIT;\r
-};\r
-union un_egp0 {\r
- unsigned char egp0;\r
- __BITS8 BIT;\r
-};\r
-union un_egn0 {\r
- unsigned char egn0;\r
- __BITS8 BIT;\r
-};\r
-union un_egp1 {\r
- unsigned char egp1;\r
- __BITS8 BIT;\r
-};\r
-union un_egn1 {\r
- unsigned char egn1;\r
- __BITS8 BIT;\r
-};\r
-union un_iics0 {\r
- unsigned char iics0;\r
- __BITS8 BIT;\r
-};\r
-union un_iicf0 {\r
- unsigned char iicf0;\r
- __BITS8 BIT;\r
-};\r
-union un_flars {\r
- unsigned char flars;\r
- __BITS8 BIT;\r
-};\r
-union un_fssq {\r
- unsigned char fssq;\r
- __BITS8 BIT;\r
-};\r
-union un_flrst {\r
- unsigned char flrst;\r
- __BITS8 BIT;\r
-};\r
-union un_fsastl {\r
- unsigned char fsastl;\r
- __BITS8 BIT;\r
-};\r
-union un_fsasth {\r
- unsigned char fsasth;\r
- __BITS8 BIT;\r
-};\r
-union un_rtcc0 {\r
- unsigned char rtcc0;\r
- __BITS8 BIT;\r
-};\r
-union un_rtcc1 {\r
- unsigned char rtcc1;\r
- __BITS8 BIT;\r
-};\r
-union un_csc {\r
- unsigned char csc;\r
- __BITS8 BIT;\r
-};\r
-union un_ostc {\r
- unsigned char ostc;\r
- __BITS8 BIT;\r
-};\r
-union un_ckc {\r
- unsigned char ckc;\r
- __BITS8 BIT;\r
-};\r
-union un_cks0 {\r
- unsigned char cks0;\r
- __BITS8 BIT;\r
-};\r
-union un_cks1 {\r
- unsigned char cks1;\r
- __BITS8 BIT;\r
-};\r
-union un_lvim {\r
- unsigned char lvim;\r
- __BITS8 BIT;\r
-};\r
-union un_lvis {\r
- unsigned char lvis;\r
- __BITS8 BIT;\r
-};\r
-union un_monsta0 {\r
- unsigned char monsta0;\r
- __BITS8 BIT;\r
-};\r
-union un_asim {\r
- unsigned char asim;\r
- __BITS8 BIT;\r
-};\r
-union un_dmc0 {\r
- unsigned char dmc0;\r
- __BITS8 BIT;\r
-};\r
-union un_dmc1 {\r
- unsigned char dmc1;\r
- __BITS8 BIT;\r
-};\r
-union un_drc0 {\r
- unsigned char drc0;\r
- __BITS8 BIT;\r
-};\r
-union un_drc1 {\r
- unsigned char drc1;\r
- __BITS8 BIT;\r
-};\r
-union un_if2 {\r
- unsigned short if2;\r
- __BITS16 BIT;\r
-};\r
-union un_if2l {\r
- unsigned char if2l;\r
- __BITS8 BIT;\r
-};\r
-union un_if2h {\r
- unsigned char if2h;\r
- __BITS8 BIT;\r
-};\r
-union un_mk2 {\r
- unsigned short mk2;\r
- __BITS16 BIT;\r
-};\r
-union un_mk2l {\r
- unsigned char mk2l;\r
- __BITS8 BIT;\r
-};\r
-union un_mk2h {\r
- unsigned char mk2h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr02 {\r
- unsigned short pr02;\r
- __BITS16 BIT;\r
-};\r
-union un_pr02l {\r
- unsigned char pr02l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr02h {\r
- unsigned char pr02h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr12 {\r
- unsigned short pr12;\r
- __BITS16 BIT;\r
-};\r
-union un_pr12l {\r
- unsigned char pr12l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr12h {\r
- unsigned char pr12h;\r
- __BITS8 BIT;\r
-};\r
-union un_if0 {\r
- unsigned short if0;\r
- __BITS16 BIT;\r
-};\r
-union un_if0l {\r
- unsigned char if0l;\r
- __BITS8 BIT;\r
-};\r
-union un_if0h {\r
- unsigned char if0h;\r
- __BITS8 BIT;\r
-};\r
-union un_if1 {\r
- unsigned short if1;\r
- __BITS16 BIT;\r
-};\r
-union un_if1l {\r
- unsigned char if1l;\r
- __BITS8 BIT;\r
-};\r
-union un_if1h {\r
- unsigned char if1h;\r
- __BITS8 BIT;\r
-};\r
-union un_mk0 {\r
- unsigned short mk0;\r
- __BITS16 BIT;\r
-};\r
-union un_mk0l {\r
- unsigned char mk0l;\r
- __BITS8 BIT;\r
-};\r
-union un_mk0h {\r
- unsigned char mk0h;\r
- __BITS8 BIT;\r
-};\r
-union un_mk1 {\r
- unsigned short mk1;\r
- __BITS16 BIT;\r
-};\r
-union un_mk1l {\r
- unsigned char mk1l;\r
- __BITS8 BIT;\r
-};\r
-union un_mk1h {\r
- unsigned char mk1h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr00 {\r
- unsigned short pr00;\r
- __BITS16 BIT;\r
-};\r
-union un_pr00l {\r
- unsigned char pr00l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr00h {\r
- unsigned char pr00h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr01 {\r
- unsigned short pr01;\r
- __BITS16 BIT;\r
-};\r
-union un_pr01l {\r
- unsigned char pr01l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr01h {\r
- unsigned char pr01h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr10 {\r
- unsigned short pr10;\r
- __BITS16 BIT;\r
-};\r
-union un_pr10l {\r
- unsigned char pr10l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr10h {\r
- unsigned char pr10h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr11 {\r
- unsigned short pr11;\r
- __BITS16 BIT;\r
-};\r
-union un_pr11l {\r
- unsigned char pr11l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr11h {\r
- unsigned char pr11h;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc {\r
- unsigned char pmc;\r
- __BITS8 BIT;\r
-};\r
-\r
-#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
-#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
-#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
-#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
-#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
-#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
-#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
-#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
-#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
-#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
-#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
-#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
-#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
-#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
-#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
-#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
-#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
-#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
-#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
-#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
-#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
-#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
-#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
-#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
-#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
-#define SIO01 (*(volatile unsigned char *)0xFFF12)\r
-#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
-#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
-#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
-#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
-#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
-#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
-#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
-#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
-#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
-#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
-#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
-#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
-#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
-#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
-#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
-#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
-#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
-#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
-#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
-#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
-#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
-#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
-#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
-#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
-#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
-#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
-#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
-#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
-#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
-#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
-#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
-#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
-#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
-#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
-#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1\r
-#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT\r
-#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1\r
-#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT\r
-#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
-#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
-#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
-#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
-#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
-#define CFIFO (*(volatile unsigned short *)0xFFF54)\r
-#define CFIFOL (*(volatile unsigned char *)0xFFF54)\r
-#define D0FIFO (*(volatile unsigned short *)0xFFF58)\r
-#define D0FIFOL (*(volatile unsigned char *)0xFFF58)\r
-#define D1FIFO (*(volatile unsigned short *)0xFFF5C)\r
-#define D1FIFOL (*(volatile unsigned char *)0xFFF5C)\r
-#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
-#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
-#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
-#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
-#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
-#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
-#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
-#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
-#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
-#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
-#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
-#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
-#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
-#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
-#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
-#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
-#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
-#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
-#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
-#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
-#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
-#define ITMC (*(volatile unsigned short *)0xFFF90)\r
-#define SEC (*(volatile unsigned char *)0xFFF92)\r
-#define MIN (*(volatile unsigned char *)0xFFF93)\r
-#define HOUR (*(volatile unsigned char *)0xFFF94)\r
-#define WEEK (*(volatile unsigned char *)0xFFF95)\r
-#define DAY (*(volatile unsigned char *)0xFFF96)\r
-#define MONTH (*(volatile unsigned char *)0xFFF97)\r
-#define YEAR (*(volatile unsigned char *)0xFFF98)\r
-#define SUBCUD (*(volatile unsigned char *)0xFFF99)\r
-#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
-#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
-#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
-#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
-#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
-#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
-#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
-#define CMC (*(volatile unsigned char *)0xFFFA0)\r
-#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
-#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
-#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
-#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
-#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
-#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
-#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
-#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
-#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
-#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
-#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
-#define RESF (*(volatile unsigned char *)0xFFFA8)\r
-#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
-#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
-#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
-#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
-#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
-#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
-#define RXB (*(volatile unsigned char *)0xFFFAD)\r
-#define TXS (*(volatile unsigned char *)0xFFFAD)\r
-#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
-#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
-#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
-#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
-#define DSA0 (*(volatile unsigned char *)0xFFFB0)\r
-#define DSA1 (*(volatile unsigned char *)0xFFFB1)\r
-#define DRA0 (*(volatile unsigned short *)0xFFFB2)\r
-#define DRA0L (*(volatile unsigned char *)0xFFFB2)\r
-#define DRA0H (*(volatile unsigned char *)0xFFFB3)\r
-#define DRA1 (*(volatile unsigned short *)0xFFFB4)\r
-#define DRA1L (*(volatile unsigned char *)0xFFFB4)\r
-#define DRA1H (*(volatile unsigned char *)0xFFFB5)\r
-#define DBC0 (*(volatile unsigned short *)0xFFFB6)\r
-#define DBC0L (*(volatile unsigned char *)0xFFFB6)\r
-#define DBC0H (*(volatile unsigned char *)0xFFFB7)\r
-#define DBC1 (*(volatile unsigned short *)0xFFFB8)\r
-#define DBC1L (*(volatile unsigned char *)0xFFFB8)\r
-#define DBC1H (*(volatile unsigned char *)0xFFFB9)\r
-#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0\r
-#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT\r
-#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1\r
-#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT\r
-#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0\r
-#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT\r
-#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1\r
-#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT\r
-#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
-#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
-#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
-#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
-#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
-#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
-#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
-#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
-#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
-#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
-#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
-#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
-#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
-#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
-#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
-#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
-#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
-#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
-#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
-#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
-#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
-#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
-#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
-#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
-#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
-#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
-#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
-#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
-#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
-#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
-#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
-#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
-#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
-#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
-#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
-#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
-#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
-#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
-#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
-#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
-#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
-#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
-#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
-#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
-#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
-#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
-#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
-#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
-#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
-#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
-#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
-#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
-#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
-#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
-#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
-#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
-#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
-#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
-#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
-#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
-#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
-#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
-#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
-#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
-#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
-#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
-#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
-#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
-#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
-#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
-#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
-#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
-#define MDAL (*(volatile unsigned short *)0xFFFF0)\r
-#define MULA (*(volatile unsigned short *)0xFFFF0)\r
-#define MDAH (*(volatile unsigned short *)0xFFFF2)\r
-#define MULB (*(volatile unsigned short *)0xFFFF2)\r
-#define MDBH (*(volatile unsigned short *)0xFFFF4)\r
-#define MULOH (*(volatile unsigned short *)0xFFFF4)\r
-#define MDBL (*(volatile unsigned short *)0xFFFF6)\r
-#define MULOL (*(volatile unsigned short *)0xFFFF6)\r
-#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
-#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
-\r
-/*\r
- Sfr bits\r
- */\r
-#define ADCE ADM0_bit.no0\r
-#define ADCS ADM0_bit.no7\r
-#define SPD0 IICS0_bit.no0\r
-#define STD0 IICS0_bit.no1\r
-#define ACKD0 IICS0_bit.no2\r
-#define TRC0 IICS0_bit.no3\r
-#define COI0 IICS0_bit.no4\r
-#define EXC0 IICS0_bit.no5\r
-#define ALD0 IICS0_bit.no6\r
-#define MSTS0 IICS0_bit.no7\r
-#define IICRSV0 IICF0_bit.no0\r
-#define STCEN0 IICF0_bit.no1\r
-#define IICBSY0 IICF0_bit.no6\r
-#define STCF0 IICF0_bit.no7\r
-#define FSSTP FSSQ_bit.no6\r
-#define SQST FSSQ_bit.no7\r
-#define SQEND FSASTH_bit.no6\r
-#define ESQEND FSASTH_bit.no7\r
-#define RTCE RTCC0_bit.no7\r
-#define RWAIT RTCC1_bit.no0\r
-#define RWST RTCC1_bit.no1\r
-#define RIFG RTCC1_bit.no3\r
-#define WAFG RTCC1_bit.no4\r
-#define WALIE RTCC1_bit.no6\r
-#define WALE RTCC1_bit.no7\r
-#define HIOSTOP CSC_bit.no0\r
-#define XTSTOP CSC_bit.no6\r
-#define MSTOP CSC_bit.no7\r
-#define MCM0 CKC_bit.no4\r
-#define MCS CKC_bit.no5\r
-#define CSS CKC_bit.no6\r
-#define PCLOE0 CKS0_bit.no7\r
-#define PCLOE1 CKS1_bit.no7\r
-#define LVIF LVIM_bit.no0\r
-#define LVIOMSK LVIM_bit.no1\r
-#define LVISEN LVIM_bit.no7\r
-#define LVILV LVIS_bit.no0\r
-#define LVIMD LVIS_bit.no7\r
-#define DWAIT0 DMC0_bit.no4\r
-#define DS0 DMC0_bit.no5\r
-#define DRS0 DMC0_bit.no6\r
-#define STG0 DMC0_bit.no7\r
-#define DWAIT1 DMC1_bit.no4\r
-#define DS1 DMC1_bit.no5\r
-#define DRS1 DMC1_bit.no6\r
-#define STG1 DMC1_bit.no7\r
-#define DST0 DRC0_bit.no0\r
-#define DEN0 DRC0_bit.no7\r
-#define DST1 DRC1_bit.no0\r
-#define DEN1 DRC1_bit.no7\r
-#define PIF8 IF2_bit.no5\r
-#define PIF9 IF2_bit.no6\r
-#define MDIF IF2H_bit.no5\r
-#define FLIF IF2H_bit.no7\r
-#define PMK8 MK2_bit.no5\r
-#define PMK9 MK2_bit.no6\r
-#define MDMK MK2H_bit.no5\r
-#define FLMK MK2H_bit.no7\r
-#define PPR08 PR02_bit.no5\r
-#define PPR09 PR02_bit.no6\r
-#define MDPR0 PR02H_bit.no5\r
-#define FLPR0 PR02H_bit.no7\r
-#define PPR18 PR12_bit.no5\r
-#define PPR19 PR12_bit.no6\r
-#define MDPR1 PR12H_bit.no5\r
-#define FLPR1 PR12H_bit.no7\r
-#define WDTIIF IF0_bit.no0\r
-#define LVIIF IF0_bit.no1\r
-#define PIF0 IF0_bit.no2\r
-#define PIF1 IF0_bit.no3\r
-#define PIF2 IF0_bit.no4\r
-#define PIF3 IF0_bit.no5\r
-#define PIF4 IF0_bit.no6\r
-#define PIF5 IF0_bit.no7\r
-#define DMAIF0 IF0H_bit.no3\r
-#define DMAIF1 IF0H_bit.no4\r
-#define CSIIF00 IF0H_bit.no5\r
-#define IICIF00 IF0H_bit.no5\r
-#define STIF0 IF0H_bit.no5\r
-#define TMIF00 IF0H_bit.no6\r
-#define CSIIF01 IF0H_bit.no7\r
-#define IICIF01 IF0H_bit.no7\r
-#define SRIF0 IF0H_bit.no7\r
-#define SREIF0 IF1_bit.no0\r
-#define TMIF01H IF1_bit.no0\r
-#define TMIF03H IF1_bit.no3\r
-#define IICAIF0 IF1_bit.no4\r
-#define TMIF01 IF1_bit.no5\r
-#define TMIF02 IF1_bit.no6\r
-#define TMIF03 IF1_bit.no7\r
-#define ADIF IF1H_bit.no0\r
-#define RTCIF IF1H_bit.no1\r
-#define ITIF IF1H_bit.no2\r
-#define USBIF IF1H_bit.no4\r
-#define RSUIF IF1H_bit.no5\r
-#define WDTIMK MK0_bit.no0\r
-#define LVIMK MK0_bit.no1\r
-#define PMK0 MK0_bit.no2\r
-#define PMK1 MK0_bit.no3\r
-#define PMK2 MK0_bit.no4\r
-#define PMK3 MK0_bit.no5\r
-#define PMK4 MK0_bit.no6\r
-#define PMK5 MK0_bit.no7\r
-#define DMAMK0 MK0H_bit.no3\r
-#define DMAMK1 MK0H_bit.no4\r
-#define CSIMK00 MK0H_bit.no5\r
-#define IICMK00 MK0H_bit.no5\r
-#define STMK0 MK0H_bit.no5\r
-#define TMMK00 MK0H_bit.no6\r
-#define CSIMK01 MK0H_bit.no7\r
-#define IICMK01 MK0H_bit.no7\r
-#define SRMK0 MK0H_bit.no7\r
-#define SREMK0 MK1_bit.no0\r
-#define TMMK01H MK1_bit.no0\r
-#define TMMK03H MK1_bit.no3\r
-#define IICAMK0 MK1_bit.no4\r
-#define TMMK01 MK1_bit.no5\r
-#define TMMK02 MK1_bit.no6\r
-#define TMMK03 MK1_bit.no7\r
-#define ADMK MK1H_bit.no0\r
-#define RTCMK MK1H_bit.no1\r
-#define ITMK MK1H_bit.no2\r
-#define USBMK MK1H_bit.no4\r
-#define RSUMK MK1H_bit.no5\r
-#define WDTIPR0 PR00_bit.no0\r
-#define LVIPR0 PR00_bit.no1\r
-#define PPR00 PR00_bit.no2\r
-#define PPR01 PR00_bit.no3\r
-#define PPR02 PR00_bit.no4\r
-#define PPR03 PR00_bit.no5\r
-#define PPR04 PR00_bit.no6\r
-#define PPR05 PR00_bit.no7\r
-#define DMAPR00 PR00H_bit.no3\r
-#define DMAPR01 PR00H_bit.no4\r
-#define CSIPR000 PR00H_bit.no5\r
-#define IICPR000 PR00H_bit.no5\r
-#define STPR00 PR00H_bit.no5\r
-#define TMPR000 PR00H_bit.no6\r
-#define CSIPR001 PR00H_bit.no7\r
-#define IICPR001 PR00H_bit.no7\r
-#define SRPR00 PR00H_bit.no7\r
-#define SREPR00 PR01_bit.no0\r
-#define TMPR001H PR01_bit.no0\r
-#define TMPR003H PR01_bit.no3\r
-#define IICAPR00 PR01_bit.no4\r
-#define TMPR001 PR01_bit.no5\r
-#define TMPR002 PR01_bit.no6\r
-#define TMPR003 PR01_bit.no7\r
-#define ADPR0 PR01H_bit.no0\r
-#define RTCPR0 PR01H_bit.no1\r
-#define ITPR0 PR01H_bit.no2\r
-#define USBPR0 PR01H_bit.no4\r
-#define RSUPR0 PR01H_bit.no5\r
-#define WDTIPR1 PR10_bit.no0\r
-#define LVIPR1 PR10_bit.no1\r
-#define PPR10 PR10_bit.no2\r
-#define PPR11 PR10_bit.no3\r
-#define PPR12 PR10_bit.no4\r
-#define PPR13 PR10_bit.no5\r
-#define PPR14 PR10_bit.no6\r
-#define PPR15 PR10_bit.no7\r
-#define DMAPR10 PR10H_bit.no3\r
-#define DMAPR11 PR10H_bit.no4\r
-#define CSIPR100 PR10H_bit.no5\r
-#define IICPR100 PR10H_bit.no5\r
-#define STPR10 PR10H_bit.no5\r
-#define TMPR100 PR10H_bit.no6\r
-#define CSIPR101 PR10H_bit.no7\r
-#define IICPR101 PR10H_bit.no7\r
-#define SRPR10 PR10H_bit.no7\r
-#define SREPR10 PR11_bit.no0\r
-#define TMPR101H PR11_bit.no0\r
-#define TMPR103H PR11_bit.no3\r
-#define IICAPR10 PR11_bit.no4\r
-#define TMPR101 PR11_bit.no5\r
-#define TMPR102 PR11_bit.no6\r
-#define TMPR103 PR11_bit.no7\r
-#define ADPR1 PR11H_bit.no0\r
-#define RTCPR1 PR11H_bit.no1\r
-#define ITPR1 PR11H_bit.no2\r
-#define USBPR1 PR11H_bit.no4\r
-#define RSUPR1 PR11H_bit.no5\r
-#define MAA PMC_bit.no0\r
-\r
-/*\r
- Interrupt vector addresses\r
- */\r
-#define RST_vect (0x0)\r
-#define INTDBG_vect (0x2)\r
-#define INTSRO_vect (0x4)\r
-#define INTWDTI_vect (0x4)\r
-#define INTLVI_vect (0x6)\r
-#define INTP0_vect (0x8)\r
-#define INTP1_vect (0xA)\r
-#define INTP2_vect (0xC)\r
-#define INTP3_vect (0xE)\r
-#define INTP4_vect (0x10)\r
-#define INTP5_vect (0x12)\r
-#define INTDMA0_vect (0x1A)\r
-#define INTDMA1_vect (0x1C)\r
-#define INTCSI00_vect (0x1E)\r
-#define INTIIC00_vect (0x1E)\r
-#define INTST0_vect (0x1E)\r
-#define INTTM00_vect (0x20)\r
-#define INTCSI01_vect (0x22)\r
-#define INTIIC01_vect (0x22)\r
-#define INTSR0_vect (0x22)\r
-#define INTSRE0_vect (0x24)\r
-#define INTTM01H_vect (0x24)\r
-#define INTTM03H_vect (0x2A)\r
-#define INTIICA0_vect (0x2C)\r
-#define INTTM01_vect (0x2E)\r
-#define INTTM02_vect (0x30)\r
-#define INTTM03_vect (0x32)\r
-#define INTAD_vect (0x34)\r
-#define INTRTC_vect (0x36)\r
-#define INTIT_vect (0x38)\r
-#define INTUSB_vect (0x3C)\r
-#define INTRSUM_vect (0x3E)\r
-#define INTP8_vect (0x4E)\r
-#define INTP9_vect (0x50)\r
-#define INTMD_vect (0x5E)\r
-#define INTFL_vect (0x62)\r
-#define BRK_I_vect (0x7E)\r
-#endif\r
+++ /dev/null
-/***********************************************************************/\r
-/* */\r
-/* PROJECT NAME : RTOSDemo */\r
-/* FILE : iodefine_ext.h */\r
-/* DESCRIPTION : Definition of Extended SFRs */\r
-/* CPU SERIES : RL78 - G1C */\r
-/* CPU TYPE : R5F10JBC */\r
-/* */\r
-/* This file is generated by e2studio. */\r
-/* */\r
-/***********************************************************************/\r
-\r
-/************************************************************************/\r
-/* Header file generated from device file: */\r
-/* DR5F10JBC.DVF */\r
-/* Copyright(C) 2012 Renesas */\r
-/* File Version V1.00 */\r
-/* Tool Version 1.9.7121 */\r
-/* Date Generated 13/11/2012 */\r
-/************************************************************************/\r
-\r
-#ifndef __IOREG_BIT_STRUCTURES\r
-#define __IOREG_BIT_STRUCTURES\r
-typedef struct {\r
- unsigned char no0 :1;\r
- unsigned char no1 :1;\r
- unsigned char no2 :1;\r
- unsigned char no3 :1;\r
- unsigned char no4 :1;\r
- unsigned char no5 :1;\r
- unsigned char no6 :1;\r
- unsigned char no7 :1;\r
-} __BITS8;\r
-\r
-typedef struct {\r
- unsigned short no0 :1;\r
- unsigned short no1 :1;\r
- unsigned short no2 :1;\r
- unsigned short no3 :1;\r
- unsigned short no4 :1;\r
- unsigned short no5 :1;\r
- unsigned short no6 :1;\r
- unsigned short no7 :1;\r
- unsigned short no8 :1;\r
- unsigned short no9 :1;\r
- unsigned short no10 :1;\r
- unsigned short no11 :1;\r
- unsigned short no12 :1;\r
- unsigned short no13 :1;\r
- unsigned short no14 :1;\r
- unsigned short no15 :1;\r
-} __BITS16;\r
-\r
-#endif\r
-\r
-#ifndef IODEFINE_EXT_H\r
-#define IODEFINE_EXT_H\r
-\r
-/*\r
- IO Registers\r
- */\r
-union un_adm2 {\r
- unsigned char adm2;\r
- __BITS8 BIT;\r
-};\r
-union un_pms {\r
- unsigned char pms;\r
- __BITS8 BIT;\r
-};\r
-union un_pu0 {\r
- unsigned char pu0;\r
- __BITS8 BIT;\r
-};\r
-union un_pu1 {\r
- unsigned char pu1;\r
- __BITS8 BIT;\r
-};\r
-union un_pu3 {\r
- unsigned char pu3;\r
- __BITS8 BIT;\r
-};\r
-union un_pu4 {\r
- unsigned char pu4;\r
- __BITS8 BIT;\r
-};\r
-union un_pu5 {\r
- unsigned char pu5;\r
- __BITS8 BIT;\r
-};\r
-union un_pu7 {\r
- unsigned char pu7;\r
- __BITS8 BIT;\r
-};\r
-union un_pu12 {\r
- unsigned char pu12;\r
- __BITS8 BIT;\r
-};\r
-union un_pim0 {\r
- unsigned char pim0;\r
- __BITS8 BIT;\r
-};\r
-union un_pim3 {\r
- unsigned char pim3;\r
- __BITS8 BIT;\r
-};\r
-union un_pim5 {\r
- unsigned char pim5;\r
- __BITS8 BIT;\r
-};\r
-union un_pom0 {\r
- unsigned char pom0;\r
- __BITS8 BIT;\r
-};\r
-union un_pom3 {\r
- unsigned char pom3;\r
- __BITS8 BIT;\r
-};\r
-union un_pom5 {\r
- unsigned char pom5;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc0 {\r
- unsigned char pmc0;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc12 {\r
- unsigned char pmc12;\r
- __BITS8 BIT;\r
-};\r
-union un_nfen0 {\r
- unsigned char nfen0;\r
- __BITS8 BIT;\r
-};\r
-union un_nfen1 {\r
- unsigned char nfen1;\r
- __BITS8 BIT;\r
-};\r
-union un_isc {\r
- unsigned char isc;\r
- __BITS8 BIT;\r
-};\r
-union un_dflctl {\r
- unsigned char dflctl;\r
- __BITS8 BIT;\r
-};\r
-union un_bectl {\r
- unsigned char bectl;\r
- __BITS8 BIT;\r
-};\r
-union un_fsse {\r
- unsigned char fsse;\r
- __BITS8 BIT;\r
-};\r
-union un_pfs {\r
- unsigned char pfs;\r
- __BITS8 BIT;\r
-};\r
-union un_mduc {\r
- unsigned char mduc;\r
- __BITS8 BIT;\r
-};\r
-union un_per0 {\r
- unsigned char per0;\r
- __BITS8 BIT;\r
-};\r
-union un_rmc {\r
- unsigned char rmc;\r
- __BITS8 BIT;\r
-};\r
-union un_rpectl {\r
- unsigned char rpectl;\r
- __BITS8 BIT;\r
-};\r
-union un_se0l {\r
- unsigned char se0l;\r
- __BITS8 BIT;\r
-};\r
-union un_ss0l {\r
- unsigned char ss0l;\r
- __BITS8 BIT;\r
-};\r
-union un_st0l {\r
- unsigned char st0l;\r
- __BITS8 BIT;\r
-};\r
-union un_soe0l {\r
- unsigned char soe0l;\r
- __BITS8 BIT;\r
-};\r
-union un_te0l {\r
- unsigned char te0l;\r
- __BITS8 BIT;\r
-};\r
-union un_ts0l {\r
- unsigned char ts0l;\r
- __BITS8 BIT;\r
-};\r
-union un_tt0l {\r
- unsigned char tt0l;\r
- __BITS8 BIT;\r
-};\r
-union un_toe0l {\r
- unsigned char toe0l;\r
- __BITS8 BIT;\r
-};\r
-union un_iicctl00 {\r
- unsigned char iicctl00;\r
- __BITS8 BIT;\r
-};\r
-union un_iicctl01 {\r
- unsigned char iicctl01;\r
- __BITS8 BIT;\r
-};\r
-union un_dscctl {\r
- unsigned char dscctl;\r
- __BITS8 BIT;\r
-};\r
-union un_mckc {\r
- unsigned char mckc;\r
- __BITS8 BIT;\r
-};\r
-union un_crc0ctl {\r
- unsigned char crc0ctl;\r
- __BITS8 BIT;\r
-};\r
-\r
-#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
-#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
-#define ADUL (*(volatile unsigned char *)0xF0011)\r
-#define ADLL (*(volatile unsigned char *)0xF0012)\r
-#define ADTES (*(volatile unsigned char *)0xF0013)\r
-#define PMS (*(volatile union un_pms *)0xF0018).pms\r
-#define PMS_bit (*(volatile union un_pms *)0xF0018).BIT\r
-#define PIOR (*(volatile unsigned char *)0xF001A)\r
-#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
-#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
-#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
-#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT\r
-#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3\r
-#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT\r
-#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4\r
-#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
-#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
-#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
-#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
-#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
-#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
-#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
-#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
-#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
-#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3\r
-#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT\r
-#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5\r
-#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT\r
-#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
-#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
-#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3\r
-#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT\r
-#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
-#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
-#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0\r
-#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT\r
-#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12\r
-#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT\r
-#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
-#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
-#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
-#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
-#define ISC (*(volatile union un_isc *)0xF0073).isc\r
-#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
-#define TIS0 (*(volatile unsigned char *)0xF0074)\r
-#define ADPC (*(volatile unsigned char *)0xF0076)\r
-#define IAWCTL (*(volatile unsigned char *)0xF0077)\r
-#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
-#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
-#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
-#define BPAH0 (*(volatile unsigned char *)0xF0082)\r
-#define BPAS0 (*(volatile unsigned char *)0xF0083)\r
-#define BACDVL0 (*(volatile unsigned char *)0xF0084)\r
-#define BACDVH0 (*(volatile unsigned char *)0xF0085)\r
-#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
-#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
-#define MONMOD (*(volatile unsigned char *)0xF0088)\r
-#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
-#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
-#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
-#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl\r
-#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT\r
-#define HOCODIV (*(volatile unsigned char *)0xF00A8)\r
-#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)\r
-#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)\r
-#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)\r
-#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)\r
-#define FLSEC (*(volatile unsigned short *)0xF00B0)\r
-#define FLFSWS (*(volatile unsigned short *)0xF00B2)\r
-#define FLFSWE (*(volatile unsigned short *)0xF00B4)\r
-#define FSSET (*(volatile unsigned char *)0xF00B6)\r
-#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse\r
-#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT\r
-#define FLFADL (*(volatile unsigned short *)0xF00B8)\r
-#define FLFADH (*(volatile unsigned char *)0xF00BA)\r
-#define PFCMD (*(volatile unsigned char *)0xF00C0)\r
-#define PFS (*(volatile union un_pfs *)0xF00C1).pfs\r
-#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT\r
-#define FLRL (*(volatile unsigned short *)0xF00C2)\r
-#define FLRH (*(volatile unsigned short *)0xF00C4)\r
-#define FLWE (*(volatile unsigned char *)0xF00C6)\r
-#define FLRE (*(volatile unsigned char *)0xF00C7)\r
-#define FLTMS (*(volatile unsigned short *)0xF00C8)\r
-#define DFLMC (*(volatile unsigned short *)0xF00CA)\r
-#define FLMCL (*(volatile unsigned short *)0xF00CC)\r
-#define FLMCH (*(volatile unsigned char *)0xF00CE)\r
-#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
-#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
-#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
-#define MDCL (*(volatile unsigned short *)0xF00E0)\r
-#define MDCH (*(volatile unsigned short *)0xF00E2)\r
-#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc\r
-#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT\r
-#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
-#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
-#define OSMC (*(volatile unsigned char *)0xF00F3)\r
-#define RMC (*(volatile union un_rmc *)0xF00F4).rmc\r
-#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT\r
-#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl\r
-#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT\r
-#define BCDADJ (*(volatile unsigned char *)0xF00FE)\r
-#define VECTCTRL (*(volatile unsigned char *)0xF00FF)\r
-#define SSR00 (*(volatile unsigned short *)0xF0100)\r
-#define SSR00L (*(volatile unsigned char *)0xF0100)\r
-#define SSR01 (*(volatile unsigned short *)0xF0102)\r
-#define SSR01L (*(volatile unsigned char *)0xF0102)\r
-#define SIR00 (*(volatile unsigned short *)0xF0108)\r
-#define SIR00L (*(volatile unsigned char *)0xF0108)\r
-#define SIR01 (*(volatile unsigned short *)0xF010A)\r
-#define SIR01L (*(volatile unsigned char *)0xF010A)\r
-#define SMR00 (*(volatile unsigned short *)0xF0110)\r
-#define SMR01 (*(volatile unsigned short *)0xF0112)\r
-#define SCR00 (*(volatile unsigned short *)0xF0118)\r
-#define SCR01 (*(volatile unsigned short *)0xF011A)\r
-#define SE0 (*(volatile unsigned short *)0xF0120)\r
-#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
-#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
-#define SS0 (*(volatile unsigned short *)0xF0122)\r
-#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l\r
-#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT\r
-#define ST0 (*(volatile unsigned short *)0xF0124)\r
-#define ST0L (*(volatile union un_st0l *)0xF0124).st0l\r
-#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT\r
-#define SPS0 (*(volatile unsigned short *)0xF0126)\r
-#define SPS0L (*(volatile unsigned char *)0xF0126)\r
-#define SO0 (*(volatile unsigned short *)0xF0128)\r
-#define SOE0 (*(volatile unsigned short *)0xF012A)\r
-#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l\r
-#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT\r
-#define EDR00 (*(volatile unsigned short *)0xF012C)\r
-#define EDR00L (*(volatile unsigned char *)0xF012C)\r
-#define EDR01 (*(volatile unsigned short *)0xF012E)\r
-#define EDR01L (*(volatile unsigned char *)0xF012E)\r
-#define SOL0 (*(volatile unsigned short *)0xF0134)\r
-#define SOL0L (*(volatile unsigned char *)0xF0134)\r
-#define SSC0 (*(volatile unsigned short *)0xF0138)\r
-#define SSC0L (*(volatile unsigned char *)0xF0138)\r
-#define TCR00 (*(volatile unsigned short *)0xF0180)\r
-#define TCR01 (*(volatile unsigned short *)0xF0182)\r
-#define TCR02 (*(volatile unsigned short *)0xF0184)\r
-#define TCR03 (*(volatile unsigned short *)0xF0186)\r
-#define TMR00 (*(volatile unsigned short *)0xF0190)\r
-#define TMR01 (*(volatile unsigned short *)0xF0192)\r
-#define TMR02 (*(volatile unsigned short *)0xF0194)\r
-#define TMR03 (*(volatile unsigned short *)0xF0196)\r
-#define TSR00 (*(volatile unsigned short *)0xF01A0)\r
-#define TSR00L (*(volatile unsigned char *)0xF01A0)\r
-#define TSR01 (*(volatile unsigned short *)0xF01A2)\r
-#define TSR01L (*(volatile unsigned char *)0xF01A2)\r
-#define TSR02 (*(volatile unsigned short *)0xF01A4)\r
-#define TSR02L (*(volatile unsigned char *)0xF01A4)\r
-#define TSR03 (*(volatile unsigned short *)0xF01A6)\r
-#define TSR03L (*(volatile unsigned char *)0xF01A6)\r
-#define TE0 (*(volatile unsigned short *)0xF01B0)\r
-#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l\r
-#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT\r
-#define TS0 (*(volatile unsigned short *)0xF01B2)\r
-#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l\r
-#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT\r
-#define TT0 (*(volatile unsigned short *)0xF01B4)\r
-#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l\r
-#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT\r
-#define TPS0 (*(volatile unsigned short *)0xF01B6)\r
-#define TO0 (*(volatile unsigned short *)0xF01B8)\r
-#define TO0L (*(volatile unsigned char *)0xF01B8)\r
-#define TOE0 (*(volatile unsigned short *)0xF01BA)\r
-#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l\r
-#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT\r
-#define TOL0 (*(volatile unsigned short *)0xF01BC)\r
-#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
-#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
-#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
-#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
-#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
-#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
-#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT\r
-#define IICWL0 (*(volatile unsigned char *)0xF0232)\r
-#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
-#define SVA0 (*(volatile unsigned char *)0xF0234)\r
-#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
-#define DSCCTL (*(volatile union un_dscctl *)0xF02E5).dscctl\r
-#define DSCCTL_bit (*(volatile union un_dscctl *)0xF02E5).BIT\r
-#define MCKC (*(volatile union un_mckc *)0xF02E6).mckc\r
-#define MCKC_bit (*(volatile union un_mckc *)0xF02E6).BIT\r
-#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
-#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
-#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
-#define CRCD (*(volatile unsigned short *)0xF02FA)\r
-#define SYSCFG (*(volatile unsigned short *)0xF0400)\r
-#define SYSCFG1 (*(volatile unsigned short *)0xF0402)\r
-#define SYSSTS0 (*(volatile unsigned short *)0xF0404)\r
-#define SYSSTS1 (*(volatile unsigned short *)0xF0406)\r
-#define DVSTCTR0 (*(volatile unsigned short *)0xF0408)\r
-#define DVSTCTR1 (*(volatile unsigned short *)0xF040A)\r
-#define DMA0PCFG (*(volatile unsigned short *)0xF0410)\r
-#define DMA1PCFG (*(volatile unsigned short *)0xF0412)\r
-#define CFIFOM (*(volatile unsigned short *)0xF0414)\r
-#define CFIFOML (*(volatile unsigned char *)0xF0414)\r
-#define D0FIFOM (*(volatile unsigned short *)0xF0418)\r
-#define D0FIFOML (*(volatile unsigned char *)0xF0418)\r
-#define D1FIFOM (*(volatile unsigned short *)0xF041C)\r
-#define D1FIFOML (*(volatile unsigned char *)0xF041C)\r
-#define CFIFOSEL (*(volatile unsigned short *)0xF0420)\r
-#define CFIFOCTR (*(volatile unsigned short *)0xF0422)\r
-#define D0FIFOSEL (*(volatile unsigned short *)0xF0428)\r
-#define D0FIFOCTR (*(volatile unsigned short *)0xF042A)\r
-#define D1FIFOSEL (*(volatile unsigned short *)0xF042C)\r
-#define D1FIFOCTR (*(volatile unsigned short *)0xF042E)\r
-#define INTENB0 (*(volatile unsigned short *)0xF0430)\r
-#define INTENB1 (*(volatile unsigned short *)0xF0432)\r
-#define INTENB2 (*(volatile unsigned short *)0xF0434)\r
-#define BRDYENB (*(volatile unsigned short *)0xF0436)\r
-#define NRDYENB (*(volatile unsigned short *)0xF0438)\r
-#define BEMPENB (*(volatile unsigned short *)0xF043A)\r
-#define SOFCFG (*(volatile unsigned short *)0xF043C)\r
-#define INTSTS0 (*(volatile unsigned short *)0xF0440)\r
-#define INTSTS1 (*(volatile unsigned short *)0xF0442)\r
-#define INTSTS2 (*(volatile unsigned short *)0xF0444)\r
-#define BRDYSTS (*(volatile unsigned short *)0xF0446)\r
-#define NRDYSTS (*(volatile unsigned short *)0xF0448)\r
-#define BEMPSTS (*(volatile unsigned short *)0xF044A)\r
-#define FRMNUM (*(volatile unsigned short *)0xF044C)\r
-#define USBADDR (*(volatile unsigned short *)0xF0450)\r
-#define USBREQ (*(volatile unsigned short *)0xF0454)\r
-#define USBVAL (*(volatile unsigned short *)0xF0456)\r
-#define USBINDX (*(volatile unsigned short *)0xF0458)\r
-#define USBLENG (*(volatile unsigned short *)0xF045A)\r
-#define DCPCFG (*(volatile unsigned short *)0xF045C)\r
-#define DCPMAXP (*(volatile unsigned short *)0xF045E)\r
-#define DCPCTR (*(volatile unsigned short *)0xF0460)\r
-#define PIPESEL (*(volatile unsigned short *)0xF0464)\r
-#define PIPECFG (*(volatile unsigned short *)0xF0468)\r
-#define PIPEMAXP (*(volatile unsigned short *)0xF046C)\r
-#define PIPEPERI (*(volatile unsigned short *)0xF046E)\r
-#define PIPE4CTR (*(volatile unsigned short *)0xF0476)\r
-#define PIPE5CTR (*(volatile unsigned short *)0xF0478)\r
-#define PIPE6CTR (*(volatile unsigned short *)0xF047A)\r
-#define PIPE7CTR (*(volatile unsigned short *)0xF047C)\r
-#define PIPE4TRE (*(volatile unsigned short *)0xF049C)\r
-#define PIPE4TRN (*(volatile unsigned short *)0xF049E)\r
-#define PIPE5TRE (*(volatile unsigned short *)0xF04A0)\r
-#define PIPE5TRN (*(volatile unsigned short *)0xF04A2)\r
-#define USBBCCTRL0 (*(volatile unsigned short *)0xF04B0)\r
-#define USBBCCTRL1 (*(volatile unsigned short *)0xF04B4)\r
-#define USBBCOPT0 (*(volatile unsigned short *)0xF04B8)\r
-#define USBBCOPT1 (*(volatile unsigned short *)0xF04BC)\r
-#define USBMC (*(volatile unsigned short *)0xF04CC)\r
-#define DEVADD0 (*(volatile unsigned short *)0xF04D0)\r
-#define DEVADD1 (*(volatile unsigned short *)0xF04D2)\r
-#define DEVADD2 (*(volatile unsigned short *)0xF04D4)\r
-#define DEVADD3 (*(volatile unsigned short *)0xF04D6)\r
-#define DEVADD4 (*(volatile unsigned short *)0xF04D8)\r
-#define DEVADD5 (*(volatile unsigned short *)0xF04DA)\r
-\r
-/*\r
- Sfr bits\r
- */\r
-#define ADTYP ADM2_bit.no0\r
-#define AWC ADM2_bit.no2\r
-#define ADRCK ADM2_bit.no3\r
-#define DFLEN DFLCTL_bit.no0\r
-#define BRSAM BECTL_bit.no0\r
-#define ESQST FSSE_bit.no7\r
-#define DIVST MDUC_bit.no0\r
-#define MACSF MDUC_bit.no1\r
-#define MACOF MDUC_bit.no2\r
-#define MDSM MDUC_bit.no3\r
-#define MACMODE MDUC_bit.no6\r
-#define DIVMODE MDUC_bit.no7\r
-#define TAU0EN PER0_bit.no0\r
-#define SAU0EN PER0_bit.no2\r
-#define IICA0EN PER0_bit.no4\r
-#define ADCEN PER0_bit.no5\r
-#define RTCEN PER0_bit.no7\r
-#define PAENB RMC_bit.no0\r
-#define WDVOL RMC_bit.no7\r
-#define RPEF RPECTL_bit.no0\r
-#define RPERDIS RPECTL_bit.no7\r
-#define SPT0 IICCTL00_bit.no0\r
-#define STT0 IICCTL00_bit.no1\r
-#define ACKE0 IICCTL00_bit.no2\r
-#define WTIM0 IICCTL00_bit.no3\r
-#define SPIE0 IICCTL00_bit.no4\r
-#define WREL0 IICCTL00_bit.no5\r
-#define LREL0 IICCTL00_bit.no6\r
-#define IICE0 IICCTL00_bit.no7\r
-#define PRS0 IICCTL01_bit.no0\r
-#define DFC0 IICCTL01_bit.no2\r
-#define SMC0 IICCTL01_bit.no3\r
-#define DAD0 IICCTL01_bit.no4\r
-#define CLD0 IICCTL01_bit.no5\r
-#define WUP0 IICCTL01_bit.no7\r
-#define CRC0EN CRC0CTL_bit.no7\r
-\r
-/*\r
- Interrupt vector addresses\r
- */\r
-#endif\r
mission critical applications that require provable dependability.\r
*/\r
\r
+/* INCLUDED_FROM_FREERTOS_ASM_FILE is defined before FreeRTOSConfig.h so non\r
+assembly compatible definitions within the header file can be omitted. */\r
+#define INCLUDED_FROM_FREERTOS_ASM_FILE\r
#include "FreeRTOSConfig.h"\r
#include "ISR_Support.h"\r
\r
+++ /dev/null
-/*\r
- FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems, who sell the code with commercial support,\r
- indemnification and middleware, under the OpenRTOS brand.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-*/\r
-\r
-/*\r
- * Board specific macros to initialise and toggle an LED.\r
- */\r
-\r
-#ifndef LED_IO_H\r
-#define LED_IO_H\r
-\r
- #ifdef YRPBRL78G13\r
- #define LED_BIT ( P7_bit.no7 )\r
- #define LED_INIT() P7 &= 0x7F; PM7 &= 0x7F\r
- #endif /* YRPBRL78G13 */\r
-\r
- #ifdef YRDKRL78G14\r
- #define LED_BIT ( P4_bit.no1 )\r
- #define LED_INIT() PM4_bit.no1 = 0\r
- #endif /* YRDKRL78G14 */\r
-\r
- #ifdef RSKRL78G1C\r
- #define LED_BIT ( P0_bit.no1 )\r
- #define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD\r
- #endif /* RSKRL78G1C */\r
-\r
- #ifndef LED_BIT\r
- #error The hardware platform is not defined\r
- #endif\r
-\r
-#endif /* LED_IO_H */\r
-\r
--- /dev/null
+/*\r
+ FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+\r
+ >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
+ details. You should have received a copy of the GNU General Public License\r
+ and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
+ viewed here: http://www.freertos.org/a00114.html and also obtained by\r
+ writing to Real Time Engineers Ltd., contact details for whom are available\r
+ on the FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
+ fully thread aware and reentrant UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems, who sell the code with commercial support,\r
+ indemnification and middleware, under the OpenRTOS brand.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+*/\r
+\r
+#ifndef LED_IO_H\r
+#define LED_IO_H\r
+\r
+/* Include the register definition file that is correct for the hardware being\r
+used. The C and assembler pre-processor must have one of the following board\r
+definitions defined to have the correct register definition header file\r
+included. Alternatively, just manually include the correct files here. */\r
+\r
+ /* Prevent the files being included from the FreeRTOS port layer assembly\r
+ source files. */\r
+ #ifndef INCLUDED_FROM_FREERTOS_ASM_FILE\r
+\r
+ #ifdef YRDKRL78G14\r
+ #include "iodefine_RL78G14.h"\r
+ #include "iodefine_RL78G14_ext.h"\r
+ #define LED_BIT ( P4_bit.no1 )\r
+ #define LED_INIT() LED_BIT = 0\r
+ #endif /* YRDKRL78G14 */\r
+\r
+ #ifdef RSKRL78G1C\r
+ #include "iodefine_RL78G1C.h"\r
+ #include "iodefine_RL78G1C_ext.h"\r
+ #define LED_BIT ( P0_bit.no1 )\r
+ #define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD\r
+ #endif /* RSKRL78G1C */\r
+\r
+ #ifdef RSKRL78L13\r
+ #include "iodefine_RL78L13.h"\r
+ #include "iodefine_RL78L13_ext.h"\r
+ #define LED_BIT ( P4_bit.no1 )\r
+ #define LED_INIT() P4 &= 0xFD; PM4 &= 0xFD\r
+ #endif /* RSKRL78L13 */\r
+\r
+ #ifdef RL78_G1A_TB\r
+ #include "iodefine_RL78G1A.h"\r
+ #include "iodefine_RL78G1A_ext.h"\r
+ #define LED_BIT ( P6_bit.no2 )\r
+ #define LED_INIT() P6 &= 0xFB; PM6 &= 0xFB\r
+ #endif /* RL78_G1A_TB */\r
+\r
+ #ifndef LED_BIT\r
+ #error The hardware platform is not defined\r
+ #endif\r
+\r
+ #endif /* INCLUDED_FROM_FREERTOS_ASM_FILE */\r
+\r
+#endif /* LED_IO_H */\r
+\r
/* Scheduler include files. */
#include "FreeRTOS.h"
-/* Hardware includes. */
-#include "port_iodefine.h"
-#include "LED.h"
-\r
void HardwareSetup( void )\r
{\r
portDISABLE_INTERRUPTS();
+++ /dev/null
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : interrupt_handlers.c */
-/* DESCRIPTION : Interrupt Handler */
-/* CPU SERIES : RL78 - G14 */
-/* CPU TYPE : R5F104PJ */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/ \r
- \r
-#include "interrupt_handlers.h"\r
-\r
-/*\r
- * INT_SRO/INT_WDTI (0x4)\r
- */\r
-void INT_WDTI (void) { }\r
-//void INT_SRO (void) { }\r
-\r
-/*\r
- * INT_LVI (0x6)\r
- */\r
-void INT_LVI (void) { }\r
-\r
-/*\r
- * INT_P0 (0x8)\r
- */\r
-void INT_P0 (void) { }\r
-\r
-/*\r
- * INT_P1 (0xA)\r
- */\r
-void INT_P1 (void) { }\r
-\r
-/*\r
- * INT_P2 (0xC)\r
- */\r
-void INT_P2 (void) { }\r
-\r
-/*\r
- * INT_P3 (0xE)\r
- */\r
-void INT_P3 (void) { }\r
-\r
-/*\r
- * INT_P4 (0x10)\r
- */\r
-void INT_P4 (void) { }\r
-\r
-/*\r
- * INT_P5 (0x12)\r
- */\r
-void INT_P5 (void) { }\r
-\r
-/*\r
- * INT_CSI20/INT_IIC20/INT_ST2 (0x14)
- */\r
-void INT_ST2 (void) { }
-//void INT_CSI20 (void) { }
-//void INT_IIC20 (void) { }
-
-/*
- * INT_CSI21/INT_IIC21/INT_SR2 (0x16)
- */\r
-void INT_SR2 (void) { }\r
-//void INT_CSI21 (void) { }
-//void INT_IIC21 (void) { }
-\r
-/*\r
- * INT_SRE2/INT_TM11H (0x18)\r
- */\r
-void INT_TM11H (void) { }\r
-//void INT_SRE2 (void) { }
-\r
-/*\r
- * INT_CSI00/INT_IIC00/INT_ST0 (0x1E)\r
- */\r
-void INT_ST0 (void) { }\r
-//void INT_CSI00 (void) { }\r
-//void INT_IIC00 (void) { }\r
-\r
-/*\r
- * INT_CSI01/INT_IIC01/INT_SR0 (0x20)\r
- */\r
-void INT_SR0 (void) { }\r
-//void INT_CSI01 (void) { }\r
-//void INT_IIC01 (void) { }\r
-\r
-/*\r
- * INT_SRE0/INT_TM01H (0x22)\r
- */\r
-void INT_TM01H (void) { }\r
-//void INT_SRE0 (void) { }\r
-\r
-/*\r
- * INT_CSI10/INT_IIC10/INT_ST1 (0x24)
- */
-void INT_ST1 (void) { }
-//void INT_CSI10 (void) { }
-//void INT_IIC10 (void) { }
-
-/*
- * INT_CSI11/INT_IIC11/INT_SR1 (0x26)
- */
-void INT_SR1 (void) { }
-//void INT_CSI11 (void) { }
-//void INT_IIC11 (void) { }
-
-/*
- * INT_SRE1/INT_TM03H (0x28)\r
- */\r
-void INT_TM03H (void) { }\r
-//void INT_SRE1 (void) { }
-\r
-/*\r
- * INT_IICA0 (0x2A)\r
- */\r
-void INT_IICA0 (void) { }\r
-
-/*
- * INT_TM00 (0x2C)
- */
-void INT_TM00 (void) { }
-\r
-/*\r
- * INT_TM01 (0x2E)\r
- */\r
-void INT_TM01 (void) { }\r
-\r
-/*\r
- * INT_TM02 (0x30)\r
- */\r
-void INT_TM02 (void) { }\r
-\r
-/*\r
- * INT_TM03 (0x32)\r
- */\r
-void INT_TM03 (void) { }\r
-\r
-/*\r
- * INT_AD (0x34)\r
- */\r
-void INT_AD (void) { }\r
-\r
-/*\r
- * INT_RTC (0x36)\r
- */\r
-void INT_RTC (void) { }\r
-\r
-/*\r
- * INT_IT (0x38)\r
- */\r
-void INT_IT (void) { }\r
-\r
-/*\r
- * INT_KR (0x3A)\r
- */\r
-void INT_KR (void) { }
-
-/*
- * INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
- */
-void INT_ST3 (void) { }\r
-//void INT_CSI30 (void) { }
-//void INT_IIC30 (void) { }
-\r
-/*\r
- * INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
- */
-void INT_SR3 (void) { }
-//void INT_CSI31 (void) { }
-//void INT_IIC31 (void) { }
-
-/*
- * INT_TRJ0 (0x40)
- */
-void INT_TRJ0 (void) { }
-
-/*
- * INT_TM10 (0x42)
- */
-void INT_TM10 (void) { }
-
-/*
- * INT_TM11 (0x44)
- */
-void INT_TM11 (void) { }
-
-/*
- * INT_TM12 (0x46)
- */
-void INT_TM12 (void) { }
-
-/*
- * INT_TM13 (0x48)\r
- */\r
-void INT_TM13 (void) { }\r
-\r
-/*\r
- * INT_P6 (0x4A)
- */
-void INT_P6 (void) { }
-
-/*
- * INT_P7 (0x4C)
- */
-void INT_P7 (void) { }
-
-/*
- * INT_P8 (0x4E)\r
- */\r
-void INT_P8 (void) { }\r
-\r
-/*\r
- * INT_P9 (0x50)\r
- */\r
-void INT_P9 (void) { }\r
-\r
-/*\r
- * INT_CMP0/INT_P10 (0x52)
- */
-void INT_P10 (void) { }
-//void INT_CMP0 (void) { }
-
-/*
- * INT_CMP1/INT_P11 (0x54)
- */
-void INT_P11 (void) { }
-//void INT_CMP1 (void) { }
-
-/*
- * INT_TRD0 (0x56)\r
- */\r
-void INT_TRD0 (void) { }\r
-\r
-/*\r
- * INT_TRD1 (0x58)
- */
-void INT_TRD1 (void) { }
-
-/*
- * INT_TRG (0x5A)
- */
-void INT_TRG (void) { }
-
-/*
- * INT_SRE3/INT_TM13H (0x5C)
- */
-void INT_TM13H (void) { }
-//void INT_SRE3 (void) { }
-
-/*
- * INT_IICA1 (0x60)
- */
-void INT_IICA1 (void) { }
-
-/*
- * INT_FL (0x62)\r
- */\r
-void INT_FL (void) { }\r
-\r
-/*\r
- * INT_BRK_I (0x7E)\r
- */\r
-void INT_BRK_I (void) { }\r
+++ /dev/null
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : interrupt_handlers.h */
-/* DESCRIPTION : Interrupt Handler Declarations */
-/* CPU SERIES : RL78 - G14 */
-/* CPU TYPE : R5F104PJ */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/ \r
- \r
-#ifndef INTERRUPT_HANDLERS_H\r
-#define INTERRUPT_HANDLERS_H\r
-\r
-/*\r
- * INT_SRO/INT_WDTI (0x4)\r
- */\r
-void INT_WDTI(void) __attribute__ ((interrupt));\r
-//void INT_SRO(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_LVI (0x6)\r
- */\r
-void INT_LVI(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P0 (0x8)\r
- */\r
-void INT_P0(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P1 (0xA)\r
- */\r
-void INT_P1(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P2 (0xC)\r
- */\r
-void INT_P2(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P3 (0xE)\r
- */\r
-void INT_P3(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P4 (0x10)\r
- */\r
-void INT_P4(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P5 (0x12)\r
- */\r
-void INT_P5(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI20/INT_IIC20/INT_ST2 (0x14)\r
- */\r
-void INT_ST2(void) __attribute__ ((interrupt));\r
-//void INT_CSI20(void) __attribute__ ((interrupt));\r
-//void INT_IIC20(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI21/INT_IIC21/INT_SR2 (0x16)\r
- */\r
-void INT_SR2(void) __attribute__ ((interrupt));\r
-//void INT_CSI21(void) __attribute__ ((interrupt));\r
-//void INT_IIC21(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_SRE2/INT_TM11H (0x18)\r
- */\r
-void INT_TM11H(void) __attribute__ ((interrupt));\r
-//void INT_SRE2(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI00/INT_IIC00/INT_ST0 (0x1E)\r
- */\r
-void INT_ST0(void) __attribute__ ((interrupt));\r
-//void INT_CSI00(void) __attribute__ ((interrupt));\r
-//void INT_IIC00(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI01/INT_IIC01/INT_SR0 (0x20)\r
- */\r
-void INT_SR0(void) __attribute__ ((interrupt));\r
-//void INT_CSI01(void) __attribute__ ((interrupt));\r
-//void INT_IIC01(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_SRE0/INT_TM01H (0x22)\r
- */\r
-void INT_TM01H(void) __attribute__ ((interrupt));\r
-//void INT_SRE0(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI10/INT_IIC10/INT_ST1 (0x24)\r
- */\r
-void INT_ST1(void) __attribute__ ((interrupt));\r
-//void INT_CSI10(void) __attribute__ ((interrupt));\r
-//void INT_IIC10(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI11/INT_IIC11/INT_SR1 (0x26)\r
- */\r
-void INT_SR1(void) __attribute__ ((interrupt));\r
-//void INT_CSI11(void) __attribute__ ((interrupt));\r
-//void INT_IIC11(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_SRE1/INT_TM03H (0x28)\r
- */\r
-void INT_TM03H(void) __attribute__ ((interrupt));\r
-//void INT_SRE1(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_IICA0 (0x2A)\r
- */\r
-void INT_IICA0(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM00 (0x2C)\r
- */\r
-void INT_TM00(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM01 (0x2E)\r
- */\r
-void INT_TM01(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM02 (0x30)\r
- */\r
-void INT_TM02(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM03 (0x32)\r
- */\r
-void INT_TM03(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_AD (0x34)\r
- */\r
-void INT_AD(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_RTC (0x36)\r
- */\r
-void INT_RTC(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_IT (0x38)\r
- */\r
-void INT_IT(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_KR (0x3A)\r
- */\r
-void INT_KR(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI30/INT_IIC30/INT_ST3 (0x3C)\r
- */\r
-void INT_ST3(void) __attribute__ ((interrupt));\r
-//void INT_CSI30(void) __attribute__ ((interrupt));\r
-//void INT_IIC30(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CSI31/INT_IIC31/INT_SR3 (0x3E)\r
- */\r
-void INT_SR3(void) __attribute__ ((interrupt));\r
-//void INT_CSI31(void) __attribute__ ((interrupt));\r
-//void INT_IIC31(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TRJ0 (0x40)\r
- */\r
-void INT_TRJ0(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM10 (0x42)\r
- */\r
-void INT_TM10(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM11 (0x44)\r
- */\r
-void INT_TM11(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM12 (0x46)\r
- */\r
-void INT_TM12(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TM13 (0x48)\r
- */\r
-void INT_TM13(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P6 (0x4A)\r
- */\r
-void INT_P6(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P7 (0x4C)\r
- */\r
-void INT_P7(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P8 (0x4E)\r
- */\r
-void INT_P8(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_P9 (0x50)\r
- */\r
-void INT_P9(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CMP0/INT_P10 (0x52)\r
- */\r
-void INT_P10(void) __attribute__ ((interrupt));\r
-//void INT_CMP0(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_CMP1/INT_P11 (0x54)\r
- */\r
-void INT_P11(void) __attribute__ ((interrupt));\r
-//void INT_CMP1(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TRD0 (0x56)\r
- */\r
-void INT_TRD0(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TRD1 (0x58)\r
- */\r
-void INT_TRD1(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_TRG (0x5A)\r
- */\r
-void INT_TRG(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_SRE3/INT_TM13H (0x5C)\r
- */\r
-void INT_TM13H(void) __attribute__ ((interrupt));\r
-//void INT_SRE3(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_IICA1 (0x60)\r
- */\r
-void INT_IICA1(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_FL (0x62)\r
- */\r
-void INT_FL(void) __attribute__ ((interrupt));\r
-\r
-/*\r
- * INT_BRK_I (0x7E)\r
- */\r
-void INT_BRK_I(void) __attribute__ ((interrupt));\r
-\r
-//Hardware Vectors\r
-//PowerON_Reset (0x0)\r
-void PowerON_Reset(void) __attribute__ ((interrupt));\r
-#endif\r
+++ /dev/null
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : iodefine.h */
-/* DESCRIPTION : Definition of I/O Registers */
-/* CPU SERIES : RL78 - G14 */
-/* CPU TYPE : R5F104PJ */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/ \r
- \r
-/************************************************************************/\r
-/* Header file generated from device file: */\r
-/* DR5F104PJ.DVF */\r
-/* Copyright(C) 2012 Renesas */\r
-/* File Version V2.00 */\r
-/* Tool Version 1.9.7121 */\r
-/* Date Generated 13/11/2012 */\r
-/************************************************************************/\r
-\r
-#ifndef __IOREG_BIT_STRUCTURES\r
-#define __IOREG_BIT_STRUCTURES\r
-typedef struct {\r
- unsigned char no0 :1;\r
- unsigned char no1 :1;\r
- unsigned char no2 :1;\r
- unsigned char no3 :1;\r
- unsigned char no4 :1;\r
- unsigned char no5 :1;\r
- unsigned char no6 :1;\r
- unsigned char no7 :1;\r
-} __BITS8;\r
-\r
-typedef struct {\r
- unsigned short no0 :1;\r
- unsigned short no1 :1;\r
- unsigned short no2 :1;\r
- unsigned short no3 :1;\r
- unsigned short no4 :1;\r
- unsigned short no5 :1;\r
- unsigned short no6 :1;\r
- unsigned short no7 :1;\r
- unsigned short no8 :1;\r
- unsigned short no9 :1;\r
- unsigned short no10 :1;\r
- unsigned short no11 :1;\r
- unsigned short no12 :1;\r
- unsigned short no13 :1;\r
- unsigned short no14 :1;\r
- unsigned short no15 :1;\r
-} __BITS16;\r
-\r
-#endif\r
-\r
-#ifndef IODEFINE_H\r
-#define IODEFINE_H\r
-\r
-/*\r
- IO Registers\r
- */\r
-union un_p0 {\r
- unsigned char p0;\r
- __BITS8 BIT;\r
-};\r
-union un_p1 {\r
- unsigned char p1;\r
- __BITS8 BIT;\r
-};\r
-union un_p2 {\r
- unsigned char p2;\r
- __BITS8 BIT;\r
-};\r
-union un_p3 {\r
- unsigned char p3;\r
- __BITS8 BIT;\r
-};\r
-union un_p4 {\r
- unsigned char p4;\r
- __BITS8 BIT;\r
-};\r
-union un_p5 {\r
- unsigned char p5;\r
- __BITS8 BIT;\r
-};\r
-union un_p6 {\r
- unsigned char p6;\r
- __BITS8 BIT;\r
-};\r
-union un_p7 {\r
- unsigned char p7;\r
- __BITS8 BIT;\r
-};\r
-union un_p8 {\r
- unsigned char p8;\r
- __BITS8 BIT;\r
-};\r
-union un_p10 {\r
- unsigned char p10;\r
- __BITS8 BIT;\r
-};\r
-union un_p11 {\r
- unsigned char p11;\r
- __BITS8 BIT;\r
-};\r
-union un_p12 {\r
- unsigned char p12;\r
- __BITS8 BIT;\r
-};\r
-union un_p13 {\r
- unsigned char p13;\r
- __BITS8 BIT;\r
-};\r
-union un_p14 {\r
- unsigned char p14;\r
- __BITS8 BIT;\r
-};\r
-union un_p15 {\r
- unsigned char p15;\r
- __BITS8 BIT;\r
-};\r
-union un_pm0 {\r
- unsigned char pm0;\r
- __BITS8 BIT;\r
-};\r
-union un_pm1 {\r
- unsigned char pm1;\r
- __BITS8 BIT;\r
-};\r
-union un_pm2 {\r
- unsigned char pm2;\r
- __BITS8 BIT;\r
-};\r
-union un_pm3 {\r
- unsigned char pm3;\r
- __BITS8 BIT;\r
-};\r
-union un_pm4 {\r
- unsigned char pm4;\r
- __BITS8 BIT;\r
-};\r
-union un_pm5 {\r
- unsigned char pm5;\r
- __BITS8 BIT;\r
-};\r
-union un_pm6 {\r
- unsigned char pm6;\r
- __BITS8 BIT;\r
-};\r
-union un_pm7 {\r
- unsigned char pm7;\r
- __BITS8 BIT;\r
-};\r
-union un_pm8 {\r
- unsigned char pm8;\r
- __BITS8 BIT;\r
-};\r
-union un_pm10 {\r
- unsigned char pm10;\r
- __BITS8 BIT;\r
-};\r
-union un_pm11 {\r
- unsigned char pm11;\r
- __BITS8 BIT;\r
-};\r
-union un_pm12 {\r
- unsigned char pm12;\r
- __BITS8 BIT;\r
-};\r
-union un_pm14 {\r
- unsigned char pm14;\r
- __BITS8 BIT;\r
-};\r
-union un_pm15 {\r
- unsigned char pm15;\r
- __BITS8 BIT;\r
-};\r
-union un_adm0 {\r
- unsigned char adm0;\r
- __BITS8 BIT;\r
-};\r
-union un_ads {\r
- unsigned char ads;\r
- __BITS8 BIT;\r
-};\r
-union un_adm1 {\r
- unsigned char adm1;\r
- __BITS8 BIT;\r
-};\r
-union un_dam {\r
- unsigned char dam;\r
- __BITS8 BIT;\r
-};\r
-union un_krm {\r
- unsigned char krm;\r
- __BITS8 BIT;\r
-};\r
-union un_egp0 {\r
- unsigned char egp0;\r
- __BITS8 BIT;\r
-};\r
-union un_egn0 {\r
- unsigned char egn0;\r
- __BITS8 BIT;\r
-};\r
-union un_egp1 {\r
- unsigned char egp1;\r
- __BITS8 BIT;\r
-};\r
-union un_egn1 {\r
- unsigned char egn1;\r
- __BITS8 BIT;\r
-};\r
-union un_iics0 {\r
- unsigned char iics0;\r
- __BITS8 BIT;\r
-};\r
-union un_iicf0 {\r
- unsigned char iicf0;\r
- __BITS8 BIT;\r
-};\r
-union un_iics1 {\r
- unsigned char iics1;\r
- __BITS8 BIT;\r
-};\r
-union un_iicf1 {\r
- unsigned char iicf1;\r
- __BITS8 BIT;\r
-};\r
-union un_flars {\r
- unsigned char flars;\r
- __BITS8 BIT;\r
-};\r
-union un_fssq {\r
- unsigned char fssq;\r
- __BITS8 BIT;\r
-};\r
-union un_flrst {\r
- unsigned char flrst;\r
- __BITS8 BIT;\r
-};\r
-union un_fsastl {\r
- unsigned char fsastl;\r
- __BITS8 BIT;\r
-};\r
-union un_fsasth {\r
- unsigned char fsasth;\r
- __BITS8 BIT;\r
-};\r
-union un_rtcc0 {\r
- unsigned char rtcc0;\r
- __BITS8 BIT;\r
-};\r
-union un_rtcc1 {\r
- unsigned char rtcc1;\r
- __BITS8 BIT;\r
-};\r
-union un_csc {\r
- unsigned char csc;\r
- __BITS8 BIT;\r
-};\r
-union un_ostc {\r
- unsigned char ostc;\r
- __BITS8 BIT;\r
-};\r
-union un_ckc {\r
- unsigned char ckc;\r
- __BITS8 BIT;\r
-};\r
-union un_cks0 {\r
- unsigned char cks0;\r
- __BITS8 BIT;\r
-};\r
-union un_cks1 {\r
- unsigned char cks1;\r
- __BITS8 BIT;\r
-};\r
-union un_lvim {\r
- unsigned char lvim;\r
- __BITS8 BIT;\r
-};\r
-union un_lvis {\r
- unsigned char lvis;\r
- __BITS8 BIT;\r
-};\r
-union un_monsta0 {\r
- unsigned char monsta0;\r
- __BITS8 BIT;\r
-};\r
-union un_asim {\r
- unsigned char asim;\r
- __BITS8 BIT;\r
-};\r
-union un_if2 {\r
- unsigned short if2;\r
- __BITS16 BIT;\r
-};\r
-union un_if2l {\r
- unsigned char if2l;\r
- __BITS8 BIT;\r
-};\r
-union un_if2h {\r
- unsigned char if2h;\r
- __BITS8 BIT;\r
-};\r
-union un_mk2 {\r
- unsigned short mk2;\r
- __BITS16 BIT;\r
-};\r
-union un_mk2l {\r
- unsigned char mk2l;\r
- __BITS8 BIT;\r
-};\r
-union un_mk2h {\r
- unsigned char mk2h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr02 {\r
- unsigned short pr02;\r
- __BITS16 BIT;\r
-};\r
-union un_pr02l {\r
- unsigned char pr02l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr02h {\r
- unsigned char pr02h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr12 {\r
- unsigned short pr12;\r
- __BITS16 BIT;\r
-};\r
-union un_pr12l {\r
- unsigned char pr12l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr12h {\r
- unsigned char pr12h;\r
- __BITS8 BIT;\r
-};\r
-union un_if0 {\r
- unsigned short if0;\r
- __BITS16 BIT;\r
-};\r
-union un_if0l {\r
- unsigned char if0l;\r
- __BITS8 BIT;\r
-};\r
-union un_if0h {\r
- unsigned char if0h;\r
- __BITS8 BIT;\r
-};\r
-union un_if1 {\r
- unsigned short if1;\r
- __BITS16 BIT;\r
-};\r
-union un_if1l {\r
- unsigned char if1l;\r
- __BITS8 BIT;\r
-};\r
-union un_if1h {\r
- unsigned char if1h;\r
- __BITS8 BIT;\r
-};\r
-union un_mk0 {\r
- unsigned short mk0;\r
- __BITS16 BIT;\r
-};\r
-union un_mk0l {\r
- unsigned char mk0l;\r
- __BITS8 BIT;\r
-};\r
-union un_mk0h {\r
- unsigned char mk0h;\r
- __BITS8 BIT;\r
-};\r
-union un_mk1 {\r
- unsigned short mk1;\r
- __BITS16 BIT;\r
-};\r
-union un_mk1l {\r
- unsigned char mk1l;\r
- __BITS8 BIT;\r
-};\r
-union un_mk1h {\r
- unsigned char mk1h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr00 {\r
- unsigned short pr00;\r
- __BITS16 BIT;\r
-};\r
-union un_pr00l {\r
- unsigned char pr00l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr00h {\r
- unsigned char pr00h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr01 {\r
- unsigned short pr01;\r
- __BITS16 BIT;\r
-};\r
-union un_pr01l {\r
- unsigned char pr01l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr01h {\r
- unsigned char pr01h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr10 {\r
- unsigned short pr10;\r
- __BITS16 BIT;\r
-};\r
-union un_pr10l {\r
- unsigned char pr10l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr10h {\r
- unsigned char pr10h;\r
- __BITS8 BIT;\r
-};\r
-union un_pr11 {\r
- unsigned short pr11;\r
- __BITS16 BIT;\r
-};\r
-union un_pr11l {\r
- unsigned char pr11l;\r
- __BITS8 BIT;\r
-};\r
-union un_pr11h {\r
- unsigned char pr11h;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc {\r
- unsigned char pmc;\r
- __BITS8 BIT;\r
-};\r
-\r
-#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
-#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
-#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
-#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
-#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
-#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
-#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
-#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
-#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
-#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
-#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
-#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
-#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
-#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
-#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
-#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
-#define P8 (*(volatile union un_p8 *)0xFFF08).p8\r
-#define P8_bit (*(volatile union un_p8 *)0xFFF08).BIT\r
-#define P10 (*(volatile union un_p10 *)0xFFF0A).p10\r
-#define P10_bit (*(volatile union un_p10 *)0xFFF0A).BIT\r
-#define P11 (*(volatile union un_p11 *)0xFFF0B).p11\r
-#define P11_bit (*(volatile union un_p11 *)0xFFF0B).BIT\r
-#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
-#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
-#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
-#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
-#define P14 (*(volatile union un_p14 *)0xFFF0E).p14\r
-#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT\r
-#define P15 (*(volatile union un_p15 *)0xFFF0F).p15\r
-#define P15_bit (*(volatile union un_p15 *)0xFFF0F).BIT\r
-#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
-#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
-#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
-#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
-#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
-#define SIO01 (*(volatile unsigned char *)0xFFF12)\r
-#define SDR12 (*(volatile unsigned short *)0xFFF14)\r
-#define SIO30 (*(volatile unsigned char *)0xFFF14)\r
-#define TXD3 (*(volatile unsigned char *)0xFFF14)\r
-#define SDR13 (*(volatile unsigned short *)0xFFF16)\r
-#define RXD3 (*(volatile unsigned char *)0xFFF16)\r
-#define SIO31 (*(volatile unsigned char *)0xFFF16)\r
-#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
-#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
-#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
-#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
-#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
-#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
-#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
-#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
-#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
-#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
-#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
-#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
-#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
-#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
-#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
-#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
-#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
-#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
-#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
-#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
-#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
-#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
-#define PM8 (*(volatile union un_pm8 *)0xFFF28).pm8\r
-#define PM8_bit (*(volatile union un_pm8 *)0xFFF28).BIT\r
-#define PM10 (*(volatile union un_pm10 *)0xFFF2A).pm10\r
-#define PM10_bit (*(volatile union un_pm10 *)0xFFF2A).BIT\r
-#define PM11 (*(volatile union un_pm11 *)0xFFF2B).pm11\r
-#define PM11_bit (*(volatile union un_pm11 *)0xFFF2B).BIT\r
-#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
-#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
-#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14\r
-#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT\r
-#define PM15 (*(volatile union un_pm15 *)0xFFF2F).pm15\r
-#define PM15_bit (*(volatile union un_pm15 *)0xFFF2F).BIT\r
-#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
-#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
-#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
-#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
-#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
-#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
-#define DACS0 (*(volatile unsigned char *)0xFFF34)\r
-#define DACS1 (*(volatile unsigned char *)0xFFF35)\r
-#define DAM (*(volatile union un_dam *)0xFFF36).dam\r
-#define DAM_bit (*(volatile union un_dam *)0xFFF36).BIT\r
-#define KRM (*(volatile union un_krm *)0xFFF37).krm\r
-#define KRM_bit (*(volatile union un_krm *)0xFFF37).BIT\r
-#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
-#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
-#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
-#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
-#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1\r
-#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT\r
-#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1\r
-#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT\r
-#define SDR02 (*(volatile unsigned short *)0xFFF44)\r
-#define SIO10 (*(volatile unsigned char *)0xFFF44)\r
-#define TXD1 (*(volatile unsigned char *)0xFFF44)\r
-#define SDR03 (*(volatile unsigned short *)0xFFF46)\r
-#define RXD1 (*(volatile unsigned char *)0xFFF46)\r
-#define SIO11 (*(volatile unsigned char *)0xFFF46)\r
-#define SDR10 (*(volatile unsigned short *)0xFFF48)\r
-#define SIO20 (*(volatile unsigned char *)0xFFF48)\r
-#define TXD2 (*(volatile unsigned char *)0xFFF48)\r
-#define SDR11 (*(volatile unsigned short *)0xFFF4A)\r
-#define RXD2 (*(volatile unsigned char *)0xFFF4A)\r
-#define SIO21 (*(volatile unsigned char *)0xFFF4A)\r
-#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
-#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
-#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
-#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
-#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
-#define IICA1 (*(volatile unsigned char *)0xFFF54)\r
-#define IICS1 (*(volatile union un_iics1 *)0xFFF55).iics1\r
-#define IICS1_bit (*(volatile union un_iics1 *)0xFFF55).BIT\r
-#define IICF1 (*(volatile union un_iicf1 *)0xFFF56).iicf1\r
-#define IICF1_bit (*(volatile union un_iicf1 *)0xFFF56).BIT\r
-#define TRDGRC0 (*(volatile unsigned short *)0xFFF58)\r
-#define TRDGRD0 (*(volatile unsigned short *)0xFFF5A)\r
-#define TRDGRC1 (*(volatile unsigned short *)0xFFF5C)\r
-#define TRDGRD1 (*(volatile unsigned short *)0xFFF5E)\r
-#define TRGGRC (*(volatile unsigned short *)0xFFF60)\r
-#define TRGGRD (*(volatile unsigned short *)0xFFF62)\r
-#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
-#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
-#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
-#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
-#define TDR10 (*(volatile unsigned short *)0xFFF70)\r
-#define TDR11 (*(volatile unsigned short *)0xFFF72)\r
-#define TDR11L (*(volatile unsigned char *)0xFFF72)\r
-#define TDR11H (*(volatile unsigned char *)0xFFF73)\r
-#define TDR12 (*(volatile unsigned short *)0xFFF74)\r
-#define TDR13 (*(volatile unsigned short *)0xFFF76)\r
-#define TDR13L (*(volatile unsigned char *)0xFFF76)\r
-#define TDR13H (*(volatile unsigned char *)0xFFF77)\r
-#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
-#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
-#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
-#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
-#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
-#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
-#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
-#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
-#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
-#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
-#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
-#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
-#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
-#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
-#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
-#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
-#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
-#define ITMC (*(volatile unsigned short *)0xFFF90)\r
-#define SEC (*(volatile unsigned char *)0xFFF92)\r
-#define MIN (*(volatile unsigned char *)0xFFF93)\r
-#define HOUR (*(volatile unsigned char *)0xFFF94)\r
-#define WEEK (*(volatile unsigned char *)0xFFF95)\r
-#define DAY (*(volatile unsigned char *)0xFFF96)\r
-#define MONTH (*(volatile unsigned char *)0xFFF97)\r
-#define YEAR (*(volatile unsigned char *)0xFFF98)\r
-#define SUBCUD (*(volatile unsigned char *)0xFFF99)\r
-#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
-#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
-#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
-#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
-#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
-#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
-#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
-#define CMC (*(volatile unsigned char *)0xFFFA0)\r
-#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
-#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
-#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
-#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
-#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
-#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
-#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
-#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
-#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
-#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
-#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
-#define RESF (*(volatile unsigned char *)0xFFFA8)\r
-#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
-#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
-#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
-#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
-#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
-#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
-#define RXB (*(volatile unsigned char *)0xFFFAD)\r
-#define TXS (*(volatile unsigned char *)0xFFFAD)\r
-#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
-#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
-#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
-#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
-#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
-#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
-#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
-#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
-#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
-#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
-#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
-#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
-#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
-#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
-#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
-#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
-#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
-#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
-#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
-#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
-#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
-#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
-#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
-#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
-#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
-#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
-#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
-#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
-#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
-#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
-#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
-#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
-#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
-#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
-#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
-#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
-#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
-#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
-#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
-#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
-#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
-#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
-#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
-#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
-#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
-#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
-#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
-#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
-#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
-#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
-#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
-#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
-#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
-#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
-#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
-#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
-#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
-#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
-#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
-#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
-#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
-#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
-#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
-#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
-#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
-#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
-#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
-#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
-#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
-#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
-#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
-#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
-#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
-#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
-#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
-#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
-#define MACRL (*(volatile unsigned short *)0xFFFF0)\r
-#define MACRH (*(volatile unsigned short *)0xFFFF2)\r
-#define MDUC (*(volatile unsigned char *)0xFFFFB)\r
-#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
-#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
-\r
-/*\r
- Sfr bits\r
- */\r
-#define ADCE ADM0_bit.no0\r
-#define ADCS ADM0_bit.no7\r
-#define DACE0 DAM_bit.no4\r
-#define DACE1 DAM_bit.no5\r
-#define SPD0 IICS0_bit.no0\r
-#define STD0 IICS0_bit.no1\r
-#define ACKD0 IICS0_bit.no2\r
-#define TRC0 IICS0_bit.no3\r
-#define COI0 IICS0_bit.no4\r
-#define EXC0 IICS0_bit.no5\r
-#define ALD0 IICS0_bit.no6\r
-#define MSTS0 IICS0_bit.no7\r
-#define IICRSV0 IICF0_bit.no0\r
-#define STCEN0 IICF0_bit.no1\r
-#define IICBSY0 IICF0_bit.no6\r
-#define STCF0 IICF0_bit.no7\r
-#define SPD1 IICS1_bit.no0\r
-#define STD1 IICS1_bit.no1\r
-#define ACKD1 IICS1_bit.no2\r
-#define TRC1 IICS1_bit.no3\r
-#define COI1 IICS1_bit.no4\r
-#define EXC1 IICS1_bit.no5\r
-#define ALD1 IICS1_bit.no6\r
-#define MSTS1 IICS1_bit.no7\r
-#define IICRSV1 IICF1_bit.no0\r
-#define STCEN1 IICF1_bit.no1\r
-#define IICBSY1 IICF1_bit.no6\r
-#define STCF1 IICF1_bit.no7\r
-#define FSSTP FSSQ_bit.no6\r
-#define SQST FSSQ_bit.no7\r
-#define SQEND FSASTH_bit.no6\r
-#define ESQEND FSASTH_bit.no7\r
-#define RCLOE1 RTCC0_bit.no5\r
-#define RTCE RTCC0_bit.no7\r
-#define RWAIT RTCC1_bit.no0\r
-#define RWST RTCC1_bit.no1\r
-#define RIFG RTCC1_bit.no3\r
-#define WAFG RTCC1_bit.no4\r
-#define WALIE RTCC1_bit.no6\r
-#define WALE RTCC1_bit.no7\r
-#define HIOSTOP CSC_bit.no0\r
-#define XTSTOP CSC_bit.no6\r
-#define MSTOP CSC_bit.no7\r
-#define SDIV CKC_bit.no3\r
-#define MCM0 CKC_bit.no4\r
-#define MCS CKC_bit.no5\r
-#define CSS CKC_bit.no6\r
-#define CLS CKC_bit.no7\r
-#define PCLOE0 CKS0_bit.no7\r
-#define PCLOE1 CKS1_bit.no7\r
-#define LVIF LVIM_bit.no0\r
-#define LVIOMSK LVIM_bit.no1\r
-#define LVISEN LVIM_bit.no7\r
-#define LVILV LVIS_bit.no0\r
-#define LVIMD LVIS_bit.no7\r
-#define TMIF11 IF2_bit.no0\r
-#define TMIF12 IF2_bit.no1\r
-#define TMIF13 IF2_bit.no2\r
-#define PIF6 IF2_bit.no3\r
-#define PIF7 IF2_bit.no4\r
-#define PIF8 IF2_bit.no5\r
-#define PIF9 IF2_bit.no6\r
-#define CMPIF0 IF2_bit.no7\r
-#define PIF10 IF2_bit.no7\r
-#define CMPIF1 IF2H_bit.no0\r
-#define PIF11 IF2H_bit.no0\r
-#define TRDIF0 IF2H_bit.no1\r
-#define TRDIF1 IF2H_bit.no2\r
-#define TRGIF IF2H_bit.no3\r
-#define SREIF3 IF2H_bit.no4\r
-#define TMIF13H IF2H_bit.no4\r
-#define IICAIF1 IF2H_bit.no6\r
-#define FLIF IF2H_bit.no7\r
-#define TMMK11 MK2_bit.no0\r
-#define TMMK12 MK2_bit.no1\r
-#define TMMK13 MK2_bit.no2\r
-#define PMK6 MK2_bit.no3\r
-#define PMK7 MK2_bit.no4\r
-#define PMK8 MK2_bit.no5\r
-#define PMK9 MK2_bit.no6\r
-#define CMPMK0 MK2_bit.no7\r
-#define PMK10 MK2_bit.no7\r
-#define CMPMK1 MK2H_bit.no0\r
-#define PMK11 MK2H_bit.no0\r
-#define TRDMK0 MK2H_bit.no1\r
-#define TRDMK1 MK2H_bit.no2\r
-#define TRGMK MK2H_bit.no3\r
-#define SREMK3 MK2H_bit.no4\r
-#define TMMK13H MK2H_bit.no4\r
-#define IICAMK1 MK2H_bit.no6\r
-#define FLMK MK2H_bit.no7\r
-#define TMPR011 PR02_bit.no0\r
-#define TMPR012 PR02_bit.no1\r
-#define TMPR013 PR02_bit.no2\r
-#define PPR06 PR02_bit.no3\r
-#define PPR07 PR02_bit.no4\r
-#define PPR08 PR02_bit.no5\r
-#define PPR09 PR02_bit.no6\r
-#define CMPPR00 PR02_bit.no7\r
-#define PPR010 PR02_bit.no7\r
-#define CMPPR01 PR02H_bit.no0\r
-#define PPR011 PR02H_bit.no0\r
-#define TRDPR00 PR02H_bit.no1\r
-#define TRDPR01 PR02H_bit.no2\r
-#define TRGPR0 PR02H_bit.no3\r
-#define SREPR03 PR02H_bit.no4\r
-#define TMPR013H PR02H_bit.no4\r
-#define IICAPR01 PR02H_bit.no6\r
-#define FLPR0 PR02H_bit.no7\r
-#define TMPR111 PR12_bit.no0\r
-#define TMPR112 PR12_bit.no1\r
-#define TMPR113 PR12_bit.no2\r
-#define PPR16 PR12_bit.no3\r
-#define PPR17 PR12_bit.no4\r
-#define PPR18 PR12_bit.no5\r
-#define PPR19 PR12_bit.no6\r
-#define CMPPR10 PR12_bit.no7\r
-#define PPR110 PR12_bit.no7\r
-#define CMPPR11 PR12H_bit.no0\r
-#define PPR111 PR12H_bit.no0\r
-#define TRDPR10 PR12H_bit.no1\r
-#define TRDPR11 PR12H_bit.no2\r
-#define TRGPR1 PR12H_bit.no3\r
-#define SREPR13 PR12H_bit.no4\r
-#define TMPR113H PR12H_bit.no4\r
-#define IICAPR11 PR12H_bit.no6\r
-#define FLPR1 PR12H_bit.no7\r
-#define SROIF IF0_bit.no0\r
-#define WDTIIF IF0_bit.no0\r
-#define LVIIF IF0_bit.no1\r
-#define PIF0 IF0_bit.no2\r
-#define PIF1 IF0_bit.no3\r
-#define PIF2 IF0_bit.no4\r
-#define PIF3 IF0_bit.no5\r
-#define PIF4 IF0_bit.no6\r
-#define PIF5 IF0_bit.no7\r
-#define CSIIF20 IF0H_bit.no0\r
-#define IICIF20 IF0H_bit.no0\r
-#define STIF2 IF0H_bit.no0\r
-#define CSIIF21 IF0H_bit.no1\r
-#define IICIF21 IF0H_bit.no1\r
-#define SRIF2 IF0H_bit.no1\r
-#define SREIF2 IF0H_bit.no2\r
-#define TMIF11H IF0H_bit.no2\r
-#define CSIIF00 IF0H_bit.no5\r
-#define IICIF00 IF0H_bit.no5\r
-#define STIF0 IF0H_bit.no5\r
-#define CSIIF01 IF0H_bit.no6\r
-#define IICIF01 IF0H_bit.no6\r
-#define SRIF0 IF0H_bit.no6\r
-#define SREIF0 IF0H_bit.no7\r
-#define TMIF01H IF0H_bit.no7\r
-#define CSIIF10 IF1_bit.no0\r
-#define IICIF10 IF1_bit.no0\r
-#define STIF1 IF1_bit.no0\r
-#define CSIIF11 IF1_bit.no1\r
-#define IICIF11 IF1_bit.no1\r
-#define SRIF1 IF1_bit.no1\r
-#define SREIF1 IF1_bit.no2\r
-#define TMIF03H IF1_bit.no2\r
-#define IICAIF0 IF1_bit.no3\r
-#define TMIF00 IF1_bit.no4\r
-#define TMIF01 IF1_bit.no5\r
-#define TMIF02 IF1_bit.no6\r
-#define TMIF03 IF1_bit.no7\r
-#define ADIF IF1H_bit.no0\r
-#define RTCIF IF1H_bit.no1\r
-#define ITIF IF1H_bit.no2\r
-#define KRIF IF1H_bit.no3\r
-#define CSIIF30 IF1H_bit.no4\r
-#define IICIF30 IF1H_bit.no4\r
-#define STIF3 IF1H_bit.no4\r
-#define CSIIF31 IF1H_bit.no5\r
-#define IICIF31 IF1H_bit.no5\r
-#define SRIF3 IF1H_bit.no5\r
-#define TRJIF0 IF1H_bit.no6\r
-#define TMIF10 IF1H_bit.no7\r
-#define SROMK MK0_bit.no0\r
-#define WDTIMK MK0_bit.no0\r
-#define LVIMK MK0_bit.no1\r
-#define PMK0 MK0_bit.no2\r
-#define PMK1 MK0_bit.no3\r
-#define PMK2 MK0_bit.no4\r
-#define PMK3 MK0_bit.no5\r
-#define PMK4 MK0_bit.no6\r
-#define PMK5 MK0_bit.no7\r
-#define CSIMK20 MK0H_bit.no0\r
-#define IICMK20 MK0H_bit.no0\r
-#define STMK2 MK0H_bit.no0\r
-#define CSIMK21 MK0H_bit.no1\r
-#define IICMK21 MK0H_bit.no1\r
-#define SRMK2 MK0H_bit.no1\r
-#define SREMK2 MK0H_bit.no2\r
-#define TMMK11H MK0H_bit.no2\r
-#define CSIMK00 MK0H_bit.no5\r
-#define IICMK00 MK0H_bit.no5\r
-#define STMK0 MK0H_bit.no5\r
-#define CSIMK01 MK0H_bit.no6\r
-#define IICMK01 MK0H_bit.no6\r
-#define SRMK0 MK0H_bit.no6\r
-#define SREMK0 MK0H_bit.no7\r
-#define TMMK01H MK0H_bit.no7\r
-#define CSIMK10 MK1_bit.no0\r
-#define IICMK10 MK1_bit.no0\r
-#define STMK1 MK1_bit.no0\r
-#define CSIMK11 MK1_bit.no1\r
-#define IICMK11 MK1_bit.no1\r
-#define SRMK1 MK1_bit.no1\r
-#define SREMK1 MK1_bit.no2\r
-#define TMMK03H MK1_bit.no2\r
-#define IICAMK0 MK1_bit.no3\r
-#define TMMK00 MK1_bit.no4\r
-#define TMMK01 MK1_bit.no5\r
-#define TMMK02 MK1_bit.no6\r
-#define TMMK03 MK1_bit.no7\r
-#define ADMK MK1H_bit.no0\r
-#define RTCMK MK1H_bit.no1\r
-#define ITMK MK1H_bit.no2\r
-#define KRMK MK1H_bit.no3\r
-#define CSIMK30 MK1H_bit.no4\r
-#define IICMK30 MK1H_bit.no4\r
-#define STMK3 MK1H_bit.no4\r
-#define CSIMK31 MK1H_bit.no5\r
-#define IICMK31 MK1H_bit.no5\r
-#define SRMK3 MK1H_bit.no5\r
-#define TRJMK0 MK1H_bit.no6\r
-#define TMMK10 MK1H_bit.no7\r
-#define SROPR0 PR00_bit.no0\r
-#define WDTIPR0 PR00_bit.no0\r
-#define LVIPR0 PR00_bit.no1\r
-#define PPR00 PR00_bit.no2\r
-#define PPR01 PR00_bit.no3\r
-#define PPR02 PR00_bit.no4\r
-#define PPR03 PR00_bit.no5\r
-#define PPR04 PR00_bit.no6\r
-#define PPR05 PR00_bit.no7\r
-#define CSIPR020 PR00H_bit.no0\r
-#define IICPR020 PR00H_bit.no0\r
-#define STPR02 PR00H_bit.no0\r
-#define CSIPR021 PR00H_bit.no1\r
-#define IICPR021 PR00H_bit.no1\r
-#define SRPR02 PR00H_bit.no1\r
-#define SREPR02 PR00H_bit.no2\r
-#define TMPR011H PR00H_bit.no2\r
-#define CSIPR000 PR00H_bit.no5\r
-#define IICPR000 PR00H_bit.no5\r
-#define STPR00 PR00H_bit.no5\r
-#define CSIPR001 PR00H_bit.no6\r
-#define IICPR001 PR00H_bit.no6\r
-#define SRPR00 PR00H_bit.no6\r
-#define SREPR00 PR00H_bit.no7\r
-#define TMPR001H PR00H_bit.no7\r
-#define CSIPR010 PR01_bit.no0\r
-#define IICPR010 PR01_bit.no0\r
-#define STPR01 PR01_bit.no0\r
-#define CSIPR011 PR01_bit.no1\r
-#define IICPR011 PR01_bit.no1\r
-#define SRPR01 PR01_bit.no1\r
-#define SREPR01 PR01_bit.no2\r
-#define TMPR003H PR01_bit.no2\r
-#define IICAPR00 PR01_bit.no3\r
-#define TMPR000 PR01_bit.no4\r
-#define TMPR001 PR01_bit.no5\r
-#define TMPR002 PR01_bit.no6\r
-#define TMPR003 PR01_bit.no7\r
-#define ADPR0 PR01H_bit.no0\r
-#define RTCPR0 PR01H_bit.no1\r
-#define ITPR0 PR01H_bit.no2\r
-#define KRPR0 PR01H_bit.no3\r
-#define CSIPR030 PR01H_bit.no4\r
-#define IICPR030 PR01H_bit.no4\r
-#define STPR03 PR01H_bit.no4\r
-#define CSIPR031 PR01H_bit.no5\r
-#define IICPR031 PR01H_bit.no5\r
-#define SRPR03 PR01H_bit.no5\r
-#define TRJPR00 PR01H_bit.no6\r
-#define TMPR010 PR01H_bit.no7\r
-#define SROPR1 PR10_bit.no0\r
-#define WDTIPR1 PR10_bit.no0\r
-#define LVIPR1 PR10_bit.no1\r
-#define PPR10 PR10_bit.no2\r
-#define PPR11 PR10_bit.no3\r
-#define PPR12 PR10_bit.no4\r
-#define PPR13 PR10_bit.no5\r
-#define PPR14 PR10_bit.no6\r
-#define PPR15 PR10_bit.no7\r
-#define CSIPR120 PR10H_bit.no0\r
-#define IICPR120 PR10H_bit.no0\r
-#define STPR12 PR10H_bit.no0\r
-#define CSIPR121 PR10H_bit.no1\r
-#define IICPR121 PR10H_bit.no1\r
-#define SRPR12 PR10H_bit.no1\r
-#define SREPR12 PR10H_bit.no2\r
-#define TMPR111H PR10H_bit.no2\r
-#define CSIPR100 PR10H_bit.no5\r
-#define IICPR100 PR10H_bit.no5\r
-#define STPR10 PR10H_bit.no5\r
-#define CSIPR101 PR10H_bit.no6\r
-#define IICPR101 PR10H_bit.no6\r
-#define SRPR10 PR10H_bit.no6\r
-#define SREPR10 PR10H_bit.no7\r
-#define TMPR101H PR10H_bit.no7\r
-#define CSIPR110 PR11_bit.no0\r
-#define IICPR110 PR11_bit.no0\r
-#define STPR11 PR11_bit.no0\r
-#define CSIPR111 PR11_bit.no1\r
-#define IICPR111 PR11_bit.no1\r
-#define SRPR11 PR11_bit.no1\r
-#define SREPR11 PR11_bit.no2\r
-#define TMPR103H PR11_bit.no2\r
-#define IICAPR10 PR11_bit.no3\r
-#define TMPR100 PR11_bit.no4\r
-#define TMPR101 PR11_bit.no5\r
-#define TMPR102 PR11_bit.no6\r
-#define TMPR103 PR11_bit.no7\r
-#define ADPR1 PR11H_bit.no0\r
-#define RTCPR1 PR11H_bit.no1\r
-#define ITPR1 PR11H_bit.no2\r
-#define KRPR1 PR11H_bit.no3\r
-#define CSIPR130 PR11H_bit.no4\r
-#define IICPR130 PR11H_bit.no4\r
-#define STPR13 PR11H_bit.no4\r
-#define CSIPR131 PR11H_bit.no5\r
-#define IICPR131 PR11H_bit.no5\r
-#define SRPR13 PR11H_bit.no5\r
-#define TRJPR10 PR11H_bit.no6\r
-#define TMPR110 PR11H_bit.no7\r
-#define MAA PMC_bit.no0\r
-\r
-/*\r
- Interrupt vector addresses\r
- */\r
-#define RST_vect (0x0)\r
-#define INTDBG_vect (0x2)\r
-#define INTSRO_vect (0x4)\r
-#define INTWDTI_vect (0x4)\r
-#define INTLVI_vect (0x6)\r
-#define INTP0_vect (0x8)\r
-#define INTP1_vect (0xA)\r
-#define INTP2_vect (0xC)\r
-#define INTP3_vect (0xE)\r
-#define INTP4_vect (0x10)\r
-#define INTP5_vect (0x12)\r
-#define INTCSI20_vect (0x14)\r
-#define INTIIC20_vect (0x14)\r
-#define INTST2_vect (0x14)\r
-#define INTCSI21_vect (0x16)\r
-#define INTIIC21_vect (0x16)\r
-#define INTSR2_vect (0x16)\r
-#define INTSRE2_vect (0x18)\r
-#define INTTM11H_vect (0x18)\r
-#define INTCSI00_vect (0x1E)\r
-#define INTIIC00_vect (0x1E)\r
-#define INTST0_vect (0x1E)\r
-#define INTCSI01_vect (0x20)\r
-#define INTIIC01_vect (0x20)\r
-#define INTSR0_vect (0x20)\r
-#define INTSRE0_vect (0x22)\r
-#define INTTM01H_vect (0x22)\r
-#define INTCSI10_vect (0x24)\r
-#define INTIIC10_vect (0x24)\r
-#define INTST1_vect (0x24)\r
-#define INTCSI11_vect (0x26)\r
-#define INTIIC11_vect (0x26)\r
-#define INTSR1_vect (0x26)\r
-#define INTSRE1_vect (0x28)\r
-#define INTTM03H_vect (0x28)\r
-#define INTIICA0_vect (0x2A)\r
-#define INTTM00_vect (0x2C)\r
-#define INTTM01_vect (0x2E)\r
-#define INTTM02_vect (0x30)\r
-#define INTTM03_vect (0x32)\r
-#define INTAD_vect (0x34)\r
-#define INTRTC_vect (0x36)\r
-#define INTIT_vect (0x38)\r
-#define INTKR_vect (0x3A)\r
-#define INTCSI30_vect (0x3C)\r
-#define INTIIC30_vect (0x3C)\r
-#define INTST3_vect (0x3C)\r
-#define INTCSI31_vect (0x3E)\r
-#define INTIIC31_vect (0x3E)\r
-#define INTSR3_vect (0x3E)\r
-#define INTTRJ0_vect (0x40)\r
-#define INTTM10_vect (0x42)\r
-#define INTTM11_vect (0x44)\r
-#define INTTM12_vect (0x46)\r
-#define INTTM13_vect (0x48)\r
-#define INTP6_vect (0x4A)\r
-#define INTP7_vect (0x4C)\r
-#define INTP8_vect (0x4E)\r
-#define INTP9_vect (0x50)\r
-#define INTCMP0_vect (0x52)\r
-#define INTP10_vect (0x52)\r
-#define INTCMP1_vect (0x54)\r
-#define INTP11_vect (0x54)\r
-#define INTTRD0_vect (0x56)\r
-#define INTTRD1_vect (0x58)\r
-#define INTTRG_vect (0x5A)\r
-#define INTSRE3_vect (0x5C)\r
-#define INTTM13H_vect (0x5C)\r
-#define INTIICA1_vect (0x60)\r
-#define INTFL_vect (0x62)\r
-#define BRK_I_vect (0x7E)\r
-#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G14 */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F104PJ.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V2.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_H\r
+#define IODEFINE_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_p0 {\r
+ unsigned char p0;\r
+ __BITS8 BIT;\r
+};\r
+union un_p1 {\r
+ unsigned char p1;\r
+ __BITS8 BIT;\r
+};\r
+union un_p2 {\r
+ unsigned char p2;\r
+ __BITS8 BIT;\r
+};\r
+union un_p3 {\r
+ unsigned char p3;\r
+ __BITS8 BIT;\r
+};\r
+union un_p4 {\r
+ unsigned char p4;\r
+ __BITS8 BIT;\r
+};\r
+union un_p5 {\r
+ unsigned char p5;\r
+ __BITS8 BIT;\r
+};\r
+union un_p6 {\r
+ unsigned char p6;\r
+ __BITS8 BIT;\r
+};\r
+union un_p7 {\r
+ unsigned char p7;\r
+ __BITS8 BIT;\r
+};\r
+union un_p8 {\r
+ unsigned char p8;\r
+ __BITS8 BIT;\r
+};\r
+union un_p10 {\r
+ unsigned char p10;\r
+ __BITS8 BIT;\r
+};\r
+union un_p11 {\r
+ unsigned char p11;\r
+ __BITS8 BIT;\r
+};\r
+union un_p12 {\r
+ unsigned char p12;\r
+ __BITS8 BIT;\r
+};\r
+union un_p13 {\r
+ unsigned char p13;\r
+ __BITS8 BIT;\r
+};\r
+union un_p14 {\r
+ unsigned char p14;\r
+ __BITS8 BIT;\r
+};\r
+union un_p15 {\r
+ unsigned char p15;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm0 {\r
+ unsigned char pm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm1 {\r
+ unsigned char pm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm2 {\r
+ unsigned char pm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm3 {\r
+ unsigned char pm3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm4 {\r
+ unsigned char pm4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm5 {\r
+ unsigned char pm5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm6 {\r
+ unsigned char pm6;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm7 {\r
+ unsigned char pm7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm8 {\r
+ unsigned char pm8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm10 {\r
+ unsigned char pm10;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm11 {\r
+ unsigned char pm11;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm12 {\r
+ unsigned char pm12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm14 {\r
+ unsigned char pm14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm15 {\r
+ unsigned char pm15;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm0 {\r
+ unsigned char adm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_ads {\r
+ unsigned char ads;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm1 {\r
+ unsigned char adm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_dam {\r
+ unsigned char dam;\r
+ __BITS8 BIT;\r
+};\r
+union un_krm {\r
+ unsigned char krm;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp0 {\r
+ unsigned char egp0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn0 {\r
+ unsigned char egn0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp1 {\r
+ unsigned char egp1;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn1 {\r
+ unsigned char egn1;\r
+ __BITS8 BIT;\r
+};\r
+union un_iics0 {\r
+ unsigned char iics0;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf0 {\r
+ unsigned char iicf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_iics1 {\r
+ unsigned char iics1;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf1 {\r
+ unsigned char iicf1;\r
+ __BITS8 BIT;\r
+};\r
+union un_flars {\r
+ unsigned char flars;\r
+ __BITS8 BIT;\r
+};\r
+union un_fssq {\r
+ unsigned char fssq;\r
+ __BITS8 BIT;\r
+};\r
+union un_flrst {\r
+ unsigned char flrst;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsastl {\r
+ unsigned char fsastl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsasth {\r
+ unsigned char fsasth;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc0 {\r
+ unsigned char rtcc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc1 {\r
+ unsigned char rtcc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_csc {\r
+ unsigned char csc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ostc {\r
+ unsigned char ostc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ckc {\r
+ unsigned char ckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks0 {\r
+ unsigned char cks0;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks1 {\r
+ unsigned char cks1;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvim {\r
+ unsigned char lvim;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvis {\r
+ unsigned char lvis;\r
+ __BITS8 BIT;\r
+};\r
+union un_monsta0 {\r
+ unsigned char monsta0;\r
+ __BITS8 BIT;\r
+};\r
+union un_asim {\r
+ unsigned char asim;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2 {\r
+ unsigned short if2;\r
+ __BITS16 BIT;\r
+};\r
+union un_if2l {\r
+ unsigned char if2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2h {\r
+ unsigned char if2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2 {\r
+ unsigned short mk2;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk2l {\r
+ unsigned char mk2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2h {\r
+ unsigned char mk2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02 {\r
+ unsigned short pr02;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr02l {\r
+ unsigned char pr02l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02h {\r
+ unsigned char pr02h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12 {\r
+ unsigned short pr12;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr12l {\r
+ unsigned char pr12l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12h {\r
+ unsigned char pr12h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0 {\r
+ unsigned short if0;\r
+ __BITS16 BIT;\r
+};\r
+union un_if0l {\r
+ unsigned char if0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0h {\r
+ unsigned char if0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1 {\r
+ unsigned short if1;\r
+ __BITS16 BIT;\r
+};\r
+union un_if1l {\r
+ unsigned char if1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1h {\r
+ unsigned char if1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0 {\r
+ unsigned short mk0;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk0l {\r
+ unsigned char mk0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0h {\r
+ unsigned char mk0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1 {\r
+ unsigned short mk1;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk1l {\r
+ unsigned char mk1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1h {\r
+ unsigned char mk1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00 {\r
+ unsigned short pr00;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr00l {\r
+ unsigned char pr00l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00h {\r
+ unsigned char pr00h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01 {\r
+ unsigned short pr01;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr01l {\r
+ unsigned char pr01l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01h {\r
+ unsigned char pr01h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10 {\r
+ unsigned short pr10;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr10l {\r
+ unsigned char pr10l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10h {\r
+ unsigned char pr10h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11 {\r
+ unsigned short pr11;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr11l {\r
+ unsigned char pr11l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11h {\r
+ unsigned char pr11h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc {\r
+ unsigned char pmc;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
+#define P8 (*(volatile union un_p8 *)0xFFF08).p8\r
+#define P8_bit (*(volatile union un_p8 *)0xFFF08).BIT\r
+#define P10 (*(volatile union un_p10 *)0xFFF0A).p10\r
+#define P10_bit (*(volatile union un_p10 *)0xFFF0A).BIT\r
+#define P11 (*(volatile union un_p11 *)0xFFF0B).p11\r
+#define P11_bit (*(volatile union un_p11 *)0xFFF0B).BIT\r
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
+#define P14 (*(volatile union un_p14 *)0xFFF0E).p14\r
+#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT\r
+#define P15 (*(volatile union un_p15 *)0xFFF0F).p15\r
+#define P15_bit (*(volatile union un_p15 *)0xFFF0F).BIT\r
+#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
+#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
+#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
+#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
+#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
+#define SIO01 (*(volatile unsigned char *)0xFFF12)\r
+#define SDR12 (*(volatile unsigned short *)0xFFF14)\r
+#define SIO30 (*(volatile unsigned char *)0xFFF14)\r
+#define TXD3 (*(volatile unsigned char *)0xFFF14)\r
+#define SDR13 (*(volatile unsigned short *)0xFFF16)\r
+#define RXD3 (*(volatile unsigned char *)0xFFF16)\r
+#define SIO31 (*(volatile unsigned char *)0xFFF16)\r
+#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
+#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
+#define PM8 (*(volatile union un_pm8 *)0xFFF28).pm8\r
+#define PM8_bit (*(volatile union un_pm8 *)0xFFF28).BIT\r
+#define PM10 (*(volatile union un_pm10 *)0xFFF2A).pm10\r
+#define PM10_bit (*(volatile union un_pm10 *)0xFFF2A).BIT\r
+#define PM11 (*(volatile union un_pm11 *)0xFFF2B).pm11\r
+#define PM11_bit (*(volatile union un_pm11 *)0xFFF2B).BIT\r
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
+#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14\r
+#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT\r
+#define PM15 (*(volatile union un_pm15 *)0xFFF2F).pm15\r
+#define PM15_bit (*(volatile union un_pm15 *)0xFFF2F).BIT\r
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
+#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
+#define DACS0 (*(volatile unsigned char *)0xFFF34)\r
+#define DACS1 (*(volatile unsigned char *)0xFFF35)\r
+#define DAM (*(volatile union un_dam *)0xFFF36).dam\r
+#define DAM_bit (*(volatile union un_dam *)0xFFF36).BIT\r
+#define KRM (*(volatile union un_krm *)0xFFF37).krm\r
+#define KRM_bit (*(volatile union un_krm *)0xFFF37).BIT\r
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
+#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1\r
+#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT\r
+#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1\r
+#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT\r
+#define SDR02 (*(volatile unsigned short *)0xFFF44)\r
+#define SIO10 (*(volatile unsigned char *)0xFFF44)\r
+#define TXD1 (*(volatile unsigned char *)0xFFF44)\r
+#define SDR03 (*(volatile unsigned short *)0xFFF46)\r
+#define RXD1 (*(volatile unsigned char *)0xFFF46)\r
+#define SIO11 (*(volatile unsigned char *)0xFFF46)\r
+#define SDR10 (*(volatile unsigned short *)0xFFF48)\r
+#define SIO20 (*(volatile unsigned char *)0xFFF48)\r
+#define TXD2 (*(volatile unsigned char *)0xFFF48)\r
+#define SDR11 (*(volatile unsigned short *)0xFFF4A)\r
+#define RXD2 (*(volatile unsigned char *)0xFFF4A)\r
+#define SIO21 (*(volatile unsigned char *)0xFFF4A)\r
+#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
+#define IICA1 (*(volatile unsigned char *)0xFFF54)\r
+#define IICS1 (*(volatile union un_iics1 *)0xFFF55).iics1\r
+#define IICS1_bit (*(volatile union un_iics1 *)0xFFF55).BIT\r
+#define IICF1 (*(volatile union un_iicf1 *)0xFFF56).iicf1\r
+#define IICF1_bit (*(volatile union un_iicf1 *)0xFFF56).BIT\r
+#define TRDGRC0 (*(volatile unsigned short *)0xFFF58)\r
+#define TRDGRD0 (*(volatile unsigned short *)0xFFF5A)\r
+#define TRDGRC1 (*(volatile unsigned short *)0xFFF5C)\r
+#define TRDGRD1 (*(volatile unsigned short *)0xFFF5E)\r
+#define TRGGRC (*(volatile unsigned short *)0xFFF60)\r
+#define TRGGRD (*(volatile unsigned short *)0xFFF62)\r
+#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
+#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
+#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
+#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
+#define TDR10 (*(volatile unsigned short *)0xFFF70)\r
+#define TDR11 (*(volatile unsigned short *)0xFFF72)\r
+#define TDR11L (*(volatile unsigned char *)0xFFF72)\r
+#define TDR11H (*(volatile unsigned char *)0xFFF73)\r
+#define TDR12 (*(volatile unsigned short *)0xFFF74)\r
+#define TDR13 (*(volatile unsigned short *)0xFFF76)\r
+#define TDR13L (*(volatile unsigned char *)0xFFF76)\r
+#define TDR13H (*(volatile unsigned char *)0xFFF77)\r
+#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
+#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
+#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
+#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
+#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
+#define ITMC (*(volatile unsigned short *)0xFFF90)\r
+#define SEC (*(volatile unsigned char *)0xFFF92)\r
+#define MIN (*(volatile unsigned char *)0xFFF93)\r
+#define HOUR (*(volatile unsigned char *)0xFFF94)\r
+#define WEEK (*(volatile unsigned char *)0xFFF95)\r
+#define DAY (*(volatile unsigned char *)0xFFF96)\r
+#define MONTH (*(volatile unsigned char *)0xFFF97)\r
+#define YEAR (*(volatile unsigned char *)0xFFF98)\r
+#define SUBCUD (*(volatile unsigned char *)0xFFF99)\r
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
+#define CMC (*(volatile unsigned char *)0xFFFA0)\r
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
+#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
+#define RESF (*(volatile unsigned char *)0xFFFA8)\r
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
+#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
+#define RXB (*(volatile unsigned char *)0xFFFAD)\r
+#define TXS (*(volatile unsigned char *)0xFFFAD)\r
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
+#define MACRL (*(volatile unsigned short *)0xFFFF0)\r
+#define MACRH (*(volatile unsigned short *)0xFFFF2)\r
+#define MDUC (*(volatile unsigned char *)0xFFFFB)\r
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADCE ADM0_bit.no0\r
+#define ADCS ADM0_bit.no7\r
+#define DACE0 DAM_bit.no4\r
+#define DACE1 DAM_bit.no5\r
+#define SPD0 IICS0_bit.no0\r
+#define STD0 IICS0_bit.no1\r
+#define ACKD0 IICS0_bit.no2\r
+#define TRC0 IICS0_bit.no3\r
+#define COI0 IICS0_bit.no4\r
+#define EXC0 IICS0_bit.no5\r
+#define ALD0 IICS0_bit.no6\r
+#define MSTS0 IICS0_bit.no7\r
+#define IICRSV0 IICF0_bit.no0\r
+#define STCEN0 IICF0_bit.no1\r
+#define IICBSY0 IICF0_bit.no6\r
+#define STCF0 IICF0_bit.no7\r
+#define SPD1 IICS1_bit.no0\r
+#define STD1 IICS1_bit.no1\r
+#define ACKD1 IICS1_bit.no2\r
+#define TRC1 IICS1_bit.no3\r
+#define COI1 IICS1_bit.no4\r
+#define EXC1 IICS1_bit.no5\r
+#define ALD1 IICS1_bit.no6\r
+#define MSTS1 IICS1_bit.no7\r
+#define IICRSV1 IICF1_bit.no0\r
+#define STCEN1 IICF1_bit.no1\r
+#define IICBSY1 IICF1_bit.no6\r
+#define STCF1 IICF1_bit.no7\r
+#define FSSTP FSSQ_bit.no6\r
+#define SQST FSSQ_bit.no7\r
+#define SQEND FSASTH_bit.no6\r
+#define ESQEND FSASTH_bit.no7\r
+#define RCLOE1 RTCC0_bit.no5\r
+#define RTCE RTCC0_bit.no7\r
+#define RWAIT RTCC1_bit.no0\r
+#define RWST RTCC1_bit.no1\r
+#define RIFG RTCC1_bit.no3\r
+#define WAFG RTCC1_bit.no4\r
+#define WALIE RTCC1_bit.no6\r
+#define WALE RTCC1_bit.no7\r
+#define HIOSTOP CSC_bit.no0\r
+#define XTSTOP CSC_bit.no6\r
+#define MSTOP CSC_bit.no7\r
+#define SDIV CKC_bit.no3\r
+#define MCM0 CKC_bit.no4\r
+#define MCS CKC_bit.no5\r
+#define CSS CKC_bit.no6\r
+#define CLS CKC_bit.no7\r
+#define PCLOE0 CKS0_bit.no7\r
+#define PCLOE1 CKS1_bit.no7\r
+#define LVIF LVIM_bit.no0\r
+#define LVIOMSK LVIM_bit.no1\r
+#define LVISEN LVIM_bit.no7\r
+#define LVILV LVIS_bit.no0\r
+#define LVIMD LVIS_bit.no7\r
+#define TMIF11 IF2_bit.no0\r
+#define TMIF12 IF2_bit.no1\r
+#define TMIF13 IF2_bit.no2\r
+#define PIF6 IF2_bit.no3\r
+#define PIF7 IF2_bit.no4\r
+#define PIF8 IF2_bit.no5\r
+#define PIF9 IF2_bit.no6\r
+#define CMPIF0 IF2_bit.no7\r
+#define PIF10 IF2_bit.no7\r
+#define CMPIF1 IF2H_bit.no0\r
+#define PIF11 IF2H_bit.no0\r
+#define TRDIF0 IF2H_bit.no1\r
+#define TRDIF1 IF2H_bit.no2\r
+#define TRGIF IF2H_bit.no3\r
+#define SREIF3 IF2H_bit.no4\r
+#define TMIF13H IF2H_bit.no4\r
+#define IICAIF1 IF2H_bit.no6\r
+#define FLIF IF2H_bit.no7\r
+#define TMMK11 MK2_bit.no0\r
+#define TMMK12 MK2_bit.no1\r
+#define TMMK13 MK2_bit.no2\r
+#define PMK6 MK2_bit.no3\r
+#define PMK7 MK2_bit.no4\r
+#define PMK8 MK2_bit.no5\r
+#define PMK9 MK2_bit.no6\r
+#define CMPMK0 MK2_bit.no7\r
+#define PMK10 MK2_bit.no7\r
+#define CMPMK1 MK2H_bit.no0\r
+#define PMK11 MK2H_bit.no0\r
+#define TRDMK0 MK2H_bit.no1\r
+#define TRDMK1 MK2H_bit.no2\r
+#define TRGMK MK2H_bit.no3\r
+#define SREMK3 MK2H_bit.no4\r
+#define TMMK13H MK2H_bit.no4\r
+#define IICAMK1 MK2H_bit.no6\r
+#define FLMK MK2H_bit.no7\r
+#define TMPR011 PR02_bit.no0\r
+#define TMPR012 PR02_bit.no1\r
+#define TMPR013 PR02_bit.no2\r
+#define PPR06 PR02_bit.no3\r
+#define PPR07 PR02_bit.no4\r
+#define PPR08 PR02_bit.no5\r
+#define PPR09 PR02_bit.no6\r
+#define CMPPR00 PR02_bit.no7\r
+#define PPR010 PR02_bit.no7\r
+#define CMPPR01 PR02H_bit.no0\r
+#define PPR011 PR02H_bit.no0\r
+#define TRDPR00 PR02H_bit.no1\r
+#define TRDPR01 PR02H_bit.no2\r
+#define TRGPR0 PR02H_bit.no3\r
+#define SREPR03 PR02H_bit.no4\r
+#define TMPR013H PR02H_bit.no4\r
+#define IICAPR01 PR02H_bit.no6\r
+#define FLPR0 PR02H_bit.no7\r
+#define TMPR111 PR12_bit.no0\r
+#define TMPR112 PR12_bit.no1\r
+#define TMPR113 PR12_bit.no2\r
+#define PPR16 PR12_bit.no3\r
+#define PPR17 PR12_bit.no4\r
+#define PPR18 PR12_bit.no5\r
+#define PPR19 PR12_bit.no6\r
+#define CMPPR10 PR12_bit.no7\r
+#define PPR110 PR12_bit.no7\r
+#define CMPPR11 PR12H_bit.no0\r
+#define PPR111 PR12H_bit.no0\r
+#define TRDPR10 PR12H_bit.no1\r
+#define TRDPR11 PR12H_bit.no2\r
+#define TRGPR1 PR12H_bit.no3\r
+#define SREPR13 PR12H_bit.no4\r
+#define TMPR113H PR12H_bit.no4\r
+#define IICAPR11 PR12H_bit.no6\r
+#define FLPR1 PR12H_bit.no7\r
+#define SROIF IF0_bit.no0\r
+#define WDTIIF IF0_bit.no0\r
+#define LVIIF IF0_bit.no1\r
+#define PIF0 IF0_bit.no2\r
+#define PIF1 IF0_bit.no3\r
+#define PIF2 IF0_bit.no4\r
+#define PIF3 IF0_bit.no5\r
+#define PIF4 IF0_bit.no6\r
+#define PIF5 IF0_bit.no7\r
+#define CSIIF20 IF0H_bit.no0\r
+#define IICIF20 IF0H_bit.no0\r
+#define STIF2 IF0H_bit.no0\r
+#define CSIIF21 IF0H_bit.no1\r
+#define IICIF21 IF0H_bit.no1\r
+#define SRIF2 IF0H_bit.no1\r
+#define SREIF2 IF0H_bit.no2\r
+#define TMIF11H IF0H_bit.no2\r
+#define CSIIF00 IF0H_bit.no5\r
+#define IICIF00 IF0H_bit.no5\r
+#define STIF0 IF0H_bit.no5\r
+#define CSIIF01 IF0H_bit.no6\r
+#define IICIF01 IF0H_bit.no6\r
+#define SRIF0 IF0H_bit.no6\r
+#define SREIF0 IF0H_bit.no7\r
+#define TMIF01H IF0H_bit.no7\r
+#define CSIIF10 IF1_bit.no0\r
+#define IICIF10 IF1_bit.no0\r
+#define STIF1 IF1_bit.no0\r
+#define CSIIF11 IF1_bit.no1\r
+#define IICIF11 IF1_bit.no1\r
+#define SRIF1 IF1_bit.no1\r
+#define SREIF1 IF1_bit.no2\r
+#define TMIF03H IF1_bit.no2\r
+#define IICAIF0 IF1_bit.no3\r
+#define TMIF00 IF1_bit.no4\r
+#define TMIF01 IF1_bit.no5\r
+#define TMIF02 IF1_bit.no6\r
+#define TMIF03 IF1_bit.no7\r
+#define ADIF IF1H_bit.no0\r
+#define RTCIF IF1H_bit.no1\r
+#define ITIF IF1H_bit.no2\r
+#define KRIF IF1H_bit.no3\r
+#define CSIIF30 IF1H_bit.no4\r
+#define IICIF30 IF1H_bit.no4\r
+#define STIF3 IF1H_bit.no4\r
+#define CSIIF31 IF1H_bit.no5\r
+#define IICIF31 IF1H_bit.no5\r
+#define SRIF3 IF1H_bit.no5\r
+#define TRJIF0 IF1H_bit.no6\r
+#define TMIF10 IF1H_bit.no7\r
+#define SROMK MK0_bit.no0\r
+#define WDTIMK MK0_bit.no0\r
+#define LVIMK MK0_bit.no1\r
+#define PMK0 MK0_bit.no2\r
+#define PMK1 MK0_bit.no3\r
+#define PMK2 MK0_bit.no4\r
+#define PMK3 MK0_bit.no5\r
+#define PMK4 MK0_bit.no6\r
+#define PMK5 MK0_bit.no7\r
+#define CSIMK20 MK0H_bit.no0\r
+#define IICMK20 MK0H_bit.no0\r
+#define STMK2 MK0H_bit.no0\r
+#define CSIMK21 MK0H_bit.no1\r
+#define IICMK21 MK0H_bit.no1\r
+#define SRMK2 MK0H_bit.no1\r
+#define SREMK2 MK0H_bit.no2\r
+#define TMMK11H MK0H_bit.no2\r
+#define CSIMK00 MK0H_bit.no5\r
+#define IICMK00 MK0H_bit.no5\r
+#define STMK0 MK0H_bit.no5\r
+#define CSIMK01 MK0H_bit.no6\r
+#define IICMK01 MK0H_bit.no6\r
+#define SRMK0 MK0H_bit.no6\r
+#define SREMK0 MK0H_bit.no7\r
+#define TMMK01H MK0H_bit.no7\r
+#define CSIMK10 MK1_bit.no0\r
+#define IICMK10 MK1_bit.no0\r
+#define STMK1 MK1_bit.no0\r
+#define CSIMK11 MK1_bit.no1\r
+#define IICMK11 MK1_bit.no1\r
+#define SRMK1 MK1_bit.no1\r
+#define SREMK1 MK1_bit.no2\r
+#define TMMK03H MK1_bit.no2\r
+#define IICAMK0 MK1_bit.no3\r
+#define TMMK00 MK1_bit.no4\r
+#define TMMK01 MK1_bit.no5\r
+#define TMMK02 MK1_bit.no6\r
+#define TMMK03 MK1_bit.no7\r
+#define ADMK MK1H_bit.no0\r
+#define RTCMK MK1H_bit.no1\r
+#define ITMK MK1H_bit.no2\r
+#define KRMK MK1H_bit.no3\r
+#define CSIMK30 MK1H_bit.no4\r
+#define IICMK30 MK1H_bit.no4\r
+#define STMK3 MK1H_bit.no4\r
+#define CSIMK31 MK1H_bit.no5\r
+#define IICMK31 MK1H_bit.no5\r
+#define SRMK3 MK1H_bit.no5\r
+#define TRJMK0 MK1H_bit.no6\r
+#define TMMK10 MK1H_bit.no7\r
+#define SROPR0 PR00_bit.no0\r
+#define WDTIPR0 PR00_bit.no0\r
+#define LVIPR0 PR00_bit.no1\r
+#define PPR00 PR00_bit.no2\r
+#define PPR01 PR00_bit.no3\r
+#define PPR02 PR00_bit.no4\r
+#define PPR03 PR00_bit.no5\r
+#define PPR04 PR00_bit.no6\r
+#define PPR05 PR00_bit.no7\r
+#define CSIPR020 PR00H_bit.no0\r
+#define IICPR020 PR00H_bit.no0\r
+#define STPR02 PR00H_bit.no0\r
+#define CSIPR021 PR00H_bit.no1\r
+#define IICPR021 PR00H_bit.no1\r
+#define SRPR02 PR00H_bit.no1\r
+#define SREPR02 PR00H_bit.no2\r
+#define TMPR011H PR00H_bit.no2\r
+#define CSIPR000 PR00H_bit.no5\r
+#define IICPR000 PR00H_bit.no5\r
+#define STPR00 PR00H_bit.no5\r
+#define CSIPR001 PR00H_bit.no6\r
+#define IICPR001 PR00H_bit.no6\r
+#define SRPR00 PR00H_bit.no6\r
+#define SREPR00 PR00H_bit.no7\r
+#define TMPR001H PR00H_bit.no7\r
+#define CSIPR010 PR01_bit.no0\r
+#define IICPR010 PR01_bit.no0\r
+#define STPR01 PR01_bit.no0\r
+#define CSIPR011 PR01_bit.no1\r
+#define IICPR011 PR01_bit.no1\r
+#define SRPR01 PR01_bit.no1\r
+#define SREPR01 PR01_bit.no2\r
+#define TMPR003H PR01_bit.no2\r
+#define IICAPR00 PR01_bit.no3\r
+#define TMPR000 PR01_bit.no4\r
+#define TMPR001 PR01_bit.no5\r
+#define TMPR002 PR01_bit.no6\r
+#define TMPR003 PR01_bit.no7\r
+#define ADPR0 PR01H_bit.no0\r
+#define RTCPR0 PR01H_bit.no1\r
+#define ITPR0 PR01H_bit.no2\r
+#define KRPR0 PR01H_bit.no3\r
+#define CSIPR030 PR01H_bit.no4\r
+#define IICPR030 PR01H_bit.no4\r
+#define STPR03 PR01H_bit.no4\r
+#define CSIPR031 PR01H_bit.no5\r
+#define IICPR031 PR01H_bit.no5\r
+#define SRPR03 PR01H_bit.no5\r
+#define TRJPR00 PR01H_bit.no6\r
+#define TMPR010 PR01H_bit.no7\r
+#define SROPR1 PR10_bit.no0\r
+#define WDTIPR1 PR10_bit.no0\r
+#define LVIPR1 PR10_bit.no1\r
+#define PPR10 PR10_bit.no2\r
+#define PPR11 PR10_bit.no3\r
+#define PPR12 PR10_bit.no4\r
+#define PPR13 PR10_bit.no5\r
+#define PPR14 PR10_bit.no6\r
+#define PPR15 PR10_bit.no7\r
+#define CSIPR120 PR10H_bit.no0\r
+#define IICPR120 PR10H_bit.no0\r
+#define STPR12 PR10H_bit.no0\r
+#define CSIPR121 PR10H_bit.no1\r
+#define IICPR121 PR10H_bit.no1\r
+#define SRPR12 PR10H_bit.no1\r
+#define SREPR12 PR10H_bit.no2\r
+#define TMPR111H PR10H_bit.no2\r
+#define CSIPR100 PR10H_bit.no5\r
+#define IICPR100 PR10H_bit.no5\r
+#define STPR10 PR10H_bit.no5\r
+#define CSIPR101 PR10H_bit.no6\r
+#define IICPR101 PR10H_bit.no6\r
+#define SRPR10 PR10H_bit.no6\r
+#define SREPR10 PR10H_bit.no7\r
+#define TMPR101H PR10H_bit.no7\r
+#define CSIPR110 PR11_bit.no0\r
+#define IICPR110 PR11_bit.no0\r
+#define STPR11 PR11_bit.no0\r
+#define CSIPR111 PR11_bit.no1\r
+#define IICPR111 PR11_bit.no1\r
+#define SRPR11 PR11_bit.no1\r
+#define SREPR11 PR11_bit.no2\r
+#define TMPR103H PR11_bit.no2\r
+#define IICAPR10 PR11_bit.no3\r
+#define TMPR100 PR11_bit.no4\r
+#define TMPR101 PR11_bit.no5\r
+#define TMPR102 PR11_bit.no6\r
+#define TMPR103 PR11_bit.no7\r
+#define ADPR1 PR11H_bit.no0\r
+#define RTCPR1 PR11H_bit.no1\r
+#define ITPR1 PR11H_bit.no2\r
+#define KRPR1 PR11H_bit.no3\r
+#define CSIPR130 PR11H_bit.no4\r
+#define IICPR130 PR11H_bit.no4\r
+#define STPR13 PR11H_bit.no4\r
+#define CSIPR131 PR11H_bit.no5\r
+#define IICPR131 PR11H_bit.no5\r
+#define SRPR13 PR11H_bit.no5\r
+#define TRJPR10 PR11H_bit.no6\r
+#define TMPR110 PR11H_bit.no7\r
+#define MAA PMC_bit.no0\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#define RST_vect (0x0)\r
+#define INTDBG_vect (0x2)\r
+#define INTSRO_vect (0x4)\r
+#define INTWDTI_vect (0x4)\r
+#define INTLVI_vect (0x6)\r
+#define INTP0_vect (0x8)\r
+#define INTP1_vect (0xA)\r
+#define INTP2_vect (0xC)\r
+#define INTP3_vect (0xE)\r
+#define INTP4_vect (0x10)\r
+#define INTP5_vect (0x12)\r
+#define INTCSI20_vect (0x14)\r
+#define INTIIC20_vect (0x14)\r
+#define INTST2_vect (0x14)\r
+#define INTCSI21_vect (0x16)\r
+#define INTIIC21_vect (0x16)\r
+#define INTSR2_vect (0x16)\r
+#define INTSRE2_vect (0x18)\r
+#define INTTM11H_vect (0x18)\r
+#define INTCSI00_vect (0x1E)\r
+#define INTIIC00_vect (0x1E)\r
+#define INTST0_vect (0x1E)\r
+#define INTCSI01_vect (0x20)\r
+#define INTIIC01_vect (0x20)\r
+#define INTSR0_vect (0x20)\r
+#define INTSRE0_vect (0x22)\r
+#define INTTM01H_vect (0x22)\r
+#define INTCSI10_vect (0x24)\r
+#define INTIIC10_vect (0x24)\r
+#define INTST1_vect (0x24)\r
+#define INTCSI11_vect (0x26)\r
+#define INTIIC11_vect (0x26)\r
+#define INTSR1_vect (0x26)\r
+#define INTSRE1_vect (0x28)\r
+#define INTTM03H_vect (0x28)\r
+#define INTIICA0_vect (0x2A)\r
+#define INTTM00_vect (0x2C)\r
+#define INTTM01_vect (0x2E)\r
+#define INTTM02_vect (0x30)\r
+#define INTTM03_vect (0x32)\r
+#define INTAD_vect (0x34)\r
+#define INTRTC_vect (0x36)\r
+#define INTIT_vect (0x38)\r
+#define INTKR_vect (0x3A)\r
+#define INTCSI30_vect (0x3C)\r
+#define INTIIC30_vect (0x3C)\r
+#define INTST3_vect (0x3C)\r
+#define INTCSI31_vect (0x3E)\r
+#define INTIIC31_vect (0x3E)\r
+#define INTSR3_vect (0x3E)\r
+#define INTTRJ0_vect (0x40)\r
+#define INTTM10_vect (0x42)\r
+#define INTTM11_vect (0x44)\r
+#define INTTM12_vect (0x46)\r
+#define INTTM13_vect (0x48)\r
+#define INTP6_vect (0x4A)\r
+#define INTP7_vect (0x4C)\r
+#define INTP8_vect (0x4E)\r
+#define INTP9_vect (0x50)\r
+#define INTCMP0_vect (0x52)\r
+#define INTP10_vect (0x52)\r
+#define INTCMP1_vect (0x54)\r
+#define INTP11_vect (0x54)\r
+#define INTTRD0_vect (0x56)\r
+#define INTTRD1_vect (0x58)\r
+#define INTTRG_vect (0x5A)\r
+#define INTSRE3_vect (0x5C)\r
+#define INTTM13H_vect (0x5C)\r
+#define INTIICA1_vect (0x60)\r
+#define INTFL_vect (0x62)\r
+#define BRK_I_vect (0x7E)\r
+#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G14 */
+/* FILE : iodefine_ext.h */
+/* DESCRIPTION : Definition of Extended SFRs */
+/* CPU SERIES : RL78 - G14 */
+/* CPU TYPE : R5F104PJ */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F104PJ.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V2.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_EXT_H\r
+#define IODEFINE_EXT_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_adm2 {\r
+ unsigned char adm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu0 {\r
+ unsigned char pu0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu1 {\r
+ unsigned char pu1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu3 {\r
+ unsigned char pu3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu4 {\r
+ unsigned char pu4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu5 {\r
+ unsigned char pu5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu6 {\r
+ unsigned char pu6;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu7 {\r
+ unsigned char pu7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu8 {\r
+ unsigned char pu8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu10 {\r
+ unsigned char pu10;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu11 {\r
+ unsigned char pu11;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu12 {\r
+ unsigned char pu12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu14 {\r
+ unsigned char pu14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim0 {\r
+ unsigned char pim0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim1 {\r
+ unsigned char pim1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim3 {\r
+ unsigned char pim3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim4 {\r
+ unsigned char pim4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim5 {\r
+ unsigned char pim5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim8 {\r
+ unsigned char pim8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim14 {\r
+ unsigned char pim14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom0 {\r
+ unsigned char pom0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom1 {\r
+ unsigned char pom1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom3 {\r
+ unsigned char pom3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom4 {\r
+ unsigned char pom4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom5 {\r
+ unsigned char pom5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom7 {\r
+ unsigned char pom7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom8 {\r
+ unsigned char pom8;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom14 {\r
+ unsigned char pom14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc0 {\r
+ unsigned char pmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc1 {\r
+ unsigned char pmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc10 {\r
+ unsigned char pmc10;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc12 {\r
+ unsigned char pmc12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc14 {\r
+ unsigned char pmc14;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen0 {\r
+ unsigned char nfen0;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen1 {\r
+ unsigned char nfen1;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen2 {\r
+ unsigned char nfen2;\r
+ __BITS8 BIT;\r
+};\r
+union un_isc {\r
+ unsigned char isc;\r
+ __BITS8 BIT;\r
+};\r
+union un_per1 {\r
+ unsigned char per1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pms {\r
+ unsigned char pms;\r
+ __BITS8 BIT;\r
+};\r
+union un_gdidis {\r
+ unsigned char gdidis;\r
+ __BITS8 BIT;\r
+};\r
+union un_dflctl {\r
+ unsigned char dflctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_bectl {\r
+ unsigned char bectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsse {\r
+ unsigned char fsse;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfs {\r
+ unsigned char pfs;\r
+ __BITS8 BIT;\r
+};\r
+union un_per0 {\r
+ unsigned char per0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rmc {\r
+ unsigned char rmc;\r
+ __BITS8 BIT;\r
+};\r
+union un_rpectl {\r
+ unsigned char rpectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_se0l {\r
+ unsigned char se0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss0l {\r
+ unsigned char ss0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st0l {\r
+ unsigned char st0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe0l {\r
+ unsigned char soe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_se1l {\r
+ unsigned char se1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss1l {\r
+ unsigned char ss1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st1l {\r
+ unsigned char st1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe1l {\r
+ unsigned char soe1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_te0l {\r
+ unsigned char te0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ts0l {\r
+ unsigned char ts0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_tt0l {\r
+ unsigned char tt0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_toe0l {\r
+ unsigned char toe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_te1l {\r
+ unsigned char te1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ts1l {\r
+ unsigned char ts1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_tt1l {\r
+ unsigned char tt1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_toe1l {\r
+ unsigned char toe1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl00 {\r
+ unsigned char iicctl00;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl01 {\r
+ unsigned char iicctl01;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl10 {\r
+ unsigned char iicctl10;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl11 {\r
+ unsigned char iicctl11;\r
+ __BITS8 BIT;\r
+};\r
+union un_trjioc0 {\r
+ unsigned char trjioc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trjmr0 {\r
+ unsigned char trjmr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trjisr0 {\r
+ unsigned char trjisr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgmr {\r
+ unsigned char trgmr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgcntc {\r
+ unsigned char trgcntc;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgcr {\r
+ unsigned char trgcr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgier {\r
+ unsigned char trgier;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgsr {\r
+ unsigned char trgsr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trgior {\r
+ unsigned char trgior;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdelc {\r
+ unsigned char trdelc;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdmr {\r
+ unsigned char trdmr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdpmr {\r
+ unsigned char trdpmr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdfcr {\r
+ unsigned char trdfcr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdoer1 {\r
+ unsigned char trdoer1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdoer2 {\r
+ unsigned char trdoer2;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdocr {\r
+ unsigned char trdocr;\r
+ __BITS8 BIT;\r
+};\r
+union un_trddf0 {\r
+ unsigned char trddf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trddf1 {\r
+ unsigned char trddf1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdcr0 {\r
+ unsigned char trdcr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiora0 {\r
+ unsigned char trdiora0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiorc0 {\r
+ unsigned char trdiorc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdsr0 {\r
+ unsigned char trdsr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdier0 {\r
+ unsigned char trdier0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdpocr0 {\r
+ unsigned char trdpocr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdcr1 {\r
+ unsigned char trdcr1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiora1 {\r
+ unsigned char trdiora1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdiorc1 {\r
+ unsigned char trdiorc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdsr1 {\r
+ unsigned char trdsr1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdier1 {\r
+ unsigned char trdier1;\r
+ __BITS8 BIT;\r
+};\r
+union un_trdpocr1 {\r
+ unsigned char trdpocr1;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen0 {\r
+ unsigned char dtcen0;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen1 {\r
+ unsigned char dtcen1;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen2 {\r
+ unsigned char dtcen2;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen3 {\r
+ unsigned char dtcen3;\r
+ __BITS8 BIT;\r
+};\r
+union un_dtcen4 {\r
+ unsigned char dtcen4;\r
+ __BITS8 BIT;\r
+};\r
+union un_crc0ctl {\r
+ unsigned char crc0ctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr00 {\r
+ unsigned char elselr00;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr01 {\r
+ unsigned char elselr01;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr02 {\r
+ unsigned char elselr02;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr03 {\r
+ unsigned char elselr03;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr04 {\r
+ unsigned char elselr04;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr05 {\r
+ unsigned char elselr05;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr06 {\r
+ unsigned char elselr06;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr07 {\r
+ unsigned char elselr07;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr08 {\r
+ unsigned char elselr08;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr09 {\r
+ unsigned char elselr09;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr10 {\r
+ unsigned char elselr10;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr11 {\r
+ unsigned char elselr11;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr12 {\r
+ unsigned char elselr12;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr13 {\r
+ unsigned char elselr13;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr14 {\r
+ unsigned char elselr14;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr15 {\r
+ unsigned char elselr15;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr16 {\r
+ unsigned char elselr16;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr17 {\r
+ unsigned char elselr17;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr18 {\r
+ unsigned char elselr18;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr19 {\r
+ unsigned char elselr19;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr20 {\r
+ unsigned char elselr20;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr21 {\r
+ unsigned char elselr21;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr22 {\r
+ unsigned char elselr22;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr23 {\r
+ unsigned char elselr23;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr24 {\r
+ unsigned char elselr24;\r
+ __BITS8 BIT;\r
+};\r
+union un_elselr25 {\r
+ unsigned char elselr25;\r
+ __BITS8 BIT;\r
+};\r
+union un_compmdr {\r
+ unsigned char compmdr;\r
+ __BITS8 BIT;\r
+};\r
+union un_compfir {\r
+ unsigned char compfir;\r
+ __BITS8 BIT;\r
+};\r
+union un_compocr {\r
+ unsigned char compocr;\r
+ __BITS8 BIT;\r
+};\r
+union un_comptcr {\r
+ unsigned char comptcr;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
+#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
+#define ADUL (*(volatile unsigned char *)0xF0011)\r
+#define ADLL (*(volatile unsigned char *)0xF0012)\r
+#define ADTES (*(volatile unsigned char *)0xF0013)\r
+#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
+#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
+#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
+#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT\r
+#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3\r
+#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT\r
+#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4\r
+#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
+#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
+#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
+#define PU6 (*(volatile union un_pu6 *)0xF0036).pu6\r
+#define PU6_bit (*(volatile union un_pu6 *)0xF0036).BIT\r
+#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
+#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
+#define PU8 (*(volatile union un_pu8 *)0xF0038).pu8\r
+#define PU8_bit (*(volatile union un_pu8 *)0xF0038).BIT\r
+#define PU10 (*(volatile union un_pu10 *)0xF003A).pu10\r
+#define PU10_bit (*(volatile union un_pu10 *)0xF003A).BIT\r
+#define PU11 (*(volatile union un_pu11 *)0xF003B).pu11\r
+#define PU11_bit (*(volatile union un_pu11 *)0xF003B).BIT\r
+#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
+#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
+#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14\r
+#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT\r
+#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
+#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
+#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1\r
+#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT\r
+#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3\r
+#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT\r
+#define PIM4 (*(volatile union un_pim4 *)0xF0044).pim4\r
+#define PIM4_bit (*(volatile union un_pim4 *)0xF0044).BIT\r
+#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5\r
+#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT\r
+#define PIM8 (*(volatile union un_pim8 *)0xF0048).pim8\r
+#define PIM8_bit (*(volatile union un_pim8 *)0xF0048).BIT\r
+#define PIM14 (*(volatile union un_pim14 *)0xF004E).pim14\r
+#define PIM14_bit (*(volatile union un_pim14 *)0xF004E).BIT\r
+#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
+#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
+#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1\r
+#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT\r
+#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3\r
+#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT\r
+#define POM4 (*(volatile union un_pom4 *)0xF0054).pom4\r
+#define POM4_bit (*(volatile union un_pom4 *)0xF0054).BIT\r
+#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
+#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
+#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7\r
+#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT\r
+#define POM8 (*(volatile union un_pom8 *)0xF0058).pom8\r
+#define POM8_bit (*(volatile union un_pom8 *)0xF0058).BIT\r
+#define POM14 (*(volatile union un_pom14 *)0xF005E).pom14\r
+#define POM14_bit (*(volatile union un_pom14 *)0xF005E).BIT\r
+#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0\r
+#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT\r
+#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1\r
+#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT\r
+#define PMC10 (*(volatile union un_pmc10 *)0xF006A).pmc10\r
+#define PMC10_bit (*(volatile union un_pmc10 *)0xF006A).BIT\r
+#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12\r
+#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT\r
+#define PMC14 (*(volatile union un_pmc14 *)0xF006E).pmc14\r
+#define PMC14_bit (*(volatile union un_pmc14 *)0xF006E).BIT\r
+#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
+#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
+#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
+#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
+#define NFEN2 (*(volatile union un_nfen2 *)0xF0072).nfen2\r
+#define NFEN2_bit (*(volatile union un_nfen2 *)0xF0072).BIT\r
+#define ISC (*(volatile union un_isc *)0xF0073).isc\r
+#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
+#define TIS0 (*(volatile unsigned char *)0xF0074)\r
+#define ADPC (*(volatile unsigned char *)0xF0076)\r
+#define PIOR0 (*(volatile unsigned char *)0xF0077)\r
+#define IAWCTL (*(volatile unsigned char *)0xF0078)\r
+#define PIOR1 (*(volatile unsigned char *)0xF0079)\r
+#define PER1 (*(volatile union un_per1 *)0xF007A).per1\r
+#define PER1_bit (*(volatile union un_per1 *)0xF007A).BIT\r
+#define PMS (*(volatile union un_pms *)0xF007B).pms\r
+#define PMS_bit (*(volatile union un_pms *)0xF007B).BIT\r
+#define GDIDIS (*(volatile union un_gdidis *)0xF007D).gdidis\r
+#define GDIDIS_bit (*(volatile union un_gdidis *)0xF007D).BIT\r
+#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
+#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
+#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
+#define BPAH0 (*(volatile unsigned char *)0xF0082)\r
+#define BPAS0 (*(volatile unsigned char *)0xF0083)\r
+#define BACDVL0 (*(volatile unsigned char *)0xF0084)\r
+#define BACDVH0 (*(volatile unsigned char *)0xF0085)\r
+#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
+#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
+#define MONMOD (*(volatile unsigned char *)0xF0088)\r
+#define BPAL1 (*(volatile unsigned char *)0xF0089)\r
+#define BPAH1 (*(volatile unsigned char *)0xF008A)\r
+#define BPAS1 (*(volatile unsigned char *)0xF008B)\r
+#define BACDVL1 (*(volatile unsigned char *)0xF008C)\r
+#define BACDVH1 (*(volatile unsigned char *)0xF008D)\r
+#define BACDML1 (*(volatile unsigned char *)0xF008E)\r
+#define BACDMH1 (*(volatile unsigned char *)0xF008F)\r
+#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
+#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
+#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
+#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl\r
+#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT\r
+#define HOCODIV (*(volatile unsigned char *)0xF00A8)\r
+#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)\r
+#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)\r
+#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)\r
+#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)\r
+#define FLSEC (*(volatile unsigned short *)0xF00B0)\r
+#define FLFSWS (*(volatile unsigned short *)0xF00B2)\r
+#define FLFSWE (*(volatile unsigned short *)0xF00B4)\r
+#define FSSET (*(volatile unsigned char *)0xF00B6)\r
+#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse\r
+#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT\r
+#define FLFADL (*(volatile unsigned short *)0xF00B8)\r
+#define FLFADH (*(volatile unsigned char *)0xF00BA)\r
+#define PFCMD (*(volatile unsigned char *)0xF00C0)\r
+#define PFS (*(volatile union un_pfs *)0xF00C1).pfs\r
+#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT\r
+#define FLRL (*(volatile unsigned short *)0xF00C2)\r
+#define FLRH (*(volatile unsigned short *)0xF00C4)\r
+#define FLWE (*(volatile unsigned char *)0xF00C6)\r
+#define FLRE (*(volatile unsigned char *)0xF00C7)\r
+#define FLTMS (*(volatile unsigned short *)0xF00C8)\r
+#define DFLMC (*(volatile unsigned short *)0xF00CA)\r
+#define FLMCL (*(volatile unsigned short *)0xF00CC)\r
+#define FLMCH (*(volatile unsigned char *)0xF00CE)\r
+#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
+#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
+#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
+#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
+#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
+#define OSMC (*(volatile unsigned char *)0xF00F3)\r
+#define RMC (*(volatile union un_rmc *)0xF00F4).rmc\r
+#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT\r
+#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl\r
+#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT\r
+#define BCDADJ (*(volatile unsigned char *)0xF00FE)\r
+#define VECTCTRL (*(volatile unsigned char *)0xF00FF)\r
+#define SSR00 (*(volatile unsigned short *)0xF0100)\r
+#define SSR00L (*(volatile unsigned char *)0xF0100)\r
+#define SSR01 (*(volatile unsigned short *)0xF0102)\r
+#define SSR01L (*(volatile unsigned char *)0xF0102)\r
+#define SSR02 (*(volatile unsigned short *)0xF0104)\r
+#define SSR02L (*(volatile unsigned char *)0xF0104)\r
+#define SSR03 (*(volatile unsigned short *)0xF0106)\r
+#define SSR03L (*(volatile unsigned char *)0xF0106)\r
+#define SIR00 (*(volatile unsigned short *)0xF0108)\r
+#define SIR00L (*(volatile unsigned char *)0xF0108)\r
+#define SIR01 (*(volatile unsigned short *)0xF010A)\r
+#define SIR01L (*(volatile unsigned char *)0xF010A)\r
+#define SIR02 (*(volatile unsigned short *)0xF010C)\r
+#define SIR02L (*(volatile unsigned char *)0xF010C)\r
+#define SIR03 (*(volatile unsigned short *)0xF010E)\r
+#define SIR03L (*(volatile unsigned char *)0xF010E)\r
+#define SMR00 (*(volatile unsigned short *)0xF0110)\r
+#define SMR01 (*(volatile unsigned short *)0xF0112)\r
+#define SMR02 (*(volatile unsigned short *)0xF0114)\r
+#define SMR03 (*(volatile unsigned short *)0xF0116)\r
+#define SCR00 (*(volatile unsigned short *)0xF0118)\r
+#define SCR01 (*(volatile unsigned short *)0xF011A)\r
+#define SCR02 (*(volatile unsigned short *)0xF011C)\r
+#define SCR03 (*(volatile unsigned short *)0xF011E)\r
+#define SE0 (*(volatile unsigned short *)0xF0120)\r
+#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
+#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
+#define SS0 (*(volatile unsigned short *)0xF0122)\r
+#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l\r
+#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT\r
+#define ST0 (*(volatile unsigned short *)0xF0124)\r
+#define ST0L (*(volatile union un_st0l *)0xF0124).st0l\r
+#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT\r
+#define SPS0 (*(volatile unsigned short *)0xF0126)\r
+#define SPS0L (*(volatile unsigned char *)0xF0126)\r
+#define SO0 (*(volatile unsigned short *)0xF0128)\r
+#define SOE0 (*(volatile unsigned short *)0xF012A)\r
+#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l\r
+#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT\r
+#define EDR00 (*(volatile unsigned short *)0xF012C)\r
+#define EDR00L (*(volatile unsigned char *)0xF012C)\r
+#define EDR01 (*(volatile unsigned short *)0xF012E)\r
+#define EDR01L (*(volatile unsigned char *)0xF012E)\r
+#define EDR02 (*(volatile unsigned short *)0xF0130)\r
+#define EDR02L (*(volatile unsigned char *)0xF0130)\r
+#define EDR03 (*(volatile unsigned short *)0xF0132)\r
+#define EDR03L (*(volatile unsigned char *)0xF0132)\r
+#define SOL0 (*(volatile unsigned short *)0xF0134)\r
+#define SOL0L (*(volatile unsigned char *)0xF0134)\r
+#define SSC0 (*(volatile unsigned short *)0xF0138)\r
+#define SSC0L (*(volatile unsigned char *)0xF0138)\r
+#define SSR10 (*(volatile unsigned short *)0xF0140)\r
+#define SSR10L (*(volatile unsigned char *)0xF0140)\r
+#define SSR11 (*(volatile unsigned short *)0xF0142)\r
+#define SSR11L (*(volatile unsigned char *)0xF0142)\r
+#define SSR12 (*(volatile unsigned short *)0xF0144)\r
+#define SSR12L (*(volatile unsigned char *)0xF0144)\r
+#define SSR13 (*(volatile unsigned short *)0xF0146)\r
+#define SSR13L (*(volatile unsigned char *)0xF0146)\r
+#define SIR10 (*(volatile unsigned short *)0xF0148)\r
+#define SIR10L (*(volatile unsigned char *)0xF0148)\r
+#define SIR11 (*(volatile unsigned short *)0xF014A)\r
+#define SIR11L (*(volatile unsigned char *)0xF014A)\r
+#define SIR12 (*(volatile unsigned short *)0xF014C)\r
+#define SIR12L (*(volatile unsigned char *)0xF014C)\r
+#define SIR13 (*(volatile unsigned short *)0xF014E)\r
+#define SIR13L (*(volatile unsigned char *)0xF014E)\r
+#define SMR10 (*(volatile unsigned short *)0xF0150)\r
+#define SMR11 (*(volatile unsigned short *)0xF0152)\r
+#define SMR12 (*(volatile unsigned short *)0xF0154)\r
+#define SMR13 (*(volatile unsigned short *)0xF0156)\r
+#define SCR10 (*(volatile unsigned short *)0xF0158)\r
+#define SCR11 (*(volatile unsigned short *)0xF015A)\r
+#define SCR12 (*(volatile unsigned short *)0xF015C)\r
+#define SCR13 (*(volatile unsigned short *)0xF015E)\r
+#define SE1 (*(volatile unsigned short *)0xF0160)\r
+#define SE1L (*(volatile union un_se1l *)0xF0160).se1l\r
+#define SE1L_bit (*(volatile union un_se1l *)0xF0160).BIT\r
+#define SS1 (*(volatile unsigned short *)0xF0162)\r
+#define SS1L (*(volatile union un_ss1l *)0xF0162).ss1l\r
+#define SS1L_bit (*(volatile union un_ss1l *)0xF0162).BIT\r
+#define ST1 (*(volatile unsigned short *)0xF0164)\r
+#define ST1L (*(volatile union un_st1l *)0xF0164).st1l\r
+#define ST1L_bit (*(volatile union un_st1l *)0xF0164).BIT\r
+#define SPS1 (*(volatile unsigned short *)0xF0166)\r
+#define SPS1L (*(volatile unsigned char *)0xF0166)\r
+#define SO1 (*(volatile unsigned short *)0xF0168)\r
+#define SOE1 (*(volatile unsigned short *)0xF016A)\r
+#define SOE1L (*(volatile union un_soe1l *)0xF016A).soe1l\r
+#define SOE1L_bit (*(volatile union un_soe1l *)0xF016A).BIT\r
+#define EDR10 (*(volatile unsigned short *)0xF016C)\r
+#define EDR10L (*(volatile unsigned char *)0xF016C)\r
+#define EDR11 (*(volatile unsigned short *)0xF016E)\r
+#define EDR11L (*(volatile unsigned char *)0xF016E)\r
+#define EDR12 (*(volatile unsigned short *)0xF0170)\r
+#define EDR12L (*(volatile unsigned char *)0xF0170)\r
+#define EDR13 (*(volatile unsigned short *)0xF0172)\r
+#define EDR13L (*(volatile unsigned char *)0xF0172)\r
+#define SOL1 (*(volatile unsigned short *)0xF0174)\r
+#define SOL1L (*(volatile unsigned char *)0xF0174)\r
+#define SSC1 (*(volatile unsigned short *)0xF0178)\r
+#define SSC1L (*(volatile unsigned char *)0xF0178)\r
+#define TCR00 (*(volatile unsigned short *)0xF0180)\r
+#define TCR01 (*(volatile unsigned short *)0xF0182)\r
+#define TCR02 (*(volatile unsigned short *)0xF0184)\r
+#define TCR03 (*(volatile unsigned short *)0xF0186)\r
+#define TMR00 (*(volatile unsigned short *)0xF0190)\r
+#define TMR01 (*(volatile unsigned short *)0xF0192)\r
+#define TMR02 (*(volatile unsigned short *)0xF0194)\r
+#define TMR03 (*(volatile unsigned short *)0xF0196)\r
+#define TSR00 (*(volatile unsigned short *)0xF01A0)\r
+#define TSR00L (*(volatile unsigned char *)0xF01A0)\r
+#define TSR01 (*(volatile unsigned short *)0xF01A2)\r
+#define TSR01L (*(volatile unsigned char *)0xF01A2)\r
+#define TSR02 (*(volatile unsigned short *)0xF01A4)\r
+#define TSR02L (*(volatile unsigned char *)0xF01A4)\r
+#define TSR03 (*(volatile unsigned short *)0xF01A6)\r
+#define TSR03L (*(volatile unsigned char *)0xF01A6)\r
+#define TE0 (*(volatile unsigned short *)0xF01B0)\r
+#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l\r
+#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT\r
+#define TS0 (*(volatile unsigned short *)0xF01B2)\r
+#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l\r
+#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT\r
+#define TT0 (*(volatile unsigned short *)0xF01B4)\r
+#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l\r
+#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT\r
+#define TPS0 (*(volatile unsigned short *)0xF01B6)\r
+#define TO0 (*(volatile unsigned short *)0xF01B8)\r
+#define TO0L (*(volatile unsigned char *)0xF01B8)\r
+#define TOE0 (*(volatile unsigned short *)0xF01BA)\r
+#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l\r
+#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT\r
+#define TOL0 (*(volatile unsigned short *)0xF01BC)\r
+#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
+#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
+#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
+#define TCR10 (*(volatile unsigned short *)0xF01C0)\r
+#define TCR11 (*(volatile unsigned short *)0xF01C2)\r
+#define TCR12 (*(volatile unsigned short *)0xF01C4)\r
+#define TCR13 (*(volatile unsigned short *)0xF01C6)\r
+#define TMR10 (*(volatile unsigned short *)0xF01D0)\r
+#define TMR11 (*(volatile unsigned short *)0xF01D2)\r
+#define TMR12 (*(volatile unsigned short *)0xF01D4)\r
+#define TMR13 (*(volatile unsigned short *)0xF01D6)\r
+#define TSR10 (*(volatile unsigned short *)0xF01E0)\r
+#define TSR10L (*(volatile unsigned char *)0xF01E0)\r
+#define TSR11 (*(volatile unsigned short *)0xF01E2)\r
+#define TSR11L (*(volatile unsigned char *)0xF01E2)\r
+#define TSR12 (*(volatile unsigned short *)0xF01E4)\r
+#define TSR12L (*(volatile unsigned char *)0xF01E4)\r
+#define TSR13 (*(volatile unsigned short *)0xF01E6)\r
+#define TSR13L (*(volatile unsigned char *)0xF01E6)\r
+#define TE1 (*(volatile unsigned short *)0xF01F0)\r
+#define TE1L (*(volatile union un_te1l *)0xF01F0).te1l\r
+#define TE1L_bit (*(volatile union un_te1l *)0xF01F0).BIT\r
+#define TS1 (*(volatile unsigned short *)0xF01F2)\r
+#define TS1L (*(volatile union un_ts1l *)0xF01F2).ts1l\r
+#define TS1L_bit (*(volatile union un_ts1l *)0xF01F2).BIT\r
+#define TT1 (*(volatile unsigned short *)0xF01F4)\r
+#define TT1L (*(volatile union un_tt1l *)0xF01F4).tt1l\r
+#define TT1L_bit (*(volatile union un_tt1l *)0xF01F4).BIT\r
+#define TPS1 (*(volatile unsigned short *)0xF01F6)\r
+#define TO1 (*(volatile unsigned short *)0xF01F8)\r
+#define TO1L (*(volatile unsigned char *)0xF01F8)\r
+#define TOE1 (*(volatile unsigned short *)0xF01FA)\r
+#define TOE1L (*(volatile union un_toe1l *)0xF01FA).toe1l\r
+#define TOE1L_bit (*(volatile union un_toe1l *)0xF01FA).BIT\r
+#define TOL1 (*(volatile unsigned short *)0xF01FC)\r
+#define TOL1L (*(volatile unsigned char *)0xF01FC)\r
+#define TOM1 (*(volatile unsigned short *)0xF01FE)\r
+#define TOM1L (*(volatile unsigned char *)0xF01FE)\r
+#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
+#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
+#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
+#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT\r
+#define IICWL0 (*(volatile unsigned char *)0xF0232)\r
+#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
+#define SVA0 (*(volatile unsigned char *)0xF0234)\r
+#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
+#define IICCTL10 (*(volatile union un_iicctl10 *)0xF0238).iicctl10\r
+#define IICCTL10_bit (*(volatile union un_iicctl10 *)0xF0238).BIT\r
+#define IICCTL11 (*(volatile union un_iicctl11 *)0xF0239).iicctl11\r
+#define IICCTL11_bit (*(volatile union un_iicctl11 *)0xF0239).BIT\r
+#define IICWL1 (*(volatile unsigned char *)0xF023A)\r
+#define IICWH1 (*(volatile unsigned char *)0xF023B)\r
+#define SVA1 (*(volatile unsigned char *)0xF023C)\r
+#define IICSE1 (*(volatile unsigned char *)0xF023D)\r
+#define TRJCR0 (*(volatile unsigned char *)0xF0240)\r
+#define TRJIOC0 (*(volatile union un_trjioc0 *)0xF0241).trjioc0\r
+#define TRJIOC0_bit (*(volatile union un_trjioc0 *)0xF0241).BIT\r
+#define TRJMR0 (*(volatile union un_trjmr0 *)0xF0242).trjmr0\r
+#define TRJMR0_bit (*(volatile union un_trjmr0 *)0xF0242).BIT\r
+#define TRJISR0 (*(volatile union un_trjisr0 *)0xF0243).trjisr0\r
+#define TRJISR0_bit (*(volatile union un_trjisr0 *)0xF0243).BIT\r
+#define TRGMR (*(volatile union un_trgmr *)0xF0250).trgmr\r
+#define TRGMR_bit (*(volatile union un_trgmr *)0xF0250).BIT\r
+#define TRGCNTC (*(volatile union un_trgcntc *)0xF0251).trgcntc\r
+#define TRGCNTC_bit (*(volatile union un_trgcntc *)0xF0251).BIT\r
+#define TRGCR (*(volatile union un_trgcr *)0xF0252).trgcr\r
+#define TRGCR_bit (*(volatile union un_trgcr *)0xF0252).BIT\r
+#define TRGIER (*(volatile union un_trgier *)0xF0253).trgier\r
+#define TRGIER_bit (*(volatile union un_trgier *)0xF0253).BIT\r
+#define TRGSR (*(volatile union un_trgsr *)0xF0254).trgsr\r
+#define TRGSR_bit (*(volatile union un_trgsr *)0xF0254).BIT\r
+#define TRGIOR (*(volatile union un_trgior *)0xF0255).trgior\r
+#define TRGIOR_bit (*(volatile union un_trgior *)0xF0255).BIT\r
+#define TRG (*(volatile unsigned short *)0xF0256)\r
+#define TRGGRA (*(volatile unsigned short *)0xF0258)\r
+#define TRGGRB (*(volatile unsigned short *)0xF025A)\r
+#define TRGGRCM (*(volatile unsigned short *)0xF025C)\r
+#define TRGGRDM (*(volatile unsigned short *)0xF025E)\r
+#define TRDELC (*(volatile union un_trdelc *)0xF0260).trdelc\r
+#define TRDELC_bit (*(volatile union un_trdelc *)0xF0260).BIT\r
+#define TRDSTR (*(volatile unsigned char *)0xF0263)\r
+#define TRDMR (*(volatile union un_trdmr *)0xF0264).trdmr\r
+#define TRDMR_bit (*(volatile union un_trdmr *)0xF0264).BIT\r
+#define TRDPMR (*(volatile union un_trdpmr *)0xF0265).trdpmr\r
+#define TRDPMR_bit (*(volatile union un_trdpmr *)0xF0265).BIT\r
+#define TRDFCR (*(volatile union un_trdfcr *)0xF0266).trdfcr\r
+#define TRDFCR_bit (*(volatile union un_trdfcr *)0xF0266).BIT\r
+#define TRDOER1 (*(volatile union un_trdoer1 *)0xF0267).trdoer1\r
+#define TRDOER1_bit (*(volatile union un_trdoer1 *)0xF0267).BIT\r
+#define TRDOER2 (*(volatile union un_trdoer2 *)0xF0268).trdoer2\r
+#define TRDOER2_bit (*(volatile union un_trdoer2 *)0xF0268).BIT\r
+#define TRDOCR (*(volatile union un_trdocr *)0xF0269).trdocr\r
+#define TRDOCR_bit (*(volatile union un_trdocr *)0xF0269).BIT\r
+#define TRDDF0 (*(volatile union un_trddf0 *)0xF026A).trddf0\r
+#define TRDDF0_bit (*(volatile union un_trddf0 *)0xF026A).BIT\r
+#define TRDDF1 (*(volatile union un_trddf1 *)0xF026B).trddf1\r
+#define TRDDF1_bit (*(volatile union un_trddf1 *)0xF026B).BIT\r
+#define TRDCR0 (*(volatile union un_trdcr0 *)0xF0270).trdcr0\r
+#define TRDCR0_bit (*(volatile union un_trdcr0 *)0xF0270).BIT\r
+#define TRDIORA0 (*(volatile union un_trdiora0 *)0xF0271).trdiora0\r
+#define TRDIORA0_bit (*(volatile union un_trdiora0 *)0xF0271).BIT\r
+#define TRDIORC0 (*(volatile union un_trdiorc0 *)0xF0272).trdiorc0\r
+#define TRDIORC0_bit (*(volatile union un_trdiorc0 *)0xF0272).BIT\r
+#define TRDSR0 (*(volatile union un_trdsr0 *)0xF0273).trdsr0\r
+#define TRDSR0_bit (*(volatile union un_trdsr0 *)0xF0273).BIT\r
+#define TRDIER0 (*(volatile union un_trdier0 *)0xF0274).trdier0\r
+#define TRDIER0_bit (*(volatile union un_trdier0 *)0xF0274).BIT\r
+#define TRDPOCR0 (*(volatile union un_trdpocr0 *)0xF0275).trdpocr0\r
+#define TRDPOCR0_bit (*(volatile union un_trdpocr0 *)0xF0275).BIT\r
+#define TRD0 (*(volatile unsigned short *)0xF0276)\r
+#define TRDGRA0 (*(volatile unsigned short *)0xF0278)\r
+#define TRDGRB0 (*(volatile unsigned short *)0xF027A)\r
+#define TRDGRC0M (*(volatile unsigned short *)0xF027C)\r
+#define TRDGRD0M (*(volatile unsigned short *)0xF027E)\r
+#define TRDCR1 (*(volatile union un_trdcr1 *)0xF0280).trdcr1\r
+#define TRDCR1_bit (*(volatile union un_trdcr1 *)0xF0280).BIT\r
+#define TRDIORA1 (*(volatile union un_trdiora1 *)0xF0281).trdiora1\r
+#define TRDIORA1_bit (*(volatile union un_trdiora1 *)0xF0281).BIT\r
+#define TRDIORC1 (*(volatile union un_trdiorc1 *)0xF0282).trdiorc1\r
+#define TRDIORC1_bit (*(volatile union un_trdiorc1 *)0xF0282).BIT\r
+#define TRDSR1 (*(volatile union un_trdsr1 *)0xF0283).trdsr1\r
+#define TRDSR1_bit (*(volatile union un_trdsr1 *)0xF0283).BIT\r
+#define TRDIER1 (*(volatile union un_trdier1 *)0xF0284).trdier1\r
+#define TRDIER1_bit (*(volatile union un_trdier1 *)0xF0284).BIT\r
+#define TRDPOCR1 (*(volatile union un_trdpocr1 *)0xF0285).trdpocr1\r
+#define TRDPOCR1_bit (*(volatile union un_trdpocr1 *)0xF0285).BIT\r
+#define TRD1 (*(volatile unsigned short *)0xF0286)\r
+#define TRDGRA1 (*(volatile unsigned short *)0xF0288)\r
+#define TRDGRB1 (*(volatile unsigned short *)0xF028A)\r
+#define TRDGRC1M (*(volatile unsigned short *)0xF028C)\r
+#define TRDGRD1M (*(volatile unsigned short *)0xF028E)\r
+#define DTCBAR (*(volatile unsigned char *)0xF02E0)\r
+#define DTCEN0 (*(volatile union un_dtcen0 *)0xF02E8).dtcen0\r
+#define DTCEN0_bit (*(volatile union un_dtcen0 *)0xF02E8).BIT\r
+#define DTCEN1 (*(volatile union un_dtcen1 *)0xF02E9).dtcen1\r
+#define DTCEN1_bit (*(volatile union un_dtcen1 *)0xF02E9).BIT\r
+#define DTCEN2 (*(volatile union un_dtcen2 *)0xF02EA).dtcen2\r
+#define DTCEN2_bit (*(volatile union un_dtcen2 *)0xF02EA).BIT\r
+#define DTCEN3 (*(volatile union un_dtcen3 *)0xF02EB).dtcen3\r
+#define DTCEN3_bit (*(volatile union un_dtcen3 *)0xF02EB).BIT\r
+#define DTCEN4 (*(volatile union un_dtcen4 *)0xF02EC).dtcen4\r
+#define DTCEN4_bit (*(volatile union un_dtcen4 *)0xF02EC).BIT\r
+#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
+#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
+#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
+#define CRCD (*(volatile unsigned short *)0xF02FA)\r
+#define ELSELR00 (*(volatile union un_elselr00 *)0xF0300).elselr00\r
+#define ELSELR00_bit (*(volatile union un_elselr00 *)0xF0300).BIT\r
+#define ELSELR01 (*(volatile union un_elselr01 *)0xF0301).elselr01\r
+#define ELSELR01_bit (*(volatile union un_elselr01 *)0xF0301).BIT\r
+#define ELSELR02 (*(volatile union un_elselr02 *)0xF0302).elselr02\r
+#define ELSELR02_bit (*(volatile union un_elselr02 *)0xF0302).BIT\r
+#define ELSELR03 (*(volatile union un_elselr03 *)0xF0303).elselr03\r
+#define ELSELR03_bit (*(volatile union un_elselr03 *)0xF0303).BIT\r
+#define ELSELR04 (*(volatile union un_elselr04 *)0xF0304).elselr04\r
+#define ELSELR04_bit (*(volatile union un_elselr04 *)0xF0304).BIT\r
+#define ELSELR05 (*(volatile union un_elselr05 *)0xF0305).elselr05\r
+#define ELSELR05_bit (*(volatile union un_elselr05 *)0xF0305).BIT\r
+#define ELSELR06 (*(volatile union un_elselr06 *)0xF0306).elselr06\r
+#define ELSELR06_bit (*(volatile union un_elselr06 *)0xF0306).BIT\r
+#define ELSELR07 (*(volatile union un_elselr07 *)0xF0307).elselr07\r
+#define ELSELR07_bit (*(volatile union un_elselr07 *)0xF0307).BIT\r
+#define ELSELR08 (*(volatile union un_elselr08 *)0xF0308).elselr08\r
+#define ELSELR08_bit (*(volatile union un_elselr08 *)0xF0308).BIT\r
+#define ELSELR09 (*(volatile union un_elselr09 *)0xF0309).elselr09\r
+#define ELSELR09_bit (*(volatile union un_elselr09 *)0xF0309).BIT\r
+#define ELSELR10 (*(volatile union un_elselr10 *)0xF030A).elselr10\r
+#define ELSELR10_bit (*(volatile union un_elselr10 *)0xF030A).BIT\r
+#define ELSELR11 (*(volatile union un_elselr11 *)0xF030B).elselr11\r
+#define ELSELR11_bit (*(volatile union un_elselr11 *)0xF030B).BIT\r
+#define ELSELR12 (*(volatile union un_elselr12 *)0xF030C).elselr12\r
+#define ELSELR12_bit (*(volatile union un_elselr12 *)0xF030C).BIT\r
+#define ELSELR13 (*(volatile union un_elselr13 *)0xF030D).elselr13\r
+#define ELSELR13_bit (*(volatile union un_elselr13 *)0xF030D).BIT\r
+#define ELSELR14 (*(volatile union un_elselr14 *)0xF030E).elselr14\r
+#define ELSELR14_bit (*(volatile union un_elselr14 *)0xF030E).BIT\r
+#define ELSELR15 (*(volatile union un_elselr15 *)0xF030F).elselr15\r
+#define ELSELR15_bit (*(volatile union un_elselr15 *)0xF030F).BIT\r
+#define ELSELR16 (*(volatile union un_elselr16 *)0xF0310).elselr16\r
+#define ELSELR16_bit (*(volatile union un_elselr16 *)0xF0310).BIT\r
+#define ELSELR17 (*(volatile union un_elselr17 *)0xF0311).elselr17\r
+#define ELSELR17_bit (*(volatile union un_elselr17 *)0xF0311).BIT\r
+#define ELSELR18 (*(volatile union un_elselr18 *)0xF0312).elselr18\r
+#define ELSELR18_bit (*(volatile union un_elselr18 *)0xF0312).BIT\r
+#define ELSELR19 (*(volatile union un_elselr19 *)0xF0313).elselr19\r
+#define ELSELR19_bit (*(volatile union un_elselr19 *)0xF0313).BIT\r
+#define ELSELR20 (*(volatile union un_elselr20 *)0xF0314).elselr20\r
+#define ELSELR20_bit (*(volatile union un_elselr20 *)0xF0314).BIT\r
+#define ELSELR21 (*(volatile union un_elselr21 *)0xF0315).elselr21\r
+#define ELSELR21_bit (*(volatile union un_elselr21 *)0xF0315).BIT\r
+#define ELSELR22 (*(volatile union un_elselr22 *)0xF0316).elselr22\r
+#define ELSELR22_bit (*(volatile union un_elselr22 *)0xF0316).BIT\r
+#define ELSELR23 (*(volatile union un_elselr23 *)0xF0317).elselr23\r
+#define ELSELR23_bit (*(volatile union un_elselr23 *)0xF0317).BIT\r
+#define ELSELR24 (*(volatile union un_elselr24 *)0xF0318).elselr24\r
+#define ELSELR24_bit (*(volatile union un_elselr24 *)0xF0318).BIT\r
+#define ELSELR25 (*(volatile union un_elselr25 *)0xF0319).elselr25\r
+#define ELSELR25_bit (*(volatile union un_elselr25 *)0xF0319).BIT\r
+#define COMPMDR (*(volatile union un_compmdr *)0xF0340).compmdr\r
+#define COMPMDR_bit (*(volatile union un_compmdr *)0xF0340).BIT\r
+#define COMPFIR (*(volatile union un_compfir *)0xF0341).compfir\r
+#define COMPFIR_bit (*(volatile union un_compfir *)0xF0341).BIT\r
+#define COMPOCR (*(volatile union un_compocr *)0xF0342).compocr\r
+#define COMPOCR_bit (*(volatile union un_compocr *)0xF0342).BIT\r
+#define COMPTCR (*(volatile union un_comptcr *)0xF0343).comptcr\r
+#define COMPTCR_bit (*(volatile union un_comptcr *)0xF0343).BIT\r
+#define TRJ0 (*(volatile unsigned short *)0xF0500)\r
+#define MONMOD1 (*(volatile unsigned char *)0xF0720)\r
+#define TRCMA (*(volatile unsigned char *)0xF0721)\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADTYP ADM2_bit.no0\r
+#define AWC ADM2_bit.no2\r
+#define ADRCK ADM2_bit.no3\r
+#define SSIE00 ISC_bit.no7\r
+#define TRJ0EN PER1_bit.no0\r
+#define DTCEN PER1_bit.no3\r
+#define TRD0EN PER1_bit.no4\r
+#define CMPEN PER1_bit.no5\r
+#define TRGEN PER1_bit.no6\r
+#define DACEN PER1_bit.no7\r
+#define DFLEN DFLCTL_bit.no0\r
+#define BRSAM BECTL_bit.no0\r
+#define ESQST FSSE_bit.no7\r
+#define TAU0EN PER0_bit.no0\r
+#define TAU1EN PER0_bit.no1\r
+#define SAU0EN PER0_bit.no2\r
+#define SAU1EN PER0_bit.no3\r
+#define IICA0EN PER0_bit.no4\r
+#define ADCEN PER0_bit.no5\r
+#define IICA1EN PER0_bit.no6\r
+#define RTCEN PER0_bit.no7\r
+#define PAENB RMC_bit.no0\r
+#define WDVOL RMC_bit.no7\r
+#define RPEF RPECTL_bit.no0\r
+#define RPERDIS RPECTL_bit.no7\r
+#define SPT0 IICCTL00_bit.no0\r
+#define STT0 IICCTL00_bit.no1\r
+#define ACKE0 IICCTL00_bit.no2\r
+#define WTIM0 IICCTL00_bit.no3\r
+#define SPIE0 IICCTL00_bit.no4\r
+#define WREL0 IICCTL00_bit.no5\r
+#define LREL0 IICCTL00_bit.no6\r
+#define IICE0 IICCTL00_bit.no7\r
+#define PRS0 IICCTL01_bit.no0\r
+#define DFC0 IICCTL01_bit.no2\r
+#define SMC0 IICCTL01_bit.no3\r
+#define DAD0 IICCTL01_bit.no4\r
+#define CLD0 IICCTL01_bit.no5\r
+#define WUP0 IICCTL01_bit.no7\r
+#define SPT1 IICCTL10_bit.no0\r
+#define STT1 IICCTL10_bit.no1\r
+#define ACKE1 IICCTL10_bit.no2\r
+#define WTIM1 IICCTL10_bit.no3\r
+#define SPIE1 IICCTL10_bit.no4\r
+#define WREL1 IICCTL10_bit.no5\r
+#define LREL1 IICCTL10_bit.no6\r
+#define IICE1 IICCTL10_bit.no7\r
+#define PRS1 IICCTL11_bit.no0\r
+#define DFC1 IICCTL11_bit.no2\r
+#define SMC1 IICCTL11_bit.no3\r
+#define DAD1 IICCTL11_bit.no4\r
+#define CLD1 IICCTL11_bit.no5\r
+#define WUP1 IICCTL11_bit.no7\r
+#define TRGPWM TRGMR_bit.no0\r
+#define TRGMDF TRGMR_bit.no1\r
+#define TRGDFA TRGMR_bit.no2\r
+#define TRGDFB TRGMR_bit.no3\r
+#define TRGDFCK0 TRGMR_bit.no4\r
+#define TRGDFCK1 TRGMR_bit.no5\r
+#define TRGELCICE TRGMR_bit.no6\r
+#define TRGSTART TRGMR_bit.no7\r
+#define TRGTCK0 TRGCR_bit.no0\r
+#define TRGTCK1 TRGCR_bit.no1\r
+#define TRGTCK2 TRGCR_bit.no2\r
+#define TRGCKEG0 TRGCR_bit.no3\r
+#define TRGCKEG1 TRGCR_bit.no4\r
+#define TRGCCLR0 TRGCR_bit.no5\r
+#define TRGCCLR1 TRGCR_bit.no6\r
+#define TRGIMIEA TRGIER_bit.no0\r
+#define TRGIMIEB TRGIER_bit.no1\r
+#define TRGUDIE TRGIER_bit.no2\r
+#define TRGOVIE TRGIER_bit.no3\r
+#define TRGIMFA TRGSR_bit.no0\r
+#define TRGIMFB TRGSR_bit.no1\r
+#define TRGUDF TRGSR_bit.no2\r
+#define TRGOVF TRGSR_bit.no3\r
+#define TRGDIRF TRGSR_bit.no4\r
+#define TRGIOA0 TRGIOR_bit.no0\r
+#define TRGIOA1 TRGIOR_bit.no1\r
+#define TRGIOA2 TRGIOR_bit.no2\r
+#define TRGBUFA TRGIOR_bit.no3\r
+#define TRGIOB0 TRGIOR_bit.no4\r
+#define TRGIOB1 TRGIOR_bit.no5\r
+#define TRGIOB2 TRGIOR_bit.no6\r
+#define TRGBUFB TRGIOR_bit.no7\r
+#define TRDSYNC TRDMR_bit.no0\r
+#define TRDBFC0 TRDMR_bit.no4\r
+#define TRDBFD0 TRDMR_bit.no5\r
+#define TRDBFC1 TRDMR_bit.no6\r
+#define TRDBFD1 TRDMR_bit.no7\r
+#define TRDPWMB0 TRDPMR_bit.no0\r
+#define TRDPWMC0 TRDPMR_bit.no1\r
+#define TRDPWMD0 TRDPMR_bit.no2\r
+#define TRDPWMB1 TRDPMR_bit.no4\r
+#define TRDPWMC1 TRDPMR_bit.no5\r
+#define TRDPWMD1 TRDPMR_bit.no6\r
+#define TRDSHUTS TRDOER2_bit.no0\r
+#define TRDPTO TRDOER2_bit.no7\r
+#define CRC0EN CRC0CTL_bit.no7\r
+#define C0ENB COMPMDR_bit.no0\r
+#define C0MON COMPMDR_bit.no3\r
+#define C1ENB COMPMDR_bit.no4\r
+#define C1MON COMPMDR_bit.no7\r
+#define C0IE COMPOCR_bit.no0\r
+#define C0OE COMPOCR_bit.no1\r
+#define C0OP COMPOCR_bit.no2\r
+#define C1IE COMPOCR_bit.no4\r
+#define C1OE COMPOCR_bit.no5\r
+#define C1OP COMPOCR_bit.no6\r
+#define SPDMD COMPOCR_bit.no7\r
+#define TSTMD COMPTCR_bit.no0\r
+#define TMDWE COMPTCR_bit.no7\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1A */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - G1A */
+/* CPU TYPE : R5F10ELE */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10ELE.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V1.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_H\r
+#define IODEFINE_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_p0 {\r
+ unsigned char p0;\r
+ __BITS8 BIT;\r
+};\r
+union un_p1 {\r
+ unsigned char p1;\r
+ __BITS8 BIT;\r
+};\r
+union un_p2 {\r
+ unsigned char p2;\r
+ __BITS8 BIT;\r
+};\r
+union un_p3 {\r
+ unsigned char p3;\r
+ __BITS8 BIT;\r
+};\r
+union un_p4 {\r
+ unsigned char p4;\r
+ __BITS8 BIT;\r
+};\r
+union un_p5 {\r
+ unsigned char p5;\r
+ __BITS8 BIT;\r
+};\r
+union un_p6 {\r
+ unsigned char p6;\r
+ __BITS8 BIT;\r
+};\r
+union un_p7 {\r
+ unsigned char p7;\r
+ __BITS8 BIT;\r
+};\r
+union un_p12 {\r
+ unsigned char p12;\r
+ __BITS8 BIT;\r
+};\r
+union un_p13 {\r
+ unsigned char p13;\r
+ __BITS8 BIT;\r
+};\r
+union un_p14 {\r
+ unsigned char p14;\r
+ __BITS8 BIT;\r
+};\r
+union un_p15 {\r
+ unsigned char p15;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm0 {\r
+ unsigned char pm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm1 {\r
+ unsigned char pm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm2 {\r
+ unsigned char pm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm3 {\r
+ unsigned char pm3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm4 {\r
+ unsigned char pm4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm5 {\r
+ unsigned char pm5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm6 {\r
+ unsigned char pm6;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm7 {\r
+ unsigned char pm7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm12 {\r
+ unsigned char pm12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm14 {\r
+ unsigned char pm14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm15 {\r
+ unsigned char pm15;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm0 {\r
+ unsigned char adm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_ads {\r
+ unsigned char ads;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm1 {\r
+ unsigned char adm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_krctl {\r
+ unsigned char krctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_krf {\r
+ unsigned char krf;\r
+ __BITS8 BIT;\r
+};\r
+union un_krm1 {\r
+ unsigned char krm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_krm0 {\r
+ unsigned char krm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp0 {\r
+ unsigned char egp0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn0 {\r
+ unsigned char egn0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp1 {\r
+ unsigned char egp1;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn1 {\r
+ unsigned char egn1;\r
+ __BITS8 BIT;\r
+};\r
+union un_iics0 {\r
+ unsigned char iics0;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf0 {\r
+ unsigned char iicf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_flars {\r
+ unsigned char flars;\r
+ __BITS8 BIT;\r
+};\r
+union un_fssq {\r
+ unsigned char fssq;\r
+ __BITS8 BIT;\r
+};\r
+union un_flrst {\r
+ unsigned char flrst;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsastl {\r
+ unsigned char fsastl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsasth {\r
+ unsigned char fsasth;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc0 {\r
+ unsigned char rtcc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc1 {\r
+ unsigned char rtcc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_csc {\r
+ unsigned char csc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ostc {\r
+ unsigned char ostc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ckc {\r
+ unsigned char ckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks0 {\r
+ unsigned char cks0;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks1 {\r
+ unsigned char cks1;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvim {\r
+ unsigned char lvim;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvis {\r
+ unsigned char lvis;\r
+ __BITS8 BIT;\r
+};\r
+union un_monsta0 {\r
+ unsigned char monsta0;\r
+ __BITS8 BIT;\r
+};\r
+union un_asim {\r
+ unsigned char asim;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc0 {\r
+ unsigned char dmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc1 {\r
+ unsigned char dmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc0 {\r
+ unsigned char drc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc1 {\r
+ unsigned char drc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2 {\r
+ unsigned short if2;\r
+ __BITS16 BIT;\r
+};\r
+union un_if2l {\r
+ unsigned char if2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2h {\r
+ unsigned char if2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2 {\r
+ unsigned short mk2;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk2l {\r
+ unsigned char mk2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2h {\r
+ unsigned char mk2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02 {\r
+ unsigned short pr02;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr02l {\r
+ unsigned char pr02l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02h {\r
+ unsigned char pr02h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12 {\r
+ unsigned short pr12;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr12l {\r
+ unsigned char pr12l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12h {\r
+ unsigned char pr12h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0 {\r
+ unsigned short if0;\r
+ __BITS16 BIT;\r
+};\r
+union un_if0l {\r
+ unsigned char if0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0h {\r
+ unsigned char if0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1 {\r
+ unsigned short if1;\r
+ __BITS16 BIT;\r
+};\r
+union un_if1l {\r
+ unsigned char if1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1h {\r
+ unsigned char if1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0 {\r
+ unsigned short mk0;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk0l {\r
+ unsigned char mk0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0h {\r
+ unsigned char mk0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1 {\r
+ unsigned short mk1;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk1l {\r
+ unsigned char mk1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1h {\r
+ unsigned char mk1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00 {\r
+ unsigned short pr00;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr00l {\r
+ unsigned char pr00l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00h {\r
+ unsigned char pr00h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01 {\r
+ unsigned short pr01;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr01l {\r
+ unsigned char pr01l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01h {\r
+ unsigned char pr01h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10 {\r
+ unsigned short pr10;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr10l {\r
+ unsigned char pr10l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10h {\r
+ unsigned char pr10h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11 {\r
+ unsigned short pr11;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr11l {\r
+ unsigned char pr11l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11h {\r
+ unsigned char pr11h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc {\r
+ unsigned char pmc;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
+#define P14 (*(volatile union un_p14 *)0xFFF0E).p14\r
+#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT\r
+#define P15 (*(volatile union un_p15 *)0xFFF0F).p15\r
+#define P15_bit (*(volatile union un_p15 *)0xFFF0F).BIT\r
+#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
+#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
+#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
+#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
+#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
+#define SIO01 (*(volatile unsigned char *)0xFFF12)\r
+#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
+#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
+#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14\r
+#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT\r
+#define PM15 (*(volatile union un_pm15 *)0xFFF2F).pm15\r
+#define PM15_bit (*(volatile union un_pm15 *)0xFFF2F).BIT\r
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
+#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
+#define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl\r
+#define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT\r
+#define KRF (*(volatile union un_krf *)0xFFF35).krf\r
+#define KRF_bit (*(volatile union un_krf *)0xFFF35).BIT\r
+#define KRM1 (*(volatile union un_krm1 *)0xFFF36).krm1\r
+#define KRM1_bit (*(volatile union un_krm1 *)0xFFF36).BIT\r
+#define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0\r
+#define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT\r
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
+#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1\r
+#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT\r
+#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1\r
+#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT\r
+#define SDR02 (*(volatile unsigned short *)0xFFF44)\r
+#define SIO10 (*(volatile unsigned char *)0xFFF44)\r
+#define TXD1 (*(volatile unsigned char *)0xFFF44)\r
+#define SDR03 (*(volatile unsigned short *)0xFFF46)\r
+#define RXD1 (*(volatile unsigned char *)0xFFF46)\r
+#define SIO11 (*(volatile unsigned char *)0xFFF46)\r
+#define SDR10 (*(volatile unsigned short *)0xFFF48)\r
+#define SIO20 (*(volatile unsigned char *)0xFFF48)\r
+#define TXD2 (*(volatile unsigned char *)0xFFF48)\r
+#define SDR11 (*(volatile unsigned short *)0xFFF4A)\r
+#define RXD2 (*(volatile unsigned char *)0xFFF4A)\r
+#define SIO21 (*(volatile unsigned char *)0xFFF4A)\r
+#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
+#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
+#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
+#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
+#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
+#define TDR04 (*(volatile unsigned short *)0xFFF68)\r
+#define TDR05 (*(volatile unsigned short *)0xFFF6A)\r
+#define TDR06 (*(volatile unsigned short *)0xFFF6C)\r
+#define TDR07 (*(volatile unsigned short *)0xFFF6E)\r
+#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
+#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
+#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
+#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
+#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
+#define ITMC (*(volatile unsigned short *)0xFFF90)\r
+#define SEC (*(volatile unsigned char *)0xFFF92)\r
+#define MIN (*(volatile unsigned char *)0xFFF93)\r
+#define HOUR (*(volatile unsigned char *)0xFFF94)\r
+#define WEEK (*(volatile unsigned char *)0xFFF95)\r
+#define DAY (*(volatile unsigned char *)0xFFF96)\r
+#define MONTH (*(volatile unsigned char *)0xFFF97)\r
+#define YEAR (*(volatile unsigned char *)0xFFF98)\r
+#define SUBCUD (*(volatile unsigned char *)0xFFF99)\r
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
+#define CMC (*(volatile unsigned char *)0xFFFA0)\r
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
+#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
+#define RESF (*(volatile unsigned char *)0xFFFA8)\r
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
+#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
+#define RXB (*(volatile unsigned char *)0xFFFAD)\r
+#define TXS (*(volatile unsigned char *)0xFFFAD)\r
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
+#define DSA0 (*(volatile unsigned char *)0xFFFB0)\r
+#define DSA1 (*(volatile unsigned char *)0xFFFB1)\r
+#define DRA0 (*(volatile unsigned short *)0xFFFB2)\r
+#define DRA0L (*(volatile unsigned char *)0xFFFB2)\r
+#define DRA0H (*(volatile unsigned char *)0xFFFB3)\r
+#define DRA1 (*(volatile unsigned short *)0xFFFB4)\r
+#define DRA1L (*(volatile unsigned char *)0xFFFB4)\r
+#define DRA1H (*(volatile unsigned char *)0xFFFB5)\r
+#define DBC0 (*(volatile unsigned short *)0xFFFB6)\r
+#define DBC0L (*(volatile unsigned char *)0xFFFB6)\r
+#define DBC0H (*(volatile unsigned char *)0xFFFB7)\r
+#define DBC1 (*(volatile unsigned short *)0xFFFB8)\r
+#define DBC1L (*(volatile unsigned char *)0xFFFB8)\r
+#define DBC1H (*(volatile unsigned char *)0xFFFB9)\r
+#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0\r
+#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT\r
+#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1\r
+#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT\r
+#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0\r
+#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT\r
+#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1\r
+#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT\r
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
+#define MDAL (*(volatile unsigned short *)0xFFFF0)\r
+#define MULA (*(volatile unsigned short *)0xFFFF0)\r
+#define MDAH (*(volatile unsigned short *)0xFFFF2)\r
+#define MULB (*(volatile unsigned short *)0xFFFF2)\r
+#define MDBH (*(volatile unsigned short *)0xFFFF4)\r
+#define MULOH (*(volatile unsigned short *)0xFFFF4)\r
+#define MDBL (*(volatile unsigned short *)0xFFFF6)\r
+#define MULOL (*(volatile unsigned short *)0xFFFF6)\r
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADCE ADM0_bit.no0\r
+#define ADCS ADM0_bit.no7\r
+#define SPD0 IICS0_bit.no0\r
+#define STD0 IICS0_bit.no1\r
+#define ACKD0 IICS0_bit.no2\r
+#define TRC0 IICS0_bit.no3\r
+#define COI0 IICS0_bit.no4\r
+#define EXC0 IICS0_bit.no5\r
+#define ALD0 IICS0_bit.no6\r
+#define MSTS0 IICS0_bit.no7\r
+#define IICRSV0 IICF0_bit.no0\r
+#define STCEN0 IICF0_bit.no1\r
+#define IICBSY0 IICF0_bit.no6\r
+#define STCF0 IICF0_bit.no7\r
+#define FSSTP FSSQ_bit.no6\r
+#define SQST FSSQ_bit.no7\r
+#define SQEND FSASTH_bit.no6\r
+#define ESQEND FSASTH_bit.no7\r
+#define RCLOE1 RTCC0_bit.no5\r
+#define RTCE RTCC0_bit.no7\r
+#define RWAIT RTCC1_bit.no0\r
+#define RWST RTCC1_bit.no1\r
+#define RIFG RTCC1_bit.no3\r
+#define WAFG RTCC1_bit.no4\r
+#define WALIE RTCC1_bit.no6\r
+#define WALE RTCC1_bit.no7\r
+#define HIOSTOP CSC_bit.no0\r
+#define XTSTOP CSC_bit.no6\r
+#define MSTOP CSC_bit.no7\r
+#define SDIV CKC_bit.no3\r
+#define MCM0 CKC_bit.no4\r
+#define MCS CKC_bit.no5\r
+#define CSS CKC_bit.no6\r
+#define CLS CKC_bit.no7\r
+#define PCLOE0 CKS0_bit.no7\r
+#define PCLOE1 CKS1_bit.no7\r
+#define LVIF LVIM_bit.no0\r
+#define LVIOMSK LVIM_bit.no1\r
+#define LVISEN LVIM_bit.no7\r
+#define LVILV LVIS_bit.no0\r
+#define LVIMD LVIS_bit.no7\r
+#define DWAIT0 DMC0_bit.no4\r
+#define DS0 DMC0_bit.no5\r
+#define DRS0 DMC0_bit.no6\r
+#define STG0 DMC0_bit.no7\r
+#define DWAIT1 DMC1_bit.no4\r
+#define DS1 DMC1_bit.no5\r
+#define DRS1 DMC1_bit.no6\r
+#define STG1 DMC1_bit.no7\r
+#define DST0 DRC0_bit.no0\r
+#define DEN0 DRC0_bit.no7\r
+#define DST1 DRC1_bit.no0\r
+#define DEN1 DRC1_bit.no7\r
+#define TMIF05 IF2_bit.no0\r
+#define TMIF06 IF2_bit.no1\r
+#define TMIF07 IF2_bit.no2\r
+#define PIF6 IF2_bit.no3\r
+#define PIF7 IF2_bit.no4\r
+#define PIF8 IF2_bit.no5\r
+#define PIF9 IF2_bit.no6\r
+#define PIF10 IF2_bit.no7\r
+#define PIF11 IF2H_bit.no0\r
+#define MDIF IF2H_bit.no5\r
+#define FLIF IF2H_bit.no7\r
+#define TMMK05 MK2_bit.no0\r
+#define TMMK06 MK2_bit.no1\r
+#define TMMK07 MK2_bit.no2\r
+#define PMK6 MK2_bit.no3\r
+#define PMK7 MK2_bit.no4\r
+#define PMK8 MK2_bit.no5\r
+#define PMK9 MK2_bit.no6\r
+#define PMK10 MK2_bit.no7\r
+#define PMK11 MK2H_bit.no0\r
+#define MDMK MK2H_bit.no5\r
+#define FLMK MK2H_bit.no7\r
+#define TMPR005 PR02_bit.no0\r
+#define TMPR006 PR02_bit.no1\r
+#define TMPR007 PR02_bit.no2\r
+#define PPR06 PR02_bit.no3\r
+#define PPR07 PR02_bit.no4\r
+#define PPR08 PR02_bit.no5\r
+#define PPR09 PR02_bit.no6\r
+#define PPR010 PR02_bit.no7\r
+#define PPR011 PR02H_bit.no0\r
+#define MDPR0 PR02H_bit.no5\r
+#define FLPR0 PR02H_bit.no7\r
+#define TMPR105 PR12_bit.no0\r
+#define TMPR106 PR12_bit.no1\r
+#define TMPR107 PR12_bit.no2\r
+#define PPR16 PR12_bit.no3\r
+#define PPR17 PR12_bit.no4\r
+#define PPR18 PR12_bit.no5\r
+#define PPR19 PR12_bit.no6\r
+#define PPR110 PR12_bit.no7\r
+#define PPR111 PR12H_bit.no0\r
+#define MDPR1 PR12H_bit.no5\r
+#define FLPR1 PR12H_bit.no7\r
+#define WDTIIF IF0_bit.no0\r
+#define LVIIF IF0_bit.no1\r
+#define PIF0 IF0_bit.no2\r
+#define PIF1 IF0_bit.no3\r
+#define PIF2 IF0_bit.no4\r
+#define PIF3 IF0_bit.no5\r
+#define PIF4 IF0_bit.no6\r
+#define PIF5 IF0_bit.no7\r
+#define CSIIF20 IF0H_bit.no0\r
+#define IICIF20 IF0H_bit.no0\r
+#define STIF2 IF0H_bit.no0\r
+#define CSIIF21 IF0H_bit.no1\r
+#define IICIF21 IF0H_bit.no1\r
+#define SRIF2 IF0H_bit.no1\r
+#define SREIF2 IF0H_bit.no2\r
+#define DMAIF0 IF0H_bit.no3\r
+#define DMAIF1 IF0H_bit.no4\r
+#define CSIIF00 IF0H_bit.no5\r
+#define IICIF00 IF0H_bit.no5\r
+#define STIF0 IF0H_bit.no5\r
+#define CSIIF01 IF0H_bit.no6\r
+#define IICIF01 IF0H_bit.no6\r
+#define SRIF0 IF0H_bit.no6\r
+#define SREIF0 IF0H_bit.no7\r
+#define TMIF01H IF0H_bit.no7\r
+#define CSIIF10 IF1_bit.no0\r
+#define IICIF10 IF1_bit.no0\r
+#define STIF1 IF1_bit.no0\r
+#define CSIIF11 IF1_bit.no1\r
+#define IICIF11 IF1_bit.no1\r
+#define SRIF1 IF1_bit.no1\r
+#define SREIF1 IF1_bit.no2\r
+#define TMIF03H IF1_bit.no2\r
+#define IICAIF0 IF1_bit.no3\r
+#define TMIF00 IF1_bit.no4\r
+#define TMIF01 IF1_bit.no5\r
+#define TMIF02 IF1_bit.no6\r
+#define TMIF03 IF1_bit.no7\r
+#define ADIF IF1H_bit.no0\r
+#define RTCIF IF1H_bit.no1\r
+#define ITIF IF1H_bit.no2\r
+#define KRIF IF1H_bit.no3\r
+#define TMIF04 IF1H_bit.no7\r
+#define WDTIMK MK0_bit.no0\r
+#define LVIMK MK0_bit.no1\r
+#define PMK0 MK0_bit.no2\r
+#define PMK1 MK0_bit.no3\r
+#define PMK2 MK0_bit.no4\r
+#define PMK3 MK0_bit.no5\r
+#define PMK4 MK0_bit.no6\r
+#define PMK5 MK0_bit.no7\r
+#define CSIMK20 MK0H_bit.no0\r
+#define IICMK20 MK0H_bit.no0\r
+#define STMK2 MK0H_bit.no0\r
+#define CSIMK21 MK0H_bit.no1\r
+#define IICMK21 MK0H_bit.no1\r
+#define SRMK2 MK0H_bit.no1\r
+#define SREMK2 MK0H_bit.no2\r
+#define DMAMK0 MK0H_bit.no3\r
+#define DMAMK1 MK0H_bit.no4\r
+#define CSIMK00 MK0H_bit.no5\r
+#define IICMK00 MK0H_bit.no5\r
+#define STMK0 MK0H_bit.no5\r
+#define CSIMK01 MK0H_bit.no6\r
+#define IICMK01 MK0H_bit.no6\r
+#define SRMK0 MK0H_bit.no6\r
+#define SREMK0 MK0H_bit.no7\r
+#define TMMK01H MK0H_bit.no7\r
+#define CSIMK10 MK1_bit.no0\r
+#define IICMK10 MK1_bit.no0\r
+#define STMK1 MK1_bit.no0\r
+#define CSIMK11 MK1_bit.no1\r
+#define IICMK11 MK1_bit.no1\r
+#define SRMK1 MK1_bit.no1\r
+#define SREMK1 MK1_bit.no2\r
+#define TMMK03H MK1_bit.no2\r
+#define IICAMK0 MK1_bit.no3\r
+#define TMMK00 MK1_bit.no4\r
+#define TMMK01 MK1_bit.no5\r
+#define TMMK02 MK1_bit.no6\r
+#define TMMK03 MK1_bit.no7\r
+#define ADMK MK1H_bit.no0\r
+#define RTCMK MK1H_bit.no1\r
+#define ITMK MK1H_bit.no2\r
+#define KRMK MK1H_bit.no3\r
+#define TMMK04 MK1H_bit.no7\r
+#define WDTIPR0 PR00_bit.no0\r
+#define LVIPR0 PR00_bit.no1\r
+#define PPR00 PR00_bit.no2\r
+#define PPR01 PR00_bit.no3\r
+#define PPR02 PR00_bit.no4\r
+#define PPR03 PR00_bit.no5\r
+#define PPR04 PR00_bit.no6\r
+#define PPR05 PR00_bit.no7\r
+#define CSIPR020 PR00H_bit.no0\r
+#define IICPR020 PR00H_bit.no0\r
+#define STPR02 PR00H_bit.no0\r
+#define CSIPR021 PR00H_bit.no1\r
+#define IICPR021 PR00H_bit.no1\r
+#define SRPR02 PR00H_bit.no1\r
+#define SREPR02 PR00H_bit.no2\r
+#define DMAPR00 PR00H_bit.no3\r
+#define DMAPR01 PR00H_bit.no4\r
+#define CSIPR000 PR00H_bit.no5\r
+#define IICPR000 PR00H_bit.no5\r
+#define STPR00 PR00H_bit.no5\r
+#define CSIPR001 PR00H_bit.no6\r
+#define IICPR001 PR00H_bit.no6\r
+#define SRPR00 PR00H_bit.no6\r
+#define SREPR00 PR00H_bit.no7\r
+#define TMPR001H PR00H_bit.no7\r
+#define CSIPR010 PR01_bit.no0\r
+#define IICPR010 PR01_bit.no0\r
+#define STPR01 PR01_bit.no0\r
+#define CSIPR011 PR01_bit.no1\r
+#define IICPR011 PR01_bit.no1\r
+#define SRPR01 PR01_bit.no1\r
+#define SREPR01 PR01_bit.no2\r
+#define TMPR003H PR01_bit.no2\r
+#define IICAPR00 PR01_bit.no3\r
+#define TMPR000 PR01_bit.no4\r
+#define TMPR001 PR01_bit.no5\r
+#define TMPR002 PR01_bit.no6\r
+#define TMPR003 PR01_bit.no7\r
+#define ADPR0 PR01H_bit.no0\r
+#define RTCPR0 PR01H_bit.no1\r
+#define ITPR0 PR01H_bit.no2\r
+#define KRPR0 PR01H_bit.no3\r
+#define TMPR004 PR01H_bit.no7\r
+#define WDTIPR1 PR10_bit.no0\r
+#define LVIPR1 PR10_bit.no1\r
+#define PPR10 PR10_bit.no2\r
+#define PPR11 PR10_bit.no3\r
+#define PPR12 PR10_bit.no4\r
+#define PPR13 PR10_bit.no5\r
+#define PPR14 PR10_bit.no6\r
+#define PPR15 PR10_bit.no7\r
+#define CSIPR120 PR10H_bit.no0\r
+#define IICPR120 PR10H_bit.no0\r
+#define STPR12 PR10H_bit.no0\r
+#define CSIPR121 PR10H_bit.no1\r
+#define IICPR121 PR10H_bit.no1\r
+#define SRPR12 PR10H_bit.no1\r
+#define SREPR12 PR10H_bit.no2\r
+#define DMAPR10 PR10H_bit.no3\r
+#define DMAPR11 PR10H_bit.no4\r
+#define CSIPR100 PR10H_bit.no5\r
+#define IICPR100 PR10H_bit.no5\r
+#define STPR10 PR10H_bit.no5\r
+#define CSIPR101 PR10H_bit.no6\r
+#define IICPR101 PR10H_bit.no6\r
+#define SRPR10 PR10H_bit.no6\r
+#define SREPR10 PR10H_bit.no7\r
+#define TMPR101H PR10H_bit.no7\r
+#define CSIPR110 PR11_bit.no0\r
+#define IICPR110 PR11_bit.no0\r
+#define STPR11 PR11_bit.no0\r
+#define CSIPR111 PR11_bit.no1\r
+#define IICPR111 PR11_bit.no1\r
+#define SRPR11 PR11_bit.no1\r
+#define SREPR11 PR11_bit.no2\r
+#define TMPR103H PR11_bit.no2\r
+#define IICAPR10 PR11_bit.no3\r
+#define TMPR100 PR11_bit.no4\r
+#define TMPR101 PR11_bit.no5\r
+#define TMPR102 PR11_bit.no6\r
+#define TMPR103 PR11_bit.no7\r
+#define ADPR1 PR11H_bit.no0\r
+#define RTCPR1 PR11H_bit.no1\r
+#define ITPR1 PR11H_bit.no2\r
+#define KRPR1 PR11H_bit.no3\r
+#define TMPR104 PR11H_bit.no7\r
+#define MAA PMC_bit.no0\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#define RST_vect (0x0)\r
+#define INTDBG_vect (0x2)\r
+#define INTWDTI_vect (0x4)\r
+#define INTLVI_vect (0x6)\r
+#define INTP0_vect (0x8)\r
+#define INTP1_vect (0xA)\r
+#define INTP2_vect (0xC)\r
+#define INTP3_vect (0xE)\r
+#define INTP4_vect (0x10)\r
+#define INTP5_vect (0x12)\r
+#define INTCSI20_vect (0x14)\r
+#define INTIIC20_vect (0x14)\r
+#define INTST2_vect (0x14)\r
+#define INTCSI21_vect (0x16)\r
+#define INTIIC21_vect (0x16)\r
+#define INTSR2_vect (0x16)\r
+#define INTSRE2_vect (0x18)\r
+#define INTDMA0_vect (0x1A)\r
+#define INTDMA1_vect (0x1C)\r
+#define INTCSI00_vect (0x1E)\r
+#define INTIIC00_vect (0x1E)\r
+#define INTST0_vect (0x1E)\r
+#define INTCSI01_vect (0x20)\r
+#define INTIIC01_vect (0x20)\r
+#define INTSR0_vect (0x20)\r
+#define INTSRE0_vect (0x22)\r
+#define INTTM01H_vect (0x22)\r
+#define INTCSI10_vect (0x24)\r
+#define INTIIC10_vect (0x24)\r
+#define INTST1_vect (0x24)\r
+#define INTCSI11_vect (0x26)\r
+#define INTIIC11_vect (0x26)\r
+#define INTSR1_vect (0x26)\r
+#define INTSRE1_vect (0x28)\r
+#define INTTM03H_vect (0x28)\r
+#define INTIICA0_vect (0x2A)\r
+#define INTTM00_vect (0x2C)\r
+#define INTTM01_vect (0x2E)\r
+#define INTTM02_vect (0x30)\r
+#define INTTM03_vect (0x32)\r
+#define INTAD_vect (0x34)\r
+#define INTRTC_vect (0x36)\r
+#define INTIT_vect (0x38)\r
+#define INTKR_vect (0x3A)\r
+#define INTTM04_vect (0x42)\r
+#define INTTM05_vect (0x44)\r
+#define INTTM06_vect (0x46)\r
+#define INTTM07_vect (0x48)\r
+#define INTP6_vect (0x4A)\r
+#define INTP7_vect (0x4C)\r
+#define INTP8_vect (0x4E)\r
+#define INTP9_vect (0x50)\r
+#define INTP10_vect (0x52)\r
+#define INTP11_vect (0x54)\r
+#define INTMD_vect (0x5E)\r
+#define INTFL_vect (0x62)\r
+#define BRK_I_vect (0x7E)\r
+#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1A */
+/* FILE : iodefine_ext.h */
+/* DESCRIPTION : Definition of Extended SFRs */
+/* CPU SERIES : RL78 - G1A */
+/* CPU TYPE : R5F10ELE */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10ELE.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V1.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_EXT_H\r
+#define IODEFINE_EXT_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_adm2 {\r
+ unsigned char adm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu0 {\r
+ unsigned char pu0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu1 {\r
+ unsigned char pu1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu3 {\r
+ unsigned char pu3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu4 {\r
+ unsigned char pu4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu5 {\r
+ unsigned char pu5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu7 {\r
+ unsigned char pu7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu12 {\r
+ unsigned char pu12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu14 {\r
+ unsigned char pu14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim0 {\r
+ unsigned char pim0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim1 {\r
+ unsigned char pim1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom0 {\r
+ unsigned char pom0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom1 {\r
+ unsigned char pom1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom5 {\r
+ unsigned char pom5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom7 {\r
+ unsigned char pom7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc0 {\r
+ unsigned char pmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc1 {\r
+ unsigned char pmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc3 {\r
+ unsigned char pmc3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc4 {\r
+ unsigned char pmc4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc5 {\r
+ unsigned char pmc5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc7 {\r
+ unsigned char pmc7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc12 {\r
+ unsigned char pmc12;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen0 {\r
+ unsigned char nfen0;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen1 {\r
+ unsigned char nfen1;\r
+ __BITS8 BIT;\r
+};\r
+union un_isc {\r
+ unsigned char isc;\r
+ __BITS8 BIT;\r
+};\r
+union un_gaidis {\r
+ unsigned char gaidis;\r
+ __BITS8 BIT;\r
+};\r
+union un_gdidis {\r
+ unsigned char gdidis;\r
+ __BITS8 BIT;\r
+};\r
+union un_dflctl {\r
+ unsigned char dflctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_bectl {\r
+ unsigned char bectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsse {\r
+ unsigned char fsse;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfs {\r
+ unsigned char pfs;\r
+ __BITS8 BIT;\r
+};\r
+union un_mduc {\r
+ unsigned char mduc;\r
+ __BITS8 BIT;\r
+};\r
+union un_per0 {\r
+ unsigned char per0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rmc {\r
+ unsigned char rmc;\r
+ __BITS8 BIT;\r
+};\r
+union un_rpectl {\r
+ unsigned char rpectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_se0l {\r
+ unsigned char se0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss0l {\r
+ unsigned char ss0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st0l {\r
+ unsigned char st0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe0l {\r
+ unsigned char soe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_se1l {\r
+ unsigned char se1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss1l {\r
+ unsigned char ss1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st1l {\r
+ unsigned char st1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe1l {\r
+ unsigned char soe1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_te0l {\r
+ unsigned char te0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ts0l {\r
+ unsigned char ts0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_tt0l {\r
+ unsigned char tt0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_toe0l {\r
+ unsigned char toe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl00 {\r
+ unsigned char iicctl00;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl01 {\r
+ unsigned char iicctl01;\r
+ __BITS8 BIT;\r
+};\r
+union un_crc0ctl {\r
+ unsigned char crc0ctl;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
+#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
+#define ADUL (*(volatile unsigned char *)0xF0011)\r
+#define ADLL (*(volatile unsigned char *)0xF0012)\r
+#define ADTES (*(volatile unsigned char *)0xF0013)\r
+#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
+#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
+#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
+#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT\r
+#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3\r
+#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT\r
+#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4\r
+#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
+#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
+#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
+#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
+#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
+#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
+#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
+#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14\r
+#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT\r
+#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
+#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
+#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1\r
+#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT\r
+#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
+#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
+#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1\r
+#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT\r
+#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
+#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
+#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7\r
+#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT\r
+#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0\r
+#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT\r
+#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1\r
+#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT\r
+#define PMC3 (*(volatile union un_pmc3 *)0xF0063).pmc3\r
+#define PMC3_bit (*(volatile union un_pmc3 *)0xF0063).BIT\r
+#define PMC4 (*(volatile union un_pmc4 *)0xF0064).pmc4\r
+#define PMC4_bit (*(volatile union un_pmc4 *)0xF0064).BIT\r
+#define PMC5 (*(volatile union un_pmc5 *)0xF0065).pmc5\r
+#define PMC5_bit (*(volatile union un_pmc5 *)0xF0065).BIT\r
+#define PMC7 (*(volatile union un_pmc7 *)0xF0067).pmc7\r
+#define PMC7_bit (*(volatile union un_pmc7 *)0xF0067).BIT\r
+#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12\r
+#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT\r
+#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
+#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
+#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
+#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
+#define ISC (*(volatile union un_isc *)0xF0073).isc\r
+#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
+#define TIS0 (*(volatile unsigned char *)0xF0074)\r
+#define ADPC (*(volatile unsigned char *)0xF0076)\r
+#define PIOR (*(volatile unsigned char *)0xF0077)\r
+#define IAWCTL (*(volatile unsigned char *)0xF0078)\r
+#define GAIDIS (*(volatile union un_gaidis *)0xF007C).gaidis\r
+#define GAIDIS_bit (*(volatile union un_gaidis *)0xF007C).BIT\r
+#define GDIDIS (*(volatile union un_gdidis *)0xF007D).gdidis\r
+#define GDIDIS_bit (*(volatile union un_gdidis *)0xF007D).BIT\r
+#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
+#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
+#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
+#define BPAH0 (*(volatile unsigned char *)0xF0082)\r
+#define BPAS0 (*(volatile unsigned char *)0xF0083)\r
+#define BACDVL0 (*(volatile unsigned char *)0xF0084)\r
+#define BACDVH0 (*(volatile unsigned char *)0xF0085)\r
+#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
+#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
+#define MONMOD (*(volatile unsigned char *)0xF0088)\r
+#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
+#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
+#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
+#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl\r
+#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT\r
+#define HOCODIV (*(volatile unsigned char *)0xF00A8)\r
+#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)\r
+#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)\r
+#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)\r
+#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)\r
+#define FLSEC (*(volatile unsigned short *)0xF00B0)\r
+#define FLFSWS (*(volatile unsigned short *)0xF00B2)\r
+#define FLFSWE (*(volatile unsigned short *)0xF00B4)\r
+#define FSSET (*(volatile unsigned char *)0xF00B6)\r
+#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse\r
+#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT\r
+#define FLFADL (*(volatile unsigned short *)0xF00B8)\r
+#define FLFADH (*(volatile unsigned char *)0xF00BA)\r
+#define PFCMD (*(volatile unsigned char *)0xF00C0)\r
+#define PFS (*(volatile union un_pfs *)0xF00C1).pfs\r
+#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT\r
+#define FLRL (*(volatile unsigned short *)0xF00C2)\r
+#define FLRH (*(volatile unsigned short *)0xF00C4)\r
+#define FLWE (*(volatile unsigned char *)0xF00C6)\r
+#define FLRE (*(volatile unsigned char *)0xF00C7)\r
+#define FLTMS (*(volatile unsigned short *)0xF00C8)\r
+#define DFLMC (*(volatile unsigned short *)0xF00CA)\r
+#define FLMCL (*(volatile unsigned short *)0xF00CC)\r
+#define FLMCH (*(volatile unsigned char *)0xF00CE)\r
+#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
+#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
+#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
+#define MDCL (*(volatile unsigned short *)0xF00E0)\r
+#define MDCH (*(volatile unsigned short *)0xF00E2)\r
+#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc\r
+#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT\r
+#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
+#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
+#define OSMC (*(volatile unsigned char *)0xF00F3)\r
+#define RMC (*(volatile union un_rmc *)0xF00F4).rmc\r
+#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT\r
+#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl\r
+#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT\r
+#define BCDADJ (*(volatile unsigned char *)0xF00FE)\r
+#define VECTCTRL (*(volatile unsigned char *)0xF00FF)\r
+#define SSR00 (*(volatile unsigned short *)0xF0100)\r
+#define SSR00L (*(volatile unsigned char *)0xF0100)\r
+#define SSR01 (*(volatile unsigned short *)0xF0102)\r
+#define SSR01L (*(volatile unsigned char *)0xF0102)\r
+#define SSR02 (*(volatile unsigned short *)0xF0104)\r
+#define SSR02L (*(volatile unsigned char *)0xF0104)\r
+#define SSR03 (*(volatile unsigned short *)0xF0106)\r
+#define SSR03L (*(volatile unsigned char *)0xF0106)\r
+#define SIR00 (*(volatile unsigned short *)0xF0108)\r
+#define SIR00L (*(volatile unsigned char *)0xF0108)\r
+#define SIR01 (*(volatile unsigned short *)0xF010A)\r
+#define SIR01L (*(volatile unsigned char *)0xF010A)\r
+#define SIR02 (*(volatile unsigned short *)0xF010C)\r
+#define SIR02L (*(volatile unsigned char *)0xF010C)\r
+#define SIR03 (*(volatile unsigned short *)0xF010E)\r
+#define SIR03L (*(volatile unsigned char *)0xF010E)\r
+#define SMR00 (*(volatile unsigned short *)0xF0110)\r
+#define SMR01 (*(volatile unsigned short *)0xF0112)\r
+#define SMR02 (*(volatile unsigned short *)0xF0114)\r
+#define SMR03 (*(volatile unsigned short *)0xF0116)\r
+#define SCR00 (*(volatile unsigned short *)0xF0118)\r
+#define SCR01 (*(volatile unsigned short *)0xF011A)\r
+#define SCR02 (*(volatile unsigned short *)0xF011C)\r
+#define SCR03 (*(volatile unsigned short *)0xF011E)\r
+#define SE0 (*(volatile unsigned short *)0xF0120)\r
+#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
+#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
+#define SS0 (*(volatile unsigned short *)0xF0122)\r
+#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l\r
+#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT\r
+#define ST0 (*(volatile unsigned short *)0xF0124)\r
+#define ST0L (*(volatile union un_st0l *)0xF0124).st0l\r
+#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT\r
+#define SPS0 (*(volatile unsigned short *)0xF0126)\r
+#define SPS0L (*(volatile unsigned char *)0xF0126)\r
+#define SO0 (*(volatile unsigned short *)0xF0128)\r
+#define SOE0 (*(volatile unsigned short *)0xF012A)\r
+#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l\r
+#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT\r
+#define EDR00 (*(volatile unsigned short *)0xF012C)\r
+#define EDR00L (*(volatile unsigned char *)0xF012C)\r
+#define EDR01 (*(volatile unsigned short *)0xF012E)\r
+#define EDR01L (*(volatile unsigned char *)0xF012E)\r
+#define EDR02 (*(volatile unsigned short *)0xF0130)\r
+#define EDR02L (*(volatile unsigned char *)0xF0130)\r
+#define EDR03 (*(volatile unsigned short *)0xF0132)\r
+#define EDR03L (*(volatile unsigned char *)0xF0132)\r
+#define SOL0 (*(volatile unsigned short *)0xF0134)\r
+#define SOL0L (*(volatile unsigned char *)0xF0134)\r
+#define SSC0 (*(volatile unsigned short *)0xF0138)\r
+#define SSC0L (*(volatile unsigned char *)0xF0138)\r
+#define SSR10 (*(volatile unsigned short *)0xF0140)\r
+#define SSR10L (*(volatile unsigned char *)0xF0140)\r
+#define SSR11 (*(volatile unsigned short *)0xF0142)\r
+#define SSR11L (*(volatile unsigned char *)0xF0142)\r
+#define SIR10 (*(volatile unsigned short *)0xF0148)\r
+#define SIR10L (*(volatile unsigned char *)0xF0148)\r
+#define SIR11 (*(volatile unsigned short *)0xF014A)\r
+#define SIR11L (*(volatile unsigned char *)0xF014A)\r
+#define SMR10 (*(volatile unsigned short *)0xF0150)\r
+#define SMR11 (*(volatile unsigned short *)0xF0152)\r
+#define SCR10 (*(volatile unsigned short *)0xF0158)\r
+#define SCR11 (*(volatile unsigned short *)0xF015A)\r
+#define SE1 (*(volatile unsigned short *)0xF0160)\r
+#define SE1L (*(volatile union un_se1l *)0xF0160).se1l\r
+#define SE1L_bit (*(volatile union un_se1l *)0xF0160).BIT\r
+#define SS1 (*(volatile unsigned short *)0xF0162)\r
+#define SS1L (*(volatile union un_ss1l *)0xF0162).ss1l\r
+#define SS1L_bit (*(volatile union un_ss1l *)0xF0162).BIT\r
+#define ST1 (*(volatile unsigned short *)0xF0164)\r
+#define ST1L (*(volatile union un_st1l *)0xF0164).st1l\r
+#define ST1L_bit (*(volatile union un_st1l *)0xF0164).BIT\r
+#define SPS1 (*(volatile unsigned short *)0xF0166)\r
+#define SPS1L (*(volatile unsigned char *)0xF0166)\r
+#define SO1 (*(volatile unsigned short *)0xF0168)\r
+#define SOE1 (*(volatile unsigned short *)0xF016A)\r
+#define SOE1L (*(volatile union un_soe1l *)0xF016A).soe1l\r
+#define SOE1L_bit (*(volatile union un_soe1l *)0xF016A).BIT\r
+#define EDR10 (*(volatile unsigned short *)0xF016C)\r
+#define EDR10L (*(volatile unsigned char *)0xF016C)\r
+#define EDR11 (*(volatile unsigned short *)0xF016E)\r
+#define EDR11L (*(volatile unsigned char *)0xF016E)\r
+#define SOL1 (*(volatile unsigned short *)0xF0174)\r
+#define SOL1L (*(volatile unsigned char *)0xF0174)\r
+#define TCR00 (*(volatile unsigned short *)0xF0180)\r
+#define TCR01 (*(volatile unsigned short *)0xF0182)\r
+#define TCR02 (*(volatile unsigned short *)0xF0184)\r
+#define TCR03 (*(volatile unsigned short *)0xF0186)\r
+#define TCR04 (*(volatile unsigned short *)0xF0188)\r
+#define TCR05 (*(volatile unsigned short *)0xF018A)\r
+#define TCR06 (*(volatile unsigned short *)0xF018C)\r
+#define TCR07 (*(volatile unsigned short *)0xF018E)\r
+#define TMR00 (*(volatile unsigned short *)0xF0190)\r
+#define TMR01 (*(volatile unsigned short *)0xF0192)\r
+#define TMR02 (*(volatile unsigned short *)0xF0194)\r
+#define TMR03 (*(volatile unsigned short *)0xF0196)\r
+#define TMR04 (*(volatile unsigned short *)0xF0198)\r
+#define TMR05 (*(volatile unsigned short *)0xF019A)\r
+#define TMR06 (*(volatile unsigned short *)0xF019C)\r
+#define TMR07 (*(volatile unsigned short *)0xF019E)\r
+#define TSR00 (*(volatile unsigned short *)0xF01A0)\r
+#define TSR00L (*(volatile unsigned char *)0xF01A0)\r
+#define TSR01 (*(volatile unsigned short *)0xF01A2)\r
+#define TSR01L (*(volatile unsigned char *)0xF01A2)\r
+#define TSR02 (*(volatile unsigned short *)0xF01A4)\r
+#define TSR02L (*(volatile unsigned char *)0xF01A4)\r
+#define TSR03 (*(volatile unsigned short *)0xF01A6)\r
+#define TSR03L (*(volatile unsigned char *)0xF01A6)\r
+#define TSR04 (*(volatile unsigned short *)0xF01A8)\r
+#define TSR04L (*(volatile unsigned char *)0xF01A8)\r
+#define TSR05 (*(volatile unsigned short *)0xF01AA)\r
+#define TSR05L (*(volatile unsigned char *)0xF01AA)\r
+#define TSR06 (*(volatile unsigned short *)0xF01AC)\r
+#define TSR06L (*(volatile unsigned char *)0xF01AC)\r
+#define TSR07 (*(volatile unsigned short *)0xF01AE)\r
+#define TSR07L (*(volatile unsigned char *)0xF01AE)\r
+#define TE0 (*(volatile unsigned short *)0xF01B0)\r
+#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l\r
+#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT\r
+#define TS0 (*(volatile unsigned short *)0xF01B2)\r
+#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l\r
+#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT\r
+#define TT0 (*(volatile unsigned short *)0xF01B4)\r
+#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l\r
+#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT\r
+#define TPS0 (*(volatile unsigned short *)0xF01B6)\r
+#define TO0 (*(volatile unsigned short *)0xF01B8)\r
+#define TO0L (*(volatile unsigned char *)0xF01B8)\r
+#define TOE0 (*(volatile unsigned short *)0xF01BA)\r
+#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l\r
+#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT\r
+#define TOL0 (*(volatile unsigned short *)0xF01BC)\r
+#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
+#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
+#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
+#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
+#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
+#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
+#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT\r
+#define IICWL0 (*(volatile unsigned char *)0xF0232)\r
+#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
+#define SVA0 (*(volatile unsigned char *)0xF0234)\r
+#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
+#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
+#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
+#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
+#define CRCD (*(volatile unsigned short *)0xF02FA)\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADTYP ADM2_bit.no0\r
+#define AWC ADM2_bit.no2\r
+#define ADRCK ADM2_bit.no3\r
+#define DFLEN DFLCTL_bit.no0\r
+#define BRSAM BECTL_bit.no0\r
+#define ESQST FSSE_bit.no7\r
+#define DIVST MDUC_bit.no0\r
+#define MACSF MDUC_bit.no1\r
+#define MACOF MDUC_bit.no2\r
+#define MDSM MDUC_bit.no3\r
+#define MACMODE MDUC_bit.no6\r
+#define DIVMODE MDUC_bit.no7\r
+#define TAU0EN PER0_bit.no0\r
+#define SAU0EN PER0_bit.no2\r
+#define SAU1EN PER0_bit.no3\r
+#define IICA0EN PER0_bit.no4\r
+#define ADCEN PER0_bit.no5\r
+#define RTCEN PER0_bit.no7\r
+#define PAENB RMC_bit.no0\r
+#define WDVOL RMC_bit.no7\r
+#define RPEF RPECTL_bit.no0\r
+#define RPERDIS RPECTL_bit.no7\r
+#define SPT0 IICCTL00_bit.no0\r
+#define STT0 IICCTL00_bit.no1\r
+#define ACKE0 IICCTL00_bit.no2\r
+#define WTIM0 IICCTL00_bit.no3\r
+#define SPIE0 IICCTL00_bit.no4\r
+#define WREL0 IICCTL00_bit.no5\r
+#define LREL0 IICCTL00_bit.no6\r
+#define IICE0 IICCTL00_bit.no7\r
+#define PRS0 IICCTL01_bit.no0\r
+#define DFC0 IICCTL01_bit.no2\r
+#define SMC0 IICCTL01_bit.no3\r
+#define DAD0 IICCTL01_bit.no4\r
+#define CLD0 IICCTL01_bit.no5\r
+#define WUP0 IICCTL01_bit.no7\r
+#define CRC0EN CRC0CTL_bit.no7\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1C */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - G1C */
+/* CPU TYPE : R5F10JGC */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10JGC.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V1.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_H\r
+#define IODEFINE_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_p0 {\r
+ unsigned char p0;\r
+ __BITS8 BIT;\r
+};\r
+union un_p1 {\r
+ unsigned char p1;\r
+ __BITS8 BIT;\r
+};\r
+union un_p2 {\r
+ unsigned char p2;\r
+ __BITS8 BIT;\r
+};\r
+union un_p3 {\r
+ unsigned char p3;\r
+ __BITS8 BIT;\r
+};\r
+union un_p4 {\r
+ unsigned char p4;\r
+ __BITS8 BIT;\r
+};\r
+union un_p5 {\r
+ unsigned char p5;\r
+ __BITS8 BIT;\r
+};\r
+union un_p6 {\r
+ unsigned char p6;\r
+ __BITS8 BIT;\r
+};\r
+union un_p7 {\r
+ unsigned char p7;\r
+ __BITS8 BIT;\r
+};\r
+union un_p12 {\r
+ unsigned char p12;\r
+ __BITS8 BIT;\r
+};\r
+union un_p13 {\r
+ unsigned char p13;\r
+ __BITS8 BIT;\r
+};\r
+union un_p14 {\r
+ unsigned char p14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm0 {\r
+ unsigned char pm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm1 {\r
+ unsigned char pm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm2 {\r
+ unsigned char pm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm3 {\r
+ unsigned char pm3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm4 {\r
+ unsigned char pm4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm5 {\r
+ unsigned char pm5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm6 {\r
+ unsigned char pm6;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm7 {\r
+ unsigned char pm7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm12 {\r
+ unsigned char pm12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm14 {\r
+ unsigned char pm14;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm0 {\r
+ unsigned char adm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_ads {\r
+ unsigned char ads;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm1 {\r
+ unsigned char adm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_krm {\r
+ unsigned char krm;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp0 {\r
+ unsigned char egp0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn0 {\r
+ unsigned char egn0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp1 {\r
+ unsigned char egp1;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn1 {\r
+ unsigned char egn1;\r
+ __BITS8 BIT;\r
+};\r
+union un_iics0 {\r
+ unsigned char iics0;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf0 {\r
+ unsigned char iicf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_flars {\r
+ unsigned char flars;\r
+ __BITS8 BIT;\r
+};\r
+union un_fssq {\r
+ unsigned char fssq;\r
+ __BITS8 BIT;\r
+};\r
+union un_flrst {\r
+ unsigned char flrst;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsastl {\r
+ unsigned char fsastl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsasth {\r
+ unsigned char fsasth;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc0 {\r
+ unsigned char rtcc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc1 {\r
+ unsigned char rtcc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_csc {\r
+ unsigned char csc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ostc {\r
+ unsigned char ostc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ckc {\r
+ unsigned char ckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks0 {\r
+ unsigned char cks0;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks1 {\r
+ unsigned char cks1;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvim {\r
+ unsigned char lvim;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvis {\r
+ unsigned char lvis;\r
+ __BITS8 BIT;\r
+};\r
+union un_monsta0 {\r
+ unsigned char monsta0;\r
+ __BITS8 BIT;\r
+};\r
+union un_asim {\r
+ unsigned char asim;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc0 {\r
+ unsigned char dmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc1 {\r
+ unsigned char dmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc0 {\r
+ unsigned char drc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc1 {\r
+ unsigned char drc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2 {\r
+ unsigned short if2;\r
+ __BITS16 BIT;\r
+};\r
+union un_if2l {\r
+ unsigned char if2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2h {\r
+ unsigned char if2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2 {\r
+ unsigned short mk2;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk2l {\r
+ unsigned char mk2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2h {\r
+ unsigned char mk2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02 {\r
+ unsigned short pr02;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr02l {\r
+ unsigned char pr02l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02h {\r
+ unsigned char pr02h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12 {\r
+ unsigned short pr12;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr12l {\r
+ unsigned char pr12l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12h {\r
+ unsigned char pr12h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0 {\r
+ unsigned short if0;\r
+ __BITS16 BIT;\r
+};\r
+union un_if0l {\r
+ unsigned char if0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0h {\r
+ unsigned char if0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1 {\r
+ unsigned short if1;\r
+ __BITS16 BIT;\r
+};\r
+union un_if1l {\r
+ unsigned char if1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1h {\r
+ unsigned char if1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0 {\r
+ unsigned short mk0;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk0l {\r
+ unsigned char mk0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0h {\r
+ unsigned char mk0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1 {\r
+ unsigned short mk1;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk1l {\r
+ unsigned char mk1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1h {\r
+ unsigned char mk1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00 {\r
+ unsigned short pr00;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr00l {\r
+ unsigned char pr00l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00h {\r
+ unsigned char pr00h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01 {\r
+ unsigned short pr01;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr01l {\r
+ unsigned char pr01l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01h {\r
+ unsigned char pr01h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10 {\r
+ unsigned short pr10;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr10l {\r
+ unsigned char pr10l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10h {\r
+ unsigned char pr10h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11 {\r
+ unsigned short pr11;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr11l {\r
+ unsigned char pr11l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11h {\r
+ unsigned char pr11h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc {\r
+ unsigned char pmc;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
+#define P14 (*(volatile union un_p14 *)0xFFF0E).p14\r
+#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT\r
+#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
+#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
+#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
+#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
+#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
+#define SIO01 (*(volatile unsigned char *)0xFFF12)\r
+#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
+#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
+#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14\r
+#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT\r
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
+#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
+#define KRM (*(volatile union un_krm *)0xFFF37).krm\r
+#define KRM_bit (*(volatile union un_krm *)0xFFF37).BIT\r
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
+#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1\r
+#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT\r
+#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1\r
+#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT\r
+#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
+#define CFIFO (*(volatile unsigned short *)0xFFF54)\r
+#define CFIFOL (*(volatile unsigned char *)0xFFF54)\r
+#define D0FIFO (*(volatile unsigned short *)0xFFF58)\r
+#define D0FIFOL (*(volatile unsigned char *)0xFFF58)\r
+#define D1FIFO (*(volatile unsigned short *)0xFFF5C)\r
+#define D1FIFOL (*(volatile unsigned char *)0xFFF5C)\r
+#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
+#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
+#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
+#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
+#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
+#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
+#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
+#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
+#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
+#define ITMC (*(volatile unsigned short *)0xFFF90)\r
+#define SEC (*(volatile unsigned char *)0xFFF92)\r
+#define MIN (*(volatile unsigned char *)0xFFF93)\r
+#define HOUR (*(volatile unsigned char *)0xFFF94)\r
+#define WEEK (*(volatile unsigned char *)0xFFF95)\r
+#define DAY (*(volatile unsigned char *)0xFFF96)\r
+#define MONTH (*(volatile unsigned char *)0xFFF97)\r
+#define YEAR (*(volatile unsigned char *)0xFFF98)\r
+#define SUBCUD (*(volatile unsigned char *)0xFFF99)\r
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
+#define CMC (*(volatile unsigned char *)0xFFFA0)\r
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
+#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
+#define RESF (*(volatile unsigned char *)0xFFFA8)\r
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
+#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
+#define RXB (*(volatile unsigned char *)0xFFFAD)\r
+#define TXS (*(volatile unsigned char *)0xFFFAD)\r
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
+#define DSA0 (*(volatile unsigned char *)0xFFFB0)\r
+#define DSA1 (*(volatile unsigned char *)0xFFFB1)\r
+#define DRA0 (*(volatile unsigned short *)0xFFFB2)\r
+#define DRA0L (*(volatile unsigned char *)0xFFFB2)\r
+#define DRA0H (*(volatile unsigned char *)0xFFFB3)\r
+#define DRA1 (*(volatile unsigned short *)0xFFFB4)\r
+#define DRA1L (*(volatile unsigned char *)0xFFFB4)\r
+#define DRA1H (*(volatile unsigned char *)0xFFFB5)\r
+#define DBC0 (*(volatile unsigned short *)0xFFFB6)\r
+#define DBC0L (*(volatile unsigned char *)0xFFFB6)\r
+#define DBC0H (*(volatile unsigned char *)0xFFFB7)\r
+#define DBC1 (*(volatile unsigned short *)0xFFFB8)\r
+#define DBC1L (*(volatile unsigned char *)0xFFFB8)\r
+#define DBC1H (*(volatile unsigned char *)0xFFFB9)\r
+#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0\r
+#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT\r
+#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1\r
+#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT\r
+#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0\r
+#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT\r
+#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1\r
+#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT\r
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
+#define MDAL (*(volatile unsigned short *)0xFFFF0)\r
+#define MULA (*(volatile unsigned short *)0xFFFF0)\r
+#define MDAH (*(volatile unsigned short *)0xFFFF2)\r
+#define MULB (*(volatile unsigned short *)0xFFFF2)\r
+#define MDBH (*(volatile unsigned short *)0xFFFF4)\r
+#define MULOH (*(volatile unsigned short *)0xFFFF4)\r
+#define MDBL (*(volatile unsigned short *)0xFFFF6)\r
+#define MULOL (*(volatile unsigned short *)0xFFFF6)\r
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADCE ADM0_bit.no0\r
+#define ADCS ADM0_bit.no7\r
+#define SPD0 IICS0_bit.no0\r
+#define STD0 IICS0_bit.no1\r
+#define ACKD0 IICS0_bit.no2\r
+#define TRC0 IICS0_bit.no3\r
+#define COI0 IICS0_bit.no4\r
+#define EXC0 IICS0_bit.no5\r
+#define ALD0 IICS0_bit.no6\r
+#define MSTS0 IICS0_bit.no7\r
+#define IICRSV0 IICF0_bit.no0\r
+#define STCEN0 IICF0_bit.no1\r
+#define IICBSY0 IICF0_bit.no6\r
+#define STCF0 IICF0_bit.no7\r
+#define FSSTP FSSQ_bit.no6\r
+#define SQST FSSQ_bit.no7\r
+#define SQEND FSASTH_bit.no6\r
+#define ESQEND FSASTH_bit.no7\r
+#define RCLOE1 RTCC0_bit.no5\r
+#define RTCE RTCC0_bit.no7\r
+#define RWAIT RTCC1_bit.no0\r
+#define RWST RTCC1_bit.no1\r
+#define RIFG RTCC1_bit.no3\r
+#define WAFG RTCC1_bit.no4\r
+#define WALIE RTCC1_bit.no6\r
+#define WALE RTCC1_bit.no7\r
+#define HIOSTOP CSC_bit.no0\r
+#define XTSTOP CSC_bit.no6\r
+#define MSTOP CSC_bit.no7\r
+#define SDIV CKC_bit.no3\r
+#define MCM0 CKC_bit.no4\r
+#define MCS CKC_bit.no5\r
+#define CSS CKC_bit.no6\r
+#define CLS CKC_bit.no7\r
+#define PCLOE0 CKS0_bit.no7\r
+#define PCLOE1 CKS1_bit.no7\r
+#define LVIF LVIM_bit.no0\r
+#define LVIOMSK LVIM_bit.no1\r
+#define LVISEN LVIM_bit.no7\r
+#define LVILV LVIS_bit.no0\r
+#define LVIMD LVIS_bit.no7\r
+#define DWAIT0 DMC0_bit.no4\r
+#define DS0 DMC0_bit.no5\r
+#define DRS0 DMC0_bit.no6\r
+#define STG0 DMC0_bit.no7\r
+#define DWAIT1 DMC1_bit.no4\r
+#define DS1 DMC1_bit.no5\r
+#define DRS1 DMC1_bit.no6\r
+#define STG1 DMC1_bit.no7\r
+#define DST0 DRC0_bit.no0\r
+#define DEN0 DRC0_bit.no7\r
+#define DST1 DRC1_bit.no0\r
+#define DEN1 DRC1_bit.no7\r
+#define PIF6 IF2_bit.no3\r
+#define PIF8 IF2_bit.no5\r
+#define PIF9 IF2_bit.no6\r
+#define MDIF IF2H_bit.no5\r
+#define FLIF IF2H_bit.no7\r
+#define PMK6 MK2_bit.no3\r
+#define PMK8 MK2_bit.no5\r
+#define PMK9 MK2_bit.no6\r
+#define MDMK MK2H_bit.no5\r
+#define FLMK MK2H_bit.no7\r
+#define PPR06 PR02_bit.no3\r
+#define PPR08 PR02_bit.no5\r
+#define PPR09 PR02_bit.no6\r
+#define MDPR0 PR02H_bit.no5\r
+#define FLPR0 PR02H_bit.no7\r
+#define PPR16 PR12_bit.no3\r
+#define PPR18 PR12_bit.no5\r
+#define PPR19 PR12_bit.no6\r
+#define MDPR1 PR12H_bit.no5\r
+#define FLPR1 PR12H_bit.no7\r
+#define WDTIIF IF0_bit.no0\r
+#define LVIIF IF0_bit.no1\r
+#define PIF0 IF0_bit.no2\r
+#define PIF1 IF0_bit.no3\r
+#define PIF2 IF0_bit.no4\r
+#define PIF3 IF0_bit.no5\r
+#define PIF4 IF0_bit.no6\r
+#define PIF5 IF0_bit.no7\r
+#define DMAIF0 IF0H_bit.no3\r
+#define DMAIF1 IF0H_bit.no4\r
+#define CSIIF00 IF0H_bit.no5\r
+#define IICIF00 IF0H_bit.no5\r
+#define STIF0 IF0H_bit.no5\r
+#define TMIF00 IF0H_bit.no6\r
+#define CSIIF01 IF0H_bit.no7\r
+#define IICIF01 IF0H_bit.no7\r
+#define SRIF0 IF0H_bit.no7\r
+#define SREIF0 IF1_bit.no0\r
+#define TMIF01H IF1_bit.no0\r
+#define TMIF03H IF1_bit.no3\r
+#define IICAIF0 IF1_bit.no4\r
+#define TMIF01 IF1_bit.no5\r
+#define TMIF02 IF1_bit.no6\r
+#define TMIF03 IF1_bit.no7\r
+#define ADIF IF1H_bit.no0\r
+#define RTCIF IF1H_bit.no1\r
+#define ITIF IF1H_bit.no2\r
+#define KRIF IF1H_bit.no3\r
+#define USBIF IF1H_bit.no4\r
+#define RSUIF IF1H_bit.no5\r
+#define WDTIMK MK0_bit.no0\r
+#define LVIMK MK0_bit.no1\r
+#define PMK0 MK0_bit.no2\r
+#define PMK1 MK0_bit.no3\r
+#define PMK2 MK0_bit.no4\r
+#define PMK3 MK0_bit.no5\r
+#define PMK4 MK0_bit.no6\r
+#define PMK5 MK0_bit.no7\r
+#define DMAMK0 MK0H_bit.no3\r
+#define DMAMK1 MK0H_bit.no4\r
+#define CSIMK00 MK0H_bit.no5\r
+#define IICMK00 MK0H_bit.no5\r
+#define STMK0 MK0H_bit.no5\r
+#define TMMK00 MK0H_bit.no6\r
+#define CSIMK01 MK0H_bit.no7\r
+#define IICMK01 MK0H_bit.no7\r
+#define SRMK0 MK0H_bit.no7\r
+#define SREMK0 MK1_bit.no0\r
+#define TMMK01H MK1_bit.no0\r
+#define TMMK03H MK1_bit.no3\r
+#define IICAMK0 MK1_bit.no4\r
+#define TMMK01 MK1_bit.no5\r
+#define TMMK02 MK1_bit.no6\r
+#define TMMK03 MK1_bit.no7\r
+#define ADMK MK1H_bit.no0\r
+#define RTCMK MK1H_bit.no1\r
+#define ITMK MK1H_bit.no2\r
+#define KRMK MK1H_bit.no3\r
+#define USBMK MK1H_bit.no4\r
+#define RSUMK MK1H_bit.no5\r
+#define WDTIPR0 PR00_bit.no0\r
+#define LVIPR0 PR00_bit.no1\r
+#define PPR00 PR00_bit.no2\r
+#define PPR01 PR00_bit.no3\r
+#define PPR02 PR00_bit.no4\r
+#define PPR03 PR00_bit.no5\r
+#define PPR04 PR00_bit.no6\r
+#define PPR05 PR00_bit.no7\r
+#define DMAPR00 PR00H_bit.no3\r
+#define DMAPR01 PR00H_bit.no4\r
+#define CSIPR000 PR00H_bit.no5\r
+#define IICPR000 PR00H_bit.no5\r
+#define STPR00 PR00H_bit.no5\r
+#define TMPR000 PR00H_bit.no6\r
+#define CSIPR001 PR00H_bit.no7\r
+#define IICPR001 PR00H_bit.no7\r
+#define SRPR00 PR00H_bit.no7\r
+#define SREPR00 PR01_bit.no0\r
+#define TMPR001H PR01_bit.no0\r
+#define TMPR003H PR01_bit.no3\r
+#define IICAPR00 PR01_bit.no4\r
+#define TMPR001 PR01_bit.no5\r
+#define TMPR002 PR01_bit.no6\r
+#define TMPR003 PR01_bit.no7\r
+#define ADPR0 PR01H_bit.no0\r
+#define RTCPR0 PR01H_bit.no1\r
+#define ITPR0 PR01H_bit.no2\r
+#define KRPR0 PR01H_bit.no3\r
+#define USBPR0 PR01H_bit.no4\r
+#define RSUPR0 PR01H_bit.no5\r
+#define WDTIPR1 PR10_bit.no0\r
+#define LVIPR1 PR10_bit.no1\r
+#define PPR10 PR10_bit.no2\r
+#define PPR11 PR10_bit.no3\r
+#define PPR12 PR10_bit.no4\r
+#define PPR13 PR10_bit.no5\r
+#define PPR14 PR10_bit.no6\r
+#define PPR15 PR10_bit.no7\r
+#define DMAPR10 PR10H_bit.no3\r
+#define DMAPR11 PR10H_bit.no4\r
+#define CSIPR100 PR10H_bit.no5\r
+#define IICPR100 PR10H_bit.no5\r
+#define STPR10 PR10H_bit.no5\r
+#define TMPR100 PR10H_bit.no6\r
+#define CSIPR101 PR10H_bit.no7\r
+#define IICPR101 PR10H_bit.no7\r
+#define SRPR10 PR10H_bit.no7\r
+#define SREPR10 PR11_bit.no0\r
+#define TMPR101H PR11_bit.no0\r
+#define TMPR103H PR11_bit.no3\r
+#define IICAPR10 PR11_bit.no4\r
+#define TMPR101 PR11_bit.no5\r
+#define TMPR102 PR11_bit.no6\r
+#define TMPR103 PR11_bit.no7\r
+#define ADPR1 PR11H_bit.no0\r
+#define RTCPR1 PR11H_bit.no1\r
+#define ITPR1 PR11H_bit.no2\r
+#define KRPR1 PR11H_bit.no3\r
+#define USBPR1 PR11H_bit.no4\r
+#define RSUPR1 PR11H_bit.no5\r
+#define MAA PMC_bit.no0\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#define RST_vect (0x0)\r
+#define INTDBG_vect (0x2)\r
+#define INTSRO_vect (0x4)\r
+#define INTWDTI_vect (0x4)\r
+#define INTLVI_vect (0x6)\r
+#define INTP0_vect (0x8)\r
+#define INTP1_vect (0xA)\r
+#define INTP2_vect (0xC)\r
+#define INTP3_vect (0xE)\r
+#define INTP4_vect (0x10)\r
+#define INTP5_vect (0x12)\r
+#define INTDMA0_vect (0x1A)\r
+#define INTDMA1_vect (0x1C)\r
+#define INTCSI00_vect (0x1E)\r
+#define INTIIC00_vect (0x1E)\r
+#define INTST0_vect (0x1E)\r
+#define INTTM00_vect (0x20)\r
+#define INTCSI01_vect (0x22)\r
+#define INTIIC01_vect (0x22)\r
+#define INTSR0_vect (0x22)\r
+#define INTSRE0_vect (0x24)\r
+#define INTTM01H_vect (0x24)\r
+#define INTTM03H_vect (0x2A)\r
+#define INTIICA0_vect (0x2C)\r
+#define INTTM01_vect (0x2E)\r
+#define INTTM02_vect (0x30)\r
+#define INTTM03_vect (0x32)\r
+#define INTAD_vect (0x34)\r
+#define INTRTC_vect (0x36)\r
+#define INTIT_vect (0x38)\r
+#define INTKR_vect (0x3A)\r
+#define INTUSB_vect (0x3C)\r
+#define INTRSUM_vect (0x3E)\r
+#define INTP6_vect (0x4A)\r
+#define INTP8_vect (0x4E)\r
+#define INTP9_vect (0x50)\r
+#define INTMD_vect (0x5E)\r
+#define INTFL_vect (0x62)\r
+#define BRK_I_vect (0x7E)\r
+#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1C */
+/* FILE : iodefine_ext.h */
+/* DESCRIPTION : Definition of Extended SFRs */
+/* CPU SERIES : RL78 - G1C */
+/* CPU TYPE : R5F10JGC */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10JGC.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* File Version V1.00 */\r
+/* Tool Version 1.9.7121 */\r
+/* Date Generated 13/11/2012 */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_EXT_H\r
+#define IODEFINE_EXT_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_adm2 {\r
+ unsigned char adm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pms {\r
+ unsigned char pms;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu0 {\r
+ unsigned char pu0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu1 {\r
+ unsigned char pu1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu3 {\r
+ unsigned char pu3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu4 {\r
+ unsigned char pu4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu5 {\r
+ unsigned char pu5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu7 {\r
+ unsigned char pu7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu12 {\r
+ unsigned char pu12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu14 {\r
+ unsigned char pu14;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim0 {\r
+ unsigned char pim0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim3 {\r
+ unsigned char pim3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim5 {\r
+ unsigned char pim5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom0 {\r
+ unsigned char pom0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom3 {\r
+ unsigned char pom3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom5 {\r
+ unsigned char pom5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom7 {\r
+ unsigned char pom7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc12 {\r
+ unsigned char pmc12;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen0 {\r
+ unsigned char nfen0;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen1 {\r
+ unsigned char nfen1;\r
+ __BITS8 BIT;\r
+};\r
+union un_isc {\r
+ unsigned char isc;\r
+ __BITS8 BIT;\r
+};\r
+union un_dflctl {\r
+ unsigned char dflctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_bectl {\r
+ unsigned char bectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsse {\r
+ unsigned char fsse;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfs {\r
+ unsigned char pfs;\r
+ __BITS8 BIT;\r
+};\r
+union un_mduc {\r
+ unsigned char mduc;\r
+ __BITS8 BIT;\r
+};\r
+union un_per0 {\r
+ unsigned char per0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rmc {\r
+ unsigned char rmc;\r
+ __BITS8 BIT;\r
+};\r
+union un_rpectl {\r
+ unsigned char rpectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_se0l {\r
+ unsigned char se0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss0l {\r
+ unsigned char ss0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st0l {\r
+ unsigned char st0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe0l {\r
+ unsigned char soe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_te0l {\r
+ unsigned char te0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ts0l {\r
+ unsigned char ts0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_tt0l {\r
+ unsigned char tt0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_toe0l {\r
+ unsigned char toe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl00 {\r
+ unsigned char iicctl00;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl01 {\r
+ unsigned char iicctl01;\r
+ __BITS8 BIT;\r
+};\r
+union un_dscctl {\r
+ unsigned char dscctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_mckc {\r
+ unsigned char mckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_crc0ctl {\r
+ unsigned char crc0ctl;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
+#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
+#define ADUL (*(volatile unsigned char *)0xF0011)\r
+#define ADLL (*(volatile unsigned char *)0xF0012)\r
+#define ADTES (*(volatile unsigned char *)0xF0013)\r
+#define PMS (*(volatile union un_pms *)0xF0018).pms\r
+#define PMS_bit (*(volatile union un_pms *)0xF0018).BIT\r
+#define PIOR (*(volatile unsigned char *)0xF001A)\r
+#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
+#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
+#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
+#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT\r
+#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3\r
+#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT\r
+#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4\r
+#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
+#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
+#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
+#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
+#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
+#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
+#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
+#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14\r
+#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT\r
+#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
+#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
+#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3\r
+#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT\r
+#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5\r
+#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT\r
+#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
+#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
+#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3\r
+#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT\r
+#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
+#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
+#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7\r
+#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT\r
+#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12\r
+#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT\r
+#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
+#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
+#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
+#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
+#define ISC (*(volatile union un_isc *)0xF0073).isc\r
+#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
+#define TIS0 (*(volatile unsigned char *)0xF0074)\r
+#define ADPC (*(volatile unsigned char *)0xF0076)\r
+#define IAWCTL (*(volatile unsigned char *)0xF0077)\r
+#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
+#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
+#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
+#define BPAH0 (*(volatile unsigned char *)0xF0082)\r
+#define BPAS0 (*(volatile unsigned char *)0xF0083)\r
+#define BACDVL0 (*(volatile unsigned char *)0xF0084)\r
+#define BACDVH0 (*(volatile unsigned char *)0xF0085)\r
+#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
+#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
+#define MONMOD (*(volatile unsigned char *)0xF0088)\r
+#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
+#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
+#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
+#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl\r
+#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT\r
+#define HOCODIV (*(volatile unsigned char *)0xF00A8)\r
+#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)\r
+#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)\r
+#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)\r
+#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)\r
+#define FLSEC (*(volatile unsigned short *)0xF00B0)\r
+#define FLFSWS (*(volatile unsigned short *)0xF00B2)\r
+#define FLFSWE (*(volatile unsigned short *)0xF00B4)\r
+#define FSSET (*(volatile unsigned char *)0xF00B6)\r
+#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse\r
+#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT\r
+#define FLFADL (*(volatile unsigned short *)0xF00B8)\r
+#define FLFADH (*(volatile unsigned char *)0xF00BA)\r
+#define PFCMD (*(volatile unsigned char *)0xF00C0)\r
+#define PFS (*(volatile union un_pfs *)0xF00C1).pfs\r
+#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT\r
+#define FLRL (*(volatile unsigned short *)0xF00C2)\r
+#define FLRH (*(volatile unsigned short *)0xF00C4)\r
+#define FLWE (*(volatile unsigned char *)0xF00C6)\r
+#define FLRE (*(volatile unsigned char *)0xF00C7)\r
+#define FLTMS (*(volatile unsigned short *)0xF00C8)\r
+#define DFLMC (*(volatile unsigned short *)0xF00CA)\r
+#define FLMCL (*(volatile unsigned short *)0xF00CC)\r
+#define FLMCH (*(volatile unsigned char *)0xF00CE)\r
+#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
+#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
+#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
+#define MDCL (*(volatile unsigned short *)0xF00E0)\r
+#define MDCH (*(volatile unsigned short *)0xF00E2)\r
+#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc\r
+#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT\r
+#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
+#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
+#define OSMC (*(volatile unsigned char *)0xF00F3)\r
+#define RMC (*(volatile union un_rmc *)0xF00F4).rmc\r
+#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT\r
+#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl\r
+#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT\r
+#define BCDADJ (*(volatile unsigned char *)0xF00FE)\r
+#define VECTCTRL (*(volatile unsigned char *)0xF00FF)\r
+#define SSR00 (*(volatile unsigned short *)0xF0100)\r
+#define SSR00L (*(volatile unsigned char *)0xF0100)\r
+#define SSR01 (*(volatile unsigned short *)0xF0102)\r
+#define SSR01L (*(volatile unsigned char *)0xF0102)\r
+#define SIR00 (*(volatile unsigned short *)0xF0108)\r
+#define SIR00L (*(volatile unsigned char *)0xF0108)\r
+#define SIR01 (*(volatile unsigned short *)0xF010A)\r
+#define SIR01L (*(volatile unsigned char *)0xF010A)\r
+#define SMR00 (*(volatile unsigned short *)0xF0110)\r
+#define SMR01 (*(volatile unsigned short *)0xF0112)\r
+#define SCR00 (*(volatile unsigned short *)0xF0118)\r
+#define SCR01 (*(volatile unsigned short *)0xF011A)\r
+#define SE0 (*(volatile unsigned short *)0xF0120)\r
+#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
+#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
+#define SS0 (*(volatile unsigned short *)0xF0122)\r
+#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l\r
+#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT\r
+#define ST0 (*(volatile unsigned short *)0xF0124)\r
+#define ST0L (*(volatile union un_st0l *)0xF0124).st0l\r
+#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT\r
+#define SPS0 (*(volatile unsigned short *)0xF0126)\r
+#define SPS0L (*(volatile unsigned char *)0xF0126)\r
+#define SO0 (*(volatile unsigned short *)0xF0128)\r
+#define SOE0 (*(volatile unsigned short *)0xF012A)\r
+#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l\r
+#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT\r
+#define EDR00 (*(volatile unsigned short *)0xF012C)\r
+#define EDR00L (*(volatile unsigned char *)0xF012C)\r
+#define EDR01 (*(volatile unsigned short *)0xF012E)\r
+#define EDR01L (*(volatile unsigned char *)0xF012E)\r
+#define SOL0 (*(volatile unsigned short *)0xF0134)\r
+#define SOL0L (*(volatile unsigned char *)0xF0134)\r
+#define SSC0 (*(volatile unsigned short *)0xF0138)\r
+#define SSC0L (*(volatile unsigned char *)0xF0138)\r
+#define TCR00 (*(volatile unsigned short *)0xF0180)\r
+#define TCR01 (*(volatile unsigned short *)0xF0182)\r
+#define TCR02 (*(volatile unsigned short *)0xF0184)\r
+#define TCR03 (*(volatile unsigned short *)0xF0186)\r
+#define TMR00 (*(volatile unsigned short *)0xF0190)\r
+#define TMR01 (*(volatile unsigned short *)0xF0192)\r
+#define TMR02 (*(volatile unsigned short *)0xF0194)\r
+#define TMR03 (*(volatile unsigned short *)0xF0196)\r
+#define TSR00 (*(volatile unsigned short *)0xF01A0)\r
+#define TSR00L (*(volatile unsigned char *)0xF01A0)\r
+#define TSR01 (*(volatile unsigned short *)0xF01A2)\r
+#define TSR01L (*(volatile unsigned char *)0xF01A2)\r
+#define TSR02 (*(volatile unsigned short *)0xF01A4)\r
+#define TSR02L (*(volatile unsigned char *)0xF01A4)\r
+#define TSR03 (*(volatile unsigned short *)0xF01A6)\r
+#define TSR03L (*(volatile unsigned char *)0xF01A6)\r
+#define TE0 (*(volatile unsigned short *)0xF01B0)\r
+#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l\r
+#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT\r
+#define TS0 (*(volatile unsigned short *)0xF01B2)\r
+#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l\r
+#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT\r
+#define TT0 (*(volatile unsigned short *)0xF01B4)\r
+#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l\r
+#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT\r
+#define TPS0 (*(volatile unsigned short *)0xF01B6)\r
+#define TO0 (*(volatile unsigned short *)0xF01B8)\r
+#define TO0L (*(volatile unsigned char *)0xF01B8)\r
+#define TOE0 (*(volatile unsigned short *)0xF01BA)\r
+#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l\r
+#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT\r
+#define TOL0 (*(volatile unsigned short *)0xF01BC)\r
+#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
+#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
+#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
+#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
+#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
+#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
+#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT\r
+#define IICWL0 (*(volatile unsigned char *)0xF0232)\r
+#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
+#define SVA0 (*(volatile unsigned char *)0xF0234)\r
+#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
+#define DSCCTL (*(volatile union un_dscctl *)0xF02E5).dscctl\r
+#define DSCCTL_bit (*(volatile union un_dscctl *)0xF02E5).BIT\r
+#define MCKC (*(volatile union un_mckc *)0xF02E6).mckc\r
+#define MCKC_bit (*(volatile union un_mckc *)0xF02E6).BIT\r
+#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
+#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
+#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
+#define CRCD (*(volatile unsigned short *)0xF02FA)\r
+#define SYSCFG (*(volatile unsigned short *)0xF0400)\r
+#define SYSCFG1 (*(volatile unsigned short *)0xF0402)\r
+#define SYSSTS0 (*(volatile unsigned short *)0xF0404)\r
+#define SYSSTS1 (*(volatile unsigned short *)0xF0406)\r
+#define DVSTCTR0 (*(volatile unsigned short *)0xF0408)\r
+#define DVSTCTR1 (*(volatile unsigned short *)0xF040A)\r
+#define DMA0PCFG (*(volatile unsigned short *)0xF0410)\r
+#define DMA1PCFG (*(volatile unsigned short *)0xF0412)\r
+#define CFIFOM (*(volatile unsigned short *)0xF0414)\r
+#define CFIFOML (*(volatile unsigned char *)0xF0414)\r
+#define D0FIFOM (*(volatile unsigned short *)0xF0418)\r
+#define D0FIFOML (*(volatile unsigned char *)0xF0418)\r
+#define D1FIFOM (*(volatile unsigned short *)0xF041C)\r
+#define D1FIFOML (*(volatile unsigned char *)0xF041C)\r
+#define CFIFOSEL (*(volatile unsigned short *)0xF0420)\r
+#define CFIFOCTR (*(volatile unsigned short *)0xF0422)\r
+#define D0FIFOSEL (*(volatile unsigned short *)0xF0428)\r
+#define D0FIFOCTR (*(volatile unsigned short *)0xF042A)\r
+#define D1FIFOSEL (*(volatile unsigned short *)0xF042C)\r
+#define D1FIFOCTR (*(volatile unsigned short *)0xF042E)\r
+#define INTENB0 (*(volatile unsigned short *)0xF0430)\r
+#define INTENB1 (*(volatile unsigned short *)0xF0432)\r
+#define INTENB2 (*(volatile unsigned short *)0xF0434)\r
+#define BRDYENB (*(volatile unsigned short *)0xF0436)\r
+#define NRDYENB (*(volatile unsigned short *)0xF0438)\r
+#define BEMPENB (*(volatile unsigned short *)0xF043A)\r
+#define SOFCFG (*(volatile unsigned short *)0xF043C)\r
+#define INTSTS0 (*(volatile unsigned short *)0xF0440)\r
+#define INTSTS1 (*(volatile unsigned short *)0xF0442)\r
+#define INTSTS2 (*(volatile unsigned short *)0xF0444)\r
+#define BRDYSTS (*(volatile unsigned short *)0xF0446)\r
+#define NRDYSTS (*(volatile unsigned short *)0xF0448)\r
+#define BEMPSTS (*(volatile unsigned short *)0xF044A)\r
+#define FRMNUM (*(volatile unsigned short *)0xF044C)\r
+#define USBADDR (*(volatile unsigned short *)0xF0450)\r
+#define USBREQ (*(volatile unsigned short *)0xF0454)\r
+#define USBVAL (*(volatile unsigned short *)0xF0456)\r
+#define USBINDX (*(volatile unsigned short *)0xF0458)\r
+#define USBLENG (*(volatile unsigned short *)0xF045A)\r
+#define DCPCFG (*(volatile unsigned short *)0xF045C)\r
+#define DCPMAXP (*(volatile unsigned short *)0xF045E)\r
+#define DCPCTR (*(volatile unsigned short *)0xF0460)\r
+#define PIPESEL (*(volatile unsigned short *)0xF0464)\r
+#define PIPECFG (*(volatile unsigned short *)0xF0468)\r
+#define PIPEMAXP (*(volatile unsigned short *)0xF046C)\r
+#define PIPEPERI (*(volatile unsigned short *)0xF046E)\r
+#define PIPE4CTR (*(volatile unsigned short *)0xF0476)\r
+#define PIPE5CTR (*(volatile unsigned short *)0xF0478)\r
+#define PIPE6CTR (*(volatile unsigned short *)0xF047A)\r
+#define PIPE7CTR (*(volatile unsigned short *)0xF047C)\r
+#define PIPE4TRE (*(volatile unsigned short *)0xF049C)\r
+#define PIPE4TRN (*(volatile unsigned short *)0xF049E)\r
+#define PIPE5TRE (*(volatile unsigned short *)0xF04A0)\r
+#define PIPE5TRN (*(volatile unsigned short *)0xF04A2)\r
+#define USBBCCTRL0 (*(volatile unsigned short *)0xF04B0)\r
+#define USBBCCTRL1 (*(volatile unsigned short *)0xF04B4)\r
+#define USBBCOPT0 (*(volatile unsigned short *)0xF04B8)\r
+#define USBBCOPT1 (*(volatile unsigned short *)0xF04BC)\r
+#define USBMC (*(volatile unsigned short *)0xF04CC)\r
+#define DEVADD0 (*(volatile unsigned short *)0xF04D0)\r
+#define DEVADD1 (*(volatile unsigned short *)0xF04D2)\r
+#define DEVADD2 (*(volatile unsigned short *)0xF04D4)\r
+#define DEVADD3 (*(volatile unsigned short *)0xF04D6)\r
+#define DEVADD4 (*(volatile unsigned short *)0xF04D8)\r
+#define DEVADD5 (*(volatile unsigned short *)0xF04DA)\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADTYP ADM2_bit.no0\r
+#define AWC ADM2_bit.no2\r
+#define ADRCK ADM2_bit.no3\r
+#define DFLEN DFLCTL_bit.no0\r
+#define BRSAM BECTL_bit.no0\r
+#define ESQST FSSE_bit.no7\r
+#define DIVST MDUC_bit.no0\r
+#define MACSF MDUC_bit.no1\r
+#define MACOF MDUC_bit.no2\r
+#define MDSM MDUC_bit.no3\r
+#define MACMODE MDUC_bit.no6\r
+#define DIVMODE MDUC_bit.no7\r
+#define TAU0EN PER0_bit.no0\r
+#define SAU0EN PER0_bit.no2\r
+#define IICA0EN PER0_bit.no4\r
+#define ADCEN PER0_bit.no5\r
+#define RTCEN PER0_bit.no7\r
+#define PAENB RMC_bit.no0\r
+#define WDVOL RMC_bit.no7\r
+#define RPEF RPECTL_bit.no0\r
+#define RPERDIS RPECTL_bit.no7\r
+#define SPT0 IICCTL00_bit.no0\r
+#define STT0 IICCTL00_bit.no1\r
+#define ACKE0 IICCTL00_bit.no2\r
+#define WTIM0 IICCTL00_bit.no3\r
+#define SPIE0 IICCTL00_bit.no4\r
+#define WREL0 IICCTL00_bit.no5\r
+#define LREL0 IICCTL00_bit.no6\r
+#define IICE0 IICCTL00_bit.no7\r
+#define PRS0 IICCTL01_bit.no0\r
+#define DFC0 IICCTL01_bit.no2\r
+#define SMC0 IICCTL01_bit.no3\r
+#define DAD0 IICCTL01_bit.no4\r
+#define CLD0 IICCTL01_bit.no5\r
+#define WUP0 IICCTL01_bit.no7\r
+#define CRC0EN CRC0CTL_bit.no7\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78L13 */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - L13 */
+/* CPU TYPE : R5F10WMG */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10WMG.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* Version E1.00d */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_H\r
+#define IODEFINE_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_p0 {\r
+ unsigned char p0;\r
+ __BITS8 BIT;\r
+};\r
+union un_p1 {\r
+ unsigned char p1;\r
+ __BITS8 BIT;\r
+};\r
+union un_p2 {\r
+ unsigned char p2;\r
+ __BITS8 BIT;\r
+};\r
+union un_p3 {\r
+ unsigned char p3;\r
+ __BITS8 BIT;\r
+};\r
+union un_p4 {\r
+ unsigned char p4;\r
+ __BITS8 BIT;\r
+};\r
+union un_p5 {\r
+ unsigned char p5;\r
+ __BITS8 BIT;\r
+};\r
+union un_p6 {\r
+ unsigned char p6;\r
+ __BITS8 BIT;\r
+};\r
+union un_p7 {\r
+ unsigned char p7;\r
+ __BITS8 BIT;\r
+};\r
+union un_p12 {\r
+ unsigned char p12;\r
+ __BITS8 BIT;\r
+};\r
+union un_p13 {\r
+ unsigned char p13;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm0 {\r
+ unsigned char pm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm1 {\r
+ unsigned char pm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm2 {\r
+ unsigned char pm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm3 {\r
+ unsigned char pm3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm4 {\r
+ unsigned char pm4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm5 {\r
+ unsigned char pm5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm6 {\r
+ unsigned char pm6;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm7 {\r
+ unsigned char pm7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm12 {\r
+ unsigned char pm12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm13 {\r
+ unsigned char pm13;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm0 {\r
+ unsigned char adm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_ads {\r
+ unsigned char ads;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm1 {\r
+ unsigned char adm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_krctl {\r
+ unsigned char krctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_krm0 {\r
+ unsigned char krm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp0 {\r
+ unsigned char egp0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn0 {\r
+ unsigned char egn0;\r
+ __BITS8 BIT;\r
+};\r
+union un_lcdm1 {\r
+ unsigned char lcdm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_mlcd {\r
+ unsigned char mlcd;\r
+ __BITS8 BIT;\r
+};\r
+union un_iics0 {\r
+ unsigned char iics0;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf0 {\r
+ unsigned char iicf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_flars {\r
+ unsigned char flars;\r
+ __BITS8 BIT;\r
+};\r
+union un_fssq {\r
+ unsigned char fssq;\r
+ __BITS8 BIT;\r
+};\r
+union un_flrst {\r
+ unsigned char flrst;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsastl {\r
+ unsigned char fsastl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsasth {\r
+ unsigned char fsasth;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc0 {\r
+ unsigned char rtcc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc1 {\r
+ unsigned char rtcc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_csc {\r
+ unsigned char csc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ostc {\r
+ unsigned char ostc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ckc {\r
+ unsigned char ckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks0 {\r
+ unsigned char cks0;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks1 {\r
+ unsigned char cks1;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvim {\r
+ unsigned char lvim;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvis {\r
+ unsigned char lvis;\r
+ __BITS8 BIT;\r
+};\r
+union un_monsta0 {\r
+ unsigned char monsta0;\r
+ __BITS8 BIT;\r
+};\r
+union un_asim {\r
+ unsigned char asim;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc0 {\r
+ unsigned char dmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc1 {\r
+ unsigned char dmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc0 {\r
+ unsigned char drc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc1 {\r
+ unsigned char drc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2 {\r
+ unsigned short if2;\r
+ __BITS16 BIT;\r
+};\r
+union un_if2l {\r
+ unsigned char if2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2h {\r
+ unsigned char if2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if3 {\r
+ unsigned short if3;\r
+ __BITS16 BIT;\r
+};\r
+union un_if3l {\r
+ unsigned char if3l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2 {\r
+ unsigned short mk2;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk2l {\r
+ unsigned char mk2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2h {\r
+ unsigned char mk2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk3 {\r
+ unsigned short mk3;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk3l {\r
+ unsigned char mk3l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02 {\r
+ unsigned short pr02;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr02l {\r
+ unsigned char pr02l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02h {\r
+ unsigned char pr02h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr03 {\r
+ unsigned short pr03;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr03l {\r
+ unsigned char pr03l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12 {\r
+ unsigned short pr12;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr12l {\r
+ unsigned char pr12l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12h {\r
+ unsigned char pr12h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr13 {\r
+ unsigned short pr13;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr13l {\r
+ unsigned char pr13l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0 {\r
+ unsigned short if0;\r
+ __BITS16 BIT;\r
+};\r
+union un_if0l {\r
+ unsigned char if0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0h {\r
+ unsigned char if0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1 {\r
+ unsigned short if1;\r
+ __BITS16 BIT;\r
+};\r
+union un_if1l {\r
+ unsigned char if1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1h {\r
+ unsigned char if1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0 {\r
+ unsigned short mk0;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk0l {\r
+ unsigned char mk0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0h {\r
+ unsigned char mk0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1 {\r
+ unsigned short mk1;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk1l {\r
+ unsigned char mk1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1h {\r
+ unsigned char mk1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00 {\r
+ unsigned short pr00;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr00l {\r
+ unsigned char pr00l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00h {\r
+ unsigned char pr00h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01 {\r
+ unsigned short pr01;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr01l {\r
+ unsigned char pr01l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01h {\r
+ unsigned char pr01h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10 {\r
+ unsigned short pr10;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr10l {\r
+ unsigned char pr10l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10h {\r
+ unsigned char pr10h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11 {\r
+ unsigned short pr11;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr11l {\r
+ unsigned char pr11l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11h {\r
+ unsigned char pr11h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc {\r
+ unsigned char pmc;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
+#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
+#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
+#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
+#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
+#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
+#define SDR12 (*(volatile unsigned short *)0xFFF14)\r
+#define TXD3 (*(volatile unsigned char *)0xFFF14)\r
+#define SDR13 (*(volatile unsigned short *)0xFFF16)\r
+#define RXD3 (*(volatile unsigned char *)0xFFF16)\r
+#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
+#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
+#define PM13 (*(volatile union un_pm13 *)0xFFF2D).pm13\r
+#define PM13_bit (*(volatile union un_pm13 *)0xFFF2D).BIT\r
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
+#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
+#define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl\r
+#define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT\r
+#define KRF (*(volatile unsigned char *)0xFFF35)\r
+#define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0\r
+#define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT\r
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
+#define LCDM0 (*(volatile unsigned char *)0xFFF40)\r
+#define LCDM1 (*(volatile union un_lcdm1 *)0xFFF41).lcdm1\r
+#define LCDM1_bit (*(volatile union un_lcdm1 *)0xFFF41).BIT\r
+#define LCDC0 (*(volatile unsigned char *)0xFFF42)\r
+#define VLCD (*(volatile unsigned char *)0xFFF43)\r
+#define SDR02 (*(volatile unsigned short *)0xFFF44)\r
+#define SIO10 (*(volatile unsigned char *)0xFFF44)\r
+#define TXD1 (*(volatile unsigned char *)0xFFF44)\r
+#define SDR03 (*(volatile unsigned short *)0xFFF46)\r
+#define RXD1 (*(volatile unsigned char *)0xFFF46)\r
+#define SDR10 (*(volatile unsigned short *)0xFFF48)\r
+#define TXD2 (*(volatile unsigned char *)0xFFF48)\r
+#define SDR11 (*(volatile unsigned short *)0xFFF4A)\r
+#define RXD2 (*(volatile unsigned char *)0xFFF4A)\r
+#define MLCD (*(volatile union un_mlcd *)0xFFF4C).mlcd\r
+#define MLCD_bit (*(volatile union un_mlcd *)0xFFF4C).BIT\r
+#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
+#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
+#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
+#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
+#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
+#define TDR04 (*(volatile unsigned short *)0xFFF68)\r
+#define TDR05 (*(volatile unsigned short *)0xFFF6A)\r
+#define TDR06 (*(volatile unsigned short *)0xFFF6C)\r
+#define TDR07 (*(volatile unsigned short *)0xFFF6E)\r
+#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
+#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
+#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
+#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
+#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
+#define ITMC (*(volatile unsigned short *)0xFFF90)\r
+#define SEC (*(volatile unsigned char *)0xFFF92)\r
+#define MIN (*(volatile unsigned char *)0xFFF93)\r
+#define HOUR (*(volatile unsigned char *)0xFFF94)\r
+#define WEEK (*(volatile unsigned char *)0xFFF95)\r
+#define DAY (*(volatile unsigned char *)0xFFF96)\r
+#define MONTH (*(volatile unsigned char *)0xFFF97)\r
+#define YEAR (*(volatile unsigned char *)0xFFF98)\r
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
+#define CMC (*(volatile unsigned char *)0xFFFA0)\r
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
+#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
+#define RESF (*(volatile unsigned char *)0xFFFA8)\r
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
+#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
+#define RXB (*(volatile unsigned char *)0xFFFAD)\r
+#define TXS (*(volatile unsigned char *)0xFFFAD)\r
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
+#define DSA0 (*(volatile unsigned char *)0xFFFB0)\r
+#define DSA1 (*(volatile unsigned char *)0xFFFB1)\r
+#define DRA0 (*(volatile unsigned short *)0xFFFB2)\r
+#define DRA0L (*(volatile unsigned char *)0xFFFB2)\r
+#define DRA0H (*(volatile unsigned char *)0xFFFB3)\r
+#define DRA1 (*(volatile unsigned short *)0xFFFB4)\r
+#define DRA1L (*(volatile unsigned char *)0xFFFB4)\r
+#define DRA1H (*(volatile unsigned char *)0xFFFB5)\r
+#define DBC0 (*(volatile unsigned short *)0xFFFB6)\r
+#define DBC0L (*(volatile unsigned char *)0xFFFB6)\r
+#define DBC0H (*(volatile unsigned char *)0xFFFB7)\r
+#define DBC1 (*(volatile unsigned short *)0xFFFB8)\r
+#define DBC1L (*(volatile unsigned char *)0xFFFB8)\r
+#define DBC1H (*(volatile unsigned char *)0xFFFB9)\r
+#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0\r
+#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT\r
+#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1\r
+#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT\r
+#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0\r
+#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT\r
+#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1\r
+#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT\r
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
+#define IF3 (*(volatile union un_if3 *)0xFFFD2).if3\r
+#define IF3_bit (*(volatile union un_if3 *)0xFFFD2).BIT\r
+#define IF3L (*(volatile union un_if3l *)0xFFFD2).if3l\r
+#define IF3L_bit (*(volatile union un_if3l *)0xFFFD2).BIT\r
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
+#define MK3 (*(volatile union un_mk3 *)0xFFFD6).mk3\r
+#define MK3_bit (*(volatile union un_mk3 *)0xFFFD6).BIT\r
+#define MK3L (*(volatile union un_mk3l *)0xFFFD6).mk3l\r
+#define MK3L_bit (*(volatile union un_mk3l *)0xFFFD6).BIT\r
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
+#define PR03 (*(volatile union un_pr03 *)0xFFFDA).pr03\r
+#define PR03_bit (*(volatile union un_pr03 *)0xFFFDA).BIT\r
+#define PR03L (*(volatile union un_pr03l *)0xFFFDA).pr03l\r
+#define PR03L_bit (*(volatile union un_pr03l *)0xFFFDA).BIT\r
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
+#define PR13 (*(volatile union un_pr13 *)0xFFFDE).pr13\r
+#define PR13_bit (*(volatile union un_pr13 *)0xFFFDE).BIT\r
+#define PR13L (*(volatile union un_pr13l *)0xFFFDE).pr13l\r
+#define PR13L_bit (*(volatile union un_pr13l *)0xFFFDE).BIT\r
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
+#define MDAL (*(volatile unsigned short *)0xFFFF0)\r
+#define MULA (*(volatile unsigned short *)0xFFFF0)\r
+#define MDAH (*(volatile unsigned short *)0xFFFF2)\r
+#define MULB (*(volatile unsigned short *)0xFFFF2)\r
+#define MDBH (*(volatile unsigned short *)0xFFFF4)\r
+#define MULOH (*(volatile unsigned short *)0xFFFF4)\r
+#define MDBL (*(volatile unsigned short *)0xFFFF6)\r
+#define MULOL (*(volatile unsigned short *)0xFFFF6)\r
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADCE ADM0_bit.no0\r
+#define ADCS ADM0_bit.no7\r
+#define LCDVLM LCDM1_bit.no0\r
+#define LCDSEL LCDM1_bit.no3\r
+#define BLON LCDM1_bit.no4\r
+#define VLCON LCDM1_bit.no5\r
+#define SCOC LCDM1_bit.no6\r
+#define LCDON LCDM1_bit.no7\r
+#define OPTCKE MLCD_bit.no4\r
+#define COMEXP MLCD_bit.no6\r
+#define MLCDEN MLCD_bit.no7\r
+#define SPD0 IICS0_bit.no0\r
+#define STD0 IICS0_bit.no1\r
+#define ACKD0 IICS0_bit.no2\r
+#define TRC0 IICS0_bit.no3\r
+#define COI0 IICS0_bit.no4\r
+#define EXC0 IICS0_bit.no5\r
+#define ALD0 IICS0_bit.no6\r
+#define MSTS0 IICS0_bit.no7\r
+#define IICRSV0 IICF0_bit.no0\r
+#define STCEN0 IICF0_bit.no1\r
+#define IICBSY0 IICF0_bit.no6\r
+#define STCF0 IICF0_bit.no7\r
+#define FSSTP FSSQ_bit.no6\r
+#define SQST FSSQ_bit.no7\r
+#define SQEND FSASTH_bit.no6\r
+#define ESQEND FSASTH_bit.no7\r
+#define RCLOE1 RTCC0_bit.no5\r
+#define RCLOSEL RTCC0_bit.no6\r
+#define RTCE RTCC0_bit.no7\r
+#define RWAIT RTCC1_bit.no0\r
+#define RWST RTCC1_bit.no1\r
+#define RIFG RTCC1_bit.no3\r
+#define WAFG RTCC1_bit.no4\r
+#define RITE RTCC1_bit.no5\r
+#define WALIE RTCC1_bit.no6\r
+#define WALE RTCC1_bit.no7\r
+#define HIOSTOP CSC_bit.no0\r
+#define XTSTOP CSC_bit.no6\r
+#define MSTOP CSC_bit.no7\r
+#define SDIV CKC_bit.no3\r
+#define MCM0 CKC_bit.no4\r
+#define MCS CKC_bit.no5\r
+#define CSS CKC_bit.no6\r
+#define CLS CKC_bit.no7\r
+#define PCLOE0 CKS0_bit.no7\r
+#define PCLOE1 CKS1_bit.no7\r
+#define LVIF LVIM_bit.no0\r
+#define LVIOMSK LVIM_bit.no1\r
+#define LVISEN LVIM_bit.no7\r
+#define LVILV LVIS_bit.no0\r
+#define LVIMD LVIS_bit.no7\r
+#define DWAIT0 DMC0_bit.no4\r
+#define DS0 DMC0_bit.no5\r
+#define DRS0 DMC0_bit.no6\r
+#define STG0 DMC0_bit.no7\r
+#define DWAIT1 DMC1_bit.no4\r
+#define DS1 DMC1_bit.no5\r
+#define DRS1 DMC1_bit.no6\r
+#define STG1 DMC1_bit.no7\r
+#define DST0 DRC0_bit.no0\r
+#define DEN0 DRC0_bit.no7\r
+#define DST1 DRC1_bit.no0\r
+#define DEN1 DRC1_bit.no7\r
+#define TKBIF2 IF2_bit.no0\r
+#define TMIF04 IF2_bit.no1\r
+#define TMIF05 IF2_bit.no2\r
+#define PIF6 IF2_bit.no3\r
+#define PIF7 IF2_bit.no4\r
+#define LCDIF0 IF2_bit.no5\r
+#define CMPIF0 IF2_bit.no6\r
+#define CMPIF1 IF2_bit.no7\r
+#define TMIF06 IF2H_bit.no0\r
+#define TMIF07 IF2H_bit.no1\r
+#define SREIF3 IF2H_bit.no4\r
+#define MDIF IF2H_bit.no5\r
+#define FLIF IF2H_bit.no7\r
+#define DMAIF2 IF3_bit.no0\r
+#define DMAIF3 IF3_bit.no1\r
+#define TKBMK2 MK2_bit.no0\r
+#define TMMK04 MK2_bit.no1\r
+#define TMMK05 MK2_bit.no2\r
+#define PMK6 MK2_bit.no3\r
+#define PMK7 MK2_bit.no4\r
+#define LCDMK0 MK2_bit.no5\r
+#define CMPMK0 MK2_bit.no6\r
+#define CMPMK1 MK2_bit.no7\r
+#define TMMK06 MK2H_bit.no0\r
+#define TMMK07 MK2H_bit.no1\r
+#define SREMK3 MK2H_bit.no4\r
+#define MDMK MK2H_bit.no5\r
+#define FLMK MK2H_bit.no7\r
+#define DMAMK2 MK3_bit.no0\r
+#define DMAMK3 MK3_bit.no1\r
+#define TKBPR02 PR02_bit.no0\r
+#define TMPR004 PR02_bit.no1\r
+#define TMPR005 PR02_bit.no2\r
+#define PPR06 PR02_bit.no3\r
+#define PPR07 PR02_bit.no4\r
+#define LCDPR00 PR02_bit.no5\r
+#define CMPPR00 PR02_bit.no6\r
+#define CMPPR01 PR02_bit.no7\r
+#define TPR006 PR02H_bit.no0\r
+#define TPR007 PR02H_bit.no1\r
+#define SREPR03 PR02H_bit.no4\r
+#define MDPR0 PR02H_bit.no5\r
+#define FLPR0 PR02H_bit.no7\r
+#define DMAPR02 PR03_bit.no0\r
+#define DMAPR03 PR03_bit.no1\r
+#define TKBPR12 PR12_bit.no0\r
+#define TMPR104 PR12_bit.no1\r
+#define TMPR105 PR12_bit.no2\r
+#define PPR16 PR12_bit.no3\r
+#define PPR17 PR12_bit.no4\r
+#define LCDPR10 PR12_bit.no5\r
+#define CMPPR10 PR12_bit.no6\r
+#define CMPPR11 PR12_bit.no7\r
+#define TPR106 PR12H_bit.no0\r
+#define TPR107 PR12H_bit.no1\r
+#define SREPR13 PR12H_bit.no4\r
+#define MDPR1 PR12H_bit.no5\r
+#define FLPR1 PR12H_bit.no7\r
+#define DMAPR12 PR13_bit.no0\r
+#define DMAPR13 PR13_bit.no1\r
+#define WDTIIF IF0_bit.no0\r
+#define LVIIF IF0_bit.no1\r
+#define PIF0 IF0_bit.no2\r
+#define PIF1 IF0_bit.no3\r
+#define PIF2 IF0_bit.no4\r
+#define PIF3 IF0_bit.no5\r
+#define PIF4 IF0_bit.no6\r
+#define PIF5 IF0_bit.no7\r
+#define STIF2 IF0H_bit.no0\r
+#define SRIF2 IF0H_bit.no1\r
+#define SREIF2 IF0H_bit.no2\r
+#define DMAIF0 IF0H_bit.no3\r
+#define DMAIF1 IF0H_bit.no4\r
+#define CSIIF00 IF0H_bit.no5\r
+#define IICIF00 IF0H_bit.no5\r
+#define STIF0 IF0H_bit.no5\r
+#define TMIF00 IF0H_bit.no6\r
+#define SRIF0 IF0H_bit.no7\r
+#define SREIF0 IF1_bit.no0\r
+#define TMIF01H IF1_bit.no0\r
+#define CSIIF10 IF1_bit.no1\r
+#define IICIF10 IF1_bit.no1\r
+#define STIF1 IF1_bit.no1\r
+#define SRIF1 IF1_bit.no2\r
+#define SREIF1 IF1_bit.no3\r
+#define TMIF03H IF1_bit.no3\r
+#define IICAIF0 IF1_bit.no4\r
+#define RTITIF IF1_bit.no5\r
+#define TMIF01 IF1_bit.no7\r
+#define TMIF02 IF1H_bit.no0\r
+#define TMIF03 IF1H_bit.no1\r
+#define ADIF IF1H_bit.no2\r
+#define RTCIF IF1H_bit.no3\r
+#define TMKAIF IF1H_bit.no4\r
+#define KRIF IF1H_bit.no5\r
+#define STIF3 IF1H_bit.no6\r
+#define SRIF3 IF1H_bit.no7\r
+#define WDTIMK MK0_bit.no0\r
+#define LVIMK MK0_bit.no1\r
+#define PMK0 MK0_bit.no2\r
+#define PMK1 MK0_bit.no3\r
+#define PMK2 MK0_bit.no4\r
+#define PMK3 MK0_bit.no5\r
+#define PMK4 MK0_bit.no6\r
+#define PMK5 MK0_bit.no7\r
+#define STMK2 MK0H_bit.no0\r
+#define SRMK2 MK0H_bit.no1\r
+#define SREMK2 MK0H_bit.no2\r
+#define DMAMK0 MK0H_bit.no3\r
+#define DMAMK1 MK0H_bit.no4\r
+#define CSIMK00 MK0H_bit.no5\r
+#define IICMK00 MK0H_bit.no5\r
+#define STMK0 MK0H_bit.no5\r
+#define TMMK00 MK0H_bit.no6\r
+#define SRMK0 MK0H_bit.no7\r
+#define SREMK0 MK1_bit.no0\r
+#define TMMK01H MK1_bit.no0\r
+#define CSIMK10 MK1_bit.no1\r
+#define IICMK10 MK1_bit.no1\r
+#define STMK1 MK1_bit.no1\r
+#define SRMK1 MK1_bit.no2\r
+#define SREMK1 MK1_bit.no3\r
+#define TMMK03H MK1_bit.no3\r
+#define IICAMK0 MK1_bit.no4\r
+#define RTITMK MK1_bit.no5\r
+#define TMMK01 MK1_bit.no7\r
+#define TMMK02 MK1H_bit.no0\r
+#define TMMK03 MK1H_bit.no1\r
+#define ADMK MK1H_bit.no2\r
+#define RTCMK MK1H_bit.no3\r
+#define TMKAMK MK1H_bit.no4\r
+#define KRMK MK1H_bit.no5\r
+#define STMK3 MK1H_bit.no6\r
+#define SRMK3 MK1H_bit.no7\r
+#define WDTIPR0 PR00_bit.no0\r
+#define LVIPR0 PR00_bit.no1\r
+#define PPR00 PR00_bit.no2\r
+#define PPR01 PR00_bit.no3\r
+#define PPR02 PR00_bit.no4\r
+#define PPR03 PR00_bit.no5\r
+#define PPR04 PR00_bit.no6\r
+#define PPR05 PR00_bit.no7\r
+#define STPR02 PR00H_bit.no0\r
+#define SRPR02 PR00H_bit.no1\r
+#define SREPR02 PR00H_bit.no2\r
+#define DMAPR00 PR00H_bit.no3\r
+#define DMAPR01 PR00H_bit.no4\r
+#define CSIPR000 PR00H_bit.no5\r
+#define IICPR000 PR00H_bit.no5\r
+#define STPR00 PR00H_bit.no5\r
+#define TMPR000 PR00H_bit.no6\r
+#define SRPR00 PR00H_bit.no7\r
+#define SREPR00 PR01_bit.no0\r
+#define TMPR001H PR01_bit.no0\r
+#define CSIPR010 PR01_bit.no1\r
+#define IICPR010 PR01_bit.no1\r
+#define STPR01 PR01_bit.no1\r
+#define SRPR01 PR01_bit.no2\r
+#define SREPR01 PR01_bit.no3\r
+#define TMPR003H PR01_bit.no3\r
+#define IICAPR00 PR01_bit.no4\r
+#define RTITPR0 PR01_bit.no5\r
+#define TMPR001 PR01_bit.no7\r
+#define TMPR002 PR01H_bit.no0\r
+#define TMPR003 PR01H_bit.no1\r
+#define ADPR0 PR01H_bit.no2\r
+#define RTCPR0 PR01H_bit.no3\r
+#define TMKAPR0 PR01H_bit.no4\r
+#define KRPR0 PR01H_bit.no5\r
+#define STPR03 PR01H_bit.no6\r
+#define SRPR03 PR01H_bit.no7\r
+#define WDTIPR1 PR10_bit.no0\r
+#define LVIPR1 PR10_bit.no1\r
+#define PPR10 PR10_bit.no2\r
+#define PPR11 PR10_bit.no3\r
+#define PPR12 PR10_bit.no4\r
+#define PPR13 PR10_bit.no5\r
+#define PPR14 PR10_bit.no6\r
+#define PPR15 PR10_bit.no7\r
+#define STPR12 PR10H_bit.no0\r
+#define SRPR12 PR10H_bit.no1\r
+#define SREPR12 PR10H_bit.no2\r
+#define DMAPR10 PR10H_bit.no3\r
+#define DMAPR11 PR10H_bit.no4\r
+#define CSIPR100 PR10H_bit.no5\r
+#define IICPR100 PR10H_bit.no5\r
+#define STPR10 PR10H_bit.no5\r
+#define TMPR100 PR10H_bit.no6\r
+#define SRPR10 PR10H_bit.no7\r
+#define SREPR10 PR11_bit.no0\r
+#define TMPR101H PR11_bit.no0\r
+#define CSIPR110 PR11_bit.no1\r
+#define IICPR110 PR11_bit.no1\r
+#define STPR11 PR11_bit.no1\r
+#define SRPR11 PR11_bit.no2\r
+#define SREPR11 PR11_bit.no3\r
+#define TMPR103H PR11_bit.no3\r
+#define IICAPR10 PR11_bit.no4\r
+#define RTITPR1 PR11_bit.no5\r
+#define TMPR101 PR11_bit.no7\r
+#define TMPR102 PR11H_bit.no0\r
+#define TMPR103 PR11H_bit.no1\r
+#define ADPR1 PR11H_bit.no2\r
+#define RTCPR1 PR11H_bit.no3\r
+#define TMKAPR1 PR11H_bit.no4\r
+#define KRPR1 PR11H_bit.no5\r
+#define STPR13 PR11H_bit.no6\r
+#define SRPR13 PR11H_bit.no7\r
+#define MAA PMC_bit.no0\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#define RST_vect (0x0)\r
+#define INTDBG_vect (0x2)\r
+#define INTWDTI_vect (0x4)\r
+#define INTLVI_vect (0x6)\r
+#define INTP0_vect (0x8)\r
+#define INTP1_vect (0xA)\r
+#define INTP2_vect (0xC)\r
+#define INTP3_vect (0xE)\r
+#define INTP4_vect (0x10)\r
+#define INTP5_vect (0x12)\r
+#define INTST2_vect (0x14)\r
+#define INTSR2_vect (0x16)\r
+#define INTSRE2_vect (0x18)\r
+#define INTDMA0_vect (0x1A)\r
+#define INTDMA1_vect (0x1C)\r
+#define INTCSI00_vect (0x1E)\r
+#define INTIIC00_vect (0x1E)\r
+#define INTST0_vect (0x1E)\r
+#define INTTM00_vect (0x20)\r
+#define INTSR0_vect (0x22)\r
+#define INTSRE0_vect (0x24)\r
+#define INTTM01H_vect (0x24)\r
+#define INTCSI10_vect (0x26)\r
+#define INTIIC10_vect (0x26)\r
+#define INTST1_vect (0x26)\r
+#define INTSR1_vect (0x28)\r
+#define INTSRE1_vect (0x2A)\r
+#define INTTM03H_vect (0x2A)\r
+#define INTIICA0_vect (0x2C)\r
+#define INTRTIT_vect (0x2E)\r
+#define INTTM01_vect (0x32)\r
+#define INTTM02_vect (0x34)\r
+#define INTTM03_vect (0x36)\r
+#define INTAD_vect (0x38)\r
+#define INTRTC_vect (0x3A)\r
+#define INTIT_vect (0x3C)\r
+#define INTKR_vect (0x3E)\r
+#define INTST3_vect (0x40)\r
+#define INTSR3_vect (0x42)\r
+#define INTTKB20_vect (0x44)\r
+#define INTTM04_vect (0x46)\r
+#define INTTM05_vect (0x48)\r
+#define INTP6_vect (0x4A)\r
+#define INTP7_vect (0x4C)\r
+#define INTLCD0_vect (0x4E)\r
+#define INTCMP0_vect (0x50)\r
+#define INTCMP1_vect (0x52)\r
+#define INTTM06_vect (0x54)\r
+#define INTTM07_vect (0x56)\r
+#define INTSRE3_vect (0x5C)\r
+#define INTMD_vect (0x5E)\r
+#define INTFL_vect (0x62)\r
+#define INTDMA2_vect (0x64)\r
+#define INTDMA3_vect (0x66)\r
+#define BRK_I_vect (0x7E)\r
+#endif\r
--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78L13 */
+/* FILE : iodefine_ext.h */
+/* DESCRIPTION : Definition of Extended SFRs */
+/* CPU SERIES : RL78 - L13 */
+/* CPU TYPE : R5F10WMG */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10WMG.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* Version E1.00d */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_EXT_H\r
+#define IODEFINE_EXT_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_adm2 {\r
+ unsigned char adm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu0 {\r
+ unsigned char pu0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu1 {\r
+ unsigned char pu1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu2 {\r
+ unsigned char pu2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu3 {\r
+ unsigned char pu3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu4 {\r
+ unsigned char pu4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu5 {\r
+ unsigned char pu5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu7 {\r
+ unsigned char pu7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu12 {\r
+ unsigned char pu12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pu13 {\r
+ unsigned char pu13;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim0 {\r
+ unsigned char pim0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim1 {\r
+ unsigned char pim1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim3 {\r
+ unsigned char pim3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim4 {\r
+ unsigned char pim4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pim5 {\r
+ unsigned char pim5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom0 {\r
+ unsigned char pom0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom1 {\r
+ unsigned char pom1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom3 {\r
+ unsigned char pom3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom4 {\r
+ unsigned char pom4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom5 {\r
+ unsigned char pom5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pom13 {\r
+ unsigned char pom13;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc1 {\r
+ unsigned char pmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc2 {\r
+ unsigned char pmc2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc4 {\r
+ unsigned char pmc4;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen0 {\r
+ unsigned char nfen0;\r
+ __BITS8 BIT;\r
+};\r
+union un_nfen1 {\r
+ unsigned char nfen1;\r
+ __BITS8 BIT;\r
+};\r
+union un_isc {\r
+ unsigned char isc;\r
+ __BITS8 BIT;\r
+};\r
+union un_tos {\r
+ unsigned char tos;\r
+ __BITS8 BIT;\r
+};\r
+union un_per1 {\r
+ unsigned char per1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pms {\r
+ unsigned char pms;\r
+ __BITS8 BIT;\r
+};\r
+union un_dflctl {\r
+ unsigned char dflctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_perz {\r
+ unsigned char perz;\r
+ __BITS8 BIT;\r
+};\r
+union un_bectl {\r
+ unsigned char bectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsse {\r
+ unsigned char fsse;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfs {\r
+ unsigned char pfs;\r
+ __BITS8 BIT;\r
+};\r
+union un_mduc {\r
+ unsigned char mduc;\r
+ __BITS8 BIT;\r
+};\r
+union un_per0 {\r
+ unsigned char per0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rmc {\r
+ unsigned char rmc;\r
+ __BITS8 BIT;\r
+};\r
+union un_rpectl {\r
+ unsigned char rpectl;\r
+ __BITS8 BIT;\r
+};\r
+union un_porsr {\r
+ unsigned char porsr;\r
+ __BITS8 BIT;\r
+};\r
+union un_se0l {\r
+ unsigned char se0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss0l {\r
+ unsigned char ss0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st0l {\r
+ unsigned char st0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe0l {\r
+ unsigned char soe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_se1l {\r
+ unsigned char se1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ss1l {\r
+ unsigned char ss1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_st1l {\r
+ unsigned char st1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_soe1l {\r
+ unsigned char soe1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_te0l {\r
+ unsigned char te0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_ts0l {\r
+ unsigned char ts0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_tt0l {\r
+ unsigned char tt0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_toe0l {\r
+ unsigned char toe0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc2 {\r
+ unsigned char dmc2;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc3 {\r
+ unsigned char dmc3;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc2 {\r
+ unsigned char drc2;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc3 {\r
+ unsigned char drc3;\r
+ __BITS8 BIT;\r
+};\r
+union un_dwaitall {\r
+ unsigned char dwaitall;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl00 {\r
+ unsigned char iicctl00;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicctl01 {\r
+ unsigned char iicctl01;\r
+ __BITS8 BIT;\r
+};\r
+union un_crc0ctl {\r
+ unsigned char crc0ctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfseg0 {\r
+ unsigned char pfseg0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfseg1 {\r
+ unsigned char pfseg1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfseg2 {\r
+ unsigned char pfseg2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfseg3 {\r
+ unsigned char pfseg3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfseg4 {\r
+ unsigned char pfseg4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfseg5 {\r
+ unsigned char pfseg5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pfseg6 {\r
+ unsigned char pfseg6;\r
+ __BITS8 BIT;\r
+};\r
+union un_isclcd {\r
+ unsigned char isclcd;\r
+ __BITS8 BIT;\r
+};\r
+union un_compmdr {\r
+ unsigned char compmdr;\r
+ __BITS8 BIT;\r
+};\r
+union un_compfir {\r
+ unsigned char compfir;\r
+ __BITS8 BIT;\r
+};\r
+union un_compocr {\r
+ unsigned char compocr;\r
+ __BITS8 BIT;\r
+};\r
+union un_comptcr {\r
+ unsigned char comptcr;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbtrg0 {\r
+ unsigned char tkbtrg0;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbflg0 {\r
+ unsigned char tkbflg0;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbioc00 {\r
+ unsigned char tkbioc00;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbclr0 {\r
+ unsigned char tkbclr0;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbioc01 {\r
+ unsigned char tkbioc01;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbctl01 {\r
+ unsigned char tkbctl01;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbpahfs0 {\r
+ unsigned char tkbpahfs0;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbpahft0 {\r
+ unsigned char tkbpahft0;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbpaflg0 {\r
+ unsigned char tkbpaflg0;\r
+ __BITS8 BIT;\r
+};\r
+union un_tkbpactl02 {\r
+ unsigned char tkbpactl02;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
+#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
+#define ADUL (*(volatile unsigned char *)0xF0011)\r
+#define ADLL (*(volatile unsigned char *)0xF0012)\r
+#define ADTES (*(volatile unsigned char *)0xF0013)\r
+#define LCDI (*(volatile unsigned char *)0xF001F)\r
+#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
+#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
+#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
+#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT\r
+#define PU2 (*(volatile union un_pu2 *)0xF0032).pu2\r
+#define PU2_bit (*(volatile union un_pu2 *)0xF0032).BIT\r
+#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3\r
+#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT\r
+#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4\r
+#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
+#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
+#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
+#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
+#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
+#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
+#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
+#define PU13 (*(volatile union un_pu13 *)0xF003D).pu13\r
+#define PU13_bit (*(volatile union un_pu13 *)0xF003D).BIT\r
+#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
+#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
+#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1\r
+#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT\r
+#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3\r
+#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT\r
+#define PIM4 (*(volatile union un_pim4 *)0xF0044).pim4\r
+#define PIM4_bit (*(volatile union un_pim4 *)0xF0044).BIT\r
+#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5\r
+#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT\r
+#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
+#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
+#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1\r
+#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT\r
+#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3\r
+#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT\r
+#define POM4 (*(volatile union un_pom4 *)0xF0054).pom4\r
+#define POM4_bit (*(volatile union un_pom4 *)0xF0054).BIT\r
+#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
+#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
+#define POM13 (*(volatile union un_pom13 *)0xF005D).pom13\r
+#define POM13_bit (*(volatile union un_pom13 *)0xF005D).BIT\r
+#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1\r
+#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT\r
+#define PMC2 (*(volatile union un_pmc2 *)0xF0062).pmc2\r
+#define PMC2_bit (*(volatile union un_pmc2 *)0xF0062).BIT\r
+#define PMC4 (*(volatile union un_pmc4 *)0xF0064).pmc4\r
+#define PMC4_bit (*(volatile union un_pmc4 *)0xF0064).BIT\r
+#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
+#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
+#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
+#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
+#define ISC (*(volatile union un_isc *)0xF0073).isc\r
+#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
+#define TIS0 (*(volatile unsigned char *)0xF0074)\r
+#define ADPC (*(volatile unsigned char *)0xF0076)\r
+#define PIOR (*(volatile unsigned char *)0xF0077)\r
+#define IAWCTL (*(volatile unsigned char *)0xF0078)\r
+#define TOS (*(volatile union un_tos *)0xF0079).tos\r
+#define TOS_bit (*(volatile union un_tos *)0xF0079).BIT\r
+#define PER1 (*(volatile union un_per1 *)0xF007A).per1\r
+#define PER1_bit (*(volatile union un_per1 *)0xF007A).BIT\r
+#define PMS (*(volatile union un_pms *)0xF007B).pms\r
+#define PMS_bit (*(volatile union un_pms *)0xF007B).BIT\r
+#define PWCTKB (*(volatile unsigned char *)0xF007C)\r
+#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
+#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
+#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
+#define BPAH0 (*(volatile unsigned char *)0xF0082)\r
+#define BPAS0 (*(volatile unsigned char *)0xF0083)\r
+#define BACDVL0 (*(volatile unsigned char *)0xF0084)\r
+#define BACDVH0 (*(volatile unsigned char *)0xF0085)\r
+#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
+#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
+#define MONMOD (*(volatile unsigned char *)0xF0088)\r
+#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
+#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
+#define PERZ (*(volatile union un_perz *)0xF009F).perz\r
+#define PERZ_bit (*(volatile union un_perz *)0xF009F).BIT\r
+#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
+#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl\r
+#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT\r
+#define HOCODIV (*(volatile unsigned char *)0xF00A8)\r
+#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)\r
+#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)\r
+#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)\r
+#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)\r
+#define FLSEC (*(volatile unsigned short *)0xF00B0)\r
+#define FLFSWS (*(volatile unsigned short *)0xF00B2)\r
+#define FLFSWE (*(volatile unsigned short *)0xF00B4)\r
+#define FSSET (*(volatile unsigned char *)0xF00B6)\r
+#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse\r
+#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT\r
+#define FLFADL (*(volatile unsigned short *)0xF00B8)\r
+#define FLFADH (*(volatile unsigned char *)0xF00BA)\r
+#define PFCMD (*(volatile unsigned char *)0xF00C0)\r
+#define PFS (*(volatile union un_pfs *)0xF00C1).pfs\r
+#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT\r
+#define FLRL (*(volatile unsigned short *)0xF00C2)\r
+#define FLRH (*(volatile unsigned short *)0xF00C4)\r
+#define FLWE (*(volatile unsigned char *)0xF00C6)\r
+#define FLRE (*(volatile unsigned char *)0xF00C7)\r
+#define FLTMS (*(volatile unsigned short *)0xF00C8)\r
+#define DFLMC (*(volatile unsigned short *)0xF00CA)\r
+#define FLMCL (*(volatile unsigned short *)0xF00CC)\r
+#define FLMCH (*(volatile unsigned char *)0xF00CE)\r
+#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
+#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
+#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
+#define MDCL (*(volatile unsigned short *)0xF00E0)\r
+#define MDCH (*(volatile unsigned short *)0xF00E2)\r
+#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc\r
+#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT\r
+#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
+#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
+#define OSMC (*(volatile unsigned char *)0xF00F3)\r
+#define RMC (*(volatile union un_rmc *)0xF00F4).rmc\r
+#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT\r
+#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl\r
+#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT\r
+#define PORSR (*(volatile union un_porsr *)0xF00F9).porsr\r
+#define PORSR_bit (*(volatile union un_porsr *)0xF00F9).BIT\r
+#define BCDADJ (*(volatile unsigned char *)0xF00FE)\r
+#define VECTCTRL (*(volatile unsigned char *)0xF00FF)\r
+#define SSR00 (*(volatile unsigned short *)0xF0100)\r
+#define SSR00L (*(volatile unsigned char *)0xF0100)\r
+#define SSR01 (*(volatile unsigned short *)0xF0102)\r
+#define SSR01L (*(volatile unsigned char *)0xF0102)\r
+#define SSR02 (*(volatile unsigned short *)0xF0104)\r
+#define SSR02L (*(volatile unsigned char *)0xF0104)\r
+#define SSR03 (*(volatile unsigned short *)0xF0106)\r
+#define SSR03L (*(volatile unsigned char *)0xF0106)\r
+#define SIR00 (*(volatile unsigned short *)0xF0108)\r
+#define SIR00L (*(volatile unsigned char *)0xF0108)\r
+#define SIR01 (*(volatile unsigned short *)0xF010A)\r
+#define SIR01L (*(volatile unsigned char *)0xF010A)\r
+#define SIR02 (*(volatile unsigned short *)0xF010C)\r
+#define SIR02L (*(volatile unsigned char *)0xF010C)\r
+#define SIR03 (*(volatile unsigned short *)0xF010E)\r
+#define SIR03L (*(volatile unsigned char *)0xF010E)\r
+#define SMR00 (*(volatile unsigned short *)0xF0110)\r
+#define SMR01 (*(volatile unsigned short *)0xF0112)\r
+#define SMR02 (*(volatile unsigned short *)0xF0114)\r
+#define SMR03 (*(volatile unsigned short *)0xF0116)\r
+#define SCR00 (*(volatile unsigned short *)0xF0118)\r
+#define SCR01 (*(volatile unsigned short *)0xF011A)\r
+#define SCR02 (*(volatile unsigned short *)0xF011C)\r
+#define SCR03 (*(volatile unsigned short *)0xF011E)\r
+#define SE0 (*(volatile unsigned short *)0xF0120)\r
+#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
+#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
+#define SS0 (*(volatile unsigned short *)0xF0122)\r
+#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l\r
+#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT\r
+#define ST0 (*(volatile unsigned short *)0xF0124)\r
+#define ST0L (*(volatile union un_st0l *)0xF0124).st0l\r
+#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT\r
+#define SPS0 (*(volatile unsigned short *)0xF0126)\r
+#define SPS0L (*(volatile unsigned char *)0xF0126)\r
+#define SO0 (*(volatile unsigned short *)0xF0128)\r
+#define SOE0 (*(volatile unsigned short *)0xF012A)\r
+#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l\r
+#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT\r
+#define EDR00 (*(volatile unsigned short *)0xF012C)\r
+#define EDR00L (*(volatile unsigned char *)0xF012C)\r
+#define EDR01 (*(volatile unsigned short *)0xF012E)\r
+#define EDR01L (*(volatile unsigned char *)0xF012E)\r
+#define EDR02 (*(volatile unsigned short *)0xF0130)\r
+#define EDR02L (*(volatile unsigned char *)0xF0130)\r
+#define EDR03 (*(volatile unsigned short *)0xF0132)\r
+#define EDR03L (*(volatile unsigned char *)0xF0132)\r
+#define SOL0 (*(volatile unsigned short *)0xF0134)\r
+#define SOL0L (*(volatile unsigned char *)0xF0134)\r
+#define SSC0 (*(volatile unsigned short *)0xF0138)\r
+#define SSC0L (*(volatile unsigned char *)0xF0138)\r
+#define SSR10 (*(volatile unsigned short *)0xF0140)\r
+#define SSR10L (*(volatile unsigned char *)0xF0140)\r
+#define SSR11 (*(volatile unsigned short *)0xF0142)\r
+#define SSR11L (*(volatile unsigned char *)0xF0142)\r
+#define SSR12 (*(volatile unsigned short *)0xF0144)\r
+#define SSR12L (*(volatile unsigned char *)0xF0144)\r
+#define SSR13 (*(volatile unsigned short *)0xF0146)\r
+#define SSR13L (*(volatile unsigned char *)0xF0146)\r
+#define SIR10 (*(volatile unsigned short *)0xF0148)\r
+#define SIR10L (*(volatile unsigned char *)0xF0148)\r
+#define SIR11 (*(volatile unsigned short *)0xF014A)\r
+#define SIR11L (*(volatile unsigned char *)0xF014A)\r
+#define SIR12 (*(volatile unsigned short *)0xF014C)\r
+#define SIR12L (*(volatile unsigned char *)0xF014C)\r
+#define SIR13 (*(volatile unsigned short *)0xF014E)\r
+#define SIR13L (*(volatile unsigned char *)0xF014E)\r
+#define SMR10 (*(volatile unsigned short *)0xF0150)\r
+#define SMR11 (*(volatile unsigned short *)0xF0152)\r
+#define SMR12 (*(volatile unsigned short *)0xF0154)\r
+#define SMR13 (*(volatile unsigned short *)0xF0156)\r
+#define SCR10 (*(volatile unsigned short *)0xF0158)\r
+#define SCR11 (*(volatile unsigned short *)0xF015A)\r
+#define SCR12 (*(volatile unsigned short *)0xF015C)\r
+#define SCR13 (*(volatile unsigned short *)0xF015E)\r
+#define SE1 (*(volatile unsigned short *)0xF0160)\r
+#define SE1L (*(volatile union un_se1l *)0xF0160).se1l\r
+#define SE1L_bit (*(volatile union un_se1l *)0xF0160).BIT\r
+#define SS1 (*(volatile unsigned short *)0xF0162)\r
+#define SS1L (*(volatile union un_ss1l *)0xF0162).ss1l\r
+#define SS1L_bit (*(volatile union un_ss1l *)0xF0162).BIT\r
+#define ST1 (*(volatile unsigned short *)0xF0164)\r
+#define ST1L (*(volatile union un_st1l *)0xF0164).st1l\r
+#define ST1L_bit (*(volatile union un_st1l *)0xF0164).BIT\r
+#define SPS1 (*(volatile unsigned short *)0xF0166)\r
+#define SPS1L (*(volatile unsigned char *)0xF0166)\r
+#define SO1 (*(volatile unsigned short *)0xF0168)\r
+#define SOE1 (*(volatile unsigned short *)0xF016A)\r
+#define SOE1L (*(volatile union un_soe1l *)0xF016A).soe1l\r
+#define SOE1L_bit (*(volatile union un_soe1l *)0xF016A).BIT\r
+#define EDR10 (*(volatile unsigned short *)0xF016C)\r
+#define EDR10L (*(volatile unsigned char *)0xF016C)\r
+#define EDR11 (*(volatile unsigned short *)0xF016E)\r
+#define EDR11L (*(volatile unsigned char *)0xF016E)\r
+#define EDR12 (*(volatile unsigned short *)0xF0170)\r
+#define EDR12L (*(volatile unsigned char *)0xF0170)\r
+#define EDR13 (*(volatile unsigned short *)0xF0172)\r
+#define EDR13L (*(volatile unsigned char *)0xF0172)\r
+#define SOL1 (*(volatile unsigned short *)0xF0174)\r
+#define SOL1L (*(volatile unsigned char *)0xF0174)\r
+#define SSC1 (*(volatile unsigned short *)0xF0178)\r
+#define SSC1L (*(volatile unsigned char *)0xF0178)\r
+#define TCR00 (*(volatile unsigned short *)0xF0180)\r
+#define TCR01 (*(volatile unsigned short *)0xF0182)\r
+#define TCR02 (*(volatile unsigned short *)0xF0184)\r
+#define TCR03 (*(volatile unsigned short *)0xF0186)\r
+#define TCR04 (*(volatile unsigned short *)0xF0188)\r
+#define TCR05 (*(volatile unsigned short *)0xF018A)\r
+#define TCR06 (*(volatile unsigned short *)0xF018C)\r
+#define TCR07 (*(volatile unsigned short *)0xF018E)\r
+#define TMR00 (*(volatile unsigned short *)0xF0190)\r
+#define TMR01 (*(volatile unsigned short *)0xF0192)\r
+#define TMR02 (*(volatile unsigned short *)0xF0194)\r
+#define TMR03 (*(volatile unsigned short *)0xF0196)\r
+#define TMR04 (*(volatile unsigned short *)0xF0198)\r
+#define TMR05 (*(volatile unsigned short *)0xF019A)\r
+#define TMR06 (*(volatile unsigned short *)0xF019C)\r
+#define TMR07 (*(volatile unsigned short *)0xF019E)\r
+#define TSR00 (*(volatile unsigned short *)0xF01A0)\r
+#define TSR00L (*(volatile unsigned char *)0xF01A0)\r
+#define TSR01 (*(volatile unsigned short *)0xF01A2)\r
+#define TSR01L (*(volatile unsigned char *)0xF01A2)\r
+#define TSR02 (*(volatile unsigned short *)0xF01A4)\r
+#define TSR02L (*(volatile unsigned char *)0xF01A4)\r
+#define TSR03 (*(volatile unsigned short *)0xF01A6)\r
+#define TSR03L (*(volatile unsigned char *)0xF01A6)\r
+#define TSR04 (*(volatile unsigned short *)0xF01A8)\r
+#define TSR04L (*(volatile unsigned char *)0xF01A8)\r
+#define TSR05 (*(volatile unsigned short *)0xF01AA)\r
+#define TSR05L (*(volatile unsigned char *)0xF01AA)\r
+#define TSR06 (*(volatile unsigned short *)0xF01AC)\r
+#define TSR06L (*(volatile unsigned char *)0xF01AC)\r
+#define TSR07 (*(volatile unsigned short *)0xF01AE)\r
+#define TSR07L (*(volatile unsigned char *)0xF01AE)\r
+#define TE0 (*(volatile unsigned short *)0xF01B0)\r
+#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l\r
+#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT\r
+#define TS0 (*(volatile unsigned short *)0xF01B2)\r
+#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l\r
+#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT\r
+#define TT0 (*(volatile unsigned short *)0xF01B4)\r
+#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l\r
+#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT\r
+#define TPS0 (*(volatile unsigned short *)0xF01B6)\r
+#define TO0 (*(volatile unsigned short *)0xF01B8)\r
+#define TO0L (*(volatile unsigned char *)0xF01B8)\r
+#define TOE0 (*(volatile unsigned short *)0xF01BA)\r
+#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l\r
+#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT\r
+#define TOL0 (*(volatile unsigned short *)0xF01BC)\r
+#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
+#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
+#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
+#define DSA2 (*(volatile unsigned char *)0xF0200)\r
+#define DSA3 (*(volatile unsigned char *)0xF0201)\r
+#define DRA2 (*(volatile unsigned short *)0xF0202)\r
+#define DRA2L (*(volatile unsigned char *)0xF0202)\r
+#define DRA2H (*(volatile unsigned char *)0xF0203)\r
+#define DRA3 (*(volatile unsigned short *)0xF0204)\r
+#define DRA3L (*(volatile unsigned char *)0xF0204)\r
+#define DRA3H (*(volatile unsigned char *)0xF0205)\r
+#define DBC2 (*(volatile unsigned short *)0xF0206)\r
+#define DBC2L (*(volatile unsigned char *)0xF0206)\r
+#define DBC2H (*(volatile unsigned char *)0xF0207)\r
+#define DBC3 (*(volatile unsigned short *)0xF0208)\r
+#define DBC3L (*(volatile unsigned char *)0xF0208)\r
+#define DBC3H (*(volatile unsigned char *)0xF0209)\r
+#define DMC2 (*(volatile union un_dmc2 *)0xF020A).dmc2\r
+#define DMC2_bit (*(volatile union un_dmc2 *)0xF020A).BIT\r
+#define DMC3 (*(volatile union un_dmc3 *)0xF020B).dmc3\r
+#define DMC3_bit (*(volatile union un_dmc3 *)0xF020B).BIT\r
+#define DRC2 (*(volatile union un_drc2 *)0xF020C).drc2\r
+#define DRC2_bit (*(volatile union un_drc2 *)0xF020C).BIT\r
+#define DRC3 (*(volatile union un_drc3 *)0xF020D).drc3\r
+#define DRC3_bit (*(volatile union un_drc3 *)0xF020D).BIT\r
+#define DWAITALL (*(volatile union un_dwaitall *)0xF020F).dwaitall\r
+#define DWAITALL_bit (*(volatile union un_dwaitall *)0xF020F).BIT\r
+#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
+#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
+#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
+#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT\r
+#define IICWL0 (*(volatile unsigned char *)0xF0232)\r
+#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
+#define SVA0 (*(volatile unsigned char *)0xF0234)\r
+#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
+#define ELSELR00 (*(volatile unsigned char *)0xF0240)\r
+#define ELSELR01 (*(volatile unsigned char *)0xF0241)\r
+#define ELSELR02 (*(volatile unsigned char *)0xF0242)\r
+#define ELSELR03 (*(volatile unsigned char *)0xF0243)\r
+#define ELSELR04 (*(volatile unsigned char *)0xF0244)\r
+#define ELSELR05 (*(volatile unsigned char *)0xF0245)\r
+#define ELSELR06 (*(volatile unsigned char *)0xF0246)\r
+#define ELSELR07 (*(volatile unsigned char *)0xF0247)\r
+#define ELSELR08 (*(volatile unsigned char *)0xF0248)\r
+#define ELSELR09 (*(volatile unsigned char *)0xF0249)\r
+#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
+#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
+#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
+#define CRCD (*(volatile unsigned short *)0xF02FA)\r
+#define PFSEG0 (*(volatile union un_pfseg0 *)0xF0300).pfseg0\r
+#define PFSEG0_bit (*(volatile union un_pfseg0 *)0xF0300).BIT\r
+#define PFSEG1 (*(volatile union un_pfseg1 *)0xF0301).pfseg1\r
+#define PFSEG1_bit (*(volatile union un_pfseg1 *)0xF0301).BIT\r
+#define PFSEG2 (*(volatile union un_pfseg2 *)0xF0302).pfseg2\r
+#define PFSEG2_bit (*(volatile union un_pfseg2 *)0xF0302).BIT\r
+#define PFSEG3 (*(volatile union un_pfseg3 *)0xF0303).pfseg3\r
+#define PFSEG3_bit (*(volatile union un_pfseg3 *)0xF0303).BIT\r
+#define PFSEG4 (*(volatile union un_pfseg4 *)0xF0304).pfseg4\r
+#define PFSEG4_bit (*(volatile union un_pfseg4 *)0xF0304).BIT\r
+#define PFSEG5 (*(volatile union un_pfseg5 *)0xF0305).pfseg5\r
+#define PFSEG5_bit (*(volatile union un_pfseg5 *)0xF0305).BIT\r
+#define PFSEG6 (*(volatile union un_pfseg6 *)0xF0306).pfseg6\r
+#define PFSEG6_bit (*(volatile union un_pfseg6 *)0xF0306).BIT\r
+#define ISCLCD (*(volatile union un_isclcd *)0xF0308).isclcd\r
+#define ISCLCD_bit (*(volatile union un_isclcd *)0xF0308).BIT\r
+#define SUBCUD (*(volatile unsigned short *)0xF0310)\r
+#define COMPMDR (*(volatile union un_compmdr *)0xF0340).compmdr\r
+#define COMPMDR_bit (*(volatile union un_compmdr *)0xF0340).BIT\r
+#define COMPFIR (*(volatile union un_compfir *)0xF0341).compfir\r
+#define COMPFIR_bit (*(volatile union un_compfir *)0xF0341).BIT\r
+#define COMPOCR (*(volatile union un_compocr *)0xF0342).compocr\r
+#define COMPOCR_bit (*(volatile union un_compocr *)0xF0342).BIT\r
+#define COMPTCR (*(volatile union un_comptcr *)0xF0343).comptcr\r
+#define COMPTCR_bit (*(volatile union un_comptcr *)0xF0343).BIT\r
+#define SEG0 (*(volatile unsigned char *)0xF0400)\r
+#define SEG1 (*(volatile unsigned char *)0xF0401)\r
+#define SEG2 (*(volatile unsigned char *)0xF0402)\r
+#define SEG3 (*(volatile unsigned char *)0xF0403)\r
+#define SEG4 (*(volatile unsigned char *)0xF0404)\r
+#define SEG5 (*(volatile unsigned char *)0xF0405)\r
+#define SEG6 (*(volatile unsigned char *)0xF0406)\r
+#define SEG7 (*(volatile unsigned char *)0xF0407)\r
+#define SEG8 (*(volatile unsigned char *)0xF0408)\r
+#define SEG9 (*(volatile unsigned char *)0xF0409)\r
+#define SEG10 (*(volatile unsigned char *)0xF040A)\r
+#define SEG11 (*(volatile unsigned char *)0xF040B)\r
+#define SEG12 (*(volatile unsigned char *)0xF040C)\r
+#define SEG13 (*(volatile unsigned char *)0xF040D)\r
+#define SEG14 (*(volatile unsigned char *)0xF040E)\r
+#define SEG15 (*(volatile unsigned char *)0xF040F)\r
+#define SEG16 (*(volatile unsigned char *)0xF0410)\r
+#define SEG17 (*(volatile unsigned char *)0xF0411)\r
+#define SEG18 (*(volatile unsigned char *)0xF0412)\r
+#define SEG19 (*(volatile unsigned char *)0xF0413)\r
+#define SEG20 (*(volatile unsigned char *)0xF0414)\r
+#define SEG21 (*(volatile unsigned char *)0xF0415)\r
+#define SEG22 (*(volatile unsigned char *)0xF0416)\r
+#define SEG23 (*(volatile unsigned char *)0xF0417)\r
+#define SEG24 (*(volatile unsigned char *)0xF0418)\r
+#define SEG25 (*(volatile unsigned char *)0xF0419)\r
+#define SEG26 (*(volatile unsigned char *)0xF041A)\r
+#define SEG27 (*(volatile unsigned char *)0xF041B)\r
+#define SEG28 (*(volatile unsigned char *)0xF041C)\r
+#define SEG29 (*(volatile unsigned char *)0xF041D)\r
+#define SEG30 (*(volatile unsigned char *)0xF041E)\r
+#define SEG31 (*(volatile unsigned char *)0xF041F)\r
+#define SEG32 (*(volatile unsigned char *)0xF0420)\r
+#define SEG33 (*(volatile unsigned char *)0xF0421)\r
+#define SEG34 (*(volatile unsigned char *)0xF0422)\r
+#define SEG35 (*(volatile unsigned char *)0xF0423)\r
+#define SEG36 (*(volatile unsigned char *)0xF0424)\r
+#define SEG37 (*(volatile unsigned char *)0xF0425)\r
+#define SEG38 (*(volatile unsigned char *)0xF0426)\r
+#define SEG39 (*(volatile unsigned char *)0xF0427)\r
+#define SEG40 (*(volatile unsigned char *)0xF0428)\r
+#define SEG41 (*(volatile unsigned char *)0xF0429)\r
+#define SEG42 (*(volatile unsigned char *)0xF042A)\r
+#define SEG43 (*(volatile unsigned char *)0xF042B)\r
+#define SEG44 (*(volatile unsigned char *)0xF042C)\r
+#define SEG45 (*(volatile unsigned char *)0xF042D)\r
+#define SEG46 (*(volatile unsigned char *)0xF042E)\r
+#define SEG47 (*(volatile unsigned char *)0xF042F)\r
+#define SEG48 (*(volatile unsigned char *)0xF0430)\r
+#define SEG49 (*(volatile unsigned char *)0xF0431)\r
+#define SEG50 (*(volatile unsigned char *)0xF0432)\r
+#define SEG51 (*(volatile unsigned char *)0xF0433)\r
+#define SEG52 (*(volatile unsigned char *)0xF0434)\r
+#define SEG53 (*(volatile unsigned char *)0xF0435)\r
+#define SEG54 (*(volatile unsigned char *)0xF0436)\r
+#define SEG55 (*(volatile unsigned char *)0xF0437)\r
+#define TKBCR00 (*(volatile unsigned short *)0xF0500)\r
+#define TKBCR01 (*(volatile unsigned short *)0xF0502)\r
+#define TKBCR02 (*(volatile unsigned short *)0xF0504)\r
+#define TKBCR03 (*(volatile unsigned short *)0xF0506)\r
+#define TKBTGCR0 (*(volatile unsigned short *)0xF0508)\r
+#define TKBSIR00 (*(volatile unsigned short *)0xF050A)\r
+#define TKBSIR01 (*(volatile unsigned short *)0xF050C)\r
+#define TKBDNR00 (*(volatile unsigned char *)0xF050E)\r
+#define TKBSSR00 (*(volatile unsigned char *)0xF050F)\r
+#define TKBDNR01 (*(volatile unsigned char *)0xF0510)\r
+#define TKBSSR01 (*(volatile unsigned char *)0xF0511)\r
+#define TKBTRG0 (*(volatile union un_tkbtrg0 *)0xF0512).tkbtrg0\r
+#define TKBTRG0_bit (*(volatile union un_tkbtrg0 *)0xF0512).BIT\r
+#define TKBFLG0 (*(volatile union un_tkbflg0 *)0xF0513).tkbflg0\r
+#define TKBFLG0_bit (*(volatile union un_tkbflg0 *)0xF0513).BIT\r
+#define TKBCRLD00 (*(volatile unsigned short *)0xF0514)\r
+#define TKBCRLD01 (*(volatile unsigned short *)0xF0516)\r
+#define TKBCNT0 (*(volatile unsigned short *)0xF0520)\r
+#define TKBCTL00 (*(volatile unsigned short *)0xF0522)\r
+#define TKBMFR0 (*(volatile unsigned short *)0xF0524)\r
+#define TKBIOC00 (*(volatile union un_tkbioc00 *)0xF0526).tkbioc00\r
+#define TKBIOC00_bit (*(volatile union un_tkbioc00 *)0xF0526).BIT\r
+#define TKBCLR0 (*(volatile union un_tkbclr0 *)0xF0527).tkbclr0\r
+#define TKBCLR0_bit (*(volatile union un_tkbclr0 *)0xF0527).BIT\r
+#define TKBIOC01 (*(volatile union un_tkbioc01 *)0xF0528).tkbioc01\r
+#define TKBIOC01_bit (*(volatile union un_tkbioc01 *)0xF0528).BIT\r
+#define TKBCTL01 (*(volatile union un_tkbctl01 *)0xF0529).tkbctl01\r
+#define TKBCTL01_bit (*(volatile union un_tkbctl01 *)0xF0529).BIT\r
+#define TKBPSCS0 (*(volatile unsigned char *)0xF052A)\r
+#define TKBPACTL00 (*(volatile unsigned short *)0xF0530)\r
+#define TKBPACTL01 (*(volatile unsigned short *)0xF0532)\r
+#define TKBPAHFS0 (*(volatile union un_tkbpahfs0 *)0xF0534).tkbpahfs0\r
+#define TKBPAHFS0_bit (*(volatile union un_tkbpahfs0 *)0xF0534).BIT\r
+#define TKBPAHFT0 (*(volatile union un_tkbpahft0 *)0xF0535).tkbpahft0\r
+#define TKBPAHFT0_bit (*(volatile union un_tkbpahft0 *)0xF0535).BIT\r
+#define TKBPAFLG0 (*(volatile union un_tkbpaflg0 *)0xF0536).tkbpaflg0\r
+#define TKBPAFLG0_bit (*(volatile union un_tkbpaflg0 *)0xF0536).BIT\r
+#define TKBPACTL02 (*(volatile union un_tkbpactl02 *)0xF0537).tkbpactl02\r
+#define TKBPACTL02_bit (*(volatile union un_tkbpactl02 *)0xF0537).BIT\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADTYP ADM2_bit.no0\r
+#define AWC ADM2_bit.no2\r
+#define ADRCK ADM2_bit.no3\r
+#define TOS0 TOS_bit.no0\r
+#define TKB2EN PER1_bit.no4\r
+#define CMPEN PER1_bit.no5\r
+#define TMKAEN PER1_bit.no7\r
+#define DFLEN DFLCTL_bit.no0\r
+#define FSUBEN PERZ_bit.no7\r
+#define BRSAM BECTL_bit.no0\r
+#define ESQST FSSE_bit.no7\r
+#define DIVST MDUC_bit.no0\r
+#define MACSF MDUC_bit.no1\r
+#define MACOF MDUC_bit.no2\r
+#define MDSM MDUC_bit.no3\r
+#define MACMODE MDUC_bit.no6\r
+#define DIVMODE MDUC_bit.no7\r
+#define TAU0EN PER0_bit.no0\r
+#define SAU0EN PER0_bit.no2\r
+#define SAU1EN PER0_bit.no3\r
+#define IICA0EN PER0_bit.no4\r
+#define ADCEN PER0_bit.no5\r
+#define RTCWEN PER0_bit.no7\r
+#define PAENB RMC_bit.no0\r
+#define WDVOL RMC_bit.no7\r
+#define RPEF RPECTL_bit.no0\r
+#define RPERDIS RPECTL_bit.no7\r
+#define DWAIT2 DMC2_bit.no4\r
+#define DS2 DMC2_bit.no5\r
+#define DRS2 DMC2_bit.no6\r
+#define STG2 DMC2_bit.no7\r
+#define DWAIT3 DMC3_bit.no4\r
+#define DS3 DMC3_bit.no5\r
+#define DRS3 DMC3_bit.no6\r
+#define STG3 DMC3_bit.no7\r
+#define DST2 DRC2_bit.no0\r
+#define DEN2 DRC2_bit.no7\r
+#define DST3 DRC3_bit.no0\r
+#define DEN3 DRC3_bit.no7\r
+#define DWAITALL0 DWAITALL_bit.no0\r
+#define PRVARI DWAITALL_bit.no7\r
+#define SPT0 IICCTL00_bit.no0\r
+#define STT0 IICCTL00_bit.no1\r
+#define ACKE0 IICCTL00_bit.no2\r
+#define WTIM0 IICCTL00_bit.no3\r
+#define SPIE0 IICCTL00_bit.no4\r
+#define WREL0 IICCTL00_bit.no5\r
+#define LREL0 IICCTL00_bit.no6\r
+#define IICE0 IICCTL00_bit.no7\r
+#define PRS0 IICCTL01_bit.no0\r
+#define DFC0 IICCTL01_bit.no2\r
+#define SMC0 IICCTL01_bit.no3\r
+#define DAD0 IICCTL01_bit.no4\r
+#define CLD0 IICCTL01_bit.no5\r
+#define WUP0 IICCTL01_bit.no7\r
+#define CRC0EN CRC0CTL_bit.no7\r
+#define C0ENB COMPMDR_bit.no0\r
+#define C0MON COMPMDR_bit.no3\r
+#define C1ENB COMPMDR_bit.no4\r
+#define C1MON COMPMDR_bit.no7\r
+#define C0IE COMPOCR_bit.no0\r
+#define C0OE COMPOCR_bit.no1\r
+#define C0OP COMPOCR_bit.no2\r
+#define C1IE COMPOCR_bit.no4\r
+#define C1OE COMPOCR_bit.no5\r
+#define C1OP COMPOCR_bit.no6\r
+#define SPDMD COMPOCR_bit.no7\r
+#define TKBRDT0 TKBTRG0_bit.no0\r
+#define TKBRSF0 TKBFLG0_bit.no0\r
+#define TKBMFF0 TKBFLG0_bit.no1\r
+#define TKBIEF0 TKBFLG0_bit.no2\r
+#define TKBIRF0 TKBFLG0_bit.no3\r
+#define TKBSEF00 TKBFLG0_bit.no4\r
+#define TKBSEF01 TKBFLG0_bit.no5\r
+#define TKBSSF00 TKBFLG0_bit.no6\r
+#define TKBSSF01 TKBFLG0_bit.no7\r
+#define TKBTOD00 TKBIOC00_bit.no0\r
+#define TKBTOD01 TKBIOC00_bit.no1\r
+#define TKBTOL00 TKBIOC00_bit.no2\r
+#define TKBTOL01 TKBIOC00_bit.no3\r
+#define TKBCLMF0 TKBCLR0_bit.no1\r
+#define TKBCLIE0 TKBCLR0_bit.no2\r
+#define TKBCLIR0 TKBCLR0_bit.no3\r
+#define TKBCLSE00 TKBCLR0_bit.no4\r
+#define TKBCLSE01 TKBCLR0_bit.no5\r
+#define TKBTOE00 TKBIOC01_bit.no0\r
+#define TKBTOE01 TKBIOC01_bit.no1\r
+#define TKBCE0 TKBCTL01_bit.no7\r
+#define TKBPAHTS00 TKBPAHFS0_bit.no0\r
+#define TKBPAHTS01 TKBPAHFS0_bit.no1\r
+#define TKBPAHTT00 TKBPAHFT0_bit.no0\r
+#define TKBPAHTT01 TKBPAHFT0_bit.no1\r
+#define TKBPAHIF00 TKBPAFLG0_bit.no0\r
+#define TKBPAFIF00 TKBPAFLG0_bit.no1\r
+#define TKBPAHIF01 TKBPAFLG0_bit.no2\r
+#define TKBPAFIF01 TKBPAFLG0_bit.no3\r
+#define TKBPAHSF00 TKBPAFLG0_bit.no4\r
+#define TKBPAFSF00 TKBPAFLG0_bit.no5\r
+#define TKBPAHSF01 TKBPAFLG0_bit.no6\r
+#define TKBPAFSF01 TKBPAFLG0_bit.no7\r
+#define TKBPACE00 TKBPACTL02_bit.no0\r
+#define TKBPACE01 TKBPACTL02_bit.no1\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#endif\r
+++ /dev/null
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : iodefine_ext.h */
-/* DESCRIPTION : Definition of Extended SFRs */
-/* CPU SERIES : RL78 - G14 */
-/* CPU TYPE : R5F104PJ */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/ \r
- \r
-/************************************************************************/\r
-/* Header file generated from device file: */\r
-/* DR5F104PJ.DVF */\r
-/* Copyright(C) 2012 Renesas */\r
-/* File Version V2.00 */\r
-/* Tool Version 1.9.7121 */\r
-/* Date Generated 13/11/2012 */\r
-/************************************************************************/\r
-\r
-#ifndef __IOREG_BIT_STRUCTURES\r
-#define __IOREG_BIT_STRUCTURES\r
-typedef struct {\r
- unsigned char no0 :1;\r
- unsigned char no1 :1;\r
- unsigned char no2 :1;\r
- unsigned char no3 :1;\r
- unsigned char no4 :1;\r
- unsigned char no5 :1;\r
- unsigned char no6 :1;\r
- unsigned char no7 :1;\r
-} __BITS8;\r
-\r
-typedef struct {\r
- unsigned short no0 :1;\r
- unsigned short no1 :1;\r
- unsigned short no2 :1;\r
- unsigned short no3 :1;\r
- unsigned short no4 :1;\r
- unsigned short no5 :1;\r
- unsigned short no6 :1;\r
- unsigned short no7 :1;\r
- unsigned short no8 :1;\r
- unsigned short no9 :1;\r
- unsigned short no10 :1;\r
- unsigned short no11 :1;\r
- unsigned short no12 :1;\r
- unsigned short no13 :1;\r
- unsigned short no14 :1;\r
- unsigned short no15 :1;\r
-} __BITS16;\r
-\r
-#endif\r
-\r
-#ifndef IODEFINE_EXT_H\r
-#define IODEFINE_EXT_H\r
-\r
-/*\r
- IO Registers\r
- */\r
-union un_adm2 {\r
- unsigned char adm2;\r
- __BITS8 BIT;\r
-};\r
-union un_pu0 {\r
- unsigned char pu0;\r
- __BITS8 BIT;\r
-};\r
-union un_pu1 {\r
- unsigned char pu1;\r
- __BITS8 BIT;\r
-};\r
-union un_pu3 {\r
- unsigned char pu3;\r
- __BITS8 BIT;\r
-};\r
-union un_pu4 {\r
- unsigned char pu4;\r
- __BITS8 BIT;\r
-};\r
-union un_pu5 {\r
- unsigned char pu5;\r
- __BITS8 BIT;\r
-};\r
-union un_pu6 {\r
- unsigned char pu6;\r
- __BITS8 BIT;\r
-};\r
-union un_pu7 {\r
- unsigned char pu7;\r
- __BITS8 BIT;\r
-};\r
-union un_pu8 {\r
- unsigned char pu8;\r
- __BITS8 BIT;\r
-};\r
-union un_pu10 {\r
- unsigned char pu10;\r
- __BITS8 BIT;\r
-};\r
-union un_pu11 {\r
- unsigned char pu11;\r
- __BITS8 BIT;\r
-};\r
-union un_pu12 {\r
- unsigned char pu12;\r
- __BITS8 BIT;\r
-};\r
-union un_pu14 {\r
- unsigned char pu14;\r
- __BITS8 BIT;\r
-};\r
-union un_pim0 {\r
- unsigned char pim0;\r
- __BITS8 BIT;\r
-};\r
-union un_pim1 {\r
- unsigned char pim1;\r
- __BITS8 BIT;\r
-};\r
-union un_pim3 {\r
- unsigned char pim3;\r
- __BITS8 BIT;\r
-};\r
-union un_pim4 {\r
- unsigned char pim4;\r
- __BITS8 BIT;\r
-};\r
-union un_pim5 {\r
- unsigned char pim5;\r
- __BITS8 BIT;\r
-};\r
-union un_pim8 {\r
- unsigned char pim8;\r
- __BITS8 BIT;\r
-};\r
-union un_pim14 {\r
- unsigned char pim14;\r
- __BITS8 BIT;\r
-};\r
-union un_pom0 {\r
- unsigned char pom0;\r
- __BITS8 BIT;\r
-};\r
-union un_pom1 {\r
- unsigned char pom1;\r
- __BITS8 BIT;\r
-};\r
-union un_pom3 {\r
- unsigned char pom3;\r
- __BITS8 BIT;\r
-};\r
-union un_pom4 {\r
- unsigned char pom4;\r
- __BITS8 BIT;\r
-};\r
-union un_pom5 {\r
- unsigned char pom5;\r
- __BITS8 BIT;\r
-};\r
-union un_pom7 {\r
- unsigned char pom7;\r
- __BITS8 BIT;\r
-};\r
-union un_pom8 {\r
- unsigned char pom8;\r
- __BITS8 BIT;\r
-};\r
-union un_pom14 {\r
- unsigned char pom14;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc0 {\r
- unsigned char pmc0;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc1 {\r
- unsigned char pmc1;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc10 {\r
- unsigned char pmc10;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc12 {\r
- unsigned char pmc12;\r
- __BITS8 BIT;\r
-};\r
-union un_pmc14 {\r
- unsigned char pmc14;\r
- __BITS8 BIT;\r
-};\r
-union un_nfen0 {\r
- unsigned char nfen0;\r
- __BITS8 BIT;\r
-};\r
-union un_nfen1 {\r
- unsigned char nfen1;\r
- __BITS8 BIT;\r
-};\r
-union un_nfen2 {\r
- unsigned char nfen2;\r
- __BITS8 BIT;\r
-};\r
-union un_isc {\r
- unsigned char isc;\r
- __BITS8 BIT;\r
-};\r
-union un_per1 {\r
- unsigned char per1;\r
- __BITS8 BIT;\r
-};\r
-union un_pms {\r
- unsigned char pms;\r
- __BITS8 BIT;\r
-};\r
-union un_gdidis {\r
- unsigned char gdidis;\r
- __BITS8 BIT;\r
-};\r
-union un_dflctl {\r
- unsigned char dflctl;\r
- __BITS8 BIT;\r
-};\r
-union un_bectl {\r
- unsigned char bectl;\r
- __BITS8 BIT;\r
-};\r
-union un_fsse {\r
- unsigned char fsse;\r
- __BITS8 BIT;\r
-};\r
-union un_pfs {\r
- unsigned char pfs;\r
- __BITS8 BIT;\r
-};\r
-union un_per0 {\r
- unsigned char per0;\r
- __BITS8 BIT;\r
-};\r
-union un_rmc {\r
- unsigned char rmc;\r
- __BITS8 BIT;\r
-};\r
-union un_rpectl {\r
- unsigned char rpectl;\r
- __BITS8 BIT;\r
-};\r
-union un_se0l {\r
- unsigned char se0l;\r
- __BITS8 BIT;\r
-};\r
-union un_ss0l {\r
- unsigned char ss0l;\r
- __BITS8 BIT;\r
-};\r
-union un_st0l {\r
- unsigned char st0l;\r
- __BITS8 BIT;\r
-};\r
-union un_soe0l {\r
- unsigned char soe0l;\r
- __BITS8 BIT;\r
-};\r
-union un_se1l {\r
- unsigned char se1l;\r
- __BITS8 BIT;\r
-};\r
-union un_ss1l {\r
- unsigned char ss1l;\r
- __BITS8 BIT;\r
-};\r
-union un_st1l {\r
- unsigned char st1l;\r
- __BITS8 BIT;\r
-};\r
-union un_soe1l {\r
- unsigned char soe1l;\r
- __BITS8 BIT;\r
-};\r
-union un_te0l {\r
- unsigned char te0l;\r
- __BITS8 BIT;\r
-};\r
-union un_ts0l {\r
- unsigned char ts0l;\r
- __BITS8 BIT;\r
-};\r
-union un_tt0l {\r
- unsigned char tt0l;\r
- __BITS8 BIT;\r
-};\r
-union un_toe0l {\r
- unsigned char toe0l;\r
- __BITS8 BIT;\r
-};\r
-union un_te1l {\r
- unsigned char te1l;\r
- __BITS8 BIT;\r
-};\r
-union un_ts1l {\r
- unsigned char ts1l;\r
- __BITS8 BIT;\r
-};\r
-union un_tt1l {\r
- unsigned char tt1l;\r
- __BITS8 BIT;\r
-};\r
-union un_toe1l {\r
- unsigned char toe1l;\r
- __BITS8 BIT;\r
-};\r
-union un_iicctl00 {\r
- unsigned char iicctl00;\r
- __BITS8 BIT;\r
-};\r
-union un_iicctl01 {\r
- unsigned char iicctl01;\r
- __BITS8 BIT;\r
-};\r
-union un_iicctl10 {\r
- unsigned char iicctl10;\r
- __BITS8 BIT;\r
-};\r
-union un_iicctl11 {\r
- unsigned char iicctl11;\r
- __BITS8 BIT;\r
-};\r
-union un_trjioc0 {\r
- unsigned char trjioc0;\r
- __BITS8 BIT;\r
-};\r
-union un_trjmr0 {\r
- unsigned char trjmr0;\r
- __BITS8 BIT;\r
-};\r
-union un_trjisr0 {\r
- unsigned char trjisr0;\r
- __BITS8 BIT;\r
-};\r
-union un_trgmr {\r
- unsigned char trgmr;\r
- __BITS8 BIT;\r
-};\r
-union un_trgcntc {\r
- unsigned char trgcntc;\r
- __BITS8 BIT;\r
-};\r
-union un_trgcr {\r
- unsigned char trgcr;\r
- __BITS8 BIT;\r
-};\r
-union un_trgier {\r
- unsigned char trgier;\r
- __BITS8 BIT;\r
-};\r
-union un_trgsr {\r
- unsigned char trgsr;\r
- __BITS8 BIT;\r
-};\r
-union un_trgior {\r
- unsigned char trgior;\r
- __BITS8 BIT;\r
-};\r
-union un_trdelc {\r
- unsigned char trdelc;\r
- __BITS8 BIT;\r
-};\r
-union un_trdmr {\r
- unsigned char trdmr;\r
- __BITS8 BIT;\r
-};\r
-union un_trdpmr {\r
- unsigned char trdpmr;\r
- __BITS8 BIT;\r
-};\r
-union un_trdfcr {\r
- unsigned char trdfcr;\r
- __BITS8 BIT;\r
-};\r
-union un_trdoer1 {\r
- unsigned char trdoer1;\r
- __BITS8 BIT;\r
-};\r
-union un_trdoer2 {\r
- unsigned char trdoer2;\r
- __BITS8 BIT;\r
-};\r
-union un_trdocr {\r
- unsigned char trdocr;\r
- __BITS8 BIT;\r
-};\r
-union un_trddf0 {\r
- unsigned char trddf0;\r
- __BITS8 BIT;\r
-};\r
-union un_trddf1 {\r
- unsigned char trddf1;\r
- __BITS8 BIT;\r
-};\r
-union un_trdcr0 {\r
- unsigned char trdcr0;\r
- __BITS8 BIT;\r
-};\r
-union un_trdiora0 {\r
- unsigned char trdiora0;\r
- __BITS8 BIT;\r
-};\r
-union un_trdiorc0 {\r
- unsigned char trdiorc0;\r
- __BITS8 BIT;\r
-};\r
-union un_trdsr0 {\r
- unsigned char trdsr0;\r
- __BITS8 BIT;\r
-};\r
-union un_trdier0 {\r
- unsigned char trdier0;\r
- __BITS8 BIT;\r
-};\r
-union un_trdpocr0 {\r
- unsigned char trdpocr0;\r
- __BITS8 BIT;\r
-};\r
-union un_trdcr1 {\r
- unsigned char trdcr1;\r
- __BITS8 BIT;\r
-};\r
-union un_trdiora1 {\r
- unsigned char trdiora1;\r
- __BITS8 BIT;\r
-};\r
-union un_trdiorc1 {\r
- unsigned char trdiorc1;\r
- __BITS8 BIT;\r
-};\r
-union un_trdsr1 {\r
- unsigned char trdsr1;\r
- __BITS8 BIT;\r
-};\r
-union un_trdier1 {\r
- unsigned char trdier1;\r
- __BITS8 BIT;\r
-};\r
-union un_trdpocr1 {\r
- unsigned char trdpocr1;\r
- __BITS8 BIT;\r
-};\r
-union un_dtcen0 {\r
- unsigned char dtcen0;\r
- __BITS8 BIT;\r
-};\r
-union un_dtcen1 {\r
- unsigned char dtcen1;\r
- __BITS8 BIT;\r
-};\r
-union un_dtcen2 {\r
- unsigned char dtcen2;\r
- __BITS8 BIT;\r
-};\r
-union un_dtcen3 {\r
- unsigned char dtcen3;\r
- __BITS8 BIT;\r
-};\r
-union un_dtcen4 {\r
- unsigned char dtcen4;\r
- __BITS8 BIT;\r
-};\r
-union un_crc0ctl {\r
- unsigned char crc0ctl;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr00 {\r
- unsigned char elselr00;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr01 {\r
- unsigned char elselr01;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr02 {\r
- unsigned char elselr02;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr03 {\r
- unsigned char elselr03;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr04 {\r
- unsigned char elselr04;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr05 {\r
- unsigned char elselr05;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr06 {\r
- unsigned char elselr06;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr07 {\r
- unsigned char elselr07;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr08 {\r
- unsigned char elselr08;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr09 {\r
- unsigned char elselr09;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr10 {\r
- unsigned char elselr10;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr11 {\r
- unsigned char elselr11;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr12 {\r
- unsigned char elselr12;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr13 {\r
- unsigned char elselr13;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr14 {\r
- unsigned char elselr14;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr15 {\r
- unsigned char elselr15;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr16 {\r
- unsigned char elselr16;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr17 {\r
- unsigned char elselr17;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr18 {\r
- unsigned char elselr18;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr19 {\r
- unsigned char elselr19;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr20 {\r
- unsigned char elselr20;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr21 {\r
- unsigned char elselr21;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr22 {\r
- unsigned char elselr22;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr23 {\r
- unsigned char elselr23;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr24 {\r
- unsigned char elselr24;\r
- __BITS8 BIT;\r
-};\r
-union un_elselr25 {\r
- unsigned char elselr25;\r
- __BITS8 BIT;\r
-};\r
-union un_compmdr {\r
- unsigned char compmdr;\r
- __BITS8 BIT;\r
-};\r
-union un_compfir {\r
- unsigned char compfir;\r
- __BITS8 BIT;\r
-};\r
-union un_compocr {\r
- unsigned char compocr;\r
- __BITS8 BIT;\r
-};\r
-union un_comptcr {\r
- unsigned char comptcr;\r
- __BITS8 BIT;\r
-};\r
-\r
-#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2\r
-#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT\r
-#define ADUL (*(volatile unsigned char *)0xF0011)\r
-#define ADLL (*(volatile unsigned char *)0xF0012)\r
-#define ADTES (*(volatile unsigned char *)0xF0013)\r
-#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0\r
-#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT\r
-#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1\r
-#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT\r
-#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3\r
-#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT\r
-#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4\r
-#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT\r
-#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5\r
-#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT\r
-#define PU6 (*(volatile union un_pu6 *)0xF0036).pu6\r
-#define PU6_bit (*(volatile union un_pu6 *)0xF0036).BIT\r
-#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7\r
-#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT\r
-#define PU8 (*(volatile union un_pu8 *)0xF0038).pu8\r
-#define PU8_bit (*(volatile union un_pu8 *)0xF0038).BIT\r
-#define PU10 (*(volatile union un_pu10 *)0xF003A).pu10\r
-#define PU10_bit (*(volatile union un_pu10 *)0xF003A).BIT\r
-#define PU11 (*(volatile union un_pu11 *)0xF003B).pu11\r
-#define PU11_bit (*(volatile union un_pu11 *)0xF003B).BIT\r
-#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12\r
-#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT\r
-#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14\r
-#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT\r
-#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0\r
-#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT\r
-#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1\r
-#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT\r
-#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3\r
-#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT\r
-#define PIM4 (*(volatile union un_pim4 *)0xF0044).pim4\r
-#define PIM4_bit (*(volatile union un_pim4 *)0xF0044).BIT\r
-#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5\r
-#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT\r
-#define PIM8 (*(volatile union un_pim8 *)0xF0048).pim8\r
-#define PIM8_bit (*(volatile union un_pim8 *)0xF0048).BIT\r
-#define PIM14 (*(volatile union un_pim14 *)0xF004E).pim14\r
-#define PIM14_bit (*(volatile union un_pim14 *)0xF004E).BIT\r
-#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0\r
-#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT\r
-#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1\r
-#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT\r
-#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3\r
-#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT\r
-#define POM4 (*(volatile union un_pom4 *)0xF0054).pom4\r
-#define POM4_bit (*(volatile union un_pom4 *)0xF0054).BIT\r
-#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5\r
-#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT\r
-#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7\r
-#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT\r
-#define POM8 (*(volatile union un_pom8 *)0xF0058).pom8\r
-#define POM8_bit (*(volatile union un_pom8 *)0xF0058).BIT\r
-#define POM14 (*(volatile union un_pom14 *)0xF005E).pom14\r
-#define POM14_bit (*(volatile union un_pom14 *)0xF005E).BIT\r
-#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0\r
-#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT\r
-#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1\r
-#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT\r
-#define PMC10 (*(volatile union un_pmc10 *)0xF006A).pmc10\r
-#define PMC10_bit (*(volatile union un_pmc10 *)0xF006A).BIT\r
-#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12\r
-#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT\r
-#define PMC14 (*(volatile union un_pmc14 *)0xF006E).pmc14\r
-#define PMC14_bit (*(volatile union un_pmc14 *)0xF006E).BIT\r
-#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0\r
-#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT\r
-#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1\r
-#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT\r
-#define NFEN2 (*(volatile union un_nfen2 *)0xF0072).nfen2\r
-#define NFEN2_bit (*(volatile union un_nfen2 *)0xF0072).BIT\r
-#define ISC (*(volatile union un_isc *)0xF0073).isc\r
-#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT\r
-#define TIS0 (*(volatile unsigned char *)0xF0074)\r
-#define ADPC (*(volatile unsigned char *)0xF0076)\r
-#define PIOR0 (*(volatile unsigned char *)0xF0077)\r
-#define IAWCTL (*(volatile unsigned char *)0xF0078)\r
-#define PIOR1 (*(volatile unsigned char *)0xF0079)\r
-#define PER1 (*(volatile union un_per1 *)0xF007A).per1\r
-#define PER1_bit (*(volatile union un_per1 *)0xF007A).BIT\r
-#define PMS (*(volatile union un_pms *)0xF007B).pms\r
-#define PMS_bit (*(volatile union un_pms *)0xF007B).BIT\r
-#define GDIDIS (*(volatile union un_gdidis *)0xF007D).gdidis\r
-#define GDIDIS_bit (*(volatile union un_gdidis *)0xF007D).BIT\r
-#define PRDSEL (*(volatile unsigned short *)0xF007E)\r
-#define TOOLEN (*(volatile unsigned char *)0xF0080)\r
-#define BPAL0 (*(volatile unsigned char *)0xF0081)\r
-#define BPAH0 (*(volatile unsigned char *)0xF0082)\r
-#define BPAS0 (*(volatile unsigned char *)0xF0083)\r
-#define BACDVL0 (*(volatile unsigned char *)0xF0084)\r
-#define BACDVH0 (*(volatile unsigned char *)0xF0085)\r
-#define BACDML0 (*(volatile unsigned char *)0xF0086)\r
-#define BACDMH0 (*(volatile unsigned char *)0xF0087)\r
-#define MONMOD (*(volatile unsigned char *)0xF0088)\r
-#define BPAL1 (*(volatile unsigned char *)0xF0089)\r
-#define BPAH1 (*(volatile unsigned char *)0xF008A)\r
-#define BPAS1 (*(volatile unsigned char *)0xF008B)\r
-#define BACDVL1 (*(volatile unsigned char *)0xF008C)\r
-#define BACDVH1 (*(volatile unsigned char *)0xF008D)\r
-#define BACDML1 (*(volatile unsigned char *)0xF008E)\r
-#define BACDMH1 (*(volatile unsigned char *)0xF008F)\r
-#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl\r
-#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT\r
-#define HIOTRM (*(volatile unsigned char *)0xF00A0)\r
-#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl\r
-#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT\r
-#define HOCODIV (*(volatile unsigned char *)0xF00A8)\r
-#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)\r
-#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)\r
-#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)\r
-#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)\r
-#define FLSEC (*(volatile unsigned short *)0xF00B0)\r
-#define FLFSWS (*(volatile unsigned short *)0xF00B2)\r
-#define FLFSWE (*(volatile unsigned short *)0xF00B4)\r
-#define FSSET (*(volatile unsigned char *)0xF00B6)\r
-#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse\r
-#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT\r
-#define FLFADL (*(volatile unsigned short *)0xF00B8)\r
-#define FLFADH (*(volatile unsigned char *)0xF00BA)\r
-#define PFCMD (*(volatile unsigned char *)0xF00C0)\r
-#define PFS (*(volatile union un_pfs *)0xF00C1).pfs\r
-#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT\r
-#define FLRL (*(volatile unsigned short *)0xF00C2)\r
-#define FLRH (*(volatile unsigned short *)0xF00C4)\r
-#define FLWE (*(volatile unsigned char *)0xF00C6)\r
-#define FLRE (*(volatile unsigned char *)0xF00C7)\r
-#define FLTMS (*(volatile unsigned short *)0xF00C8)\r
-#define DFLMC (*(volatile unsigned short *)0xF00CA)\r
-#define FLMCL (*(volatile unsigned short *)0xF00CC)\r
-#define FLMCH (*(volatile unsigned char *)0xF00CE)\r
-#define FSCTL (*(volatile unsigned char *)0xF00CF)\r
-#define ICEADR (*(volatile unsigned short *)0xF00D0)\r
-#define ICEDAT (*(volatile unsigned short *)0xF00D2)\r
-#define PER0 (*(volatile union un_per0 *)0xF00F0).per0\r
-#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT\r
-#define OSMC (*(volatile unsigned char *)0xF00F3)\r
-#define RMC (*(volatile union un_rmc *)0xF00F4).rmc\r
-#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT\r
-#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl\r
-#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT\r
-#define BCDADJ (*(volatile unsigned char *)0xF00FE)\r
-#define VECTCTRL (*(volatile unsigned char *)0xF00FF)\r
-#define SSR00 (*(volatile unsigned short *)0xF0100)\r
-#define SSR00L (*(volatile unsigned char *)0xF0100)\r
-#define SSR01 (*(volatile unsigned short *)0xF0102)\r
-#define SSR01L (*(volatile unsigned char *)0xF0102)\r
-#define SSR02 (*(volatile unsigned short *)0xF0104)\r
-#define SSR02L (*(volatile unsigned char *)0xF0104)\r
-#define SSR03 (*(volatile unsigned short *)0xF0106)\r
-#define SSR03L (*(volatile unsigned char *)0xF0106)\r
-#define SIR00 (*(volatile unsigned short *)0xF0108)\r
-#define SIR00L (*(volatile unsigned char *)0xF0108)\r
-#define SIR01 (*(volatile unsigned short *)0xF010A)\r
-#define SIR01L (*(volatile unsigned char *)0xF010A)\r
-#define SIR02 (*(volatile unsigned short *)0xF010C)\r
-#define SIR02L (*(volatile unsigned char *)0xF010C)\r
-#define SIR03 (*(volatile unsigned short *)0xF010E)\r
-#define SIR03L (*(volatile unsigned char *)0xF010E)\r
-#define SMR00 (*(volatile unsigned short *)0xF0110)\r
-#define SMR01 (*(volatile unsigned short *)0xF0112)\r
-#define SMR02 (*(volatile unsigned short *)0xF0114)\r
-#define SMR03 (*(volatile unsigned short *)0xF0116)\r
-#define SCR00 (*(volatile unsigned short *)0xF0118)\r
-#define SCR01 (*(volatile unsigned short *)0xF011A)\r
-#define SCR02 (*(volatile unsigned short *)0xF011C)\r
-#define SCR03 (*(volatile unsigned short *)0xF011E)\r
-#define SE0 (*(volatile unsigned short *)0xF0120)\r
-#define SE0L (*(volatile union un_se0l *)0xF0120).se0l\r
-#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT\r
-#define SS0 (*(volatile unsigned short *)0xF0122)\r
-#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l\r
-#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT\r
-#define ST0 (*(volatile unsigned short *)0xF0124)\r
-#define ST0L (*(volatile union un_st0l *)0xF0124).st0l\r
-#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT\r
-#define SPS0 (*(volatile unsigned short *)0xF0126)\r
-#define SPS0L (*(volatile unsigned char *)0xF0126)\r
-#define SO0 (*(volatile unsigned short *)0xF0128)\r
-#define SOE0 (*(volatile unsigned short *)0xF012A)\r
-#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l\r
-#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT\r
-#define EDR00 (*(volatile unsigned short *)0xF012C)\r
-#define EDR00L (*(volatile unsigned char *)0xF012C)\r
-#define EDR01 (*(volatile unsigned short *)0xF012E)\r
-#define EDR01L (*(volatile unsigned char *)0xF012E)\r
-#define EDR02 (*(volatile unsigned short *)0xF0130)\r
-#define EDR02L (*(volatile unsigned char *)0xF0130)\r
-#define EDR03 (*(volatile unsigned short *)0xF0132)\r
-#define EDR03L (*(volatile unsigned char *)0xF0132)\r
-#define SOL0 (*(volatile unsigned short *)0xF0134)\r
-#define SOL0L (*(volatile unsigned char *)0xF0134)\r
-#define SSC0 (*(volatile unsigned short *)0xF0138)\r
-#define SSC0L (*(volatile unsigned char *)0xF0138)\r
-#define SSR10 (*(volatile unsigned short *)0xF0140)\r
-#define SSR10L (*(volatile unsigned char *)0xF0140)\r
-#define SSR11 (*(volatile unsigned short *)0xF0142)\r
-#define SSR11L (*(volatile unsigned char *)0xF0142)\r
-#define SSR12 (*(volatile unsigned short *)0xF0144)\r
-#define SSR12L (*(volatile unsigned char *)0xF0144)\r
-#define SSR13 (*(volatile unsigned short *)0xF0146)\r
-#define SSR13L (*(volatile unsigned char *)0xF0146)\r
-#define SIR10 (*(volatile unsigned short *)0xF0148)\r
-#define SIR10L (*(volatile unsigned char *)0xF0148)\r
-#define SIR11 (*(volatile unsigned short *)0xF014A)\r
-#define SIR11L (*(volatile unsigned char *)0xF014A)\r
-#define SIR12 (*(volatile unsigned short *)0xF014C)\r
-#define SIR12L (*(volatile unsigned char *)0xF014C)\r
-#define SIR13 (*(volatile unsigned short *)0xF014E)\r
-#define SIR13L (*(volatile unsigned char *)0xF014E)\r
-#define SMR10 (*(volatile unsigned short *)0xF0150)\r
-#define SMR11 (*(volatile unsigned short *)0xF0152)\r
-#define SMR12 (*(volatile unsigned short *)0xF0154)\r
-#define SMR13 (*(volatile unsigned short *)0xF0156)\r
-#define SCR10 (*(volatile unsigned short *)0xF0158)\r
-#define SCR11 (*(volatile unsigned short *)0xF015A)\r
-#define SCR12 (*(volatile unsigned short *)0xF015C)\r
-#define SCR13 (*(volatile unsigned short *)0xF015E)\r
-#define SE1 (*(volatile unsigned short *)0xF0160)\r
-#define SE1L (*(volatile union un_se1l *)0xF0160).se1l\r
-#define SE1L_bit (*(volatile union un_se1l *)0xF0160).BIT\r
-#define SS1 (*(volatile unsigned short *)0xF0162)\r
-#define SS1L (*(volatile union un_ss1l *)0xF0162).ss1l\r
-#define SS1L_bit (*(volatile union un_ss1l *)0xF0162).BIT\r
-#define ST1 (*(volatile unsigned short *)0xF0164)\r
-#define ST1L (*(volatile union un_st1l *)0xF0164).st1l\r
-#define ST1L_bit (*(volatile union un_st1l *)0xF0164).BIT\r
-#define SPS1 (*(volatile unsigned short *)0xF0166)\r
-#define SPS1L (*(volatile unsigned char *)0xF0166)\r
-#define SO1 (*(volatile unsigned short *)0xF0168)\r
-#define SOE1 (*(volatile unsigned short *)0xF016A)\r
-#define SOE1L (*(volatile union un_soe1l *)0xF016A).soe1l\r
-#define SOE1L_bit (*(volatile union un_soe1l *)0xF016A).BIT\r
-#define EDR10 (*(volatile unsigned short *)0xF016C)\r
-#define EDR10L (*(volatile unsigned char *)0xF016C)\r
-#define EDR11 (*(volatile unsigned short *)0xF016E)\r
-#define EDR11L (*(volatile unsigned char *)0xF016E)\r
-#define EDR12 (*(volatile unsigned short *)0xF0170)\r
-#define EDR12L (*(volatile unsigned char *)0xF0170)\r
-#define EDR13 (*(volatile unsigned short *)0xF0172)\r
-#define EDR13L (*(volatile unsigned char *)0xF0172)\r
-#define SOL1 (*(volatile unsigned short *)0xF0174)\r
-#define SOL1L (*(volatile unsigned char *)0xF0174)\r
-#define SSC1 (*(volatile unsigned short *)0xF0178)\r
-#define SSC1L (*(volatile unsigned char *)0xF0178)\r
-#define TCR00 (*(volatile unsigned short *)0xF0180)\r
-#define TCR01 (*(volatile unsigned short *)0xF0182)\r
-#define TCR02 (*(volatile unsigned short *)0xF0184)\r
-#define TCR03 (*(volatile unsigned short *)0xF0186)\r
-#define TMR00 (*(volatile unsigned short *)0xF0190)\r
-#define TMR01 (*(volatile unsigned short *)0xF0192)\r
-#define TMR02 (*(volatile unsigned short *)0xF0194)\r
-#define TMR03 (*(volatile unsigned short *)0xF0196)\r
-#define TSR00 (*(volatile unsigned short *)0xF01A0)\r
-#define TSR00L (*(volatile unsigned char *)0xF01A0)\r
-#define TSR01 (*(volatile unsigned short *)0xF01A2)\r
-#define TSR01L (*(volatile unsigned char *)0xF01A2)\r
-#define TSR02 (*(volatile unsigned short *)0xF01A4)\r
-#define TSR02L (*(volatile unsigned char *)0xF01A4)\r
-#define TSR03 (*(volatile unsigned short *)0xF01A6)\r
-#define TSR03L (*(volatile unsigned char *)0xF01A6)\r
-#define TE0 (*(volatile unsigned short *)0xF01B0)\r
-#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l\r
-#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT\r
-#define TS0 (*(volatile unsigned short *)0xF01B2)\r
-#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l\r
-#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT\r
-#define TT0 (*(volatile unsigned short *)0xF01B4)\r
-#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l\r
-#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT\r
-#define TPS0 (*(volatile unsigned short *)0xF01B6)\r
-#define TO0 (*(volatile unsigned short *)0xF01B8)\r
-#define TO0L (*(volatile unsigned char *)0xF01B8)\r
-#define TOE0 (*(volatile unsigned short *)0xF01BA)\r
-#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l\r
-#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT\r
-#define TOL0 (*(volatile unsigned short *)0xF01BC)\r
-#define TOL0L (*(volatile unsigned char *)0xF01BC)\r
-#define TOM0 (*(volatile unsigned short *)0xF01BE)\r
-#define TOM0L (*(volatile unsigned char *)0xF01BE)\r
-#define TCR10 (*(volatile unsigned short *)0xF01C0)\r
-#define TCR11 (*(volatile unsigned short *)0xF01C2)\r
-#define TCR12 (*(volatile unsigned short *)0xF01C4)\r
-#define TCR13 (*(volatile unsigned short *)0xF01C6)\r
-#define TMR10 (*(volatile unsigned short *)0xF01D0)\r
-#define TMR11 (*(volatile unsigned short *)0xF01D2)\r
-#define TMR12 (*(volatile unsigned short *)0xF01D4)\r
-#define TMR13 (*(volatile unsigned short *)0xF01D6)\r
-#define TSR10 (*(volatile unsigned short *)0xF01E0)\r
-#define TSR10L (*(volatile unsigned char *)0xF01E0)\r
-#define TSR11 (*(volatile unsigned short *)0xF01E2)\r
-#define TSR11L (*(volatile unsigned char *)0xF01E2)\r
-#define TSR12 (*(volatile unsigned short *)0xF01E4)\r
-#define TSR12L (*(volatile unsigned char *)0xF01E4)\r
-#define TSR13 (*(volatile unsigned short *)0xF01E6)\r
-#define TSR13L (*(volatile unsigned char *)0xF01E6)\r
-#define TE1 (*(volatile unsigned short *)0xF01F0)\r
-#define TE1L (*(volatile union un_te1l *)0xF01F0).te1l\r
-#define TE1L_bit (*(volatile union un_te1l *)0xF01F0).BIT\r
-#define TS1 (*(volatile unsigned short *)0xF01F2)\r
-#define TS1L (*(volatile union un_ts1l *)0xF01F2).ts1l\r
-#define TS1L_bit (*(volatile union un_ts1l *)0xF01F2).BIT\r
-#define TT1 (*(volatile unsigned short *)0xF01F4)\r
-#define TT1L (*(volatile union un_tt1l *)0xF01F4).tt1l\r
-#define TT1L_bit (*(volatile union un_tt1l *)0xF01F4).BIT\r
-#define TPS1 (*(volatile unsigned short *)0xF01F6)\r
-#define TO1 (*(volatile unsigned short *)0xF01F8)\r
-#define TO1L (*(volatile unsigned char *)0xF01F8)\r
-#define TOE1 (*(volatile unsigned short *)0xF01FA)\r
-#define TOE1L (*(volatile union un_toe1l *)0xF01FA).toe1l\r
-#define TOE1L_bit (*(volatile union un_toe1l *)0xF01FA).BIT\r
-#define TOL1 (*(volatile unsigned short *)0xF01FC)\r
-#define TOL1L (*(volatile unsigned char *)0xF01FC)\r
-#define TOM1 (*(volatile unsigned short *)0xF01FE)\r
-#define TOM1L (*(volatile unsigned char *)0xF01FE)\r
-#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00\r
-#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT\r
-#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01\r
-#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT\r
-#define IICWL0 (*(volatile unsigned char *)0xF0232)\r
-#define IICWH0 (*(volatile unsigned char *)0xF0233)\r
-#define SVA0 (*(volatile unsigned char *)0xF0234)\r
-#define IICSE0 (*(volatile unsigned char *)0xF0235)\r
-#define IICCTL10 (*(volatile union un_iicctl10 *)0xF0238).iicctl10\r
-#define IICCTL10_bit (*(volatile union un_iicctl10 *)0xF0238).BIT\r
-#define IICCTL11 (*(volatile union un_iicctl11 *)0xF0239).iicctl11\r
-#define IICCTL11_bit (*(volatile union un_iicctl11 *)0xF0239).BIT\r
-#define IICWL1 (*(volatile unsigned char *)0xF023A)\r
-#define IICWH1 (*(volatile unsigned char *)0xF023B)\r
-#define SVA1 (*(volatile unsigned char *)0xF023C)\r
-#define IICSE1 (*(volatile unsigned char *)0xF023D)\r
-#define TRJCR0 (*(volatile unsigned char *)0xF0240)\r
-#define TRJIOC0 (*(volatile union un_trjioc0 *)0xF0241).trjioc0\r
-#define TRJIOC0_bit (*(volatile union un_trjioc0 *)0xF0241).BIT\r
-#define TRJMR0 (*(volatile union un_trjmr0 *)0xF0242).trjmr0\r
-#define TRJMR0_bit (*(volatile union un_trjmr0 *)0xF0242).BIT\r
-#define TRJISR0 (*(volatile union un_trjisr0 *)0xF0243).trjisr0\r
-#define TRJISR0_bit (*(volatile union un_trjisr0 *)0xF0243).BIT\r
-#define TRGMR (*(volatile union un_trgmr *)0xF0250).trgmr\r
-#define TRGMR_bit (*(volatile union un_trgmr *)0xF0250).BIT\r
-#define TRGCNTC (*(volatile union un_trgcntc *)0xF0251).trgcntc\r
-#define TRGCNTC_bit (*(volatile union un_trgcntc *)0xF0251).BIT\r
-#define TRGCR (*(volatile union un_trgcr *)0xF0252).trgcr\r
-#define TRGCR_bit (*(volatile union un_trgcr *)0xF0252).BIT\r
-#define TRGIER (*(volatile union un_trgier *)0xF0253).trgier\r
-#define TRGIER_bit (*(volatile union un_trgier *)0xF0253).BIT\r
-#define TRGSR (*(volatile union un_trgsr *)0xF0254).trgsr\r
-#define TRGSR_bit (*(volatile union un_trgsr *)0xF0254).BIT\r
-#define TRGIOR (*(volatile union un_trgior *)0xF0255).trgior\r
-#define TRGIOR_bit (*(volatile union un_trgior *)0xF0255).BIT\r
-#define TRG (*(volatile unsigned short *)0xF0256)\r
-#define TRGGRA (*(volatile unsigned short *)0xF0258)\r
-#define TRGGRB (*(volatile unsigned short *)0xF025A)\r
-#define TRGGRCM (*(volatile unsigned short *)0xF025C)\r
-#define TRGGRDM (*(volatile unsigned short *)0xF025E)\r
-#define TRDELC (*(volatile union un_trdelc *)0xF0260).trdelc\r
-#define TRDELC_bit (*(volatile union un_trdelc *)0xF0260).BIT\r
-#define TRDSTR (*(volatile unsigned char *)0xF0263)\r
-#define TRDMR (*(volatile union un_trdmr *)0xF0264).trdmr\r
-#define TRDMR_bit (*(volatile union un_trdmr *)0xF0264).BIT\r
-#define TRDPMR (*(volatile union un_trdpmr *)0xF0265).trdpmr\r
-#define TRDPMR_bit (*(volatile union un_trdpmr *)0xF0265).BIT\r
-#define TRDFCR (*(volatile union un_trdfcr *)0xF0266).trdfcr\r
-#define TRDFCR_bit (*(volatile union un_trdfcr *)0xF0266).BIT\r
-#define TRDOER1 (*(volatile union un_trdoer1 *)0xF0267).trdoer1\r
-#define TRDOER1_bit (*(volatile union un_trdoer1 *)0xF0267).BIT\r
-#define TRDOER2 (*(volatile union un_trdoer2 *)0xF0268).trdoer2\r
-#define TRDOER2_bit (*(volatile union un_trdoer2 *)0xF0268).BIT\r
-#define TRDOCR (*(volatile union un_trdocr *)0xF0269).trdocr\r
-#define TRDOCR_bit (*(volatile union un_trdocr *)0xF0269).BIT\r
-#define TRDDF0 (*(volatile union un_trddf0 *)0xF026A).trddf0\r
-#define TRDDF0_bit (*(volatile union un_trddf0 *)0xF026A).BIT\r
-#define TRDDF1 (*(volatile union un_trddf1 *)0xF026B).trddf1\r
-#define TRDDF1_bit (*(volatile union un_trddf1 *)0xF026B).BIT\r
-#define TRDCR0 (*(volatile union un_trdcr0 *)0xF0270).trdcr0\r
-#define TRDCR0_bit (*(volatile union un_trdcr0 *)0xF0270).BIT\r
-#define TRDIORA0 (*(volatile union un_trdiora0 *)0xF0271).trdiora0\r
-#define TRDIORA0_bit (*(volatile union un_trdiora0 *)0xF0271).BIT\r
-#define TRDIORC0 (*(volatile union un_trdiorc0 *)0xF0272).trdiorc0\r
-#define TRDIORC0_bit (*(volatile union un_trdiorc0 *)0xF0272).BIT\r
-#define TRDSR0 (*(volatile union un_trdsr0 *)0xF0273).trdsr0\r
-#define TRDSR0_bit (*(volatile union un_trdsr0 *)0xF0273).BIT\r
-#define TRDIER0 (*(volatile union un_trdier0 *)0xF0274).trdier0\r
-#define TRDIER0_bit (*(volatile union un_trdier0 *)0xF0274).BIT\r
-#define TRDPOCR0 (*(volatile union un_trdpocr0 *)0xF0275).trdpocr0\r
-#define TRDPOCR0_bit (*(volatile union un_trdpocr0 *)0xF0275).BIT\r
-#define TRD0 (*(volatile unsigned short *)0xF0276)\r
-#define TRDGRA0 (*(volatile unsigned short *)0xF0278)\r
-#define TRDGRB0 (*(volatile unsigned short *)0xF027A)\r
-#define TRDGRC0M (*(volatile unsigned short *)0xF027C)\r
-#define TRDGRD0M (*(volatile unsigned short *)0xF027E)\r
-#define TRDCR1 (*(volatile union un_trdcr1 *)0xF0280).trdcr1\r
-#define TRDCR1_bit (*(volatile union un_trdcr1 *)0xF0280).BIT\r
-#define TRDIORA1 (*(volatile union un_trdiora1 *)0xF0281).trdiora1\r
-#define TRDIORA1_bit (*(volatile union un_trdiora1 *)0xF0281).BIT\r
-#define TRDIORC1 (*(volatile union un_trdiorc1 *)0xF0282).trdiorc1\r
-#define TRDIORC1_bit (*(volatile union un_trdiorc1 *)0xF0282).BIT\r
-#define TRDSR1 (*(volatile union un_trdsr1 *)0xF0283).trdsr1\r
-#define TRDSR1_bit (*(volatile union un_trdsr1 *)0xF0283).BIT\r
-#define TRDIER1 (*(volatile union un_trdier1 *)0xF0284).trdier1\r
-#define TRDIER1_bit (*(volatile union un_trdier1 *)0xF0284).BIT\r
-#define TRDPOCR1 (*(volatile union un_trdpocr1 *)0xF0285).trdpocr1\r
-#define TRDPOCR1_bit (*(volatile union un_trdpocr1 *)0xF0285).BIT\r
-#define TRD1 (*(volatile unsigned short *)0xF0286)\r
-#define TRDGRA1 (*(volatile unsigned short *)0xF0288)\r
-#define TRDGRB1 (*(volatile unsigned short *)0xF028A)\r
-#define TRDGRC1M (*(volatile unsigned short *)0xF028C)\r
-#define TRDGRD1M (*(volatile unsigned short *)0xF028E)\r
-#define DTCBAR (*(volatile unsigned char *)0xF02E0)\r
-#define DTCEN0 (*(volatile union un_dtcen0 *)0xF02E8).dtcen0\r
-#define DTCEN0_bit (*(volatile union un_dtcen0 *)0xF02E8).BIT\r
-#define DTCEN1 (*(volatile union un_dtcen1 *)0xF02E9).dtcen1\r
-#define DTCEN1_bit (*(volatile union un_dtcen1 *)0xF02E9).BIT\r
-#define DTCEN2 (*(volatile union un_dtcen2 *)0xF02EA).dtcen2\r
-#define DTCEN2_bit (*(volatile union un_dtcen2 *)0xF02EA).BIT\r
-#define DTCEN3 (*(volatile union un_dtcen3 *)0xF02EB).dtcen3\r
-#define DTCEN3_bit (*(volatile union un_dtcen3 *)0xF02EB).BIT\r
-#define DTCEN4 (*(volatile union un_dtcen4 *)0xF02EC).dtcen4\r
-#define DTCEN4_bit (*(volatile union un_dtcen4 *)0xF02EC).BIT\r
-#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl\r
-#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT\r
-#define PGCRCL (*(volatile unsigned short *)0xF02F2)\r
-#define CRCD (*(volatile unsigned short *)0xF02FA)\r
-#define ELSELR00 (*(volatile union un_elselr00 *)0xF0300).elselr00\r
-#define ELSELR00_bit (*(volatile union un_elselr00 *)0xF0300).BIT\r
-#define ELSELR01 (*(volatile union un_elselr01 *)0xF0301).elselr01\r
-#define ELSELR01_bit (*(volatile union un_elselr01 *)0xF0301).BIT\r
-#define ELSELR02 (*(volatile union un_elselr02 *)0xF0302).elselr02\r
-#define ELSELR02_bit (*(volatile union un_elselr02 *)0xF0302).BIT\r
-#define ELSELR03 (*(volatile union un_elselr03 *)0xF0303).elselr03\r
-#define ELSELR03_bit (*(volatile union un_elselr03 *)0xF0303).BIT\r
-#define ELSELR04 (*(volatile union un_elselr04 *)0xF0304).elselr04\r
-#define ELSELR04_bit (*(volatile union un_elselr04 *)0xF0304).BIT\r
-#define ELSELR05 (*(volatile union un_elselr05 *)0xF0305).elselr05\r
-#define ELSELR05_bit (*(volatile union un_elselr05 *)0xF0305).BIT\r
-#define ELSELR06 (*(volatile union un_elselr06 *)0xF0306).elselr06\r
-#define ELSELR06_bit (*(volatile union un_elselr06 *)0xF0306).BIT\r
-#define ELSELR07 (*(volatile union un_elselr07 *)0xF0307).elselr07\r
-#define ELSELR07_bit (*(volatile union un_elselr07 *)0xF0307).BIT\r
-#define ELSELR08 (*(volatile union un_elselr08 *)0xF0308).elselr08\r
-#define ELSELR08_bit (*(volatile union un_elselr08 *)0xF0308).BIT\r
-#define ELSELR09 (*(volatile union un_elselr09 *)0xF0309).elselr09\r
-#define ELSELR09_bit (*(volatile union un_elselr09 *)0xF0309).BIT\r
-#define ELSELR10 (*(volatile union un_elselr10 *)0xF030A).elselr10\r
-#define ELSELR10_bit (*(volatile union un_elselr10 *)0xF030A).BIT\r
-#define ELSELR11 (*(volatile union un_elselr11 *)0xF030B).elselr11\r
-#define ELSELR11_bit (*(volatile union un_elselr11 *)0xF030B).BIT\r
-#define ELSELR12 (*(volatile union un_elselr12 *)0xF030C).elselr12\r
-#define ELSELR12_bit (*(volatile union un_elselr12 *)0xF030C).BIT\r
-#define ELSELR13 (*(volatile union un_elselr13 *)0xF030D).elselr13\r
-#define ELSELR13_bit (*(volatile union un_elselr13 *)0xF030D).BIT\r
-#define ELSELR14 (*(volatile union un_elselr14 *)0xF030E).elselr14\r
-#define ELSELR14_bit (*(volatile union un_elselr14 *)0xF030E).BIT\r
-#define ELSELR15 (*(volatile union un_elselr15 *)0xF030F).elselr15\r
-#define ELSELR15_bit (*(volatile union un_elselr15 *)0xF030F).BIT\r
-#define ELSELR16 (*(volatile union un_elselr16 *)0xF0310).elselr16\r
-#define ELSELR16_bit (*(volatile union un_elselr16 *)0xF0310).BIT\r
-#define ELSELR17 (*(volatile union un_elselr17 *)0xF0311).elselr17\r
-#define ELSELR17_bit (*(volatile union un_elselr17 *)0xF0311).BIT\r
-#define ELSELR18 (*(volatile union un_elselr18 *)0xF0312).elselr18\r
-#define ELSELR18_bit (*(volatile union un_elselr18 *)0xF0312).BIT\r
-#define ELSELR19 (*(volatile union un_elselr19 *)0xF0313).elselr19\r
-#define ELSELR19_bit (*(volatile union un_elselr19 *)0xF0313).BIT\r
-#define ELSELR20 (*(volatile union un_elselr20 *)0xF0314).elselr20\r
-#define ELSELR20_bit (*(volatile union un_elselr20 *)0xF0314).BIT\r
-#define ELSELR21 (*(volatile union un_elselr21 *)0xF0315).elselr21\r
-#define ELSELR21_bit (*(volatile union un_elselr21 *)0xF0315).BIT\r
-#define ELSELR22 (*(volatile union un_elselr22 *)0xF0316).elselr22\r
-#define ELSELR22_bit (*(volatile union un_elselr22 *)0xF0316).BIT\r
-#define ELSELR23 (*(volatile union un_elselr23 *)0xF0317).elselr23\r
-#define ELSELR23_bit (*(volatile union un_elselr23 *)0xF0317).BIT\r
-#define ELSELR24 (*(volatile union un_elselr24 *)0xF0318).elselr24\r
-#define ELSELR24_bit (*(volatile union un_elselr24 *)0xF0318).BIT\r
-#define ELSELR25 (*(volatile union un_elselr25 *)0xF0319).elselr25\r
-#define ELSELR25_bit (*(volatile union un_elselr25 *)0xF0319).BIT\r
-#define COMPMDR (*(volatile union un_compmdr *)0xF0340).compmdr\r
-#define COMPMDR_bit (*(volatile union un_compmdr *)0xF0340).BIT\r
-#define COMPFIR (*(volatile union un_compfir *)0xF0341).compfir\r
-#define COMPFIR_bit (*(volatile union un_compfir *)0xF0341).BIT\r
-#define COMPOCR (*(volatile union un_compocr *)0xF0342).compocr\r
-#define COMPOCR_bit (*(volatile union un_compocr *)0xF0342).BIT\r
-#define COMPTCR (*(volatile union un_comptcr *)0xF0343).comptcr\r
-#define COMPTCR_bit (*(volatile union un_comptcr *)0xF0343).BIT\r
-#define TRJ0 (*(volatile unsigned short *)0xF0500)\r
-#define MONMOD1 (*(volatile unsigned char *)0xF0720)\r
-#define TRCMA (*(volatile unsigned char *)0xF0721)\r
-\r
-/*\r
- Sfr bits\r
- */\r
-#define ADTYP ADM2_bit.no0\r
-#define AWC ADM2_bit.no2\r
-#define ADRCK ADM2_bit.no3\r
-#define SSIE00 ISC_bit.no7\r
-#define TRJ0EN PER1_bit.no0\r
-#define DTCEN PER1_bit.no3\r
-#define TRD0EN PER1_bit.no4\r
-#define CMPEN PER1_bit.no5\r
-#define TRGEN PER1_bit.no6\r
-#define DACEN PER1_bit.no7\r
-#define DFLEN DFLCTL_bit.no0\r
-#define BRSAM BECTL_bit.no0\r
-#define ESQST FSSE_bit.no7\r
-#define TAU0EN PER0_bit.no0\r
-#define TAU1EN PER0_bit.no1\r
-#define SAU0EN PER0_bit.no2\r
-#define SAU1EN PER0_bit.no3\r
-#define IICA0EN PER0_bit.no4\r
-#define ADCEN PER0_bit.no5\r
-#define IICA1EN PER0_bit.no6\r
-#define RTCEN PER0_bit.no7\r
-#define PAENB RMC_bit.no0\r
-#define WDVOL RMC_bit.no7\r
-#define RPEF RPECTL_bit.no0\r
-#define RPERDIS RPECTL_bit.no7\r
-#define SPT0 IICCTL00_bit.no0\r
-#define STT0 IICCTL00_bit.no1\r
-#define ACKE0 IICCTL00_bit.no2\r
-#define WTIM0 IICCTL00_bit.no3\r
-#define SPIE0 IICCTL00_bit.no4\r
-#define WREL0 IICCTL00_bit.no5\r
-#define LREL0 IICCTL00_bit.no6\r
-#define IICE0 IICCTL00_bit.no7\r
-#define PRS0 IICCTL01_bit.no0\r
-#define DFC0 IICCTL01_bit.no2\r
-#define SMC0 IICCTL01_bit.no3\r
-#define DAD0 IICCTL01_bit.no4\r
-#define CLD0 IICCTL01_bit.no5\r
-#define WUP0 IICCTL01_bit.no7\r
-#define SPT1 IICCTL10_bit.no0\r
-#define STT1 IICCTL10_bit.no1\r
-#define ACKE1 IICCTL10_bit.no2\r
-#define WTIM1 IICCTL10_bit.no3\r
-#define SPIE1 IICCTL10_bit.no4\r
-#define WREL1 IICCTL10_bit.no5\r
-#define LREL1 IICCTL10_bit.no6\r
-#define IICE1 IICCTL10_bit.no7\r
-#define PRS1 IICCTL11_bit.no0\r
-#define DFC1 IICCTL11_bit.no2\r
-#define SMC1 IICCTL11_bit.no3\r
-#define DAD1 IICCTL11_bit.no4\r
-#define CLD1 IICCTL11_bit.no5\r
-#define WUP1 IICCTL11_bit.no7\r
-#define TRGPWM TRGMR_bit.no0\r
-#define TRGMDF TRGMR_bit.no1\r
-#define TRGDFA TRGMR_bit.no2\r
-#define TRGDFB TRGMR_bit.no3\r
-#define TRGDFCK0 TRGMR_bit.no4\r
-#define TRGDFCK1 TRGMR_bit.no5\r
-#define TRGELCICE TRGMR_bit.no6\r
-#define TRGSTART TRGMR_bit.no7\r
-#define TRGTCK0 TRGCR_bit.no0\r
-#define TRGTCK1 TRGCR_bit.no1\r
-#define TRGTCK2 TRGCR_bit.no2\r
-#define TRGCKEG0 TRGCR_bit.no3\r
-#define TRGCKEG1 TRGCR_bit.no4\r
-#define TRGCCLR0 TRGCR_bit.no5\r
-#define TRGCCLR1 TRGCR_bit.no6\r
-#define TRGIMIEA TRGIER_bit.no0\r
-#define TRGIMIEB TRGIER_bit.no1\r
-#define TRGUDIE TRGIER_bit.no2\r
-#define TRGOVIE TRGIER_bit.no3\r
-#define TRGIMFA TRGSR_bit.no0\r
-#define TRGIMFB TRGSR_bit.no1\r
-#define TRGUDF TRGSR_bit.no2\r
-#define TRGOVF TRGSR_bit.no3\r
-#define TRGDIRF TRGSR_bit.no4\r
-#define TRGIOA0 TRGIOR_bit.no0\r
-#define TRGIOA1 TRGIOR_bit.no1\r
-#define TRGIOA2 TRGIOR_bit.no2\r
-#define TRGBUFA TRGIOR_bit.no3\r
-#define TRGIOB0 TRGIOR_bit.no4\r
-#define TRGIOB1 TRGIOR_bit.no5\r
-#define TRGIOB2 TRGIOR_bit.no6\r
-#define TRGBUFB TRGIOR_bit.no7\r
-#define TRDSYNC TRDMR_bit.no0\r
-#define TRDBFC0 TRDMR_bit.no4\r
-#define TRDBFD0 TRDMR_bit.no5\r
-#define TRDBFC1 TRDMR_bit.no6\r
-#define TRDBFD1 TRDMR_bit.no7\r
-#define TRDPWMB0 TRDPMR_bit.no0\r
-#define TRDPWMC0 TRDPMR_bit.no1\r
-#define TRDPWMD0 TRDPMR_bit.no2\r
-#define TRDPWMB1 TRDPMR_bit.no4\r
-#define TRDPWMC1 TRDPMR_bit.no5\r
-#define TRDPWMD1 TRDPMR_bit.no6\r
-#define TRDSHUTS TRDOER2_bit.no0\r
-#define TRDPTO TRDOER2_bit.no7\r
-#define CRC0EN CRC0CTL_bit.no7\r
-#define C0ENB COMPMDR_bit.no0\r
-#define C0MON COMPMDR_bit.no3\r
-#define C1ENB COMPMDR_bit.no4\r
-#define C1MON COMPMDR_bit.no7\r
-#define C0IE COMPOCR_bit.no0\r
-#define C0OE COMPOCR_bit.no1\r
-#define C0OP COMPOCR_bit.no2\r
-#define C1IE COMPOCR_bit.no4\r
-#define C1OE COMPOCR_bit.no5\r
-#define C1OP COMPOCR_bit.no6\r
-#define SPDMD COMPOCR_bit.no7\r
-#define TSTMD COMPTCR_bit.no0\r
-#define TMDWE COMPTCR_bit.no7\r
-\r
-/*\r
- Interrupt vector addresses\r
- */\r
-#endif\r
\r
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
or 0 to run the more comprehensive test and demo application. */\r
-#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1\r
\r
/*-----------------------------------------------------------*/\r
\r
#include "semphr.h"\r
\r
/* Eval board specific definitions. */\r
-#include "port_iodefine.h"\r
-#include "port_iodefine_ext.h"\r
-#include "LED.h"\r
+#include "demo_specific_io.h"\r
\r
/* Priorities at which the tasks are created. */\r
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
#include "blocktim.h"\r
\r
/* Hardware includes. */\r
-#include "port_iodefine.h"\r
-#include "port_iodefine_ext.h"\r
-#include "LED.h"\r
+#include "demo_specific_io.h"\r
\r
/* The period at which the check timer will expire, in ms, provided no errors\r
have been reported by any of the standard demo tasks. ms are converted to the\r
/* */
/***********************************************************************/\r
\r
-\r
-\r
/*reset_program.asm*/\r
\r
.list\r
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
-/* This file is generated by e2studio. */
+/* This file is generated by e2studio. */
/* */
/***********************************************************************/\r
-\r
-#include "interrupt_handlers.h"\r
+
+#include "FreeRTOS.h"
\r
extern void PowerON_Reset( void );
extern void vPortTickISR( void );
extern void vPortYield( void );\r
+void Dummy_Handler( void ) __attribute__((interrupt));
+void Dummy_Handler( void )
+{
+}
+
const unsigned char Option_Bytes[] __attribute__ ((section (".option_bytes"))) = {\r
0x6e, 0xff, 0xe8, 0x85\r
};\r
\r
#define VECT_SECT __attribute__ ((section (".vects")))\r
const void *Vectors[] VECT_SECT = {\r
- //INT_SRO/INT_WDTI (0x4)\r
- INT_WDTI,\r
- //INT_LVI (0x6)\r
- INT_LVI,\r
- //INT_P0 (0x8)\r
- INT_P0,\r
- //INT_P1 (0xA)\r
- INT_P1,\r
- //INT_P2 (0xC)\r
- INT_P2,\r
- //INT_P3 (0xE)\r
- INT_P3,\r
- //INT_P4 (0x10)\r
- INT_P4,\r
- //INT_P5 (0x12)\r
- INT_P5,\r
- //INT_CSI20/INT_IIC20/INT_ST2 (0x14)
- INT_ST2,\r
- //INT_CSI21/INT_IIC21/INT_SR2 (0x16)
- INT_SR2,\r
- //INT_SRE2/INT_TM11H (0x18)
- INT_TM11H,
- // Padding\r
- (void*)0xFFFF,\r
- // Padding\r
- (void*)0xFFFF,\r
- //INT_CSI00/INT_IIC00/INT_ST0 (0x1E)\r
- INT_ST0,\r
- //INT_CSI01/INT_IIC01/INT_SR0 (0x20)\r
- INT_SR0,\r
- //INT_SRE0/INT_TM01H (0x22)\r
- INT_TM01H,\r
- //INT_CSI10/INT_IIC10/INT_ST1 (0x24)\r
- INT_ST1,\r
- //INT_CSI11/INT_IIC11/INT_SR1 (0x26)\r
- INT_SR1,\r
- //INT_SRE1/INT_TM03H (0x28)\r
- INT_TM03H,\r
- //INT_IICA0 (0x2A)\r
- INT_IICA0,\r
- //INT_TM00 (0x2C)
- INT_TM00,
- //INT_TM01 (0x2E)\r
- INT_TM01,\r
- //INT_TM02 (0x30)\r
- INT_TM02,\r
- //INT_TM03 (0x32)\r
- INT_TM03,\r
- //INT_AD (0x34)\r
- INT_AD,\r
- //INT_RTC (0x36)\r
- INT_RTC,\r
- //INT_IT (0x38)\r
- vPortTickISR,\r
- //INT_KR (0x3A)\r
- INT_KR,\r
- //INT_CSI30/INT_IIC30/INT_ST3 (0x3C)\r
- INT_ST3,\r
- //INT_CSI31/INT_IIC31/INT_SR3 (0x3E)\r
- INT_SR3,\r
- //INT_TRJ0 (0x40)\r
- INT_TRJ0,\r
- //INT_TM10 (0x42)\r
- INT_TM10,\r
- //INT_TM11 (0x44)\r
- INT_TM11,\r
- //INT_TM12 (0x46)\r
- INT_TM12,\r
- //INT_TM13 (0x48)\r
- INT_TM13,\r
- //INT_P6 (0x4A)\r
- INT_P6,\r
- //INT_P7 (0x4C)\r
- INT_P7,\r
- //INT_P8 (0x4E)\r
- INT_P8,\r
- //INT_P9 (0x50)\r
- INT_P9,\r
- //INT_CMP0/INT_P10 (0x52)
- INT_P10,\r
- //INT_CMP1/INT_P11 (0x54)
- INT_P11,\r
- //INT_TRD0 (0x56)\r
- INT_TRD0,\r
- //INT_TRD1 (0x58)\r
- INT_TRD1,\r
- //INT_TRG (0x5A)\r
- INT_TRG,\r
- //INT_SRE3/INT_TM13H (0x5C)\r
- INT_TM13H,\r
- // Padding\r
- (void*)0xFFFF,\r
- //INT_IICA1 (0x60)\r
- INT_IICA1,\r
- //INT_FL (0x62)\r
- INT_FL,\r
+ //(0x4)\r
+ Dummy_Handler,\r
+ //(0x6)\r
+ Dummy_Handler,\r
+ //(0x8)\r
+ Dummy_Handler,\r
+ //(0xA)\r
+ Dummy_Handler,\r
+ //(0xC)\r
+ Dummy_Handler,\r
+ //(0xE)\r
+ Dummy_Handler,\r
+ //(0x10)\r
+ Dummy_Handler,\r
+ //(0x12)\r
+ Dummy_Handler,\r
+ //(0x14)
+ Dummy_Handler,\r
+ //(0x16)
+ Dummy_Handler,\r
+ //(0x18)
+ Dummy_Handler,
+ // Padding\r
+ (void*)0xFFFF,\r
+ // Padding\r
+ (void*)0xFFFF,\r
+ //(0x1E)
+ Dummy_Handler,\r
+ //(0x20)\r
+ Dummy_Handler,\r
+ //(0x22)\r
+ Dummy_Handler,\r
+ //(0x24)\r
+ Dummy_Handler,\r
+ //(0x26)\r
+ Dummy_Handler,\r
+ //(0x28)\r
+ Dummy_Handler,\r
+ //(0x2A)\r
+ Dummy_Handler,\r
+ //(0x2C)
+ Dummy_Handler,
+ //(0x2E)\r
+ Dummy_Handler,\r
+ //(0x30)\r
+ Dummy_Handler,\r
+ //(0x32)\r
+ Dummy_Handler,\r
+ //(0x34)\r
+ Dummy_Handler,\r
+ //(0x36)\r
+ Dummy_Handler,\r
+ //(0x38)
+#if INTIT_vect == 0x38\r
+ vPortTickISR, /* Note this vector table definition is used with lots of RL78 chips, some of which have the INTIT vector here. */
+#else
+ Dummy_Handler,
+#endif\r
+ //(0x3A)\r
+ Dummy_Handler,\r
+ //(0x3C)\r
+#if INTIT_vect == 0x3C
+ vPortTickISR, /* Note this vector table definition is used with lots of RL78 chips, some of which have the INTIT vector here. */
+#else
+ Dummy_Handler,
+#endif
+ //(0x3E)\r
+ Dummy_Handler,\r
+ //(0x40)\r
+ Dummy_Handler,\r
+ //(0x42)\r
+ Dummy_Handler,\r
+ //(0x44)\r
+ Dummy_Handler,\r
+ //(0x46)\r
+ Dummy_Handler,\r
+ //(0x48)\r
+ Dummy_Handler,\r
+ //(0x4A)\r
+ Dummy_Handler,\r
+ //(0x4C)\r
+ Dummy_Handler,\r
+ //(0x4E)\r
+ Dummy_Handler,\r
+ //(0x50)\r
+ Dummy_Handler,\r
+ //(0x52)
+ Dummy_Handler,\r
+ //(0x54)
+ Dummy_Handler,\r
+ //(0x56)\r
+ Dummy_Handler,\r
+ //(0x58)\r
+ Dummy_Handler,\r
+ //(0x5A)\r
+ Dummy_Handler,\r
+ //(0x5C)\r
+ Dummy_Handler,\r
+ // Padding\r
+ (void*)0xFFFF,\r
+ //(0x60)\r
+ Dummy_Handler,\r
+ //(0x62)\r
+ Dummy_Handler,\r
// Padding\r
(void*)0xFFFF,\r
// Padding\r
projects / freertos / commitdiff