Demo project only: Cyclone V SoC now running from external RAM.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2308 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/.cproject b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/.cproject
index 612e1a4a78bb5e4bdf3df75f9f95b2061b2afcff..d94e9777907ebe2b522be808281efc20c5ed6c6f 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/.cproject
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/.cproject
@@ -41,7 +41,7 @@
                                                        </tool>\r
                                                        <tool id="cdt.managedbuild.tool.gnu.cross.c.linker.451869963" name="Cross GCC Linker" superClass="cdt.managedbuild.tool.gnu.cross.c.linker">\r
                                                                <option id="gnu.c.link.option.other.1746198439" name="Other options (-Xlinker [option])" superClass="gnu.c.link.option.other" valueType="stringList">\r
-                                                                       <listOptionValue builtIn="false" value="-TcycloneV-dk-oc-ram.ld"/>\r
+                                                                       <listOptionValue builtIn="false" value="-TcycloneV-dk-ram.ld"/>\r
                                                                        <listOptionValue builtIn="false" value="--defsym=__cs3_isr_irq=FreeRTOS_IRQ_Handler"/>\r
                                                                        <listOptionValue builtIn="false" value="--defsym=__cs3_isr_swi=FreeRTOS_SWI_Handler"/>\r
                                                                        <listOptionValue builtIn="false" value="-Map=RTOSDemo.map"/>\r

diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c
index f2345e7e14bfca448f8943b94fbf72eeee0a1b6c..e7000fcab11ed33c4b138d1cf5d2c5b025519efc 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c
@@ -29,9 +29,21 @@ int main( void )
 \r
 static void prvSetupHardware( void )\r
 {\r
+extern uint8_t __cs3_interrupt_vector;\r
+uint32_t ulSCTLR, ulVectorTable = ( uint32_t ) &__cs3_interrupt_vector;\r
+const uint32_t ulVBit = 13U;\r
+\r
        alt_int_global_init();\r
+\r
+       /* Clear SCTLR.V for low vectors and map the vector table to the beginning\r
+       of the code. */\r
+       __asm( "MRC p15, 0, %0, c1, c0, 0" : "=r" ( ulSCTLR ) );\r
+       ulSCTLR &= ~( 1 << ulVBit );\r
+       __asm( "MCR p15, 0, %0, c1, c0, 0" : : "r" ( ulSCTLR ) );\r
+       __asm( "MCR p15, 0, %0, c12, c0, 0" : : "r" ( ulVectorTable ) );\r
+\r
        cache_init();\r
-       //_RB_mmu_init();\r
+       mmu_init();\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r