--- /dev/null
+/*\r
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2009 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section\r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ licensing and training services.\r
+*/\r
+\r
+/* Standard includes. */\r
+#include <stdlib.h>\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+#define portINITIAL_CRITICAL_NESTING (( unsigned portSHORT ) 10)\r
+\r
+/* default Initialization of the PSW for the task:\r
+ * 1100011000000000\r
+ * ||||||||-------------- Fill byte\r
+ * |||||||--------------- Cary Flag cleared\r
+ * |||||----------------- In-service priority Flags set to low level\r
+ * ||||------------------ Register bank Select 0 Flag cleared\r
+ * |||------------------- Auxiliary Cary Flag cleared\r
+ * ||-------------------- Register bank Select 1 Flag cleared\r
+ * |--------------------- Zero Flag set\r
+ * ---------------------- Global Interrupt Flag set\r
+ */\r
+#define portPSW (( portSTACK_TYPE ) 0xC600)\r
+\r
+/* We require the address of the pxCurrentTCB variable, but don't want to know\r
+any details of its type. */\r
+typedef void tskTCB;\r
+extern volatile tskTCB * volatile pxCurrentTCB;\r
+\r
+/* Most ports implement critical sections by placing the interrupt flags on\r
+ * the stack before disabling interrupts. Exiting the critical section is then\r
+ * simply a case of popping the flags from the stack. As 78K0 IAR does not use\r
+ * a frame pointer this cannot be done as modifying the stack will clobber all\r
+ * the stack variables. Instead each task maintains a count of the critical\r
+ * section nesting depth. Each time a critical section is entered the count is\r
+ * incremented. Each time a critical section is left the count is decremented -\r
+ * with interrupts only being re-enabled if the count is zero.\r
+ *\r
+ * usCriticalNesting will get set to zero when the scheduler starts, but must\r
+ * not be initialised to zero as this will cause problems during the startup\r
+ * sequence. \r
+ */\r
+volatile unsigned portSHORT usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+/*-----------------------------------------------------------*/\r
+\r
+__interrupt void MD_INTTM05( void );\r
+\r
+/*\r
+ * Sets up the periodic ISR used for the RTOS tick. This uses timer 0, but\r
+ * could have alternatively used the watchdog timer or timer 1.\r
+ */\r
+static void prvSetupTimerInterrupt( void );\r
+/*-----------------------------------------------------------*/\r
+\r
+/* \r
+ * Initialise the stack of a task to look exactly as if a call to \r
+ * portSAVE_CONTEXT had been called.\r
+ * \r
+ * See the header file portable.h.\r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{ \r
+unsigned portLONG *pxLocal;\r
+\r
+/* \r
+ * The 78K0R/Kx3 automatically pushes the PSW then PC onto the stack before \r
+ * executing an ISR. We want the stack to look just as if this has happened\r
+ * so place a pointer to the start of the task on the stack first - followed\r
+ * by the flags we want the task to use when it starts up. \r
+ */\r
+#if configMEMORY_MODE == 1\r
+ pxTopOfStack--;\r
+ pxLocal = (unsigned portLONG*) pxTopOfStack;\r
+ *pxLocal = (unsigned portLONG) pvParameters;\r
+ pxTopOfStack--; \r
+\r
+ /* dummy are on the stack cause there normaly the return adress of the funtion \r
+ * is written. Can be a dummy cause the function will never end but only be\r
+ * yielded an reentered \r
+ */ \r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ pxTopOfStack--; \r
+ pxTopOfStack--;\r
+\r
+ /* task function start address */\r
+ pxLocal = (unsigned portLONG*) pxTopOfStack;\r
+ *pxLocal = (unsigned portLONG) pxCode;\r
+ pxTopOfStack--;\r
+\r
+ /* write initial value of the PSW */\r
+ *pxTopOfStack = portPSW;\r
+ pxTopOfStack--;\r
+\r
+ /* Next general purpose register AX */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x1111; \r
+ pxTopOfStack--;\r
+\r
+#else \r
+\r
+ pxTopOfStack--;\r
+\r
+ /* task function start address */\r
+ pxLocal = (unsigned portLONG*) pxTopOfStack;\r
+ *pxLocal = (unsigned portLONG) pxCode;\r
+ pxTopOfStack--;\r
+\r
+ /* write initial value of the PSW */\r
+ *pxTopOfStack = portPSW;\r
+ pxTopOfStack--;\r
+\r
+ /* Next general purpose registers AX with the task function parameter start address */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ pxTopOfStack--;\r
+\r
+#endif \r
+\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ pxTopOfStack--;\r
+\r
+ /* save the CS and ES register */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;\r
+ pxTopOfStack--;\r
+\r
+ /* Next the remaining general purpose registers DE and BC */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+\r
+ /* \r
+ * Return a pointer to the top of the stack we have generated so this can\r
+ * be stored in the task control block for the task.\r
+ */\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+ /* Setup the hardware to generate the tick. Interrupts are disabled when\r
+ this function is called. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Restore the context of the first task that is going to run. */\r
+ vPortStart();\r
+\r
+ /* Should not get here as the tasks are now running! */\r
+ return pdTRUE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* It is unlikely that the 78K0R/Kx3 port will get stopped. If required simply\r
+ disable the tick interrupt here. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Hardware initialisation to generate the RTOS tick. This uses Channel 5 of \r
+ * the Timer Array Unit (TAU). Any other Channel could also be used. \r
+ */\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+ /* First the Timer Array Unit has to be enabled */\r
+ TAU0EN = 1;\r
+\r
+ /* To configure the Timer Array Unit all Channels have to been stopped */\r
+ TT0 = 0xff;\r
+\r
+ /* Interrupt of Timer Array Unit Channel 5 disabled to set Interrupt Priority */\r
+ TMMK05 = 1;\r
+\r
+ /* Clear Timer Array Unit Channel 5 Interrupt Flag */ \r
+ TMIF05 = 0;\r
+\r
+ /* Set Timer Array Unit Channel 5 Interrupt Priority */\r
+ TMPR005 = 0;\r
+ TMPR105 = 0;\r
+\r
+ /* Set Timer Array Unit Channel 5 Mode as Interval Timer */\r
+ TMR05 = 0x0000;\r
+\r
+ /* Set the compare match value according to the tick rate we want. */\r
+ TDR05 = (portTickType) (configCPU_CLOCK_HZ / configTICK_RATE_HZ);\r
+\r
+ /* Set Timer Array Unit Channel 5 Output Mode */\r
+ TOM0 &= ~0x0020;\r
+\r
+ /* Set Timer Array Unit Channel 5 Output Level */ \r
+ TOL0 &= ~0x0020;\r
+\r
+ /* Set Timer Array Unit Channel 5 Output Enable */ \r
+ TOE0 &= ~0x0020;\r
+\r
+ /* Interrupt of Timer Array Unit Channel 5 enabled */\r
+ TMMK05 = 0;\r
+\r
+ /* Set Timer Array Unit Channel 5 Start*/\r
+ TS0 |= 0x0020;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2009 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section \r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+ \r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned int \r
+#define portBASE_TYPE int\r
+\r
+#if (configUSE_16_BIT_TICKS==1)\r
+ typedef unsigned int portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned long portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Interrupt control macros. */\r
+#define portDISABLE_INTERRUPTS() __asm ( "DI" )\r
+#define portENABLE_INTERRUPTS() __asm ( "EI" )\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Critical section control macros. */\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+\r
+#define portENTER_CRITICAL() \\r
+{ \\r
+extern volatile unsigned portSHORT usCriticalNesting; \\r
+ \\r
+ portDISABLE_INTERRUPTS(); \\r
+ \\r
+ /* Now interrupts are disabled ulCriticalNesting can be accessed */ \\r
+ /* directly. Increment ulCriticalNesting to keep a count of how many */ \\r
+ /* times portENTER_CRITICAL() has been called. */ \\r
+ usCriticalNesting++; \\r
+}\r
+\r
+#define portEXIT_CRITICAL() \\r
+{ \\r
+extern volatile unsigned portSHORT usCriticalNesting; \\r
+ \\r
+ if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
+ { \\r
+ /* Decrement the nesting count as we are leaving a critical section. */ \\r
+ usCriticalNesting--; \\r
+ \\r
+ /* If the nesting level has reached zero then interrupts should be */ \\r
+ /* re-enabled. */ \\r
+ if( usCriticalNesting == portNO_CRITICAL_SECTION_NESTING ) \\r
+ { \\r
+ portENABLE_INTERRUPTS(); \\r
+ } \\r
+ } \\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+extern void vPortYield( void );\r
+extern void vPortStart( void );\r
+extern void portSAVE_CONTEXT( void );\r
+extern void portRESTORE_CONTEXT( void );\r
+#define portYIELD() vPortYield()\r
+#define portNOP() __asm ( "NOP" )\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardwware specifics. */\r
+#define portBYTE_ALIGNMENT 2\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+\r
+static __interrupt void P0_isr (void);\r
+\r
+/* --------------------------------------------------------------------------*/ \r
+/* Option-bytes and security ID */\r
+/* --------------------------------------------------------------------------*/ \r
+#define OPT_BYTES_SIZE 4\r
+#define SECU_ID_SIZE 10\r
+#define WATCHDOG_DISABLED 0x00\r
+#define LVI_ENABLED 0xFE\r
+#define LVI_DISABLED 0xFF\r
+#define RESERVED_FF 0xFF\r
+#define OCD_DISABLED 0x04\r
+#define OCD_ENABLED 0x81\r
+#define OCD_ENABLED_ERASE 0x80\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
--- /dev/null
+; FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
+;\r
+; This file is part of the FreeRTOS.org distribution.\r
+;\r
+; FreeRTOS.org is free software; you can redistribute it and/or modify\r
+; it under the terms of the GNU General Public License as published by\r
+; the Free Software Foundation; either version 2 of the License, or\r
+; (at your option) any later version.\r
+;\r
+; FreeRTOS.org is distributed in the hope that it will be useful,\r
+; but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+; GNU General Public License for more details.\r
+;\r
+; You should have received a copy of the GNU General Public License\r
+; along with FreeRTOS.org; if not, write to the Free Software\r
+; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+;\r
+; A special exception to the GPL can be applied should you wish to distribute\r
+; a combined work that includes FreeRTOS.org, without being obliged to provide\r
+; the source code for any proprietary components. See the licensing section\r
+; of http://www.FreeRTOS.org for full details of how and when the exception\r
+; can be applied.\r
+;\r
+; ***************************************************************************\r
+; See http://www.FreeRTOS.org for documentation, latest information, license\r
+; and contact details. Please ensure to read the configuration and relevant\r
+; port sections of the online documentation.\r
+; ***************************************************************************\r
+;\r
+;------------------------------------------------------------------------------\r
+; Note: Select the correct include files for the device used by the application. \r
+#include "FreeRTOSConfig.h"\r
+;------------------------------------------------------------------------------\r
+\r
+#if __CORE__ != __78K0R__\r
+ #error "This file is only for 78K0R Devices"\r
+#endif\r
+\r
+#define CS 0xFFFFC\r
+#define ES 0xFFFFD\r
+\r
+; Functions implemented in this file\r
+;------------------------------------------------------------------------------\r
+\r
+ PUBLIC vPortYield\r
+ PUBLIC vPortStart\r
+\r
+; Functions used by scheduler\r
+;------------------------------------------------------------------------------ \r
+ EXTERN vTaskSwitchContext\r
+ EXTERN vTaskIncrementTick\r
+\r
+; Variables used by scheduler\r
+;------------------------------------------------------------------------------ \r
+ EXTERN pxCurrentTCB\r
+ EXTERN usCriticalNesting\r
+ \r
+ \r
+; Tick ISR Prototype\r
+;------------------------------------------------------------------------------\r
+ EXTERN ?CL78K0R_V2_L00 \r
+\r
+ PUBWEAK `??MD_INTTM05??INTVEC 68`\r
+ PUBLIC MD_INTTM05\r
+\r
+MD_INTTM05 SYMBOL "MD_INTTM05"\r
+`??MD_INTTM05??INTVEC 68` SYMBOL "??INTVEC 68", MD_INTTM05\r
+\r
+\r
+;------------------------------------------------------------------------------\r
+; portSAVE_CONTEXT MACRO\r
+; Saves the context of the remaining general purpose registers, CS and ES\r
+; (only in far memory mode) registers\r
+; the usCriticalNesting Value and the Stack Pointer \r
+; of the active Task onto the task stack\r
+;------------------------------------------------------------------------------\r
+portSAVE_CONTEXT MACRO \r
+\r
+ PUSH HL\r
+#if configMEMORY_MODE == 1 \r
+ MOV A, CS ; save CS register\r
+ XCH A, X\r
+ MOV A, ES ; save ES register\r
+ PUSH AX\r
+#else \r
+ MOV A, CS ; save CS register\r
+ PUSH AX\r
+#endif \r
+ PUSH DE ; save the remaining general purpose registers\r
+ PUSH BC\r
+ MOVW AX, usCriticalNesting ; save the usCriticalNesting value \r
+ PUSH AX \r
+ MOVW AX, pxCurrentTCB ; save the Stack pointer \r
+ MOVW HL, AX \r
+ MOVW AX, SP \r
+ MOVW [HL], AX \r
+ ENDM\r
+;------------------------------------------------------------------------------\r
+\r
+;------------------------------------------------------------------------------\r
+; portRESTORE_CONTEXT MACRO\r
+; Restores the context of the Stack Pointer, usCriticalNesting\r
+; value, general purpose registers and the CS and ES (only in far memory mode)\r
+; of the selected task from the task stack \r
+;------------------------------------------------------------------------------\r
+\r
+portRESTORE_CONTEXT MACRO\r
+ MOVW AX, pxCurrentTCB ; restore the Stack pointer\r
+ MOVW HL, AX\r
+ MOVW AX, [HL]\r
+ MOVW SP, AX\r
+ POP AX ; restore usCriticalNesting value\r
+ MOVW usCriticalNesting, AX\r
+ POP BC ; restore the necessary general purpose registers\r
+ POP DE\r
+#if configMEMORY_MODE == 1 \r
+ POP AX ; restore the ES register\r
+ MOV ES, A \r
+ XCH A, X ; restore the CS register\r
+ MOV CS, A\r
+#else \r
+ POP AX\r
+ MOV CS, A ; restore CS register\r
+#endif \r
+ POP HL ; restore general purpose register HL\r
+ ENDM\r
+;------------------------------------------------------------------------------\r
+\r
+;------------------------------------------------------------------------------\r
+; Port Yield function to check for a Task switch in the cooperative mode\r
+;\r
+; Input: NONE\r
+;\r
+; Call: CALL vPortYield\r
+;\r
+; Output: NONE\r
+;\r
+;------------------------------------------------------------------------------\r
+ RSEG CODE:CODE\r
+vPortYield:\r
+ PUSH PSW ; save Task PSW (Program Status Word)\r
+ DI ; global disable interrupt\r
+ PUSH AX\r
+ portSAVE_CONTEXT ; Save the context of the current task.\r
+ CALL vTaskSwitchContext ; Call the scheduler.\r
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...\r
+ POP AX\r
+ EI ; (re-)enable global interrupts\r
+ POP PSW ; restore active task PSW \r
+ RET ; ... scheduler decided should run.\r
+\r
+ \r
+;------------------------------------------------------------------------------\r
+; Restore the context of the first task that is going to run.\r
+;\r
+; Input: NONE\r
+;\r
+; Call: CALL vPortStart\r
+;\r
+; Output: NONE\r
+;\r
+;------------------------------------------------------------------------------ \r
+ RSEG CODE:CODE\r
+vPortStart:\r
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...\r
+ POP AX\r
+ EI ; enable global interrupts \r
+ POP PSW ; restore active task PSW\r
+ ret ; ... scheduler decided should run.\r
+\r
+;------------------------------------------------------------------------------\r
+; Perform the necessary steps of the Tick Count Increment and Task Switch\r
+; depending on the chosen kernel configuration \r
+;\r
+; Input: NONE\r
+;\r
+; Call: ISR \r
+;\r
+; Output: NONE\r
+;\r
+;------------------------------------------------------------------------------ \r
+#if configUSE_PREEMPTION == 1\r
+\r
+MD_INTTM05:\r
+ PUSH AX ; create temporary dummy area on stack\r
+ PUSH AX ; save AX Register to stack\r
+ MOVW AX, [SP+6] ; get PSW \r
+ MOVW [SP+2], AX ; write PSW into dummy area on the stack\r
+\r
+ portSAVE_CONTEXT ; Save the context of the current task.\r
+ call vTaskIncrementTick ; Call the timer tick function.\r
+ call vTaskSwitchContext ; Call the scheduler.\r
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...\r
+ ; ... scheduler decided should run.\r
+\r
+ MOVW AX, [SP+2] ; get PSW from stack\r
+ MOVW [SP+6], AX ; write PSW to expected location for reti\r
+ POP AX ; restore AX\r
+ MOVW [SP+0], AX ; rewrite dummy stack area to expected value\r
+ POP AX \r
+ RETI \r
+#else\r
+\r
+MD_INTTM05:\r
+ PUSH AX ; save necessary general purpose register... \r
+ PUSH HL ; ...used by the ISR\r
+ MOVW AX, CS ; save CS register\r
+ PUSH AX\r
+ CALL vTaskIncrementTick ; Call the timer tick function.\r
+ POP AX\r
+ MOVW CS, AX ; restore CS register\r
+ POP HL ; restore used general purpose registers\r
+ POP AX\r
+ RETI \r
+#endif\r
+\r
+ REQUIRE ?CL78K0R_V2_L00\r
+ COMMON INTVEC:CODE:ROOT(1) ; set ISR location to the Interrupt vector table\r
+ ORG 68\r
+`??MD_INTTM05??INTVEC 68`:\r
+ DW MD_INTTM05\r
+ ; set value for the usCriticalNesting\r
+ RSEG NEAR_ID:CONST:SORT:NOROOT(1)\r
+`?<Initializer for usCriticalNesting>`:\r
+ DW 10\r
+ \r
+;#endif\r
+\r
+ END
\ No newline at end of file
projects / freertos / commitdiff