2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8607E Super I/O chip w/LPC interface
15 * IT8613E Super I/O chip w/LPC interface
16 * IT8620E Super I/O chip w/LPC interface
17 * IT8622E Super I/O chip w/LPC interface
18 * IT8623E Super I/O chip w/LPC interface
19 * IT8625E Super I/O chip w/LPC interface
20 * IT8628E Super I/O chip w/LPC interface
21 * IT8655E Super I/O chip w/LPC interface
22 * IT8665E Super I/O chip w/LPC interface
23 * IT8686E Super I/O chip w/LPC interface
24 * IT8705F Super I/O chip w/LPC interface
25 * IT8712F Super I/O chip w/LPC interface
26 * IT8716F Super I/O chip w/LPC interface
27 * IT8718F Super I/O chip w/LPC interface
28 * IT8720F Super I/O chip w/LPC interface
29 * IT8721F Super I/O chip w/LPC interface
30 * IT8726F Super I/O chip w/LPC interface
31 * IT8728F Super I/O chip w/LPC interface
32 * IT8732F Super I/O chip w/LPC interface
33 * IT8758E Super I/O chip w/LPC interface
34 * IT8771E Super I/O chip w/LPC interface
35 * IT8772E Super I/O chip w/LPC interface
36 * IT8781F Super I/O chip w/LPC interface
37 * IT8782F Super I/O chip w/LPC interface
38 * IT8783E/F Super I/O chip w/LPC interface
39 * IT8786E Super I/O chip w/LPC interface
40 * IT8790E Super I/O chip w/LPC interface
41 * IT8792E Super I/O chip w/LPC interface
42 * Sis950 A clone of the IT8705F
44 * Copyright (C) 2001 Chris Gauthron
45 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
47 * This program is free software; you can redistribute it and/or modify
48 * it under the terms of the GNU General Public License as published by
49 * the Free Software Foundation; either version 2 of the License, or
50 * (at your option) any later version.
52 * This program is distributed in the hope that it will be useful,
53 * but WITHOUT ANY WARRANTY; without even the implied warranty of
54 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
55 * GNU General Public License for more details.
58 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
60 #include <linux/bitops.h>
61 #include <linux/module.h>
62 #include <linux/init.h>
63 #include <linux/slab.h>
64 #include <linux/jiffies.h>
65 #include <linux/platform_device.h>
66 #include <linux/hwmon.h>
67 #include <linux/hwmon-sysfs.h>
68 #include <linux/hwmon-vid.h>
69 #include <linux/err.h>
70 #include <linux/mutex.h>
71 #include <linux/sysfs.h>
72 #include <linux/string.h>
73 #include <linux/dmi.h>
74 #include <linux/acpi.h>
78 #define DRVNAME "it87"
80 /* Necessary API not (yet) exported in upstream kernel */
81 /* #define __IT87_USE_ACPI_MUTEX */
83 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
84 it8771, it8772, it8781, it8782, it8783, it8786, it8790,
85 it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
86 it8655, it8665, it8686 };
88 static unsigned short force_id;
89 module_param(force_id, ushort, 0);
90 MODULE_PARM_DESC(force_id, "Override the detected device ID");
92 static unsigned short blacklist = 1;
93 module_param(blacklist, ushort, 0);
94 MODULE_PARM_DESC(blacklist,
95 "Enable/disable blacklist (1=enable, 0=disable, default 1)");
97 static struct platform_device *it87_pdev[2];
98 static bool it87_sio4e_broken;
99 #ifdef __IT87_USE_ACPI_MUTEX
100 static acpi_handle it87_acpi_sio_handle;
101 static char *it87_acpi_sio_mutex;
104 #define REG_2E 0x2e /* The register to read/write */
105 #define REG_4E 0x4e /* Secondary register to read/write */
107 #define DEV 0x07 /* Register: Logical device select */
108 #define PME 0x04 /* The device with the fan registers in it */
110 /* The device with the IT8718F/IT8720F VID value in it */
113 #define DEVID 0x20 /* Register: Device ID */
114 #define DEVREV 0x22 /* Register: Device Revision */
116 static inline void __superio_enter(int ioreg)
121 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
124 static inline int superio_inb(int ioreg, int reg)
129 val = inb(ioreg + 1);
130 if (it87_sio4e_broken && ioreg == 0x4e && val == 0xff) {
131 __superio_enter(ioreg);
133 val = inb(ioreg + 1);
134 pr_warn("Retry access 0x4e:0x%x -> 0x%x\n", reg, val);
140 static inline void superio_outb(int ioreg, int reg, int val)
143 outb(val, ioreg + 1);
146 static int superio_inw(int ioreg, int reg)
148 return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
151 static inline void superio_select(int ioreg, int ldn)
154 outb(ldn, ioreg + 1);
157 static inline int superio_enter(int ioreg)
159 #ifdef __IT87_USE_ACPI_MUTEX
160 if (it87_acpi_sio_mutex) {
163 status = acpi_acquire_mutex(NULL, it87_acpi_sio_mutex, 0x10);
164 if (ACPI_FAILURE(status)) {
165 pr_err("Failed to acquire ACPI mutex\n");
171 * Try to reserve ioreg and ioreg + 1 for exclusive access.
173 if (!request_muxed_region(ioreg, 2, DRVNAME))
176 __superio_enter(ioreg);
180 #ifdef __IT87_USE_ACPI_MUTEX
181 if (it87_acpi_sio_mutex)
182 acpi_release_mutex(it87_acpi_sio_handle, NULL);
187 static inline void superio_exit(int ioreg)
189 if (!it87_sio4e_broken || ioreg != 0x4e) {
191 outb(0x02, ioreg + 1);
193 release_region(ioreg, 2);
194 #ifdef __IT87_USE_ACPI_MUTEX
195 if (it87_acpi_sio_mutex)
196 acpi_release_mutex(it87_acpi_sio_handle, NULL);
200 /* Logical device 4 registers */
201 #define IT8712F_DEVID 0x8712
202 #define IT8705F_DEVID 0x8705
203 #define IT8716F_DEVID 0x8716
204 #define IT8718F_DEVID 0x8718
205 #define IT8720F_DEVID 0x8720
206 #define IT8721F_DEVID 0x8721
207 #define IT8726F_DEVID 0x8726
208 #define IT8728F_DEVID 0x8728
209 #define IT8732F_DEVID 0x8732
210 #define IT8792E_DEVID 0x8733
211 #define IT8771E_DEVID 0x8771
212 #define IT8772E_DEVID 0x8772
213 #define IT8781F_DEVID 0x8781
214 #define IT8782F_DEVID 0x8782
215 #define IT8783E_DEVID 0x8783
216 #define IT8786E_DEVID 0x8786
217 #define IT8790E_DEVID 0x8790
218 #define IT8603E_DEVID 0x8603
219 #define IT8607E_DEVID 0x8607
220 #define IT8613E_DEVID 0x8613
221 #define IT8620E_DEVID 0x8620
222 #define IT8622E_DEVID 0x8622
223 #define IT8623E_DEVID 0x8623
224 #define IT8625E_DEVID 0x8625
225 #define IT8628E_DEVID 0x8628
226 #define IT8655E_DEVID 0x8655
227 #define IT8665E_DEVID 0x8665
228 #define IT8686E_DEVID 0x8686
229 #define IT87_ACT_REG 0x30
230 #define IT87_BASE_REG 0x60
232 /* Logical device 7 registers (IT8712F and later) */
233 #define IT87_SIO_GPIO1_REG 0x25
234 #define IT87_SIO_GPIO2_REG 0x26
235 #define IT87_SIO_GPIO3_REG 0x27
236 #define IT87_SIO_GPIO4_REG 0x28
237 #define IT87_SIO_GPIO5_REG 0x29
238 #define IT87_SIO_GPIO9_REG 0xd3
239 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
240 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
241 #define IT87_SIO_PINX4_REG 0x2d /* Pin selection */
242 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
243 #define IT87_SIO_VID_REG 0xfc /* VID value */
244 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
246 /* Update battery voltage after every reading if true */
247 static bool update_vbat;
249 /* Not all BIOSes properly configure the PWM registers */
250 static bool fix_pwm_polarity;
252 /* Many IT87 constants specified below */
254 /* Length of ISA address segment */
255 #define IT87_EXTENT 8
257 /* Length of ISA address segment for Environmental Controller */
258 #define IT87_EC_EXTENT 2
260 /* Offset of EC registers from ISA base address */
261 #define IT87_EC_OFFSET 5
263 /* Where are the ISA address/data registers relative to the EC base address */
264 #define IT87_ADDR_REG_OFFSET 0
265 #define IT87_DATA_REG_OFFSET 1
267 /*----- The IT87 registers -----*/
269 #define IT87_REG_CONFIG 0x00
271 #define IT87_REG_ALARM1 0x01
272 #define IT87_REG_ALARM2 0x02
273 #define IT87_REG_ALARM3 0x03
275 #define IT87_REG_BANK 0x06
278 * The IT8718F and IT8720F have the VID value in a different register, in
279 * Super-I/O configuration space.
281 #define IT87_REG_VID 0x0a
283 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
284 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
287 #define IT87_REG_FAN_DIV 0x0b
288 #define IT87_REG_FAN_16BIT 0x0c
292 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
293 * - up to 6 temp (1 to 6)
294 * - up to 6 fan (1 to 6)
297 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
298 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
299 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
300 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
302 static const u8 IT87_REG_FAN_8665[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
303 static const u8 IT87_REG_FAN_MIN_8665[] =
304 { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
305 static const u8 IT87_REG_FANX_8665[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
306 static const u8 IT87_REG_FANX_MIN_8665[] =
307 { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
309 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
311 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
313 #define IT87_REG_FAN_MAIN_CTRL 0x13
314 #define IT87_REG_FAN_CTL 0x14
316 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
317 static const u8 IT87_REG_PWM_8665[] = { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
319 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
321 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
322 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
324 #define IT87_REG_TEMP(nr) (0x29 + (nr))
326 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
327 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
329 static const u8 IT87_REG_TEMP_HIGH[] = { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
330 static const u8 IT87_REG_TEMP_LOW[] = { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
332 static const u8 IT87_REG_TEMP_HIGH_8686[] =
333 { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
334 static const u8 IT87_REG_TEMP_LOW_8686[] =
335 { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
337 #define IT87_REG_VIN_ENABLE 0x50
338 #define IT87_REG_TEMP_ENABLE 0x51
339 #define IT87_REG_TEMP_EXTRA 0x55
340 #define IT87_REG_BEEP_ENABLE 0x5c
342 #define IT87_REG_CHIPID 0x58
344 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
346 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
347 #define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
349 #define IT87_REG_TEMP456_ENABLE 0x77
351 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
352 #define IT87_REG_TEMP_SRC2 0x23d
354 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
355 #define NUM_VIN_LIMIT 8
357 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
358 #define NUM_FAN_DIV 3
359 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
360 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
362 struct it87_devices {
364 const char * const suffix;
372 #define FEAT_12MV_ADC BIT(0)
373 #define FEAT_NEWER_AUTOPWM BIT(1)
374 #define FEAT_OLD_AUTOPWM BIT(2)
375 #define FEAT_16BIT_FANS BIT(3)
376 #define FEAT_TEMP_PECI BIT(5)
377 #define FEAT_TEMP_OLD_PECI BIT(6)
378 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
379 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
380 #define FEAT_VID BIT(9) /* Set if chip supports VID */
381 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
382 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
383 #define FEAT_10_9MV_ADC BIT(12)
384 #define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
385 #define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
386 #define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
387 #define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
388 #define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
389 #define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
390 #define FEAT_FOUR_FANS BIT(19) /* Supports four fans */
391 #define FEAT_FOUR_PWM BIT(20) /* Supports four fan controls */
392 #define FEAT_BANK_SEL BIT(21) /* Chip has multi-bank support */
393 #define FEAT_SCALING BIT(22) /* Internal voltage scaling */
394 #define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */
395 #define FEAT_11MV_ADC BIT(24)
396 #define FEAT_NEW_TEMPMAP BIT(25) /* new temp input selection */
398 static const struct it87_devices it87_devices[] = {
402 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
403 /* may need to overwrite */
405 .num_temp_offset = 0,
410 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
411 /* may need to overwrite */
413 .num_temp_offset = 0,
418 .features = FEAT_16BIT_FANS | FEAT_VID
419 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
422 .num_temp_offset = 3,
427 .features = FEAT_16BIT_FANS | FEAT_VID
428 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
429 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
431 .num_temp_offset = 3,
432 .old_peci_mask = 0x4,
437 .features = FEAT_16BIT_FANS | FEAT_VID
438 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
439 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
441 .num_temp_offset = 3,
442 .old_peci_mask = 0x4,
447 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
448 | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
449 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
450 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
452 .num_temp_offset = 3,
454 .old_peci_mask = 0x02, /* Actually reports PCH */
459 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
460 | FEAT_TEMP_PECI | FEAT_FIVE_FANS
461 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
464 .num_temp_offset = 3,
470 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
471 | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
472 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
473 | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
475 .num_temp_offset = 3,
477 .old_peci_mask = 0x02, /* Actually reports PCH */
482 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
483 | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
484 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
485 /* PECI: guesswork */
487 /* 16 bit fans (OHM) */
488 /* three fans, always 16 bit (guesswork) */
490 .num_temp_offset = 3,
496 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
497 | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
498 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
499 /* PECI (coreboot) */
500 /* 12mV ADC (HWSensors4, OHM) */
501 /* 16 bit fans (HWSensors4, OHM) */
502 /* three fans, always 16 bit (datasheet) */
504 .num_temp_offset = 3,
510 .features = FEAT_16BIT_FANS
511 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
514 .num_temp_offset = 3,
515 .old_peci_mask = 0x4,
520 .features = FEAT_16BIT_FANS
521 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
524 .num_temp_offset = 3,
525 .old_peci_mask = 0x4,
530 .features = FEAT_16BIT_FANS
531 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
534 .num_temp_offset = 3,
535 .old_peci_mask = 0x4,
540 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
541 | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
542 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
544 .num_temp_offset = 3,
550 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
551 | FEAT_16BIT_FANS | FEAT_TEMP_PECI
552 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
554 .num_temp_offset = 3,
560 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
561 | FEAT_16BIT_FANS | FEAT_TEMP_PECI
562 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
564 .num_temp_offset = 3,
570 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
571 | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
572 | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
574 .num_temp_offset = 3,
580 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
581 | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
582 | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
585 .num_temp_offset = 3,
591 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
592 | FEAT_TEMP_PECI | FEAT_FIVE_FANS
593 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
594 | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
596 .num_temp_offset = 6,
602 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
603 | FEAT_TEMP_PECI | FEAT_SIX_FANS
604 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
605 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
608 .num_temp_offset = 3,
614 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
615 | FEAT_TEMP_PECI | FEAT_FIVE_FANS
616 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
617 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
619 .num_temp_offset = 3,
625 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
626 | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
627 | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
628 | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
630 .num_temp_offset = 6,
635 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
636 | FEAT_TEMP_PECI | FEAT_SIX_FANS
637 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
638 | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
641 .num_temp_offset = 3,
647 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
648 | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
649 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
651 .num_temp_offset = 6,
656 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
657 | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
658 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
659 | FEAT_SIX_PWM | FEAT_BANK_SEL,
661 .num_temp_offset = 6,
666 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
667 | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
668 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
669 | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
671 .num_temp_offset = 6,
675 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
676 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
677 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
678 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
679 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
680 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
681 ((data)->peci_mask & BIT(nr)))
682 #define has_temp_old_peci(data, nr) \
683 (((data)->features & FEAT_TEMP_OLD_PECI) && \
684 ((data)->old_peci_mask & BIT(nr)))
685 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
686 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
688 #define has_vid(data) ((data)->features & FEAT_VID)
689 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
690 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
691 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
692 #define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM \
694 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
695 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
696 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
697 #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
698 #define has_four_fans(data) ((data)->features & (FEAT_FOUR_FANS | \
701 #define has_four_pwm(data) ((data)->features & (FEAT_FOUR_PWM | \
704 #define has_bank_sel(data) ((data)->features & FEAT_BANK_SEL)
705 #define has_scaling(data) ((data)->features & FEAT_SCALING)
706 #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF)
707 #define has_11mv_adc(data) ((data)->features & FEAT_11MV_ADC)
708 #define has_new_tempmap(data) ((data)->features & FEAT_NEW_TEMPMAP)
710 struct it87_sio_data {
712 /* Values read from Super-I/O config space */
716 u8 internal; /* Internal sensors can be labeled */
717 /* Features skipped based on config or DMI */
726 * For each registered chip, we need to keep some data in memory.
727 * The structure is dynamically allocated.
730 const struct attribute_group *groups[7];
739 const u8 *REG_FAN_MIN;
740 const u8 *REG_FANX_MIN;
744 const u8 *REG_TEMP_OFFSET;
745 const u8 *REG_TEMP_LOW;
746 const u8 *REG_TEMP_HIGH;
750 struct mutex update_lock;
751 char valid; /* !=0 if following fields are valid */
752 unsigned long last_updated; /* In jiffies */
754 u16 in_scaled; /* Internal voltage sensors are scaled */
755 u16 in_internal; /* Bitfield, internal sensors (for labels) */
756 u16 has_in; /* Bitfield, voltage sensors enabled */
757 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
758 u8 has_fan; /* Bitfield, fans enabled */
759 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
760 u8 has_temp; /* Bitfield, temp sensors enabled */
761 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
762 u8 num_temp_limit; /* Number of temperature limit registers */
763 u8 num_temp_offset; /* Number of temperature offset registers */
764 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
765 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
766 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
767 bool has_vid; /* True if VID supported */
768 u8 vid; /* Register encoding, combined */
770 u32 alarms; /* Register encoding, combined */
771 bool has_beep; /* true if beep supported */
772 u8 beeps; /* Register encoding */
773 u8 fan_main_ctrl; /* Register value */
774 u8 fan_ctl; /* Register value */
777 * The following 3 arrays correspond to the same registers up to
778 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
779 * 7, and we want to preserve settings on mode changes, so we have
780 * to track all values separately.
781 * Starting with the IT8721F, the manual PWM duty cycles are stored
782 * in separate registers (8-bit values), so the separate tracking
783 * is no longer needed, but it is still done to keep the driver
786 u8 has_pwm; /* Bitfield, pwm control enabled */
787 u8 pwm_ctrl[NUM_PWM]; /* Register value */
788 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
789 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
791 /* Automatic fan speed control registers */
792 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
793 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
796 static int adc_lsb(const struct it87_data *data, int nr)
800 if (has_12mv_adc(data))
802 else if (has_10_9mv_adc(data))
804 else if (has_11mv_adc(data))
808 if (data->in_scaled & BIT(nr))
813 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
815 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
816 return clamp_val(val, 0, 255);
819 static int in_from_reg(const struct it87_data *data, int nr, int val)
821 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
824 static inline u8 FAN_TO_REG(long rpm, int div)
828 rpm = clamp_val(rpm, 1, 1000000);
829 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
832 static inline u16 FAN16_TO_REG(long rpm)
836 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
839 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
840 1350000 / ((val) * (div)))
841 /* The divider is fixed to 2 in 16-bit mode */
842 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
843 1350000 / ((val) * 2))
845 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
846 ((val) + 500) / 1000), -128, 127))
847 #define TEMP_FROM_REG(val) ((val) * 1000)
849 static u8 pwm_to_reg(const struct it87_data *data, long val)
851 if (has_newer_autopwm(data))
857 static int pwm_from_reg(const struct it87_data *data, u8 reg)
859 if (has_newer_autopwm(data))
862 return (reg & 0x7f) << 1;
865 static int DIV_TO_REG(int val)
869 while (answer < 7 && (val >>= 1))
874 #define DIV_FROM_REG(val) BIT(val)
877 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
878 * depending on the chip type, to calculate the actual PWM frequency.
880 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
881 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
882 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
883 * sometimes just one. It is unknown if this is a datasheet error or real,
884 * so this is ignored for now.
886 static const unsigned int pwm_freq[8] = {
897 static int _it87_read_value(struct it87_data *data, u8 reg)
899 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
900 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
903 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
905 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
906 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
909 static void it87_set_bank(struct it87_data *data, u8 bank)
911 if (has_bank_sel(data) && bank != data->bank) {
912 u8 breg = _it87_read_value(data, IT87_REG_BANK);
917 _it87_write_value(data, IT87_REG_BANK, breg);
922 * Must be called with data->update_lock held, except during initialization.
923 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
924 * would slow down the IT87 access and should not be necessary.
926 static int it87_read_value(struct it87_data *data, u16 reg)
928 it87_set_bank(data, reg >> 8);
929 return _it87_read_value(data, reg & 0xff);
933 * Must be called with data->update_lock held, except during initialization.
934 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
935 * would slow down the IT87 access and should not be necessary.
937 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
939 it87_set_bank(data, reg >> 8);
940 _it87_write_value(data, reg & 0xff, value);
943 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
945 data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
946 if (has_newer_autopwm(data)) {
947 if (has_new_tempmap(data))
948 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x38;
950 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
951 data->pwm_duty[nr] = it87_read_value(data,
952 IT87_REG_PWM_DUTY[nr]);
954 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
955 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
956 else /* Manual mode */
957 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
960 if (has_old_autopwm(data)) {
963 for (i = 0; i < 5 ; i++)
964 data->auto_temp[nr][i] = it87_read_value(data,
965 IT87_REG_AUTO_TEMP(nr, i));
966 for (i = 0; i < 3 ; i++)
967 data->auto_pwm[nr][i] = it87_read_value(data,
968 IT87_REG_AUTO_PWM(nr, i));
969 } else if (has_newer_autopwm(data)) {
973 * 0: temperature hysteresis (base + 5)
974 * 1: fan off temperature (base + 0)
975 * 2: fan start temperature (base + 1)
976 * 3: fan max temperature (base + 2)
978 data->auto_temp[nr][0] =
979 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
981 for (i = 0; i < 3 ; i++)
982 data->auto_temp[nr][i + 1] =
983 it87_read_value(data,
984 IT87_REG_AUTO_TEMP(nr, i));
986 * 0: start pwm value (base + 3)
987 * 1: pwm slope (base + 4, 1/8th pwm)
989 data->auto_pwm[nr][0] =
990 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
991 data->auto_pwm[nr][1] =
992 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
996 static struct it87_data *it87_update_device(struct device *dev)
998 struct it87_data *data = dev_get_drvdata(dev);
1001 mutex_lock(&data->update_lock);
1003 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
1007 * Cleared after each update, so reenable. Value
1008 * returned by this read will be previous value
1010 it87_write_value(data, IT87_REG_CONFIG,
1011 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1013 for (i = 0; i < NUM_VIN; i++) {
1014 if (!(data->has_in & BIT(i)))
1018 it87_read_value(data, IT87_REG_VIN[i]);
1020 /* VBAT and AVCC don't have limit registers */
1021 if (i >= NUM_VIN_LIMIT)
1025 it87_read_value(data, IT87_REG_VIN_MIN(i));
1027 it87_read_value(data, IT87_REG_VIN_MAX(i));
1030 for (i = 0; i < NUM_FAN; i++) {
1031 /* Skip disabled fans */
1032 if (!(data->has_fan & BIT(i)))
1036 it87_read_value(data, data->REG_FAN_MIN[i]);
1037 data->fan[i][0] = it87_read_value(data,
1039 /* Add high byte if in 16-bit mode */
1040 if (has_16bit_fans(data)) {
1041 data->fan[i][0] |= it87_read_value(data,
1042 data->REG_FANX[i]) << 8;
1043 data->fan[i][1] |= it87_read_value(data,
1044 data->REG_FANX_MIN[i]) << 8;
1047 for (i = 0; i < NUM_TEMP; i++) {
1048 if (!(data->has_temp & BIT(i)))
1051 it87_read_value(data, IT87_REG_TEMP(i));
1053 if (i >= data->num_temp_limit)
1056 if (i < data->num_temp_offset)
1058 it87_read_value(data,
1059 data->REG_TEMP_OFFSET[i]);
1062 it87_read_value(data, data->REG_TEMP_LOW[i]);
1064 it87_read_value(data, data->REG_TEMP_HIGH[i]);
1067 /* Newer chips don't have clock dividers */
1068 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1069 i = it87_read_value(data, IT87_REG_FAN_DIV);
1070 data->fan_div[0] = i & 0x07;
1071 data->fan_div[1] = (i >> 3) & 0x07;
1072 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1076 it87_read_value(data, IT87_REG_ALARM1) |
1077 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1078 (it87_read_value(data, IT87_REG_ALARM3) << 16);
1079 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1081 data->fan_main_ctrl = it87_read_value(data,
1082 IT87_REG_FAN_MAIN_CTRL);
1083 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1084 for (i = 0; i < NUM_PWM; i++) {
1085 if (!(data->has_pwm & BIT(i)))
1087 it87_update_pwm_ctrl(data, i);
1090 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1091 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1093 * The IT8705F does not have VID capability.
1094 * The IT8718F and later don't use IT87_REG_VID for the
1097 if (data->type == it8712 || data->type == it8716) {
1098 data->vid = it87_read_value(data, IT87_REG_VID);
1100 * The older IT8712F revisions had only 5 VID pins,
1101 * but we assume it is always safe to read 6 bits.
1105 data->last_updated = jiffies;
1109 mutex_unlock(&data->update_lock);
1114 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1117 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1118 struct it87_data *data = it87_update_device(dev);
1119 int index = sattr->index;
1122 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1125 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1126 const char *buf, size_t count)
1128 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1129 struct it87_data *data = dev_get_drvdata(dev);
1130 int index = sattr->index;
1134 if (kstrtoul(buf, 10, &val) < 0)
1137 mutex_lock(&data->update_lock);
1138 data->in[nr][index] = in_to_reg(data, nr, val);
1139 it87_write_value(data,
1140 index == 1 ? IT87_REG_VIN_MIN(nr)
1141 : IT87_REG_VIN_MAX(nr),
1142 data->in[nr][index]);
1143 mutex_unlock(&data->update_lock);
1147 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1148 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1150 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1153 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1154 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1156 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1159 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1160 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1162 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1165 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1166 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1168 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1171 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1172 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1174 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1177 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1178 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1180 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1183 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1184 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1186 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1189 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1190 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1192 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1195 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1196 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1197 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1198 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1199 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1201 /* Up to 6 temperatures */
1202 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1205 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1207 int index = sattr->index;
1208 struct it87_data *data = it87_update_device(dev);
1210 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1213 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1214 const char *buf, size_t count)
1216 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1218 int index = sattr->index;
1219 struct it87_data *data = dev_get_drvdata(dev);
1223 if (kstrtol(buf, 10, &val) < 0)
1226 mutex_lock(&data->update_lock);
1231 reg = data->REG_TEMP_LOW[nr];
1234 reg = data->REG_TEMP_HIGH[nr];
1237 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1238 if (!(regval & 0x80)) {
1240 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1243 reg = data->REG_TEMP_OFFSET[nr];
1247 data->temp[nr][index] = TEMP_TO_REG(val);
1248 it87_write_value(data, reg, data->temp[nr][index]);
1249 mutex_unlock(&data->update_lock);
1253 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1254 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1256 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1258 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1260 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1261 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1263 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1265 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1267 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1268 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1270 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1272 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1274 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1275 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1277 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1279 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1281 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1282 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1284 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1286 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1288 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1289 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1291 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1293 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1296 static int get_temp_type(struct it87_data *data, int index)
1301 if (has_bank_sel(data)) {
1302 int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
1305 src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
1306 src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
1308 switch (data->type) {
1316 if (index == 1 || index == 2 ||
1317 index == 4 || index == 5)
1321 if (index == 2 || index == 6)
1339 type = (src2 & BIT(index)) ? 6 : 5;
1342 type = (src2 & BIT(index)) ? 4 : 6;
1345 type = (src2 & BIT(index)) ? 5 : 0;
1358 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1359 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1361 if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1362 (has_temp_old_peci(data, index) && (extra & 0x80)))
1363 type = 6; /* Intel PECI */
1364 if (reg & BIT(index))
1365 type = 3; /* thermal diode */
1366 else if (reg & BIT(index + 3))
1367 type = 4; /* thermistor */
1372 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1375 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1376 struct it87_data *data = it87_update_device(dev);
1377 int type = get_temp_type(data, sensor_attr->index);
1379 return sprintf(buf, "%d\n", type);
1382 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1383 const char *buf, size_t count)
1385 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1386 int nr = sensor_attr->index;
1388 struct it87_data *data = dev_get_drvdata(dev);
1392 if (kstrtol(buf, 10, &val) < 0)
1395 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1398 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1400 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1401 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1403 if (val == 2) { /* backwards compatibility */
1405 "Sensor type 2 is deprecated, please use 4 instead\n");
1408 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1413 else if (has_temp_peci(data, nr) && val == 6)
1414 reg |= (nr + 1) << 6;
1415 else if (has_temp_old_peci(data, nr) && val == 6)
1420 mutex_lock(&data->update_lock);
1422 data->extra = extra;
1423 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1424 if (has_temp_old_peci(data, nr))
1425 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1426 data->valid = 0; /* Force cache refresh */
1427 mutex_unlock(&data->update_lock);
1431 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1433 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1435 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1437 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1439 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1441 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1446 static int pwm_mode(const struct it87_data *data, int nr)
1448 if (has_fanctl_onoff(data) && nr < 3 &&
1449 !(data->fan_main_ctrl & BIT(nr)))
1450 return 0; /* Full speed */
1451 if (data->pwm_ctrl[nr] & 0x80)
1452 return 2; /* Automatic mode */
1453 if ((!has_fanctl_onoff(data) || nr >= 3) &&
1454 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1455 return 0; /* Full speed */
1457 return 1; /* Manual mode */
1460 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1463 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1465 int index = sattr->index;
1467 struct it87_data *data = it87_update_device(dev);
1469 speed = has_16bit_fans(data) ?
1470 FAN16_FROM_REG(data->fan[nr][index]) :
1471 FAN_FROM_REG(data->fan[nr][index],
1472 DIV_FROM_REG(data->fan_div[nr]));
1473 return sprintf(buf, "%d\n", speed);
1476 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1479 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1480 struct it87_data *data = it87_update_device(dev);
1481 int nr = sensor_attr->index;
1483 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1486 static ssize_t show_pwm_enable(struct device *dev,
1487 struct device_attribute *attr, char *buf)
1489 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1490 struct it87_data *data = it87_update_device(dev);
1491 int nr = sensor_attr->index;
1493 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1496 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1499 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1500 struct it87_data *data = it87_update_device(dev);
1501 int nr = sensor_attr->index;
1503 return sprintf(buf, "%d\n",
1504 pwm_from_reg(data, data->pwm_duty[nr]));
1507 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1510 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1511 struct it87_data *data = it87_update_device(dev);
1512 int nr = sensor_attr->index;
1516 if (has_pwm_freq2(data) && nr == 1)
1517 index = (data->extra >> 4) & 0x07;
1519 index = (data->fan_ctl >> 4) & 0x07;
1521 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1523 return sprintf(buf, "%u\n", freq);
1526 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1527 const char *buf, size_t count)
1529 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1531 int index = sattr->index;
1533 struct it87_data *data = dev_get_drvdata(dev);
1537 if (kstrtol(buf, 10, &val) < 0)
1540 mutex_lock(&data->update_lock);
1542 if (has_16bit_fans(data)) {
1543 data->fan[nr][index] = FAN16_TO_REG(val);
1544 it87_write_value(data, data->REG_FAN_MIN[nr],
1545 data->fan[nr][index] & 0xff);
1546 it87_write_value(data, data->REG_FANX_MIN[nr],
1547 data->fan[nr][index] >> 8);
1549 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1552 data->fan_div[nr] = reg & 0x07;
1555 data->fan_div[nr] = (reg >> 3) & 0x07;
1558 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1561 data->fan[nr][index] =
1562 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1563 it87_write_value(data, data->REG_FAN_MIN[nr],
1564 data->fan[nr][index]);
1567 mutex_unlock(&data->update_lock);
1571 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1572 const char *buf, size_t count)
1574 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1575 struct it87_data *data = dev_get_drvdata(dev);
1576 int nr = sensor_attr->index;
1581 if (kstrtoul(buf, 10, &val) < 0)
1584 mutex_lock(&data->update_lock);
1585 old = it87_read_value(data, IT87_REG_FAN_DIV);
1587 /* Save fan min limit */
1588 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1593 data->fan_div[nr] = DIV_TO_REG(val);
1597 data->fan_div[nr] = 1;
1599 data->fan_div[nr] = 3;
1602 val |= (data->fan_div[0] & 0x07);
1603 val |= (data->fan_div[1] & 0x07) << 3;
1604 if (data->fan_div[2] == 3)
1606 it87_write_value(data, IT87_REG_FAN_DIV, val);
1608 /* Restore fan min limit */
1609 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1610 it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1612 mutex_unlock(&data->update_lock);
1616 /* Returns 0 if OK, -EINVAL otherwise */
1617 static int check_trip_points(struct device *dev, int nr)
1619 const struct it87_data *data = dev_get_drvdata(dev);
1622 if (has_old_autopwm(data)) {
1623 for (i = 0; i < 3; i++) {
1624 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1627 for (i = 0; i < 2; i++) {
1628 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1631 } else if (has_newer_autopwm(data)) {
1632 for (i = 1; i < 3; i++) {
1633 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1640 "Inconsistent trip points, not switching to automatic mode\n");
1641 dev_err(dev, "Adjust the trip points and try again\n");
1646 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1647 const char *buf, size_t count)
1649 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1650 struct it87_data *data = dev_get_drvdata(dev);
1651 int nr = sensor_attr->index;
1654 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1657 /* Check trip points before switching to automatic mode */
1659 if (check_trip_points(dev, nr) < 0)
1663 mutex_lock(&data->update_lock);
1666 if (nr < 3 && has_fanctl_onoff(data)) {
1668 /* make sure the fan is on when in on/off mode */
1669 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1670 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1671 /* set on/off mode */
1672 data->fan_main_ctrl &= ~BIT(nr);
1673 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1674 data->fan_main_ctrl);
1678 /* No on/off mode, set maximum pwm value */
1679 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1680 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1681 data->pwm_duty[nr]);
1682 /* and set manual mode */
1683 if (has_newer_autopwm(data)) {
1684 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1685 data->pwm_temp_map[nr];
1687 ctrl = data->pwm_duty[nr];
1689 data->pwm_ctrl[nr] = ctrl;
1690 it87_write_value(data, data->REG_PWM[nr], ctrl);
1695 if (has_newer_autopwm(data)) {
1696 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1697 data->pwm_temp_map[nr];
1701 ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1703 data->pwm_ctrl[nr] = ctrl;
1704 it87_write_value(data, data->REG_PWM[nr], ctrl);
1706 if (has_fanctl_onoff(data) && nr < 3) {
1707 /* set SmartGuardian mode */
1708 data->fan_main_ctrl |= BIT(nr);
1709 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1710 data->fan_main_ctrl);
1714 mutex_unlock(&data->update_lock);
1718 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1719 const char *buf, size_t count)
1721 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1722 struct it87_data *data = dev_get_drvdata(dev);
1723 int nr = sensor_attr->index;
1726 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1729 mutex_lock(&data->update_lock);
1730 it87_update_pwm_ctrl(data, nr);
1731 if (has_newer_autopwm(data)) {
1733 * If we are in automatic mode, the PWM duty cycle register
1734 * is read-only so we can't write the value.
1736 if (data->pwm_ctrl[nr] & 0x80) {
1737 mutex_unlock(&data->update_lock);
1740 data->pwm_duty[nr] = pwm_to_reg(data, val);
1741 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1742 data->pwm_duty[nr]);
1744 data->pwm_duty[nr] = pwm_to_reg(data, val);
1746 * If we are in manual mode, write the duty cycle immediately;
1747 * otherwise, just store it for later use.
1749 if (!(data->pwm_ctrl[nr] & 0x80)) {
1750 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1751 it87_write_value(data, data->REG_PWM[nr],
1752 data->pwm_ctrl[nr]);
1755 mutex_unlock(&data->update_lock);
1759 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1760 const char *buf, size_t count)
1762 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1763 struct it87_data *data = dev_get_drvdata(dev);
1764 int nr = sensor_attr->index;
1768 if (kstrtoul(buf, 10, &val) < 0)
1771 val = clamp_val(val, 0, 1000000);
1772 val *= has_newer_autopwm(data) ? 256 : 128;
1774 /* Search for the nearest available frequency */
1775 for (i = 0; i < 7; i++) {
1776 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1780 mutex_lock(&data->update_lock);
1782 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1783 data->fan_ctl |= i << 4;
1784 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1786 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1787 data->extra |= i << 4;
1788 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1790 mutex_unlock(&data->update_lock);
1795 static ssize_t show_pwm_temp_map(struct device *dev,
1796 struct device_attribute *attr, char *buf)
1798 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1799 struct it87_data *data = it87_update_device(dev);
1800 int nr = sensor_attr->index;
1803 map = data->pwm_temp_map[nr];
1804 if (has_new_tempmap(data)) {
1807 map = 0; /* Should never happen */
1810 map = 0; /* Should never happen */
1811 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1815 return sprintf(buf, "%d\n", (int)BIT(map));
1818 static ssize_t set_pwm_temp_map(struct device *dev,
1819 struct device_attribute *attr, const char *buf,
1822 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1823 struct it87_data *data = dev_get_drvdata(dev);
1824 int nr = sensor_attr->index;
1828 if (kstrtol(buf, 10, &val) < 0)
1831 if (nr >= 3 && !has_new_tempmap(data))
1860 if (has_new_tempmap(data))
1862 else if (reg > 0x02)
1865 mutex_lock(&data->update_lock);
1866 it87_update_pwm_ctrl(data, nr);
1867 data->pwm_temp_map[nr] = reg;
1869 * If we are in automatic mode, write the temp mapping immediately;
1870 * otherwise, just store it for later use.
1872 if (data->pwm_ctrl[nr] & 0x80) {
1873 u8 mask = has_new_tempmap(data) ? 0xc7 : 0xfc;
1875 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & mask) |
1876 data->pwm_temp_map[nr];
1877 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1879 mutex_unlock(&data->update_lock);
1883 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1886 struct it87_data *data = it87_update_device(dev);
1887 struct sensor_device_attribute_2 *sensor_attr =
1888 to_sensor_dev_attr_2(attr);
1889 int nr = sensor_attr->nr;
1890 int point = sensor_attr->index;
1892 return sprintf(buf, "%d\n",
1893 pwm_from_reg(data, data->auto_pwm[nr][point]));
1896 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1897 const char *buf, size_t count)
1899 struct it87_data *data = dev_get_drvdata(dev);
1900 struct sensor_device_attribute_2 *sensor_attr =
1901 to_sensor_dev_attr_2(attr);
1902 int nr = sensor_attr->nr;
1903 int point = sensor_attr->index;
1907 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1910 mutex_lock(&data->update_lock);
1911 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1912 if (has_newer_autopwm(data))
1913 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1915 regaddr = IT87_REG_AUTO_PWM(nr, point);
1916 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1917 mutex_unlock(&data->update_lock);
1921 static ssize_t show_auto_pwm_slope(struct device *dev,
1922 struct device_attribute *attr, char *buf)
1924 struct it87_data *data = it87_update_device(dev);
1925 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1926 int nr = sensor_attr->index;
1928 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1931 static ssize_t set_auto_pwm_slope(struct device *dev,
1932 struct device_attribute *attr,
1933 const char *buf, size_t count)
1935 struct it87_data *data = dev_get_drvdata(dev);
1936 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1937 int nr = sensor_attr->index;
1940 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1943 mutex_lock(&data->update_lock);
1944 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1945 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1946 data->auto_pwm[nr][1]);
1947 mutex_unlock(&data->update_lock);
1951 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1954 struct it87_data *data = it87_update_device(dev);
1955 struct sensor_device_attribute_2 *sensor_attr =
1956 to_sensor_dev_attr_2(attr);
1957 int nr = sensor_attr->nr;
1958 int point = sensor_attr->index;
1961 if (has_old_autopwm(data) || point)
1962 reg = data->auto_temp[nr][point];
1964 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1966 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1969 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1970 const char *buf, size_t count)
1972 struct it87_data *data = dev_get_drvdata(dev);
1973 struct sensor_device_attribute_2 *sensor_attr =
1974 to_sensor_dev_attr_2(attr);
1975 int nr = sensor_attr->nr;
1976 int point = sensor_attr->index;
1980 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1983 mutex_lock(&data->update_lock);
1984 if (has_newer_autopwm(data) && !point) {
1985 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1986 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1987 data->auto_temp[nr][0] = reg;
1988 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1990 reg = TEMP_TO_REG(val);
1991 data->auto_temp[nr][point] = reg;
1992 if (has_newer_autopwm(data))
1994 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1996 mutex_unlock(&data->update_lock);
2000 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
2001 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2003 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
2006 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
2007 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2009 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
2012 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
2013 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2015 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
2018 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
2019 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2022 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
2023 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2026 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
2027 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
2030 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
2031 show_pwm_enable, set_pwm_enable, 0);
2032 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
2033 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
2035 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
2036 show_pwm_temp_map, set_pwm_temp_map, 0);
2037 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
2038 show_auto_pwm, set_auto_pwm, 0, 0);
2039 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
2040 show_auto_pwm, set_auto_pwm, 0, 1);
2041 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
2042 show_auto_pwm, set_auto_pwm, 0, 2);
2043 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
2044 show_auto_pwm, NULL, 0, 3);
2045 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
2046 show_auto_temp, set_auto_temp, 0, 1);
2047 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2048 show_auto_temp, set_auto_temp, 0, 0);
2049 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2050 show_auto_temp, set_auto_temp, 0, 2);
2051 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2052 show_auto_temp, set_auto_temp, 0, 3);
2053 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2054 show_auto_temp, set_auto_temp, 0, 4);
2055 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2056 show_auto_pwm, set_auto_pwm, 0, 0);
2057 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2058 show_auto_pwm_slope, set_auto_pwm_slope, 0);
2060 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2061 show_pwm_enable, set_pwm_enable, 1);
2062 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2063 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2064 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2065 show_pwm_temp_map, set_pwm_temp_map, 1);
2066 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2067 show_auto_pwm, set_auto_pwm, 1, 0);
2068 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2069 show_auto_pwm, set_auto_pwm, 1, 1);
2070 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2071 show_auto_pwm, set_auto_pwm, 1, 2);
2072 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2073 show_auto_pwm, NULL, 1, 3);
2074 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2075 show_auto_temp, set_auto_temp, 1, 1);
2076 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2077 show_auto_temp, set_auto_temp, 1, 0);
2078 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2079 show_auto_temp, set_auto_temp, 1, 2);
2080 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2081 show_auto_temp, set_auto_temp, 1, 3);
2082 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2083 show_auto_temp, set_auto_temp, 1, 4);
2084 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2085 show_auto_pwm, set_auto_pwm, 1, 0);
2086 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2087 show_auto_pwm_slope, set_auto_pwm_slope, 1);
2089 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2090 show_pwm_enable, set_pwm_enable, 2);
2091 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2092 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2093 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2094 show_pwm_temp_map, set_pwm_temp_map, 2);
2095 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2096 show_auto_pwm, set_auto_pwm, 2, 0);
2097 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2098 show_auto_pwm, set_auto_pwm, 2, 1);
2099 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2100 show_auto_pwm, set_auto_pwm, 2, 2);
2101 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2102 show_auto_pwm, NULL, 2, 3);
2103 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2104 show_auto_temp, set_auto_temp, 2, 1);
2105 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2106 show_auto_temp, set_auto_temp, 2, 0);
2107 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2108 show_auto_temp, set_auto_temp, 2, 2);
2109 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2110 show_auto_temp, set_auto_temp, 2, 3);
2111 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2112 show_auto_temp, set_auto_temp, 2, 4);
2113 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2114 show_auto_pwm, set_auto_pwm, 2, 0);
2115 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2116 show_auto_pwm_slope, set_auto_pwm_slope, 2);
2118 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2119 show_pwm_enable, set_pwm_enable, 3);
2120 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2121 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2122 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2123 show_pwm_temp_map, set_pwm_temp_map, 3);
2124 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2125 show_auto_temp, set_auto_temp, 2, 1);
2126 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2127 show_auto_temp, set_auto_temp, 2, 0);
2128 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2129 show_auto_temp, set_auto_temp, 2, 2);
2130 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2131 show_auto_temp, set_auto_temp, 2, 3);
2132 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2133 show_auto_pwm, set_auto_pwm, 3, 0);
2134 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2135 show_auto_pwm_slope, set_auto_pwm_slope, 3);
2137 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2138 show_pwm_enable, set_pwm_enable, 4);
2139 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2140 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2141 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2142 show_pwm_temp_map, set_pwm_temp_map, 4);
2143 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2144 show_auto_temp, set_auto_temp, 2, 1);
2145 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2146 show_auto_temp, set_auto_temp, 2, 0);
2147 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2148 show_auto_temp, set_auto_temp, 2, 2);
2149 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2150 show_auto_temp, set_auto_temp, 2, 3);
2151 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2152 show_auto_pwm, set_auto_pwm, 4, 0);
2153 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2154 show_auto_pwm_slope, set_auto_pwm_slope, 4);
2156 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2157 show_pwm_enable, set_pwm_enable, 5);
2158 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2159 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2160 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2161 show_pwm_temp_map, set_pwm_temp_map, 5);
2162 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2163 show_auto_temp, set_auto_temp, 2, 1);
2164 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2165 show_auto_temp, set_auto_temp, 2, 0);
2166 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2167 show_auto_temp, set_auto_temp, 2, 2);
2168 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2169 show_auto_temp, set_auto_temp, 2, 3);
2170 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2171 show_auto_pwm, set_auto_pwm, 5, 0);
2172 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2173 show_auto_pwm_slope, set_auto_pwm_slope, 5);
2176 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2179 struct it87_data *data = it87_update_device(dev);
2181 return sprintf(buf, "%u\n", data->alarms);
2183 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2185 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2188 struct it87_data *data = it87_update_device(dev);
2189 int bitnr = to_sensor_dev_attr(attr)->index;
2191 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2194 static ssize_t clear_intrusion(struct device *dev,
2195 struct device_attribute *attr, const char *buf,
2198 struct it87_data *data = dev_get_drvdata(dev);
2202 if (kstrtol(buf, 10, &val) < 0 || val != 0)
2205 mutex_lock(&data->update_lock);
2206 config = it87_read_value(data, IT87_REG_CONFIG);
2211 it87_write_value(data, IT87_REG_CONFIG, config);
2212 /* Invalidate cache to force re-read */
2215 mutex_unlock(&data->update_lock);
2220 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2221 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2222 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2223 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2224 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2225 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2226 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2227 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2228 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2229 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2230 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2231 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2232 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2233 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2234 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2235 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2236 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2237 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2238 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2239 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2240 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2241 show_alarm, clear_intrusion, 4);
2243 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2246 struct it87_data *data = it87_update_device(dev);
2247 int bitnr = to_sensor_dev_attr(attr)->index;
2249 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2252 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2253 const char *buf, size_t count)
2255 int bitnr = to_sensor_dev_attr(attr)->index;
2256 struct it87_data *data = dev_get_drvdata(dev);
2259 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2262 mutex_lock(&data->update_lock);
2263 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2265 data->beeps |= BIT(bitnr);
2267 data->beeps &= ~BIT(bitnr);
2268 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2269 mutex_unlock(&data->update_lock);
2273 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2274 show_beep, set_beep, 1);
2275 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2276 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2277 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2278 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2279 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2280 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2281 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2282 /* fanX_beep writability is set later */
2283 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2284 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2285 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2286 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2287 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2288 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2289 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2290 show_beep, set_beep, 2);
2291 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2292 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2293 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2294 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2295 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2297 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2300 struct it87_data *data = dev_get_drvdata(dev);
2302 return sprintf(buf, "%u\n", data->vrm);
2305 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2306 const char *buf, size_t count)
2308 struct it87_data *data = dev_get_drvdata(dev);
2311 if (kstrtoul(buf, 10, &val) < 0)
2318 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2320 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2323 struct it87_data *data = it87_update_device(dev);
2325 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2327 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2329 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2332 static const char * const labels[] = {
2338 static const char * const labels_it8721[] = {
2344 struct it87_data *data = dev_get_drvdata(dev);
2345 int nr = to_sensor_dev_attr(attr)->index;
2348 if (has_vin3_5v(data) && nr == 0)
2350 else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2352 label = labels_it8721[nr];
2356 return sprintf(buf, "%s\n", label);
2358 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2359 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2360 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2362 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2364 static umode_t it87_in_is_visible(struct kobject *kobj,
2365 struct attribute *attr, int index)
2367 struct device *dev = container_of(kobj, struct device, kobj);
2368 struct it87_data *data = dev_get_drvdata(dev);
2369 int i = index / 5; /* voltage index */
2370 int a = index % 5; /* attribute index */
2372 if (index >= 40) { /* in8 and higher only have input attributes */
2377 if (!(data->has_in & BIT(i)))
2380 if (a == 4 && !data->has_beep)
2386 static struct attribute *it87_attributes_in[] = {
2387 &sensor_dev_attr_in0_input.dev_attr.attr,
2388 &sensor_dev_attr_in0_min.dev_attr.attr,
2389 &sensor_dev_attr_in0_max.dev_attr.attr,
2390 &sensor_dev_attr_in0_alarm.dev_attr.attr,
2391 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
2393 &sensor_dev_attr_in1_input.dev_attr.attr,
2394 &sensor_dev_attr_in1_min.dev_attr.attr,
2395 &sensor_dev_attr_in1_max.dev_attr.attr,
2396 &sensor_dev_attr_in1_alarm.dev_attr.attr,
2397 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
2399 &sensor_dev_attr_in2_input.dev_attr.attr,
2400 &sensor_dev_attr_in2_min.dev_attr.attr,
2401 &sensor_dev_attr_in2_max.dev_attr.attr,
2402 &sensor_dev_attr_in2_alarm.dev_attr.attr,
2403 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
2405 &sensor_dev_attr_in3_input.dev_attr.attr,
2406 &sensor_dev_attr_in3_min.dev_attr.attr,
2407 &sensor_dev_attr_in3_max.dev_attr.attr,
2408 &sensor_dev_attr_in3_alarm.dev_attr.attr,
2409 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
2411 &sensor_dev_attr_in4_input.dev_attr.attr,
2412 &sensor_dev_attr_in4_min.dev_attr.attr,
2413 &sensor_dev_attr_in4_max.dev_attr.attr,
2414 &sensor_dev_attr_in4_alarm.dev_attr.attr,
2415 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
2417 &sensor_dev_attr_in5_input.dev_attr.attr,
2418 &sensor_dev_attr_in5_min.dev_attr.attr,
2419 &sensor_dev_attr_in5_max.dev_attr.attr,
2420 &sensor_dev_attr_in5_alarm.dev_attr.attr,
2421 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2423 &sensor_dev_attr_in6_input.dev_attr.attr,
2424 &sensor_dev_attr_in6_min.dev_attr.attr,
2425 &sensor_dev_attr_in6_max.dev_attr.attr,
2426 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2427 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2429 &sensor_dev_attr_in7_input.dev_attr.attr,
2430 &sensor_dev_attr_in7_min.dev_attr.attr,
2431 &sensor_dev_attr_in7_max.dev_attr.attr,
2432 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2433 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2435 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2436 &sensor_dev_attr_in9_input.dev_attr.attr, /* 41 */
2437 &sensor_dev_attr_in10_input.dev_attr.attr, /* 42 */
2438 &sensor_dev_attr_in11_input.dev_attr.attr, /* 43 */
2439 &sensor_dev_attr_in12_input.dev_attr.attr, /* 44 */
2443 static const struct attribute_group it87_group_in = {
2444 .attrs = it87_attributes_in,
2445 .is_visible = it87_in_is_visible,
2448 static umode_t it87_temp_is_visible(struct kobject *kobj,
2449 struct attribute *attr, int index)
2451 struct device *dev = container_of(kobj, struct device, kobj);
2452 struct it87_data *data = dev_get_drvdata(dev);
2453 int i = index / 7; /* temperature index */
2454 int a = index % 7; /* attribute index */
2456 if (!(data->has_temp & BIT(i)))
2459 if (a && i >= data->num_temp_limit)
2463 int type = get_temp_type(data, i);
2467 if (has_bank_sel(data))
2472 if (a == 5 && i >= data->num_temp_offset)
2475 if (a == 6 && !data->has_beep)
2481 static struct attribute *it87_attributes_temp[] = {
2482 &sensor_dev_attr_temp1_input.dev_attr.attr,
2483 &sensor_dev_attr_temp1_max.dev_attr.attr,
2484 &sensor_dev_attr_temp1_min.dev_attr.attr,
2485 &sensor_dev_attr_temp1_type.dev_attr.attr, /* 3 */
2486 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2487 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2488 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2490 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2491 &sensor_dev_attr_temp2_max.dev_attr.attr,
2492 &sensor_dev_attr_temp2_min.dev_attr.attr,
2493 &sensor_dev_attr_temp2_type.dev_attr.attr,
2494 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2495 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2496 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2498 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2499 &sensor_dev_attr_temp3_max.dev_attr.attr,
2500 &sensor_dev_attr_temp3_min.dev_attr.attr,
2501 &sensor_dev_attr_temp3_type.dev_attr.attr,
2502 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2503 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2504 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2506 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2507 &sensor_dev_attr_temp4_max.dev_attr.attr,
2508 &sensor_dev_attr_temp4_min.dev_attr.attr,
2509 &sensor_dev_attr_temp4_type.dev_attr.attr,
2510 &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2511 &sensor_dev_attr_temp4_offset.dev_attr.attr,
2512 &sensor_dev_attr_temp4_beep.dev_attr.attr,
2514 &sensor_dev_attr_temp5_input.dev_attr.attr,
2515 &sensor_dev_attr_temp5_max.dev_attr.attr,
2516 &sensor_dev_attr_temp5_min.dev_attr.attr,
2517 &sensor_dev_attr_temp5_type.dev_attr.attr,
2518 &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2519 &sensor_dev_attr_temp5_offset.dev_attr.attr,
2520 &sensor_dev_attr_temp5_beep.dev_attr.attr,
2522 &sensor_dev_attr_temp6_input.dev_attr.attr,
2523 &sensor_dev_attr_temp6_max.dev_attr.attr,
2524 &sensor_dev_attr_temp6_min.dev_attr.attr,
2525 &sensor_dev_attr_temp6_type.dev_attr.attr,
2526 &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2527 &sensor_dev_attr_temp6_offset.dev_attr.attr,
2528 &sensor_dev_attr_temp6_beep.dev_attr.attr,
2532 static const struct attribute_group it87_group_temp = {
2533 .attrs = it87_attributes_temp,
2534 .is_visible = it87_temp_is_visible,
2537 static umode_t it87_is_visible(struct kobject *kobj,
2538 struct attribute *attr, int index)
2540 struct device *dev = container_of(kobj, struct device, kobj);
2541 struct it87_data *data = dev_get_drvdata(dev);
2543 if ((index == 2 || index == 3) && !data->has_vid)
2546 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2552 static struct attribute *it87_attributes[] = {
2553 &dev_attr_alarms.attr,
2554 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2555 &dev_attr_vrm.attr, /* 2 */
2556 &dev_attr_cpu0_vid.attr, /* 3 */
2557 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2558 &sensor_dev_attr_in7_label.dev_attr.attr,
2559 &sensor_dev_attr_in8_label.dev_attr.attr,
2560 &sensor_dev_attr_in9_label.dev_attr.attr,
2564 static const struct attribute_group it87_group = {
2565 .attrs = it87_attributes,
2566 .is_visible = it87_is_visible,
2569 static umode_t it87_fan_is_visible(struct kobject *kobj,
2570 struct attribute *attr, int index)
2572 struct device *dev = container_of(kobj, struct device, kobj);
2573 struct it87_data *data = dev_get_drvdata(dev);
2574 int i = index / 5; /* fan index */
2575 int a = index % 5; /* attribute index */
2577 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2578 i = (index - 15) / 4 + 3;
2579 a = (index - 15) % 4;
2582 if (!(data->has_fan & BIT(i)))
2585 if (a == 3) { /* beep */
2586 if (!data->has_beep)
2588 /* first fan beep attribute is writable */
2589 if (i == __ffs(data->has_fan))
2590 return attr->mode | S_IWUSR;
2593 if (a == 4 && has_16bit_fans(data)) /* divisor */
2599 static struct attribute *it87_attributes_fan[] = {
2600 &sensor_dev_attr_fan1_input.dev_attr.attr,
2601 &sensor_dev_attr_fan1_min.dev_attr.attr,
2602 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2603 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2604 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2606 &sensor_dev_attr_fan2_input.dev_attr.attr,
2607 &sensor_dev_attr_fan2_min.dev_attr.attr,
2608 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2609 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2610 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2612 &sensor_dev_attr_fan3_input.dev_attr.attr,
2613 &sensor_dev_attr_fan3_min.dev_attr.attr,
2614 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2615 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2616 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2618 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2619 &sensor_dev_attr_fan4_min.dev_attr.attr,
2620 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2621 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2623 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2624 &sensor_dev_attr_fan5_min.dev_attr.attr,
2625 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2626 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2628 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2629 &sensor_dev_attr_fan6_min.dev_attr.attr,
2630 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2631 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2635 static const struct attribute_group it87_group_fan = {
2636 .attrs = it87_attributes_fan,
2637 .is_visible = it87_fan_is_visible,
2640 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2641 struct attribute *attr, int index)
2643 struct device *dev = container_of(kobj, struct device, kobj);
2644 struct it87_data *data = dev_get_drvdata(dev);
2645 int i = index / 4; /* pwm index */
2646 int a = index % 4; /* attribute index */
2648 if (!(data->has_pwm & BIT(i)))
2651 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2652 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2653 return attr->mode | S_IWUSR;
2655 /* pwm2_freq is writable if there are two pwm frequency selects */
2656 if (has_pwm_freq2(data) && i == 1 && a == 2)
2657 return attr->mode | S_IWUSR;
2662 static struct attribute *it87_attributes_pwm[] = {
2663 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2664 &sensor_dev_attr_pwm1.dev_attr.attr,
2665 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2666 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2668 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2669 &sensor_dev_attr_pwm2.dev_attr.attr,
2670 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2671 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2673 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2674 &sensor_dev_attr_pwm3.dev_attr.attr,
2675 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2676 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2678 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2679 &sensor_dev_attr_pwm4.dev_attr.attr,
2680 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2681 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2683 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2684 &sensor_dev_attr_pwm5.dev_attr.attr,
2685 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2686 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2688 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2689 &sensor_dev_attr_pwm6.dev_attr.attr,
2690 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2691 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2696 static const struct attribute_group it87_group_pwm = {
2697 .attrs = it87_attributes_pwm,
2698 .is_visible = it87_pwm_is_visible,
2701 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2702 struct attribute *attr, int index)
2704 struct device *dev = container_of(kobj, struct device, kobj);
2705 struct it87_data *data = dev_get_drvdata(dev);
2706 int i = index / 11; /* pwm index */
2707 int a = index % 11; /* attribute index */
2709 if (index >= 33) { /* pwm 4..6 */
2710 i = (index - 33) / 6 + 3;
2711 a = (index - 33) % 6 + 4;
2714 if (!(data->has_pwm & BIT(i)))
2717 if (has_newer_autopwm(data)) {
2718 if (a < 4) /* no auto point pwm */
2720 if (a == 8) /* no auto_point4 */
2723 if (has_old_autopwm(data)) {
2724 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2731 static struct attribute *it87_attributes_auto_pwm[] = {
2732 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2733 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2734 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2735 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2736 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2737 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2738 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2739 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2740 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2741 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2742 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2744 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2745 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2746 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2747 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2748 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2749 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2750 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2751 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2752 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2753 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2754 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2756 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2757 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2758 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2759 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2760 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2761 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2762 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2763 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2764 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2765 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2766 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2768 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2769 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2770 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2771 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2772 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2773 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2775 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2776 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2777 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2778 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2779 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2780 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2782 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2783 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2784 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2785 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2786 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2787 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2792 static const struct attribute_group it87_group_auto_pwm = {
2793 .attrs = it87_attributes_auto_pwm,
2794 .is_visible = it87_auto_pwm_is_visible,
2797 /* SuperIO detection - will change isa_address if a chip is found */
2798 static int __init it87_find(int sioaddr, unsigned short *address,
2799 struct it87_sio_data *sio_data)
2803 const struct it87_devices *config;
2805 err = superio_enter(sioaddr);
2810 chip_type = superio_inw(sioaddr, DEVID);
2811 if (chip_type == 0xffff)
2815 chip_type = force_id;
2817 switch (chip_type) {
2819 sio_data->type = it87;
2822 sio_data->type = it8712;
2826 sio_data->type = it8716;
2829 sio_data->type = it8718;
2832 sio_data->type = it8720;
2835 sio_data->type = it8721;
2838 sio_data->type = it8728;
2841 sio_data->type = it8732;
2844 sio_data->type = it8792;
2847 sio_data->type = it8771;
2850 sio_data->type = it8772;
2853 sio_data->type = it8781;
2856 sio_data->type = it8782;
2859 sio_data->type = it8783;
2862 sio_data->type = it8786;
2865 sio_data->type = it8790;
2869 sio_data->type = it8603;
2872 sio_data->type = it8607;
2875 sio_data->type = it8613;
2878 sio_data->type = it8620;
2881 sio_data->type = it8622;
2884 sio_data->type = it8625;
2887 sio_data->type = it8628;
2890 sio_data->type = it8655;
2893 sio_data->type = it8665;
2896 sio_data->type = it8686;
2898 case 0xffff: /* No device at all */
2901 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2905 superio_select(sioaddr, PME);
2906 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2907 pr_info("Device not activated, skipping\n");
2911 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2912 if (*address == 0) {
2913 pr_info("Base address not set, skipping\n");
2918 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2919 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2920 it87_devices[sio_data->type].suffix,
2921 *address, sio_data->revision);
2923 config = &it87_devices[sio_data->type];
2925 /* in7 (VSB or VCCH5V) is always internal on some chips */
2926 if (has_in7_internal(config))
2927 sio_data->internal |= BIT(1);
2929 /* in8 (Vbat) is always internal */
2930 sio_data->internal |= BIT(2);
2932 /* in9 (AVCC3), always internal if supported */
2933 if (has_avcc3(config))
2934 sio_data->internal |= BIT(3); /* in9 is AVCC */
2936 sio_data->skip_in |= BIT(9);
2938 if (!has_four_pwm(config))
2939 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2940 else if (!has_five_pwm(config))
2941 sio_data->skip_pwm |= BIT(4) | BIT(5);
2942 else if (!has_six_pwm(config))
2943 sio_data->skip_pwm |= BIT(5);
2945 if (!has_vid(config))
2946 sio_data->skip_vid = 1;
2948 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2949 if (sio_data->type == it87) {
2950 /* The IT8705F has a different LD number for GPIO */
2951 superio_select(sioaddr, 5);
2952 sio_data->beep_pin = superio_inb(sioaddr,
2953 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2954 } else if (sio_data->type == it8783) {
2955 int reg25, reg27, reg2a, reg2c, regef;
2957 superio_select(sioaddr, GPIO);
2959 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2960 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2961 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2962 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2963 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2965 /* Check if fan3 is there or not */
2966 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2967 sio_data->skip_fan |= BIT(2);
2968 if ((reg25 & BIT(4)) ||
2969 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2970 sio_data->skip_pwm |= BIT(2);
2972 /* Check if fan2 is there or not */
2974 sio_data->skip_fan |= BIT(1);
2976 sio_data->skip_pwm |= BIT(1);
2979 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2980 sio_data->skip_in |= BIT(5); /* No VIN5 */
2984 sio_data->skip_in |= BIT(6); /* No VIN6 */
2988 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2990 if (reg27 & BIT(2)) {
2992 * The data sheet is a bit unclear regarding the
2993 * internal voltage divider for VCCH5V. It says
2994 * "This bit enables and switches VIN7 (pin 91) to the
2995 * internal voltage divider for VCCH5V".
2996 * This is different to other chips, where the internal
2997 * voltage divider would connect VIN7 to an internal
2998 * voltage source. Maybe that is the case here as well.
3000 * Since we don't know for sure, re-route it if that is
3001 * not the case, and ask the user to report if the
3002 * resulting voltage is sane.
3004 if (!(reg2c & BIT(1))) {
3006 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
3008 pr_notice("Routing internal VCCH5V to in7.\n");
3010 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
3011 pr_notice("Please report if it displays a reasonable voltage.\n");
3015 sio_data->internal |= BIT(0);
3017 sio_data->internal |= BIT(1);
3019 sio_data->beep_pin = superio_inb(sioaddr,
3020 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3021 } else if (sio_data->type == it8603 || sio_data->type == it8607) {
3024 superio_select(sioaddr, GPIO);
3026 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3028 /* Check if fan3 is there or not */
3030 sio_data->skip_pwm |= BIT(2);
3032 sio_data->skip_fan |= BIT(2);
3034 /* Check if fan2 is there or not */
3035 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3037 sio_data->skip_pwm |= BIT(1);
3039 sio_data->skip_fan |= BIT(1);
3041 if (sio_data->type == it8603) {
3042 sio_data->skip_in |= BIT(5); /* No VIN5 */
3043 sio_data->skip_in |= BIT(6); /* No VIN6 */
3046 sio_data->beep_pin = superio_inb(sioaddr,
3047 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3048 } else if (sio_data->type == it8613) {
3049 int reg27, reg29, reg2a;
3051 superio_select(sioaddr, GPIO);
3053 /* Check for pwm3, fan3, pwm5, fan5 */
3054 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3056 sio_data->skip_fan |= BIT(4);
3058 sio_data->skip_pwm |= BIT(4);
3060 sio_data->skip_pwm |= BIT(2);
3062 sio_data->skip_fan |= BIT(2);
3064 /* Check for pwm2, fan2 */
3065 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3067 sio_data->skip_pwm |= BIT(1);
3069 sio_data->skip_fan |= BIT(1);
3071 /* Check for pwm4, fan4 */
3072 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3073 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3074 sio_data->skip_fan |= BIT(3);
3075 sio_data->skip_pwm |= BIT(3);
3078 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3079 sio_data->skip_fan |= BIT(0); /* No fan1 */
3080 sio_data->skip_in |= BIT(3); /* No VIN3 */
3081 sio_data->skip_in |= BIT(6); /* No VIN6 */
3083 sio_data->beep_pin = superio_inb(sioaddr,
3084 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3085 } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3086 sio_data->type == it8686) {
3089 superio_select(sioaddr, GPIO);
3091 /* Check for pwm5 */
3092 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3094 sio_data->skip_pwm |= BIT(4);
3096 /* Check for fan4, fan5 */
3097 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3098 if (!(reg & BIT(5)))
3099 sio_data->skip_fan |= BIT(3);
3100 if (!(reg & BIT(4)))
3101 sio_data->skip_fan |= BIT(4);
3103 /* Check for pwm3, fan3 */
3104 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3106 sio_data->skip_pwm |= BIT(2);
3108 sio_data->skip_fan |= BIT(2);
3110 /* Check for pwm4 */
3111 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3113 sio_data->skip_pwm |= BIT(3);
3115 /* Check for pwm2, fan2 */
3116 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3118 sio_data->skip_pwm |= BIT(1);
3120 sio_data->skip_fan |= BIT(1);
3121 /* Check for pwm6, fan6 */
3122 if (!(reg & BIT(7))) {
3123 sio_data->skip_pwm |= BIT(5);
3124 sio_data->skip_fan |= BIT(5);
3127 /* Check if AVCC is on VIN3 */
3128 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3130 /* For it8686, the bit just enables AVCC3 */
3131 if (sio_data->type != it8686)
3132 sio_data->internal |= BIT(0);
3134 sio_data->internal &= ~BIT(3);
3135 sio_data->skip_in |= BIT(9);
3138 sio_data->beep_pin = superio_inb(sioaddr,
3139 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3140 } else if (sio_data->type == it8622) {
3143 superio_select(sioaddr, GPIO);
3145 /* Check for pwm4, fan4 */
3146 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3148 sio_data->skip_fan |= BIT(3);
3150 sio_data->skip_pwm |= BIT(3);
3152 /* Check for pwm3, fan3, pwm5, fan5 */
3153 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3155 sio_data->skip_pwm |= BIT(2);
3157 sio_data->skip_fan |= BIT(2);
3159 sio_data->skip_pwm |= BIT(4);
3161 sio_data->skip_fan |= BIT(4);
3163 /* Check for pwm2, fan2 */
3164 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3166 sio_data->skip_pwm |= BIT(1);
3168 sio_data->skip_fan |= BIT(1);
3170 /* Check for AVCC */
3171 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3172 if (!(reg & BIT(0)))
3173 sio_data->skip_in |= BIT(9);
3175 sio_data->beep_pin = superio_inb(sioaddr,
3176 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3177 } else if (sio_data->type == it8732) {
3180 superio_select(sioaddr, GPIO);
3182 /* Check for pwm2, fan2 */
3183 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3185 sio_data->skip_pwm |= BIT(1);
3187 sio_data->skip_fan |= BIT(1);
3189 /* Check for pwm3, fan3, fan4 */
3190 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3192 sio_data->skip_pwm |= BIT(2);
3194 sio_data->skip_fan |= BIT(2);
3196 sio_data->skip_fan |= BIT(3);
3198 /* Check if AVCC is on VIN3 */
3199 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3201 sio_data->internal |= BIT(0);
3203 sio_data->beep_pin = superio_inb(sioaddr,
3204 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3205 } else if (sio_data->type == it8655) {
3208 superio_select(sioaddr, GPIO);
3210 /* Check for pwm2 */
3211 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3213 sio_data->skip_pwm |= BIT(1);
3215 /* Check for fan2 */
3216 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3218 sio_data->skip_fan |= BIT(1);
3220 /* Check for pwm3, fan3 */
3221 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3223 sio_data->skip_pwm |= BIT(2);
3225 sio_data->skip_fan |= BIT(2);
3227 sio_data->beep_pin = superio_inb(sioaddr,
3228 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3229 } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3230 int reg27, reg29, reg2d, regd3;
3232 superio_select(sioaddr, GPIO);
3234 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3235 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3236 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3237 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3239 /* Check for pwm2, fan2 */
3241 sio_data->skip_pwm |= BIT(1);
3243 sio_data->skip_fan |= BIT(1);
3245 /* Check for pwm3, fan3 */
3247 sio_data->skip_pwm |= BIT(2);
3249 sio_data->skip_fan |= BIT(2);
3251 /* Check for pwm4, fan4, pwm5, fan5 */
3252 if (sio_data->type == it8625) {
3253 int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3256 sio_data->skip_fan |= BIT(3);
3258 sio_data->skip_pwm |= BIT(3);
3260 sio_data->skip_pwm |= BIT(4);
3262 sio_data->skip_fan |= BIT(4);
3264 int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3267 sio_data->skip_pwm |= BIT(3);
3269 sio_data->skip_fan |= BIT(3);
3271 sio_data->skip_pwm |= BIT(4);
3272 if (!(reg26 & BIT(4)))
3273 sio_data->skip_fan |= BIT(4);
3276 /* Check for pwm6, fan6 */
3278 sio_data->skip_pwm |= BIT(5);
3280 sio_data->skip_fan |= BIT(5);
3282 sio_data->beep_pin = superio_inb(sioaddr,
3283 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3288 superio_select(sioaddr, GPIO);
3290 /* Check for fan4, fan5 */
3291 if (has_five_fans(config)) {
3292 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3293 switch (sio_data->type) {
3296 sio_data->skip_fan |= BIT(3);
3298 sio_data->skip_fan |= BIT(4);
3303 if (!(reg & BIT(5)))
3304 sio_data->skip_fan |= BIT(3);
3305 if (!(reg & BIT(4)))
3306 sio_data->skip_fan |= BIT(4);
3313 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3314 if (!sio_data->skip_vid) {
3315 /* We need at least 4 VID pins */
3317 pr_info("VID is disabled (pins used for GPIO)\n");
3318 sio_data->skip_vid = 1;
3322 /* Check if fan3 is there or not */
3324 sio_data->skip_pwm |= BIT(2);
3326 sio_data->skip_fan |= BIT(2);
3328 /* Check if fan2 is there or not */
3329 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3331 sio_data->skip_pwm |= BIT(1);
3333 sio_data->skip_fan |= BIT(1);
3335 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3336 !(sio_data->skip_vid))
3337 sio_data->vid_value = superio_inb(sioaddr,
3340 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3342 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3345 * The IT8720F has no VIN7 pin, so VCCH should always be
3346 * routed internally to VIN7 with an internal divider.
3347 * Curiously, there still is a configuration bit to control
3348 * this, which means it can be set incorrectly. And even
3349 * more curiously, many boards out there are improperly
3350 * configured, even though the IT8720F datasheet claims
3351 * that the internal routing of VCCH to VIN7 is the default
3352 * setting. So we force the internal routing in this case.
3354 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3355 * If UART6 is enabled, re-route VIN7 to the internal divider
3356 * if that is not already the case.
3358 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3360 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3361 pr_notice("Routing internal VCCH to in7\n");
3364 sio_data->internal |= BIT(0);
3366 sio_data->internal |= BIT(1);
3369 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3370 * While VIN7 can be routed to the internal voltage divider,
3371 * VIN5 and VIN6 are not available if UART6 is enabled.
3373 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3374 * is the temperature source. Since we can not read the
3375 * temperature source here, skip_temp is preliminary.
3378 sio_data->skip_in |= BIT(5) | BIT(6);
3379 sio_data->skip_temp |= BIT(2);
3382 sio_data->beep_pin = superio_inb(sioaddr,
3383 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3385 if (sio_data->beep_pin)
3386 pr_info("Beeping is supported\n");
3389 superio_exit(sioaddr);
3393 static void it87_init_regs(struct platform_device *pdev)
3395 struct it87_data *data = platform_get_drvdata(pdev);
3397 /* Initialize chip specific register pointers */
3398 switch (data->type) {
3401 data->REG_FAN = IT87_REG_FAN;
3402 data->REG_FANX = IT87_REG_FANX;
3403 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3404 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3405 data->REG_PWM = IT87_REG_PWM;
3406 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3407 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3408 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3413 data->REG_FAN = IT87_REG_FAN_8665;
3414 data->REG_FANX = IT87_REG_FANX_8665;
3415 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3416 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3417 data->REG_PWM = IT87_REG_PWM_8665;
3418 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3419 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3420 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3423 data->REG_FAN = IT87_REG_FAN;
3424 data->REG_FANX = IT87_REG_FANX;
3425 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3426 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3427 data->REG_PWM = IT87_REG_PWM_8665;
3428 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3429 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3430 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3433 data->REG_FAN = IT87_REG_FAN;
3434 data->REG_FANX = IT87_REG_FANX;
3435 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3436 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3437 data->REG_PWM = IT87_REG_PWM_8665;
3438 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3439 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3440 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3443 data->REG_FAN = IT87_REG_FAN;
3444 data->REG_FANX = IT87_REG_FANX;
3445 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3446 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3447 data->REG_PWM = IT87_REG_PWM;
3448 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3449 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3450 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3455 /* Called when we have found a new IT87. */
3456 static void it87_init_device(struct platform_device *pdev)
3458 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3459 struct it87_data *data = platform_get_drvdata(pdev);
3464 * For each PWM channel:
3465 * - If it is in automatic mode, setting to manual mode should set
3466 * the fan to full speed by default.
3467 * - If it is in manual mode, we need a mapping to temperature
3468 * channels to use when later setting to automatic mode later.
3469 * Use a 1:1 mapping by default (we are clueless.)
3470 * In both cases, the value can (and should) be changed by the user
3471 * prior to switching to a different mode.
3472 * Note that this is no longer needed for the IT8721F and later, as
3473 * these have separate registers for the temperature mapping and the
3474 * manual duty cycle.
3476 for (i = 0; i < NUM_AUTO_PWM; i++) {
3477 data->pwm_temp_map[i] = i;
3478 data->pwm_duty[i] = 0x7f; /* Full speed */
3479 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
3483 * Some chips seem to have default value 0xff for all limit
3484 * registers. For low voltage limits it makes no sense and triggers
3485 * alarms, so change to 0 instead. For high temperature limits, it
3486 * means -1 degree C, which surprisingly doesn't trigger an alarm,
3487 * but is still confusing, so change to 127 degrees C.
3489 for (i = 0; i < NUM_VIN_LIMIT; i++) {
3490 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3492 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3494 for (i = 0; i < data->num_temp_limit; i++) {
3495 tmp = it87_read_value(data, data->REG_TEMP_HIGH[i]);
3497 it87_write_value(data, data->REG_TEMP_HIGH[i], 127);
3501 * Temperature channels are not forcibly enabled, as they can be
3502 * set to two different sensor types and we can't guess which one
3503 * is correct for a given system. These channels can be enabled at
3504 * run-time through the temp{1-3}_type sysfs accessors if needed.
3507 /* Check if voltage monitors are reset manually or by some reason */
3508 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3509 if ((tmp & 0xff) == 0) {
3510 /* Enable all voltage monitors */
3511 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3514 /* Check if tachometers are reset manually or by some reason */
3515 mask = 0x70 & ~(sio_data->skip_fan << 4);
3516 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3517 if ((data->fan_main_ctrl & mask) == 0) {
3518 /* Enable all fan tachometers */
3519 data->fan_main_ctrl |= mask;
3520 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3521 data->fan_main_ctrl);
3523 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3525 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3527 /* Set tachometers to 16-bit mode if needed */
3528 if (has_fan16_config(data)) {
3529 if (~tmp & 0x07 & data->has_fan) {
3531 "Setting fan1-3 to 16-bit mode\n");
3532 it87_write_value(data, IT87_REG_FAN_16BIT,
3537 /* Check for additional fans */
3538 if (has_four_fans(data) && (tmp & BIT(4)))
3539 data->has_fan |= BIT(3); /* fan4 enabled */
3540 if (has_five_fans(data) && (tmp & BIT(5)))
3541 data->has_fan |= BIT(4); /* fan5 enabled */
3542 if (has_six_fans(data)) {
3543 switch (data->type) {
3548 data->has_fan |= BIT(5); /* fan6 enabled */
3552 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3554 data->has_fan |= BIT(5); /* fan6 enabled */
3561 /* Fan input pins may be used for alternative functions */
3562 data->has_fan &= ~sio_data->skip_fan;
3564 /* Check if pwm6 is enabled */
3565 if (has_six_pwm(data)) {
3566 switch (data->type) {
3569 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3570 if (!(tmp & BIT(3)))
3571 sio_data->skip_pwm |= BIT(5);
3578 /* Start monitoring */
3579 it87_write_value(data, IT87_REG_CONFIG,
3580 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3581 | (update_vbat ? 0x41 : 0x01));
3584 /* Return 1 if and only if the PWM interface is safe to use */
3585 static int it87_check_pwm(struct device *dev)
3587 struct it87_data *data = dev_get_drvdata(dev);
3589 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3590 * and polarity set to active low is sign that this is the case so we
3591 * disable pwm control to protect the user.
3593 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3595 if ((tmp & 0x87) == 0) {
3596 if (fix_pwm_polarity) {
3598 * The user asks us to attempt a chip reconfiguration.
3599 * This means switching to active high polarity and
3600 * inverting all fan speed values.
3605 for (i = 0; i < ARRAY_SIZE(pwm); i++)
3606 pwm[i] = it87_read_value(data,
3610 * If any fan is in automatic pwm mode, the polarity
3611 * might be correct, as suspicious as it seems, so we
3612 * better don't change anything (but still disable the
3615 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3617 "Reconfiguring PWM to active high polarity\n");
3618 it87_write_value(data, IT87_REG_FAN_CTL,
3620 for (i = 0; i < 3; i++)
3621 it87_write_value(data,
3628 "PWM configuration is too broken to be fixed\n");
3632 "Detected broken BIOS defaults, disabling PWM interface\n");
3634 } else if (fix_pwm_polarity) {
3636 "PWM configuration looks sane, won't touch\n");
3642 static int it87_probe(struct platform_device *pdev)
3644 struct it87_data *data;
3645 struct resource *res;
3646 struct device *dev = &pdev->dev;
3647 struct it87_sio_data *sio_data = dev_get_platdata(dev);
3648 int enable_pwm_interface;
3649 struct device *hwmon_dev;
3651 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3652 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3654 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3655 (unsigned long)res->start,
3656 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3660 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3664 data->addr = res->start;
3665 data->type = sio_data->type;
3666 data->features = it87_devices[sio_data->type].features;
3667 data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3668 data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
3669 data->peci_mask = it87_devices[sio_data->type].peci_mask;
3670 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3674 * IT8705F Datasheet 0.4.1, 3h == Version G.
3675 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3676 * These are the first revisions with 16-bit tachometer support.
3678 switch (data->type) {
3680 if (sio_data->revision >= 0x03) {
3681 data->features &= ~FEAT_OLD_AUTOPWM;
3682 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3686 if (sio_data->revision >= 0x08) {
3687 data->features &= ~FEAT_OLD_AUTOPWM;
3688 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3696 /* Now, we do the remaining detection. */
3697 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3698 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3701 platform_set_drvdata(pdev, data);
3703 mutex_init(&data->update_lock);
3705 /* Initialize register pointers */
3706 it87_init_regs(pdev);
3708 /* Check PWM configuration */
3709 enable_pwm_interface = it87_check_pwm(dev);
3711 /* Starting with IT8721F, we handle scaling of internal voltages */
3712 if (has_scaling(data)) {
3713 if (sio_data->internal & BIT(0))
3714 data->in_scaled |= BIT(3); /* in3 is AVCC */
3715 if (sio_data->internal & BIT(1))
3716 data->in_scaled |= BIT(7); /* in7 is VSB */
3717 if (sio_data->internal & BIT(2))
3718 data->in_scaled |= BIT(8); /* in8 is Vbat */
3719 if (sio_data->internal & BIT(3))
3720 data->in_scaled |= BIT(9); /* in9 is AVCC */
3721 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3722 sio_data->type == it8783) {
3723 if (sio_data->internal & BIT(0))
3724 data->in_scaled |= BIT(3); /* in3 is VCC5V */
3725 if (sio_data->internal & BIT(1))
3726 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
3729 data->has_temp = 0x07;
3730 if (sio_data->skip_temp & BIT(2)) {
3731 if (sio_data->type == it8782 &&
3732 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3733 data->has_temp &= ~BIT(2);
3736 data->in_internal = sio_data->internal;
3737 data->has_in = 0x3ff & ~sio_data->skip_in;
3739 if (has_six_temp(data)) {
3740 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3742 /* Check for additional temperature sensors */
3743 if ((reg & 0x03) >= 0x02)
3744 data->has_temp |= BIT(3);
3745 if (((reg >> 2) & 0x03) >= 0x02)
3746 data->has_temp |= BIT(4);
3747 if (((reg >> 4) & 0x03) >= 0x02)
3748 data->has_temp |= BIT(5);
3750 /* Check for additional voltage sensors */
3751 if ((reg & 0x03) == 0x01)
3752 data->has_in |= BIT(10);
3753 if (((reg >> 2) & 0x03) == 0x01)
3754 data->has_in |= BIT(11);
3755 if (((reg >> 4) & 0x03) == 0x01)
3756 data->has_in |= BIT(12);
3759 data->has_beep = !!sio_data->beep_pin;
3761 /* Initialize the IT87 chip */
3762 it87_init_device(pdev);
3764 if (!sio_data->skip_vid) {
3765 data->has_vid = true;
3766 data->vrm = vid_which_vrm();
3767 /* VID reading from Super-I/O config space if available */
3768 data->vid = sio_data->vid_value;
3771 /* Prepare for sysfs hooks */
3772 data->groups[0] = &it87_group;
3773 data->groups[1] = &it87_group_in;
3774 data->groups[2] = &it87_group_temp;
3775 data->groups[3] = &it87_group_fan;
3777 if (enable_pwm_interface) {
3778 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3779 data->has_pwm &= ~sio_data->skip_pwm;
3781 data->groups[4] = &it87_group_pwm;
3782 if (has_old_autopwm(data) || has_newer_autopwm(data))
3783 data->groups[5] = &it87_group_auto_pwm;
3786 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3787 it87_devices[sio_data->type].name,
3788 data, data->groups);
3789 return PTR_ERR_OR_ZERO(hwmon_dev);
3792 static struct platform_driver it87_driver = {
3796 .probe = it87_probe,
3799 static int __init it87_device_add(int index, unsigned short address,
3800 const struct it87_sio_data *sio_data)
3802 struct platform_device *pdev;
3803 struct resource res = {
3804 .start = address + IT87_EC_OFFSET,
3805 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3807 .flags = IORESOURCE_IO,
3811 err = acpi_check_resource_conflict(&res);
3815 pdev = platform_device_alloc(DRVNAME, address);
3819 err = platform_device_add_resources(pdev, &res, 1);
3821 pr_err("Device resource addition failed (%d)\n", err);
3822 goto exit_device_put;
3825 err = platform_device_add_data(pdev, sio_data,
3826 sizeof(struct it87_sio_data));
3828 pr_err("Platform data allocation failed\n");
3829 goto exit_device_put;
3832 err = platform_device_add(pdev);
3834 pr_err("Device addition failed (%d)\n", err);
3835 goto exit_device_put;
3838 it87_pdev[index] = pdev;
3842 platform_device_put(pdev);
3846 struct it87_dmi_data {
3847 bool sio4e_broken; /* SIO accesses @ 0x4e are broken */
3848 char *sio_mutex; /* SIO ACPI mutex */
3849 u8 skip_pwm; /* pwm channels to skip for this board */
3853 * On Gigabyte AB350 and AX370 boards, accesses to the Super-IO chip
3854 * at address 0x4e/0x4f can result in a system hang.
3855 * Accesses to address 0x2e/0x2f need to be mutex protected.
3857 static struct it87_dmi_data gigabyte_ab350_gaming = {
3858 .sio4e_broken = true,
3859 .sio_mutex = "\\_SB.PCI0.SBRG.SIO1.MUT0",
3863 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3864 * connected to a fan, but to something else. One user
3865 * has reported instant system power-off when changing
3866 * the PWM2 duty cycle, so we disable it.
3867 * I use the board name string as the trigger in case
3868 * the same board is ever used in other systems.
3870 static struct it87_dmi_data nvidia_fn68pt = {
3874 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3877 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3878 DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming-CF"),
3880 .driver_data = &gigabyte_ab350_gaming,
3884 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3885 DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming 3-CF"),
3887 .driver_data = &gigabyte_ab350_gaming,
3891 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3892 DMI_MATCH(DMI_BOARD_NAME, "AB350M-D3H-CF"),
3894 .driver_data = &gigabyte_ab350_gaming,
3898 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3899 DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming K7"),
3901 .driver_data = &gigabyte_ab350_gaming,
3905 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3906 DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming 5"),
3908 .driver_data = &gigabyte_ab350_gaming,
3912 DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
3913 DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
3915 .driver_data = &nvidia_fn68pt,
3920 static int __init sm_it87_init(void)
3922 const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
3923 struct it87_dmi_data *dmi_data = NULL;
3924 int sioaddr[2] = { REG_2E, REG_4E };
3925 struct it87_sio_data sio_data;
3926 unsigned short isa_address;
3931 dmi_data = dmi->driver_data;
3934 it87_sio4e_broken = dmi_data->sio4e_broken;
3935 #ifdef __IT87_USE_ACPI_MUTEX
3936 if (dmi_data->sio_mutex) {
3937 static acpi_status status;
3939 status = acpi_get_handle(NULL, dmi_data->sio_mutex,
3940 &it87_acpi_sio_handle);
3941 if (ACPI_SUCCESS(status)) {
3942 it87_acpi_sio_mutex = dmi_data->sio_mutex;
3943 pr_debug("Found ACPI SIO mutex %s\n",
3944 dmi_data->sio_mutex);
3946 pr_warn("ACPI SIO mutex %s not found\n",
3947 dmi_data->sio_mutex);
3950 #endif /* __IT87_USE_ACPI_MUTEX */
3953 err = platform_driver_register(&it87_driver);
3957 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3959 * Accessing the second Super-IO chip can result in board
3960 * hangs. Disable until we figure out what is going on.
3962 if (blacklist && it87_sio4e_broken && sioaddr[i] == 0x4e)
3964 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3966 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3967 if (err || isa_address == 0)
3971 sio_data.skip_pwm |= dmi_data->skip_pwm;
3972 err = it87_device_add(i, isa_address, &sio_data);
3974 goto exit_dev_unregister;
3980 goto exit_unregister;
3984 exit_dev_unregister:
3985 /* NULL check handled by platform_device_unregister */
3986 platform_device_unregister(it87_pdev[0]);
3988 platform_driver_unregister(&it87_driver);
3992 static void __exit sm_it87_exit(void)
3994 /* NULL check handled by platform_device_unregister */
3995 platform_device_unregister(it87_pdev[1]);
3996 platform_device_unregister(it87_pdev[0]);
3997 platform_driver_unregister(&it87_driver);
4000 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
4001 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
4002 module_param(update_vbat, bool, 0);
4003 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
4004 module_param(fix_pwm_polarity, bool, 0);
4005 MODULE_PARM_DESC(fix_pwm_polarity,
4006 "Force PWM polarity to active high (DANGEROUS)");
4007 MODULE_LICENSE("GPL");
4009 module_init(sm_it87_init);
4010 module_exit(sm_it87_exit);