git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8613E  Super I/O chip w/LPC interface
  16  *            IT8620E  Super I/O chip w/LPC interface
  17  *            IT8622E  Super I/O chip w/LPC interface
  18  *            IT8623E  Super I/O chip w/LPC interface
  19  *            IT8625E  Super I/O chip w/LPC interface
  20  *            IT8628E  Super I/O chip w/LPC interface
  21  *            IT8655E  Super I/O chip w/LPC interface
  22  *            IT8665E  Super I/O chip w/LPC interface
  23  *            IT8686E  Super I/O chip w/LPC interface
  24  *            IT8705F  Super I/O chip w/LPC interface
  25  *            IT8712F  Super I/O chip w/LPC interface
  26  *            IT8716F  Super I/O chip w/LPC interface
  27  *            IT8718F  Super I/O chip w/LPC interface
  28  *            IT8720F  Super I/O chip w/LPC interface
  29  *            IT8721F  Super I/O chip w/LPC interface
  30  *            IT8726F  Super I/O chip w/LPC interface
  31  *            IT8728F  Super I/O chip w/LPC interface
  32  *            IT8732F  Super I/O chip w/LPC interface
  33  *            IT8758E  Super I/O chip w/LPC interface
  34  *            IT8771E  Super I/O chip w/LPC interface
  35  *            IT8772E  Super I/O chip w/LPC interface
  36  *            IT8781F  Super I/O chip w/LPC interface
  37  *            IT8782F  Super I/O chip w/LPC interface
  38  *            IT8783E/F Super I/O chip w/LPC interface
  39  *            IT8786E  Super I/O chip w/LPC interface
  40  *            IT8790E  Super I/O chip w/LPC interface
  41  *            IT8792E  Super I/O chip w/LPC interface
  42  *            Sis950   A clone of the IT8705F
  43  *
  44  *  Copyright (C) 2001 Chris Gauthron
  45  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  46  *
  47  *  This program is free software; you can redistribute it and/or modify
  48  *  it under the terms of the GNU General Public License as published by
  49  *  the Free Software Foundation; either version 2 of the License, or
  50  *  (at your option) any later version.
  51  *
  52  *  This program is distributed in the hope that it will be useful,
  53  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  54  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  55  *  GNU General Public License for more details.
  56  */
  57
  58 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  59
  60 #include <linux/bitops.h>
  61 #include <linux/module.h>
  62 #include <linux/init.h>
  63 #include <linux/slab.h>
  64 #include <linux/jiffies.h>
  65 #include <linux/platform_device.h>
  66 #include <linux/hwmon.h>
  67 #include <linux/hwmon-sysfs.h>
  68 #include <linux/hwmon-vid.h>
  69 #include <linux/err.h>
  70 #include <linux/mutex.h>
  71 #include <linux/sysfs.h>
  72 #include <linux/string.h>
  73 #include <linux/dmi.h>
  74 #include <linux/acpi.h>
  75 #include <linux/io.h>
  76 #include "compat.h"
  77
  78 #define DRVNAME "it87"
  79
  80 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  81              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  82              it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
  83              it8655, it8665, it8686 };
  84
  85 static unsigned short force_id;
  86 module_param(force_id, ushort, 0);
  87 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  88
  89 static bool ignore_resource_conflict;
  90 module_param(ignore_resource_conflict, bool, 0);
  91 MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
  92
  93 static struct platform_device *it87_pdev[2];
  94
  95 #define REG_2E  0x2e    /* The register to read/write */
  96 #define REG_4E  0x4e    /* Secondary register to read/write */
  97
  98 #define DEV     0x07    /* Register: Logical device select */
  99 #define PME     0x04    /* The device with the fan registers in it */
 100
 101 /* The device with the IT8718F/IT8720F VID value in it */
 102 #define GPIO    0x07
 103
 104 #define DEVID   0x20    /* Register: Device ID */
 105 #define DEVREV  0x22    /* Register: Device Revision */
 106
 107 static inline void __superio_enter(int ioreg)
 108 {
 109         outb(0x87, ioreg);
 110         outb(0x01, ioreg);
 111         outb(0x55, ioreg);
 112         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 113 }
 114
 115 static inline int superio_inb(int ioreg, int reg)
 116 {
 117         int val;
 118
 119         outb(reg, ioreg);
 120         val = inb(ioreg + 1);
 121
 122         return val;
 123 }
 124
 125 static inline void superio_outb(int ioreg, int reg, int val)
 126 {
 127         outb(reg, ioreg);
 128         outb(val, ioreg + 1);
 129 }
 130
 131 static int superio_inw(int ioreg, int reg)
 132 {
 133         return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
 134 }
 135
 136 static inline void superio_select(int ioreg, int ldn)
 137 {
 138         outb(DEV, ioreg);
 139         outb(ldn, ioreg + 1);
 140 }
 141
 142 static inline int superio_enter(int ioreg)
 143 {
 144         /*
 145          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 146          */
 147         if (!request_muxed_region(ioreg, 2, DRVNAME))
 148                 goto error;
 149
 150         __superio_enter(ioreg);
 151         return 0;
 152
 153 error:
 154         return -EBUSY;
 155 }
 156
 157 static inline void superio_exit(int ioreg, bool doexit)
 158 {
 159         if (doexit) {
 160                 outb(0x02, ioreg);
 161                 outb(0x02, ioreg + 1);
 162         }
 163         release_region(ioreg, 2);
 164 }
 165
 166 /* Logical device 4 registers */
 167 #define IT8712F_DEVID 0x8712
 168 #define IT8705F_DEVID 0x8705
 169 #define IT8716F_DEVID 0x8716
 170 #define IT8718F_DEVID 0x8718
 171 #define IT8720F_DEVID 0x8720
 172 #define IT8721F_DEVID 0x8721
 173 #define IT8726F_DEVID 0x8726
 174 #define IT8728F_DEVID 0x8728
 175 #define IT8732F_DEVID 0x8732
 176 #define IT8792E_DEVID 0x8733
 177 #define IT8771E_DEVID 0x8771
 178 #define IT8772E_DEVID 0x8772
 179 #define IT8781F_DEVID 0x8781
 180 #define IT8782F_DEVID 0x8782
 181 #define IT8783E_DEVID 0x8783
 182 #define IT8786E_DEVID 0x8786
 183 #define IT8790E_DEVID 0x8790
 184 #define IT8603E_DEVID 0x8603
 185 #define IT8607E_DEVID 0x8607
 186 #define IT8613E_DEVID 0x8613
 187 #define IT8620E_DEVID 0x8620
 188 #define IT8622E_DEVID 0x8622
 189 #define IT8623E_DEVID 0x8623
 190 #define IT8625E_DEVID 0x8625
 191 #define IT8628E_DEVID 0x8628
 192 #define IT8655E_DEVID 0x8655
 193 #define IT8665E_DEVID 0x8665
 194 #define IT8686E_DEVID 0x8686
 195 #define IT87_ACT_REG  0x30
 196 #define IT87_BASE_REG 0x60
 197
 198 /* Logical device 7 registers (IT8712F and later) */
 199 #define IT87_SIO_GPIO1_REG      0x25
 200 #define IT87_SIO_GPIO2_REG      0x26
 201 #define IT87_SIO_GPIO3_REG      0x27
 202 #define IT87_SIO_GPIO4_REG      0x28
 203 #define IT87_SIO_GPIO5_REG      0x29
 204 #define IT87_SIO_GPIO9_REG      0xd3
 205 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 206 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 207 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 208 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 209 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 210 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 211
 212 /* Update battery voltage after every reading if true */
 213 static bool update_vbat;
 214
 215 /* Not all BIOSes properly configure the PWM registers */
 216 static bool fix_pwm_polarity;
 217
 218 /* Many IT87 constants specified below */
 219
 220 /* Length of ISA address segment */
 221 #define IT87_EXTENT 8
 222
 223 /* Length of ISA address segment for Environmental Controller */
 224 #define IT87_EC_EXTENT 2
 225
 226 /* Offset of EC registers from ISA base address */
 227 #define IT87_EC_OFFSET 5
 228
 229 /* Where are the ISA address/data registers relative to the EC base address */
 230 #define IT87_ADDR_REG_OFFSET 0
 231 #define IT87_DATA_REG_OFFSET 1
 232
 233 /*----- The IT87 registers -----*/
 234
 235 #define IT87_REG_CONFIG        0x00
 236
 237 #define IT87_REG_ALARM1        0x01
 238 #define IT87_REG_ALARM2        0x02
 239 #define IT87_REG_ALARM3        0x03
 240
 241 #define IT87_REG_BANK           0x06
 242
 243 /*
 244  * The IT8718F and IT8720F have the VID value in a different register, in
 245  * Super-I/O configuration space.
 246  */
 247 #define IT87_REG_VID           0x0a
 248 /*
 249  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 250  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 251  * mode.
 252  */
 253 #define IT87_REG_FAN_DIV       0x0b
 254 #define IT87_REG_FAN_16BIT     0x0c
 255
 256 /*
 257  * Monitors:
 258  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 259  * - up to 6 temp (1 to 6)
 260  * - up to 6 fan (1 to 6)
 261  */
 262
 263 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 264 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 265 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 266 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 267
 268 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 269 static const u8 IT87_REG_FAN_MIN_8665[] =
 270                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 271 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 272 static const u8 IT87_REG_FANX_MIN_8665[] =
 273                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 274
 275 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
 276
 277 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
 278
 279 #define IT87_REG_FAN_MAIN_CTRL 0x13
 280 #define IT87_REG_FAN_CTL       0x14
 281
 282 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 283 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 284
 285 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 286
 287 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 288                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 289
 290 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 291
 292 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 293 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 294
 295 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 296 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 297
 298 static const u8 IT87_REG_TEMP_HIGH_8686[] =
 299                                         { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
 300 static const u8 IT87_REG_TEMP_LOW_8686[] =
 301                                         { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
 302
 303 #define IT87_REG_VIN_ENABLE    0x50
 304 #define IT87_REG_TEMP_ENABLE   0x51
 305 #define IT87_REG_TEMP_EXTRA    0x55
 306 #define IT87_REG_BEEP_ENABLE   0x5c
 307
 308 #define IT87_REG_CHIPID        0x58
 309
 310 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 311
 312 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 313 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 314
 315 #define IT87_REG_TEMP456_ENABLE 0x77
 316
 317 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
 318 #define IT87_REG_TEMP_SRC2      0x23d
 319
 320 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 321 #define NUM_VIN_LIMIT           8
 322 #define NUM_TEMP                6
 323 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 324 #define NUM_FAN_DIV             3
 325 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 326 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 327
 328 struct it87_devices {
 329         const char *name;
 330         const char * const suffix;
 331         u32 features;
 332         u8 num_temp_limit;
 333         u8 num_temp_offset;
 334         u8 num_temp_map;        /* Number of temperature sources for pwm */
 335         u8 peci_mask;
 336         u8 old_peci_mask;
 337 };
 338
 339 #define FEAT_12MV_ADC           BIT(0)
 340 #define FEAT_NEWER_AUTOPWM      BIT(1)
 341 #define FEAT_OLD_AUTOPWM        BIT(2)
 342 #define FEAT_16BIT_FANS         BIT(3)
 343 #define FEAT_TEMP_PECI          BIT(5)
 344 #define FEAT_TEMP_OLD_PECI      BIT(6)
 345 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 346 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 347 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 348 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 349 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 350 #define FEAT_10_9MV_ADC         BIT(12)
 351 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 352 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 353 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 354 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 355 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 356 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 357 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 358 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 359 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 360 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 361 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 362 #define FEAT_11MV_ADC           BIT(24)
 363 #define FEAT_NEW_TEMPMAP        BIT(25) /* new temp input selection */
 364
 365 static const struct it87_devices it87_devices[] = {
 366         [it87] = {
 367                 .name = "it87",
 368                 .suffix = "F",
 369                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 370                                                 /* may need to overwrite */
 371                 .num_temp_limit = 3,
 372                 .num_temp_offset = 0,
 373                 .num_temp_map = 3,
 374         },
 375         [it8712] = {
 376                 .name = "it8712",
 377                 .suffix = "F",
 378                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 379                                                 /* may need to overwrite */
 380                 .num_temp_limit = 3,
 381                 .num_temp_offset = 0,
 382                 .num_temp_map = 3,
 383         },
 384         [it8716] = {
 385                 .name = "it8716",
 386                 .suffix = "F",
 387                 .features = FEAT_16BIT_FANS | FEAT_VID
 388                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 389                   | FEAT_FANCTL_ONOFF,
 390                 .num_temp_limit = 3,
 391                 .num_temp_offset = 3,
 392                 .num_temp_map = 3,
 393         },
 394         [it8718] = {
 395                 .name = "it8718",
 396                 .suffix = "F",
 397                 .features = FEAT_16BIT_FANS | FEAT_VID
 398                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 399                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 400                 .num_temp_limit = 3,
 401                 .num_temp_offset = 3,
 402                 .num_temp_map = 3,
 403                 .old_peci_mask = 0x4,
 404         },
 405         [it8720] = {
 406                 .name = "it8720",
 407                 .suffix = "F",
 408                 .features = FEAT_16BIT_FANS | FEAT_VID
 409                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 410                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 411                 .num_temp_limit = 3,
 412                 .num_temp_offset = 3,
 413                 .num_temp_map = 3,
 414                 .old_peci_mask = 0x4,
 415         },
 416         [it8721] = {
 417                 .name = "it8721",
 418                 .suffix = "F",
 419                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 420                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 421                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 422                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 423                 .num_temp_limit = 3,
 424                 .num_temp_offset = 3,
 425                 .num_temp_map = 3,
 426                 .peci_mask = 0x05,
 427                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 428         },
 429         [it8728] = {
 430                 .name = "it8728",
 431                 .suffix = "F",
 432                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 433                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 434                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 435                   | FEAT_FANCTL_ONOFF,
 436                 .num_temp_limit = 6,
 437                 .num_temp_offset = 3,
 438                 .num_temp_map = 3,
 439                 .peci_mask = 0x07,
 440         },
 441         [it8732] = {
 442                 .name = "it8732",
 443                 .suffix = "F",
 444                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 445                   | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 446                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 447                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 448                 .num_temp_limit = 3,
 449                 .num_temp_offset = 3,
 450                 .num_temp_map = 3,
 451                 .peci_mask = 0x07,
 452                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 453         },
 454         [it8771] = {
 455                 .name = "it8771",
 456                 .suffix = "E",
 457                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 458                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 459                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 460                                 /* PECI: guesswork */
 461                                 /* 12mV ADC (OHM) */
 462                                 /* 16 bit fans (OHM) */
 463                                 /* three fans, always 16 bit (guesswork) */
 464                 .num_temp_limit = 3,
 465                 .num_temp_offset = 3,
 466                 .num_temp_map = 3,
 467                 .peci_mask = 0x07,
 468         },
 469         [it8772] = {
 470                 .name = "it8772",
 471                 .suffix = "E",
 472                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 473                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 474                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 475                                 /* PECI (coreboot) */
 476                                 /* 12mV ADC (HWSensors4, OHM) */
 477                                 /* 16 bit fans (HWSensors4, OHM) */
 478                                 /* three fans, always 16 bit (datasheet) */
 479                 .num_temp_limit = 3,
 480                 .num_temp_offset = 3,
 481                 .num_temp_map = 3,
 482                 .peci_mask = 0x07,
 483         },
 484         [it8781] = {
 485                 .name = "it8781",
 486                 .suffix = "F",
 487                 .features = FEAT_16BIT_FANS
 488                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 489                   | FEAT_FANCTL_ONOFF,
 490                 .num_temp_limit = 3,
 491                 .num_temp_offset = 3,
 492                 .num_temp_map = 3,
 493                 .old_peci_mask = 0x4,
 494         },
 495         [it8782] = {
 496                 .name = "it8782",
 497                 .suffix = "F",
 498                 .features = FEAT_16BIT_FANS
 499                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 500                   | FEAT_FANCTL_ONOFF,
 501                 .num_temp_limit = 3,
 502                 .num_temp_offset = 3,
 503                 .num_temp_map = 3,
 504                 .old_peci_mask = 0x4,
 505         },
 506         [it8783] = {
 507                 .name = "it8783",
 508                 .suffix = "E/F",
 509                 .features = FEAT_16BIT_FANS
 510                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 511                   | FEAT_FANCTL_ONOFF,
 512                 .num_temp_limit = 3,
 513                 .num_temp_offset = 3,
 514                 .num_temp_map = 3,
 515                 .old_peci_mask = 0x4,
 516         },
 517         [it8786] = {
 518                 .name = "it8786",
 519                 .suffix = "E",
 520                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 521                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 522                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 523                 .num_temp_limit = 3,
 524                 .num_temp_offset = 3,
 525                 .num_temp_map = 3,
 526                 .peci_mask = 0x07,
 527         },
 528         [it8790] = {
 529                 .name = "it8790",
 530                 .suffix = "E",
 531                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 532                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 533                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 534                 .num_temp_limit = 3,
 535                 .num_temp_offset = 3,
 536                 .num_temp_map = 3,
 537                 .peci_mask = 0x07,
 538         },
 539         [it8792] = {
 540                 .name = "it8792",
 541                 .suffix = "E",
 542                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 543                   | FEAT_16BIT_FANS | FEAT_TEMP_PECI
 544                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 545                 .num_temp_limit = 3,
 546                 .num_temp_offset = 3,
 547                 .num_temp_map = 3,
 548                 .peci_mask = 0x07,
 549         },
 550         [it8603] = {
 551                 .name = "it8603",
 552                 .suffix = "E",
 553                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 554                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 555                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 556                 .num_temp_limit = 3,
 557                 .num_temp_offset = 3,
 558                 .num_temp_map = 4,
 559                 .peci_mask = 0x07,
 560         },
 561         [it8607] = {
 562                 .name = "it8607",
 563                 .suffix = "E",
 564                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 565                   | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_NEW_TEMPMAP
 566                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 567                   | FEAT_FANCTL_ONOFF,
 568                 .num_temp_limit = 3,
 569                 .num_temp_offset = 3,
 570                 .num_temp_map = 6,
 571                 .peci_mask = 0x07,
 572         },
 573         [it8613] = {
 574                 .name = "it8613",
 575                 .suffix = "E",
 576                 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
 577                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 578                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 579                   | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
 580                 .num_temp_limit = 6,
 581                 .num_temp_offset = 6,
 582                 .num_temp_map = 6,
 583                 .peci_mask = 0x07,
 584         },
 585         [it8620] = {
 586                 .name = "it8620",
 587                 .suffix = "E",
 588                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 589                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 590                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 591                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 592                   | FEAT_FANCTL_ONOFF,
 593                 .num_temp_limit = 3,
 594                 .num_temp_offset = 3,
 595                 .num_temp_map = 3,
 596                 .peci_mask = 0x07,
 597         },
 598         [it8622] = {
 599                 .name = "it8622",
 600                 .suffix = "E",
 601                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 602                   | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 603                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 604                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 605                 .num_temp_limit = 3,
 606                 .num_temp_offset = 3,
 607                 .num_temp_map = 4,
 608                 .peci_mask = 0x07,
 609         },
 610         [it8625] = {
 611                 .name = "it8625",
 612                 .suffix = "E",
 613                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 614                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
 615                   | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 616                   | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
 617                 .num_temp_limit = 6,
 618                 .num_temp_offset = 6,
 619                 .num_temp_map = 6,
 620         },
 621         [it8628] = {
 622                 .name = "it8628",
 623                 .suffix = "E",
 624                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 625                   | FEAT_TEMP_PECI | FEAT_SIX_FANS
 626                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 627                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 628                   | FEAT_FANCTL_ONOFF,
 629                 .num_temp_limit = 6,
 630                 .num_temp_offset = 3,
 631                 .num_temp_map = 3,
 632                 .peci_mask = 0x07,
 633         },
 634         [it8655] = {
 635                 .name = "it8655",
 636                 .suffix = "E",
 637                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 638                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 639                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 640                 .num_temp_limit = 6,
 641                 .num_temp_offset = 6,
 642                 .num_temp_map = 6,
 643         },
 644         [it8665] = {
 645                 .name = "it8665",
 646                 .suffix = "E",
 647                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 648                   | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING
 649                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 650                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 651                 .num_temp_limit = 6,
 652                 .num_temp_offset = 6,
 653                 .num_temp_map = 6,
 654         },
 655         [it8686] = {
 656                 .name = "it8686",
 657                 .suffix = "E",
 658                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 659                   | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
 660                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 661                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 662                 .num_temp_limit = 6,
 663                 .num_temp_offset = 6,
 664                 .num_temp_map = 7,
 665         },
 666 };
 667
 668 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 669 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 670 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 671 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 672 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 673 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 674                                  ((data)->peci_mask & BIT(nr)))
 675 #define has_temp_old_peci(data, nr) \
 676                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 677                                  ((data)->old_peci_mask & BIT(nr)))
 678 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 679 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 680                                                      FEAT_SIX_FANS))
 681 #define has_vid(data)           ((data)->features & FEAT_VID)
 682 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 683 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 684 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 685 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 686                                                      | FEAT_SIX_PWM))
 687 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 688 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 689 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 690 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 691 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 692                                                      FEAT_FIVE_FANS | \
 693                                                      FEAT_SIX_FANS))
 694 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 695                                                      FEAT_FIVE_PWM \
 696                                                      | FEAT_SIX_PWM))
 697 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 698 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 699 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 700 #define has_11mv_adc(data)      ((data)->features & FEAT_11MV_ADC)
 701 #define has_new_tempmap(data)   ((data)->features & FEAT_NEW_TEMPMAP)
 702
 703 struct it87_sio_data {
 704         enum chips type;
 705         /* Values read from Super-I/O config space */
 706         u8 revision;
 707         u8 vid_value;
 708         u8 beep_pin;
 709         u8 internal;    /* Internal sensors can be labeled */
 710         /* Features skipped based on config or DMI */
 711         u16 skip_in;
 712         u8 skip_vid;
 713         u8 skip_fan;
 714         u8 skip_pwm;
 715         u8 skip_temp;
 716 };
 717
 718 /*
 719  * For each registered chip, we need to keep some data in memory.
 720  * The structure is dynamically allocated.
 721  */
 722 struct it87_data {
 723         const struct attribute_group *groups[7];
 724         enum chips type;
 725         u32 features;
 726         u8 bank;
 727         u8 peci_mask;
 728         u8 old_peci_mask;
 729
 730         const u8 *REG_FAN;
 731         const u8 *REG_FANX;
 732         const u8 *REG_FAN_MIN;
 733         const u8 *REG_FANX_MIN;
 734
 735         const u8 *REG_PWM;
 736
 737         const u8 *REG_TEMP_OFFSET;
 738         const u8 *REG_TEMP_LOW;
 739         const u8 *REG_TEMP_HIGH;
 740
 741         unsigned short addr;
 742         const char *name;
 743         struct mutex update_lock;
 744         char valid;             /* !=0 if following fields are valid */
 745         unsigned long last_updated;     /* In jiffies */
 746
 747         u16 in_scaled;          /* Internal voltage sensors are scaled */
 748         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 749         u16 has_in;             /* Bitfield, voltage sensors enabled */
 750         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 751         u8 has_fan;             /* Bitfield, fans enabled */
 752         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 753         u8 has_temp;            /* Bitfield, temp sensors enabled */
 754         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 755         u8 num_temp_limit;      /* Number of temperature limit registers */
 756         u8 num_temp_offset;     /* Number of temperature offset registers */
 757         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 758         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 759         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 760         bool has_vid;           /* True if VID supported */
 761         u8 vid;                 /* Register encoding, combined */
 762         u8 vrm;
 763         u32 alarms;             /* Register encoding, combined */
 764         bool has_beep;          /* true if beep supported */
 765         u8 beeps;               /* Register encoding */
 766         u8 fan_main_ctrl;       /* Register value */
 767         u8 fan_ctl;             /* Register value */
 768
 769         /*
 770          * The following 3 arrays correspond to the same registers up to
 771          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 772          * 7, and we want to preserve settings on mode changes, so we have
 773          * to track all values separately.
 774          * Starting with the IT8721F, the manual PWM duty cycles are stored
 775          * in separate registers (8-bit values), so the separate tracking
 776          * is no longer needed, but it is still done to keep the driver
 777          * simple.
 778          */
 779         u8 has_pwm;             /* Bitfield, pwm control enabled */
 780         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 781         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 782         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 783         u8 pwm_temp_map_mask;   /* 0x03 for old, 0x07 for new temp map */
 784         u8 pwm_temp_map_shift;  /* 0 for old, 3 for new temp map */
 785         u8 pwm_num_temp_map;    /* from config data, 3..7 depending on chip */
 786
 787         /* Automatic fan speed control registers */
 788         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 789         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 790 };
 791
 792 static int adc_lsb(const struct it87_data *data, int nr)
 793 {
 794         int lsb;
 795
 796         if (has_12mv_adc(data))
 797                 lsb = 120;
 798         else if (has_10_9mv_adc(data))
 799                 lsb = 109;
 800         else if (has_11mv_adc(data))
 801                 lsb = 110;
 802         else
 803                 lsb = 160;
 804         if (data->in_scaled & BIT(nr))
 805                 lsb <<= 1;
 806         return lsb;
 807 }
 808
 809 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 810 {
 811         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 812         return clamp_val(val, 0, 255);
 813 }
 814
 815 static int in_from_reg(const struct it87_data *data, int nr, int val)
 816 {
 817         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 818 }
 819
 820 static inline u8 FAN_TO_REG(long rpm, int div)
 821 {
 822         if (rpm == 0)
 823                 return 255;
 824         rpm = clamp_val(rpm, 1, 1000000);
 825         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 826 }
 827
 828 static inline u16 FAN16_TO_REG(long rpm)
 829 {
 830         if (rpm == 0)
 831                 return 0xffff;
 832         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 833 }
 834
 835 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 836                                 1350000 / ((val) * (div)))
 837 /* The divider is fixed to 2 in 16-bit mode */
 838 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 839                              1350000 / ((val) * 2))
 840
 841 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 842                                     ((val) + 500) / 1000), -128, 127))
 843 #define TEMP_FROM_REG(val) ((val) * 1000)
 844
 845 static u8 pwm_to_reg(const struct it87_data *data, long val)
 846 {
 847         if (has_newer_autopwm(data))
 848                 return val;
 849         else
 850                 return val >> 1;
 851 }
 852
 853 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 854 {
 855         if (has_newer_autopwm(data))
 856                 return reg;
 857         else
 858                 return (reg & 0x7f) << 1;
 859 }
 860
 861 static int DIV_TO_REG(int val)
 862 {
 863         int answer = 0;
 864
 865         while (answer < 7 && (val >>= 1))
 866                 answer++;
 867         return answer;
 868 }
 869
 870 #define DIV_FROM_REG(val) BIT(val)
 871
 872 static u8 temp_map_from_reg(const struct it87_data *data, u8 reg)
 873 {
 874         u8 map;
 875
 876         map  = (reg >> data->pwm_temp_map_shift) & data->pwm_temp_map_mask;
 877         if (map >= data->pwm_num_temp_map)      /* map is 0-based */
 878                 map = 0;
 879
 880         return map;
 881 }
 882
 883 static u8 temp_map_to_reg(const struct it87_data *data, int nr, u8 map)
 884 {
 885         u8 ctrl = data->pwm_ctrl[nr];
 886
 887         return (ctrl & ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift)) |
 888                (map << data->pwm_temp_map_shift);
 889 }
 890
 891 /*
 892  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 893  * depending on the chip type, to calculate the actual PWM frequency.
 894  *
 895  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 896  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 897  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 898  * sometimes just one. It is unknown if this is a datasheet error or real,
 899  * so this is ignored for now.
 900  */
 901 static const unsigned int pwm_freq[8] = {
 902         48000000,
 903         24000000,
 904         12000000,
 905         8000000,
 906         6000000,
 907         3000000,
 908         1500000,
 909         750000,
 910 };
 911
 912 static int _it87_read_value(struct it87_data *data, u8 reg)
 913 {
 914         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 915         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 916 }
 917
 918 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 919 {
 920         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 921         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 922 }
 923
 924 static void it87_set_bank(struct it87_data *data, u8 bank)
 925 {
 926         if (has_bank_sel(data) && bank != data->bank) {
 927                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 928
 929                 breg &= 0x1f;
 930                 breg |= (bank << 5);
 931                 data->bank = bank;
 932                 _it87_write_value(data, IT87_REG_BANK, breg);
 933         }
 934 }
 935
 936 /*
 937  * Must be called with data->update_lock held, except during initialization.
 938  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 939  * would slow down the IT87 access and should not be necessary.
 940  */
 941 static int it87_read_value(struct it87_data *data, u16 reg)
 942 {
 943         it87_set_bank(data, reg >> 8);
 944         return _it87_read_value(data, reg & 0xff);
 945 }
 946
 947 /*
 948  * Must be called with data->update_lock held, except during initialization.
 949  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 950  * would slow down the IT87 access and should not be necessary.
 951  */
 952 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 953 {
 954         it87_set_bank(data, reg >> 8);
 955         _it87_write_value(data, reg & 0xff, value);
 956 }
 957
 958 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 959 {
 960         u8 ctrl;
 961
 962         ctrl = it87_read_value(data, data->REG_PWM[nr]);
 963         data->pwm_ctrl[nr] = ctrl;
 964         if (has_newer_autopwm(data)) {
 965                 data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
 966                 data->pwm_duty[nr] = it87_read_value(data,
 967                                                      IT87_REG_PWM_DUTY[nr]);
 968         } else {
 969                 if (ctrl & 0x80)        /* Automatic mode */
 970                         data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl);
 971                 else                            /* Manual mode */
 972                         data->pwm_duty[nr] = ctrl & 0x7f;
 973         }
 974
 975         if (has_old_autopwm(data)) {
 976                 int i;
 977
 978                 for (i = 0; i < 5 ; i++)
 979                         data->auto_temp[nr][i] = it87_read_value(data,
 980                                                 IT87_REG_AUTO_TEMP(nr, i));
 981                 for (i = 0; i < 3 ; i++)
 982                         data->auto_pwm[nr][i] = it87_read_value(data,
 983                                                 IT87_REG_AUTO_PWM(nr, i));
 984         } else if (has_newer_autopwm(data)) {
 985                 int i;
 986
 987                 /*
 988                  * 0: temperature hysteresis (base + 5)
 989                  * 1: fan off temperature (base + 0)
 990                  * 2: fan start temperature (base + 1)
 991                  * 3: fan max temperature (base + 2)
 992                  */
 993                 data->auto_temp[nr][0] =
 994                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 995
 996                 for (i = 0; i < 3 ; i++)
 997                         data->auto_temp[nr][i + 1] =
 998                                 it87_read_value(data,
 999                                                 IT87_REG_AUTO_TEMP(nr, i));
1000                 /*
1001                  * 0: start pwm value (base + 3)
1002                  * 1: pwm slope (base + 4, 1/8th pwm)
1003                  */
1004                 data->auto_pwm[nr][0] =
1005                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
1006                 data->auto_pwm[nr][1] =
1007                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
1008         }
1009 }
1010
1011 static struct it87_data *it87_update_device(struct device *dev)
1012 {
1013         struct it87_data *data = dev_get_drvdata(dev);
1014         int i;
1015
1016         mutex_lock(&data->update_lock);
1017
1018         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
1019             !data->valid) {
1020                 if (update_vbat) {
1021                         /*
1022                          * Cleared after each update, so reenable.  Value
1023                          * returned by this read will be previous value
1024                          */
1025                         it87_write_value(data, IT87_REG_CONFIG,
1026                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1027                 }
1028                 for (i = 0; i < NUM_VIN; i++) {
1029                         if (!(data->has_in & BIT(i)))
1030                                 continue;
1031
1032                         data->in[i][0] =
1033                                 it87_read_value(data, IT87_REG_VIN[i]);
1034
1035                         /* VBAT and AVCC don't have limit registers */
1036                         if (i >= NUM_VIN_LIMIT)
1037                                 continue;
1038
1039                         data->in[i][1] =
1040                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
1041                         data->in[i][2] =
1042                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
1043                 }
1044
1045                 for (i = 0; i < NUM_FAN; i++) {
1046                         /* Skip disabled fans */
1047                         if (!(data->has_fan & BIT(i)))
1048                                 continue;
1049
1050                         data->fan[i][1] =
1051                                 it87_read_value(data, data->REG_FAN_MIN[i]);
1052                         data->fan[i][0] = it87_read_value(data,
1053                                        data->REG_FAN[i]);
1054                         /* Add high byte if in 16-bit mode */
1055                         if (has_16bit_fans(data)) {
1056                                 data->fan[i][0] |= it87_read_value(data,
1057                                                 data->REG_FANX[i]) << 8;
1058                                 data->fan[i][1] |= it87_read_value(data,
1059                                                 data->REG_FANX_MIN[i]) << 8;
1060                         }
1061                 }
1062                 for (i = 0; i < NUM_TEMP; i++) {
1063                         if (!(data->has_temp & BIT(i)))
1064                                 continue;
1065                         data->temp[i][0] =
1066                                 it87_read_value(data, IT87_REG_TEMP(i));
1067
1068                         if (i >= data->num_temp_limit)
1069                                 continue;
1070
1071                         if (i < data->num_temp_offset)
1072                                 data->temp[i][3] =
1073                                   it87_read_value(data,
1074                                                   data->REG_TEMP_OFFSET[i]);
1075
1076                         data->temp[i][1] =
1077                                 it87_read_value(data, data->REG_TEMP_LOW[i]);
1078                         data->temp[i][2] =
1079                                 it87_read_value(data, data->REG_TEMP_HIGH[i]);
1080                 }
1081
1082                 /* Newer chips don't have clock dividers */
1083                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1084                         i = it87_read_value(data, IT87_REG_FAN_DIV);
1085                         data->fan_div[0] = i & 0x07;
1086                         data->fan_div[1] = (i >> 3) & 0x07;
1087                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
1088                 }
1089
1090                 data->alarms =
1091                         it87_read_value(data, IT87_REG_ALARM1) |
1092                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1093                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
1094                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1095
1096                 data->fan_main_ctrl = it87_read_value(data,
1097                                 IT87_REG_FAN_MAIN_CTRL);
1098                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1099                 for (i = 0; i < NUM_PWM; i++) {
1100                         if (!(data->has_pwm & BIT(i)))
1101                                 continue;
1102                         it87_update_pwm_ctrl(data, i);
1103                 }
1104
1105                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1106                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1107                 /*
1108                  * The IT8705F does not have VID capability.
1109                  * The IT8718F and later don't use IT87_REG_VID for the
1110                  * same purpose.
1111                  */
1112                 if (data->type == it8712 || data->type == it8716) {
1113                         data->vid = it87_read_value(data, IT87_REG_VID);
1114                         /*
1115                          * The older IT8712F revisions had only 5 VID pins,
1116                          * but we assume it is always safe to read 6 bits.
1117                          */
1118                         data->vid &= 0x3f;
1119                 }
1120                 data->last_updated = jiffies;
1121                 data->valid = 1;
1122         }
1123
1124         mutex_unlock(&data->update_lock);
1125
1126         return data;
1127 }
1128
1129 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1130                        char *buf)
1131 {
1132         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1133         struct it87_data *data = it87_update_device(dev);
1134         int index = sattr->index;
1135         int nr = sattr->nr;
1136
1137         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1138 }
1139
1140 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1141                       const char *buf, size_t count)
1142 {
1143         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1144         struct it87_data *data = dev_get_drvdata(dev);
1145         int index = sattr->index;
1146         int nr = sattr->nr;
1147         unsigned long val;
1148
1149         if (kstrtoul(buf, 10, &val) < 0)
1150                 return -EINVAL;
1151
1152         mutex_lock(&data->update_lock);
1153         data->in[nr][index] = in_to_reg(data, nr, val);
1154         it87_write_value(data,
1155                          index == 1 ? IT87_REG_VIN_MIN(nr)
1156                                     : IT87_REG_VIN_MAX(nr),
1157                          data->in[nr][index]);
1158         mutex_unlock(&data->update_lock);
1159         return count;
1160 }
1161
1162 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1163 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1164                             0, 1);
1165 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1166                             0, 2);
1167
1168 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1169 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1170                             1, 1);
1171 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1172                             1, 2);
1173
1174 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1175 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1176                             2, 1);
1177 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1178                             2, 2);
1179
1180 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1181 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1182                             3, 1);
1183 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1184                             3, 2);
1185
1186 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1187 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1188                             4, 1);
1189 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1190                             4, 2);
1191
1192 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1193 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1194                             5, 1);
1195 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1196                             5, 2);
1197
1198 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1199 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1200                             6, 1);
1201 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1202                             6, 2);
1203
1204 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1205 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1206                             7, 1);
1207 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1208                             7, 2);
1209
1210 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1211 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1212 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1213 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1214 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1215
1216 /* Up to 6 temperatures */
1217 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1218                          char *buf)
1219 {
1220         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1221         int nr = sattr->nr;
1222         int index = sattr->index;
1223         struct it87_data *data = it87_update_device(dev);
1224
1225         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1226 }
1227
1228 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1229                         const char *buf, size_t count)
1230 {
1231         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1232         int nr = sattr->nr;
1233         int index = sattr->index;
1234         struct it87_data *data = dev_get_drvdata(dev);
1235         long val;
1236         u8 reg, regval;
1237
1238         if (kstrtol(buf, 10, &val) < 0)
1239                 return -EINVAL;
1240
1241         mutex_lock(&data->update_lock);
1242
1243         switch (index) {
1244         default:
1245         case 1:
1246                 reg = data->REG_TEMP_LOW[nr];
1247                 break;
1248         case 2:
1249                 reg = data->REG_TEMP_HIGH[nr];
1250                 break;
1251         case 3:
1252                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1253                 if (!(regval & 0x80)) {
1254                         regval |= 0x80;
1255                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1256                 }
1257                 data->valid = 0;
1258                 reg = data->REG_TEMP_OFFSET[nr];
1259                 break;
1260         }
1261
1262         data->temp[nr][index] = TEMP_TO_REG(val);
1263         it87_write_value(data, reg, data->temp[nr][index]);
1264         mutex_unlock(&data->update_lock);
1265         return count;
1266 }
1267
1268 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1269 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1270                             0, 1);
1271 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1272                             0, 2);
1273 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1274                             set_temp, 0, 3);
1275 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1276 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1277                             1, 1);
1278 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1279                             1, 2);
1280 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1281                             set_temp, 1, 3);
1282 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1283 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1284                             2, 1);
1285 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1286                             2, 2);
1287 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1288                             set_temp, 2, 3);
1289 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1290 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1291                             3, 1);
1292 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1293                             3, 2);
1294 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1295                             set_temp, 3, 3);
1296 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1297 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1298                             4, 1);
1299 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1300                             4, 2);
1301 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1302                             set_temp, 4, 3);
1303 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1304 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1305                             5, 1);
1306 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1307                             5, 2);
1308 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1309                             set_temp, 5, 3);
1310
1311 static const u8 temp_types_8686[NUM_TEMP][9] = {
1312         { 0, 8, 8, 8, 8, 8, 8, 8, 7 },
1313         { 0, 6, 8, 8, 6, 0, 0, 0, 7 },
1314         { 0, 6, 5, 8, 6, 0, 0, 0, 7 },
1315         { 4, 8, 8, 8, 8, 8, 8, 8, 7 },
1316         { 4, 6, 8, 8, 6, 0, 0, 0, 7 },
1317         { 4, 6, 5, 8, 6, 0, 0, 0, 7 },
1318 };
1319
1320 static int get_temp_type(struct it87_data *data, int index)
1321 {
1322         u8 reg, extra;
1323         int type = 0;
1324
1325         if (has_bank_sel(data)) {
1326                 int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
1327                 u8 src1, src2;
1328
1329                 src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
1330
1331                 switch (data->type) {
1332                 case it8686:
1333                         if (src1 < 9)
1334                                 type = temp_types_8686[index][src1];
1335                         break;
1336                 case it8625:
1337                         if (index < 3)
1338                                 break;
1339                 case it8655:
1340                 case it8665:
1341                         if (src1 < 3) {
1342                                 index = src1;
1343                                 break;
1344                         }
1345                         src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
1346                         switch(src1) {
1347                         case 3:
1348                                 type = (src2 & BIT(index)) ? 6 : 5;
1349                                 break;
1350                         case 4 ... 8:
1351                                 type = (src2 & BIT(index)) ? 4 : 6;
1352                                 break;
1353                         case 9:
1354                                 type = (src2 & BIT(index)) ? 5 : 0;
1355                                 break;
1356                         default:
1357                                 break;
1358                         }
1359                         return type;
1360                 default:
1361                         return 0;
1362                 }
1363         }
1364         if (type || index >= 3)
1365                 return type;
1366
1367         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1368         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1369
1370         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1371             (has_temp_old_peci(data, index) && (extra & 0x80)))
1372                 type = 6;               /* Intel PECI */
1373         if (reg & BIT(index))
1374                 type = 3;               /* thermal diode */
1375         else if (reg & BIT(index + 3))
1376                 type = 4;               /* thermistor */
1377
1378         return type;
1379 }
1380
1381 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1382                               char *buf)
1383 {
1384         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1385         struct it87_data *data = it87_update_device(dev);
1386         int type = get_temp_type(data, sensor_attr->index);
1387
1388         return sprintf(buf, "%d\n", type);
1389 }
1390
1391 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1392                              const char *buf, size_t count)
1393 {
1394         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1395         int nr = sensor_attr->index;
1396
1397         struct it87_data *data = dev_get_drvdata(dev);
1398         long val;
1399         u8 reg, extra;
1400
1401         if (kstrtol(buf, 10, &val) < 0)
1402                 return -EINVAL;
1403
1404         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1405         reg &= ~(1 << nr);
1406         reg &= ~(8 << nr);
1407         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1408                 reg &= 0x3f;
1409         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1410         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1411                 extra &= 0x7f;
1412         if (val == 2) { /* backwards compatibility */
1413                 dev_warn(dev,
1414                          "Sensor type 2 is deprecated, please use 4 instead\n");
1415                 val = 4;
1416         }
1417         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1418         if (val == 3)
1419                 reg |= 1 << nr;
1420         else if (val == 4)
1421                 reg |= 8 << nr;
1422         else if (has_temp_peci(data, nr) && val == 6)
1423                 reg |= (nr + 1) << 6;
1424         else if (has_temp_old_peci(data, nr) && val == 6)
1425                 extra |= 0x80;
1426         else if (val != 0)
1427                 return -EINVAL;
1428
1429         mutex_lock(&data->update_lock);
1430         data->sensor = reg;
1431         data->extra = extra;
1432         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1433         if (has_temp_old_peci(data, nr))
1434                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1435         data->valid = 0;        /* Force cache refresh */
1436         mutex_unlock(&data->update_lock);
1437         return count;
1438 }
1439
1440 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1441                           set_temp_type, 0);
1442 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1443                           set_temp_type, 1);
1444 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1445                           set_temp_type, 2);
1446 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1447                           set_temp_type, 3);
1448 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1449                           set_temp_type, 4);
1450 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1451                           set_temp_type, 5);
1452
1453 /* 6 Fans */
1454
1455 static int pwm_mode(const struct it87_data *data, int nr)
1456 {
1457         if (has_fanctl_onoff(data) && nr < 3 &&
1458             !(data->fan_main_ctrl & BIT(nr)))
1459                 return 0;                               /* Full speed */
1460         if (data->pwm_ctrl[nr] & 0x80)
1461                 return 2;                               /* Automatic mode */
1462         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1463             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1464                 return 0;                       /* Full speed */
1465
1466         return 1;                               /* Manual mode */
1467 }
1468
1469 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1470                         char *buf)
1471 {
1472         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1473         int nr = sattr->nr;
1474         int index = sattr->index;
1475         int speed;
1476         struct it87_data *data = it87_update_device(dev);
1477
1478         speed = has_16bit_fans(data) ?
1479                 FAN16_FROM_REG(data->fan[nr][index]) :
1480                 FAN_FROM_REG(data->fan[nr][index],
1481                              DIV_FROM_REG(data->fan_div[nr]));
1482         return sprintf(buf, "%d\n", speed);
1483 }
1484
1485 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1486                             char *buf)
1487 {
1488         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1489         struct it87_data *data = it87_update_device(dev);
1490         int nr = sensor_attr->index;
1491
1492         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1493 }
1494
1495 static ssize_t show_pwm_enable(struct device *dev,
1496                                struct device_attribute *attr, char *buf)
1497 {
1498         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1499         struct it87_data *data = it87_update_device(dev);
1500         int nr = sensor_attr->index;
1501
1502         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1503 }
1504
1505 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1506                         char *buf)
1507 {
1508         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1509         struct it87_data *data = it87_update_device(dev);
1510         int nr = sensor_attr->index;
1511
1512         return sprintf(buf, "%d\n",
1513                        pwm_from_reg(data, data->pwm_duty[nr]));
1514 }
1515
1516 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1517                              char *buf)
1518 {
1519         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1520         struct it87_data *data = it87_update_device(dev);
1521         int nr = sensor_attr->index;
1522         unsigned int freq;
1523         int index;
1524
1525         if (has_pwm_freq2(data) && nr == 1)
1526                 index = (data->extra >> 4) & 0x07;
1527         else
1528                 index = (data->fan_ctl >> 4) & 0x07;
1529
1530         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1531
1532         return sprintf(buf, "%u\n", freq);
1533 }
1534
1535 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1536                        const char *buf, size_t count)
1537 {
1538         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1539         int nr = sattr->nr;
1540         int index = sattr->index;
1541
1542         struct it87_data *data = dev_get_drvdata(dev);
1543         long val;
1544         u8 reg;
1545
1546         if (kstrtol(buf, 10, &val) < 0)
1547                 return -EINVAL;
1548
1549         mutex_lock(&data->update_lock);
1550
1551         if (has_16bit_fans(data)) {
1552                 data->fan[nr][index] = FAN16_TO_REG(val);
1553                 it87_write_value(data, data->REG_FAN_MIN[nr],
1554                                  data->fan[nr][index] & 0xff);
1555                 it87_write_value(data, data->REG_FANX_MIN[nr],
1556                                  data->fan[nr][index] >> 8);
1557         } else {
1558                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1559                 switch (nr) {
1560                 case 0:
1561                         data->fan_div[nr] = reg & 0x07;
1562                         break;
1563                 case 1:
1564                         data->fan_div[nr] = (reg >> 3) & 0x07;
1565                         break;
1566                 case 2:
1567                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1568                         break;
1569                 }
1570                 data->fan[nr][index] =
1571                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1572                 it87_write_value(data, data->REG_FAN_MIN[nr],
1573                                  data->fan[nr][index]);
1574         }
1575
1576         mutex_unlock(&data->update_lock);
1577         return count;
1578 }
1579
1580 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1581                            const char *buf, size_t count)
1582 {
1583         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1584         struct it87_data *data = dev_get_drvdata(dev);
1585         int nr = sensor_attr->index;
1586         unsigned long val;
1587         int min;
1588         u8 old;
1589
1590         if (kstrtoul(buf, 10, &val) < 0)
1591                 return -EINVAL;
1592
1593         mutex_lock(&data->update_lock);
1594         old = it87_read_value(data, IT87_REG_FAN_DIV);
1595
1596         /* Save fan min limit */
1597         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1598
1599         switch (nr) {
1600         case 0:
1601         case 1:
1602                 data->fan_div[nr] = DIV_TO_REG(val);
1603                 break;
1604         case 2:
1605                 if (val < 8)
1606                         data->fan_div[nr] = 1;
1607                 else
1608                         data->fan_div[nr] = 3;
1609         }
1610         val = old & 0x80;
1611         val |= (data->fan_div[0] & 0x07);
1612         val |= (data->fan_div[1] & 0x07) << 3;
1613         if (data->fan_div[2] == 3)
1614                 val |= 0x1 << 6;
1615         it87_write_value(data, IT87_REG_FAN_DIV, val);
1616
1617         /* Restore fan min limit */
1618         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1619         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1620
1621         mutex_unlock(&data->update_lock);
1622         return count;
1623 }
1624
1625 /* Returns 0 if OK, -EINVAL otherwise */
1626 static int check_trip_points(struct device *dev, int nr)
1627 {
1628         const struct it87_data *data = dev_get_drvdata(dev);
1629         int i, err = 0;
1630
1631         if (has_old_autopwm(data)) {
1632                 for (i = 0; i < 3; i++) {
1633                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1634                                 err = -EINVAL;
1635                 }
1636                 for (i = 0; i < 2; i++) {
1637                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1638                                 err = -EINVAL;
1639                 }
1640         } else if (has_newer_autopwm(data)) {
1641                 for (i = 1; i < 3; i++) {
1642                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1643                                 err = -EINVAL;
1644                 }
1645         }
1646
1647         if (err) {
1648                 dev_err(dev,
1649                         "Inconsistent trip points, not switching to automatic mode\n");
1650                 dev_err(dev, "Adjust the trip points and try again\n");
1651         }
1652         return err;
1653 }
1654
1655 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1656                               const char *buf, size_t count)
1657 {
1658         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1659         struct it87_data *data = dev_get_drvdata(dev);
1660         int nr = sensor_attr->index;
1661         long val;
1662
1663         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1664                 return -EINVAL;
1665
1666         /* Check trip points before switching to automatic mode */
1667         if (val == 2) {
1668                 if (check_trip_points(dev, nr) < 0)
1669                         return -EINVAL;
1670         }
1671
1672         mutex_lock(&data->update_lock);
1673         it87_update_pwm_ctrl(data, nr);
1674
1675         if (val == 0) {
1676                 if (nr < 3 && has_fanctl_onoff(data)) {
1677                         int tmp;
1678                         /* make sure the fan is on when in on/off mode */
1679                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1680                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1681                         /* set on/off mode */
1682                         data->fan_main_ctrl &= ~BIT(nr);
1683                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1684                                          data->fan_main_ctrl);
1685                 } else {
1686                         u8 ctrl;
1687
1688                         /* No on/off mode, set maximum pwm value */
1689                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1690                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1691                                          data->pwm_duty[nr]);
1692                         /* and set manual mode */
1693                         if (has_newer_autopwm(data)) {
1694                                 ctrl = temp_map_to_reg(data, nr,
1695                                                        data->pwm_temp_map[nr]);
1696                                 ctrl &= 0x7f;
1697                         } else {
1698                                 ctrl = data->pwm_duty[nr];
1699                         }
1700                         data->pwm_ctrl[nr] = ctrl;
1701                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1702                 }
1703         } else {
1704                 u8 ctrl;
1705
1706                 if (has_newer_autopwm(data)) {
1707                         ctrl = temp_map_to_reg(data, nr,
1708                                                data->pwm_temp_map[nr]);
1709                         if (val == 1)
1710                                 ctrl &= 0x7f;
1711                         else
1712                                 ctrl |= 0x80;
1713                 } else {
1714                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1715                 }
1716                 data->pwm_ctrl[nr] = ctrl;
1717                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1718
1719                 if (has_fanctl_onoff(data) && nr < 3) {
1720                         /* set SmartGuardian mode */
1721                         data->fan_main_ctrl |= BIT(nr);
1722                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1723                                          data->fan_main_ctrl);
1724                 }
1725         }
1726
1727         mutex_unlock(&data->update_lock);
1728         return count;
1729 }
1730
1731 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1732                        const char *buf, size_t count)
1733 {
1734         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1735         struct it87_data *data = dev_get_drvdata(dev);
1736         int nr = sensor_attr->index;
1737         long val;
1738
1739         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1740                 return -EINVAL;
1741
1742         mutex_lock(&data->update_lock);
1743         it87_update_pwm_ctrl(data, nr);
1744         if (has_newer_autopwm(data)) {
1745                 /*
1746                  * If we are in automatic mode, the PWM duty cycle register
1747                  * is read-only so we can't write the value.
1748                  */
1749                 if (data->pwm_ctrl[nr] & 0x80) {
1750                         mutex_unlock(&data->update_lock);
1751                         return -EBUSY;
1752                 }
1753                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1754                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1755                                  data->pwm_duty[nr]);
1756         } else {
1757                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1758                 /*
1759                  * If we are in manual mode, write the duty cycle immediately;
1760                  * otherwise, just store it for later use.
1761                  */
1762                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1763                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1764                         it87_write_value(data, data->REG_PWM[nr],
1765                                          data->pwm_ctrl[nr]);
1766                 }
1767         }
1768         mutex_unlock(&data->update_lock);
1769         return count;
1770 }
1771
1772 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1773                             const char *buf, size_t count)
1774 {
1775         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1776         struct it87_data *data = dev_get_drvdata(dev);
1777         int nr = sensor_attr->index;
1778         unsigned long val;
1779         int i;
1780
1781         if (kstrtoul(buf, 10, &val) < 0)
1782                 return -EINVAL;
1783
1784         val = clamp_val(val, 0, 1000000);
1785         val *= has_newer_autopwm(data) ? 256 : 128;
1786
1787         /* Search for the nearest available frequency */
1788         for (i = 0; i < 7; i++) {
1789                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1790                         break;
1791         }
1792
1793         mutex_lock(&data->update_lock);
1794         if (nr == 0) {
1795                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1796                 data->fan_ctl |= i << 4;
1797                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1798         } else {
1799                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1800                 data->extra |= i << 4;
1801                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1802         }
1803         mutex_unlock(&data->update_lock);
1804
1805         return count;
1806 }
1807
1808 static ssize_t show_pwm_temp_map(struct device *dev,
1809                                  struct device_attribute *attr, char *buf)
1810 {
1811         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1812         struct it87_data *data = it87_update_device(dev);
1813         int nr = sensor_attr->index;
1814
1815         return sprintf(buf, "%d\n", data->pwm_temp_map[nr] + 1);
1816 }
1817
1818 static ssize_t set_pwm_temp_map(struct device *dev,
1819                                 struct device_attribute *attr, const char *buf,
1820                                 size_t count)
1821 {
1822         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1823         struct it87_data *data = dev_get_drvdata(dev);
1824         int nr = sensor_attr->index;
1825         unsigned long val;
1826         u8 map;
1827
1828         if (kstrtoul(buf, 10, &val) < 0)
1829                 return -EINVAL;
1830
1831         if (!val || val > data->pwm_num_temp_map)
1832                 return -EINVAL;
1833
1834         map = val - 1;
1835
1836         mutex_lock(&data->update_lock);
1837         it87_update_pwm_ctrl(data, nr);
1838         data->pwm_temp_map[nr] = map;
1839         /*
1840          * If we are in automatic mode, write the temp mapping immediately;
1841          * otherwise, just store it for later use.
1842          */
1843         if (data->pwm_ctrl[nr] & 0x80) {
1844                 data->pwm_ctrl[nr] = temp_map_to_reg(data, nr, map);
1845                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1846         }
1847         mutex_unlock(&data->update_lock);
1848         return count;
1849 }
1850
1851 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1852                              char *buf)
1853 {
1854         struct it87_data *data = it87_update_device(dev);
1855         struct sensor_device_attribute_2 *sensor_attr =
1856                         to_sensor_dev_attr_2(attr);
1857         int nr = sensor_attr->nr;
1858         int point = sensor_attr->index;
1859
1860         return sprintf(buf, "%d\n",
1861                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1862 }
1863
1864 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1865                             const char *buf, size_t count)
1866 {
1867         struct it87_data *data = dev_get_drvdata(dev);
1868         struct sensor_device_attribute_2 *sensor_attr =
1869                         to_sensor_dev_attr_2(attr);
1870         int nr = sensor_attr->nr;
1871         int point = sensor_attr->index;
1872         int regaddr;
1873         long val;
1874
1875         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1876                 return -EINVAL;
1877
1878         mutex_lock(&data->update_lock);
1879         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1880         if (has_newer_autopwm(data))
1881                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1882         else
1883                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1884         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1885         mutex_unlock(&data->update_lock);
1886         return count;
1887 }
1888
1889 static ssize_t show_auto_pwm_slope(struct device *dev,
1890                                    struct device_attribute *attr, char *buf)
1891 {
1892         struct it87_data *data = it87_update_device(dev);
1893         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1894         int nr = sensor_attr->index;
1895
1896         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1897 }
1898
1899 static ssize_t set_auto_pwm_slope(struct device *dev,
1900                                   struct device_attribute *attr,
1901                                   const char *buf, size_t count)
1902 {
1903         struct it87_data *data = dev_get_drvdata(dev);
1904         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1905         int nr = sensor_attr->index;
1906         unsigned long val;
1907
1908         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1909                 return -EINVAL;
1910
1911         mutex_lock(&data->update_lock);
1912         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1913         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1914                          data->auto_pwm[nr][1]);
1915         mutex_unlock(&data->update_lock);
1916         return count;
1917 }
1918
1919 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1920                               char *buf)
1921 {
1922         struct it87_data *data = it87_update_device(dev);
1923         struct sensor_device_attribute_2 *sensor_attr =
1924                         to_sensor_dev_attr_2(attr);
1925         int nr = sensor_attr->nr;
1926         int point = sensor_attr->index;
1927         int reg;
1928
1929         if (has_old_autopwm(data) || point)
1930                 reg = data->auto_temp[nr][point];
1931         else
1932                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1933
1934         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1935 }
1936
1937 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1938                              const char *buf, size_t count)
1939 {
1940         struct it87_data *data = dev_get_drvdata(dev);
1941         struct sensor_device_attribute_2 *sensor_attr =
1942                         to_sensor_dev_attr_2(attr);
1943         int nr = sensor_attr->nr;
1944         int point = sensor_attr->index;
1945         long val;
1946         int reg;
1947
1948         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1949                 return -EINVAL;
1950
1951         mutex_lock(&data->update_lock);
1952         if (has_newer_autopwm(data) && !point) {
1953                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1954                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1955                 data->auto_temp[nr][0] = reg;
1956                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1957         } else {
1958                 reg = TEMP_TO_REG(val);
1959                 data->auto_temp[nr][point] = reg;
1960                 if (has_newer_autopwm(data))
1961                         point--;
1962                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1963         }
1964         mutex_unlock(&data->update_lock);
1965         return count;
1966 }
1967
1968 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1969 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1970                             0, 1);
1971 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1972                           set_fan_div, 0);
1973
1974 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1975 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1976                             1, 1);
1977 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1978                           set_fan_div, 1);
1979
1980 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1981 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1982                             2, 1);
1983 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1984                           set_fan_div, 2);
1985
1986 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1987 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1988                             3, 1);
1989
1990 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1991 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1992                             4, 1);
1993
1994 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1995 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1996                             5, 1);
1997
1998 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1999                           show_pwm_enable, set_pwm_enable, 0);
2000 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
2001 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
2002                           set_pwm_freq, 0);
2003 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
2004                           show_pwm_temp_map, set_pwm_temp_map, 0);
2005 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
2006                             show_auto_pwm, set_auto_pwm, 0, 0);
2007 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
2008                             show_auto_pwm, set_auto_pwm, 0, 1);
2009 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
2010                             show_auto_pwm, set_auto_pwm, 0, 2);
2011 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
2012                             show_auto_pwm, NULL, 0, 3);
2013 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
2014                             show_auto_temp, set_auto_temp, 0, 1);
2015 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2016                             show_auto_temp, set_auto_temp, 0, 0);
2017 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2018                             show_auto_temp, set_auto_temp, 0, 2);
2019 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2020                             show_auto_temp, set_auto_temp, 0, 3);
2021 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2022                             show_auto_temp, set_auto_temp, 0, 4);
2023 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2024                             show_auto_pwm, set_auto_pwm, 0, 0);
2025 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2026                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
2027
2028 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2029                           show_pwm_enable, set_pwm_enable, 1);
2030 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2031 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2032 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2033                           show_pwm_temp_map, set_pwm_temp_map, 1);
2034 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2035                             show_auto_pwm, set_auto_pwm, 1, 0);
2036 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2037                             show_auto_pwm, set_auto_pwm, 1, 1);
2038 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2039                             show_auto_pwm, set_auto_pwm, 1, 2);
2040 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2041                             show_auto_pwm, NULL, 1, 3);
2042 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2043                             show_auto_temp, set_auto_temp, 1, 1);
2044 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2045                             show_auto_temp, set_auto_temp, 1, 0);
2046 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2047                             show_auto_temp, set_auto_temp, 1, 2);
2048 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2049                             show_auto_temp, set_auto_temp, 1, 3);
2050 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2051                             show_auto_temp, set_auto_temp, 1, 4);
2052 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2053                             show_auto_pwm, set_auto_pwm, 1, 0);
2054 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2055                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
2056
2057 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2058                           show_pwm_enable, set_pwm_enable, 2);
2059 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2060 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2061 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2062                           show_pwm_temp_map, set_pwm_temp_map, 2);
2063 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2064                             show_auto_pwm, set_auto_pwm, 2, 0);
2065 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2066                             show_auto_pwm, set_auto_pwm, 2, 1);
2067 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2068                             show_auto_pwm, set_auto_pwm, 2, 2);
2069 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2070                             show_auto_pwm, NULL, 2, 3);
2071 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2072                             show_auto_temp, set_auto_temp, 2, 1);
2073 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2074                             show_auto_temp, set_auto_temp, 2, 0);
2075 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2076                             show_auto_temp, set_auto_temp, 2, 2);
2077 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2078                             show_auto_temp, set_auto_temp, 2, 3);
2079 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2080                             show_auto_temp, set_auto_temp, 2, 4);
2081 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2082                             show_auto_pwm, set_auto_pwm, 2, 0);
2083 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2084                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2085
2086 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2087                           show_pwm_enable, set_pwm_enable, 3);
2088 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2089 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2090 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2091                           show_pwm_temp_map, set_pwm_temp_map, 3);
2092 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2093                             show_auto_temp, set_auto_temp, 2, 1);
2094 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2095                             show_auto_temp, set_auto_temp, 2, 0);
2096 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2097                             show_auto_temp, set_auto_temp, 2, 2);
2098 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2099                             show_auto_temp, set_auto_temp, 2, 3);
2100 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2101                             show_auto_pwm, set_auto_pwm, 3, 0);
2102 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2103                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2104
2105 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2106                           show_pwm_enable, set_pwm_enable, 4);
2107 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2108 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2109 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2110                           show_pwm_temp_map, set_pwm_temp_map, 4);
2111 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2112                             show_auto_temp, set_auto_temp, 2, 1);
2113 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2114                             show_auto_temp, set_auto_temp, 2, 0);
2115 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2116                             show_auto_temp, set_auto_temp, 2, 2);
2117 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2118                             show_auto_temp, set_auto_temp, 2, 3);
2119 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2120                             show_auto_pwm, set_auto_pwm, 4, 0);
2121 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2122                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2123
2124 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2125                           show_pwm_enable, set_pwm_enable, 5);
2126 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2127 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2128 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2129                           show_pwm_temp_map, set_pwm_temp_map, 5);
2130 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2131                             show_auto_temp, set_auto_temp, 2, 1);
2132 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2133                             show_auto_temp, set_auto_temp, 2, 0);
2134 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2135                             show_auto_temp, set_auto_temp, 2, 2);
2136 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2137                             show_auto_temp, set_auto_temp, 2, 3);
2138 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2139                             show_auto_pwm, set_auto_pwm, 5, 0);
2140 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2141                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2142
2143 /* Alarms */
2144 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2145                            char *buf)
2146 {
2147         struct it87_data *data = it87_update_device(dev);
2148
2149         return sprintf(buf, "%u\n", data->alarms);
2150 }
2151 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2152
2153 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2154                           char *buf)
2155 {
2156         struct it87_data *data = it87_update_device(dev);
2157         int bitnr = to_sensor_dev_attr(attr)->index;
2158
2159         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2160 }
2161
2162 static ssize_t clear_intrusion(struct device *dev,
2163                                struct device_attribute *attr, const char *buf,
2164                                size_t count)
2165 {
2166         struct it87_data *data = dev_get_drvdata(dev);
2167         int config;
2168         long val;
2169
2170         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2171                 return -EINVAL;
2172
2173         mutex_lock(&data->update_lock);
2174         config = it87_read_value(data, IT87_REG_CONFIG);
2175         if (config < 0) {
2176                 count = config;
2177         } else {
2178                 config |= BIT(5);
2179                 it87_write_value(data, IT87_REG_CONFIG, config);
2180                 /* Invalidate cache to force re-read */
2181                 data->valid = 0;
2182         }
2183         mutex_unlock(&data->update_lock);
2184
2185         return count;
2186 }
2187
2188 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2189 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2190 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2191 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2192 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2193 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2194 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2195 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2196 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2197 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2198 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2199 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2200 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2201 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2202 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2203 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2204 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2205 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2206 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2207 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2208 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2209                           show_alarm, clear_intrusion, 4);
2210
2211 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2212                          char *buf)
2213 {
2214         struct it87_data *data = it87_update_device(dev);
2215         int bitnr = to_sensor_dev_attr(attr)->index;
2216
2217         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2218 }
2219
2220 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2221                         const char *buf, size_t count)
2222 {
2223         int bitnr = to_sensor_dev_attr(attr)->index;
2224         struct it87_data *data = dev_get_drvdata(dev);
2225         long val;
2226
2227         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2228                 return -EINVAL;
2229
2230         mutex_lock(&data->update_lock);
2231         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2232         if (val)
2233                 data->beeps |= BIT(bitnr);
2234         else
2235                 data->beeps &= ~BIT(bitnr);
2236         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2237         mutex_unlock(&data->update_lock);
2238         return count;
2239 }
2240
2241 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2242                           show_beep, set_beep, 1);
2243 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2244 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2245 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2246 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2247 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2248 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2249 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2250 /* fanX_beep writability is set later */
2251 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2252 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2253 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2254 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2255 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2256 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2257 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2258                           show_beep, set_beep, 2);
2259 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2260 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2261 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2262 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2263 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2264
2265 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2266                             char *buf)
2267 {
2268         struct it87_data *data = dev_get_drvdata(dev);
2269
2270         return sprintf(buf, "%u\n", data->vrm);
2271 }
2272
2273 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2274                              const char *buf, size_t count)
2275 {
2276         struct it87_data *data = dev_get_drvdata(dev);
2277         unsigned long val;
2278
2279         if (kstrtoul(buf, 10, &val) < 0)
2280                 return -EINVAL;
2281
2282         data->vrm = val;
2283
2284         return count;
2285 }
2286 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2287
2288 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2289                             char *buf)
2290 {
2291         struct it87_data *data = it87_update_device(dev);
2292
2293         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2294 }
2295 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2296
2297 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2298                           char *buf)
2299 {
2300         static const char * const labels[] = {
2301                 "+5V",
2302                 "5VSB",
2303                 "Vbat",
2304                 "AVCC",
2305         };
2306         static const char * const labels_it8721[] = {
2307                 "+3.3V",
2308                 "3VSB",
2309                 "Vbat",
2310                 "+3.3V",
2311         };
2312         struct it87_data *data = dev_get_drvdata(dev);
2313         int nr = to_sensor_dev_attr(attr)->index;
2314         const char *label;
2315
2316         if (has_vin3_5v(data) && nr == 0)
2317                 label = labels[0];
2318         else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2319                  has_11mv_adc(data))
2320                 label = labels_it8721[nr];
2321         else
2322                 label = labels[nr];
2323
2324         return sprintf(buf, "%s\n", label);
2325 }
2326 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2327 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2328 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2329 /* AVCC3 */
2330 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2331
2332 static umode_t it87_in_is_visible(struct kobject *kobj,
2333                                   struct attribute *attr, int index)
2334 {
2335         struct device *dev = container_of(kobj, struct device, kobj);
2336         struct it87_data *data = dev_get_drvdata(dev);
2337         int i = index / 5;      /* voltage index */
2338         int a = index % 5;      /* attribute index */
2339
2340         if (index >= 40) {      /* in8 and higher only have input attributes */
2341                 i = index - 40 + 8;
2342                 a = 0;
2343         }
2344
2345         if (!(data->has_in & BIT(i)))
2346                 return 0;
2347
2348         if (a == 4 && !data->has_beep)
2349                 return 0;
2350
2351         return attr->mode;
2352 }
2353
2354 static struct attribute *it87_attributes_in[] = {
2355         &sensor_dev_attr_in0_input.dev_attr.attr,
2356         &sensor_dev_attr_in0_min.dev_attr.attr,
2357         &sensor_dev_attr_in0_max.dev_attr.attr,
2358         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2359         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2360
2361         &sensor_dev_attr_in1_input.dev_attr.attr,
2362         &sensor_dev_attr_in1_min.dev_attr.attr,
2363         &sensor_dev_attr_in1_max.dev_attr.attr,
2364         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2365         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2366
2367         &sensor_dev_attr_in2_input.dev_attr.attr,
2368         &sensor_dev_attr_in2_min.dev_attr.attr,
2369         &sensor_dev_attr_in2_max.dev_attr.attr,
2370         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2371         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2372
2373         &sensor_dev_attr_in3_input.dev_attr.attr,
2374         &sensor_dev_attr_in3_min.dev_attr.attr,
2375         &sensor_dev_attr_in3_max.dev_attr.attr,
2376         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2377         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2378
2379         &sensor_dev_attr_in4_input.dev_attr.attr,
2380         &sensor_dev_attr_in4_min.dev_attr.attr,
2381         &sensor_dev_attr_in4_max.dev_attr.attr,
2382         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2383         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2384
2385         &sensor_dev_attr_in5_input.dev_attr.attr,
2386         &sensor_dev_attr_in5_min.dev_attr.attr,
2387         &sensor_dev_attr_in5_max.dev_attr.attr,
2388         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2389         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2390
2391         &sensor_dev_attr_in6_input.dev_attr.attr,
2392         &sensor_dev_attr_in6_min.dev_attr.attr,
2393         &sensor_dev_attr_in6_max.dev_attr.attr,
2394         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2395         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2396
2397         &sensor_dev_attr_in7_input.dev_attr.attr,
2398         &sensor_dev_attr_in7_min.dev_attr.attr,
2399         &sensor_dev_attr_in7_max.dev_attr.attr,
2400         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2401         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2402
2403         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2404         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2405         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2406         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2407         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2408         NULL
2409 };
2410
2411 static const struct attribute_group it87_group_in = {
2412         .attrs = it87_attributes_in,
2413         .is_visible = it87_in_is_visible,
2414 };
2415
2416 static umode_t it87_temp_is_visible(struct kobject *kobj,
2417                                     struct attribute *attr, int index)
2418 {
2419         struct device *dev = container_of(kobj, struct device, kobj);
2420         struct it87_data *data = dev_get_drvdata(dev);
2421         int i = index / 7;      /* temperature index */
2422         int a = index % 7;      /* attribute index */
2423
2424         if (!(data->has_temp & BIT(i)))
2425                 return 0;
2426
2427         if (a && i >= data->num_temp_limit)
2428                 return 0;
2429
2430         if (a == 3) {
2431                 int type = get_temp_type(data, i);
2432
2433                 if (type == 0)
2434                         return 0;
2435                 if (has_bank_sel(data))
2436                         return 0444;
2437                 return attr->mode;
2438         }
2439
2440         if (a == 5 && i >= data->num_temp_offset)
2441                 return 0;
2442
2443         if (a == 6 && !data->has_beep)
2444                 return 0;
2445
2446         return attr->mode;
2447 }
2448
2449 static struct attribute *it87_attributes_temp[] = {
2450         &sensor_dev_attr_temp1_input.dev_attr.attr,
2451         &sensor_dev_attr_temp1_max.dev_attr.attr,
2452         &sensor_dev_attr_temp1_min.dev_attr.attr,
2453         &sensor_dev_attr_temp1_type.dev_attr.attr,      /* 3 */
2454         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2455         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2456         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2457
2458         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2459         &sensor_dev_attr_temp2_max.dev_attr.attr,
2460         &sensor_dev_attr_temp2_min.dev_attr.attr,
2461         &sensor_dev_attr_temp2_type.dev_attr.attr,
2462         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2463         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2464         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2465
2466         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2467         &sensor_dev_attr_temp3_max.dev_attr.attr,
2468         &sensor_dev_attr_temp3_min.dev_attr.attr,
2469         &sensor_dev_attr_temp3_type.dev_attr.attr,
2470         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2471         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2472         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2473
2474         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2475         &sensor_dev_attr_temp4_max.dev_attr.attr,
2476         &sensor_dev_attr_temp4_min.dev_attr.attr,
2477         &sensor_dev_attr_temp4_type.dev_attr.attr,
2478         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2479         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2480         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2481
2482         &sensor_dev_attr_temp5_input.dev_attr.attr,
2483         &sensor_dev_attr_temp5_max.dev_attr.attr,
2484         &sensor_dev_attr_temp5_min.dev_attr.attr,
2485         &sensor_dev_attr_temp5_type.dev_attr.attr,
2486         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2487         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2488         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2489
2490         &sensor_dev_attr_temp6_input.dev_attr.attr,
2491         &sensor_dev_attr_temp6_max.dev_attr.attr,
2492         &sensor_dev_attr_temp6_min.dev_attr.attr,
2493         &sensor_dev_attr_temp6_type.dev_attr.attr,
2494         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2495         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2496         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2497         NULL
2498 };
2499
2500 static const struct attribute_group it87_group_temp = {
2501         .attrs = it87_attributes_temp,
2502         .is_visible = it87_temp_is_visible,
2503 };
2504
2505 static umode_t it87_is_visible(struct kobject *kobj,
2506                                struct attribute *attr, int index)
2507 {
2508         struct device *dev = container_of(kobj, struct device, kobj);
2509         struct it87_data *data = dev_get_drvdata(dev);
2510
2511         if ((index == 2 || index == 3) && !data->has_vid)
2512                 return 0;
2513
2514         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2515                 return 0;
2516
2517         return attr->mode;
2518 }
2519
2520 static struct attribute *it87_attributes[] = {
2521         &dev_attr_alarms.attr,
2522         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2523         &dev_attr_vrm.attr,                             /* 2 */
2524         &dev_attr_cpu0_vid.attr,                        /* 3 */
2525         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2526         &sensor_dev_attr_in7_label.dev_attr.attr,
2527         &sensor_dev_attr_in8_label.dev_attr.attr,
2528         &sensor_dev_attr_in9_label.dev_attr.attr,
2529         NULL
2530 };
2531
2532 static const struct attribute_group it87_group = {
2533         .attrs = it87_attributes,
2534         .is_visible = it87_is_visible,
2535 };
2536
2537 static umode_t it87_fan_is_visible(struct kobject *kobj,
2538                                    struct attribute *attr, int index)
2539 {
2540         struct device *dev = container_of(kobj, struct device, kobj);
2541         struct it87_data *data = dev_get_drvdata(dev);
2542         int i = index / 5;      /* fan index */
2543         int a = index % 5;      /* attribute index */
2544
2545         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2546                 i = (index - 15) / 4 + 3;
2547                 a = (index - 15) % 4;
2548         }
2549
2550         if (!(data->has_fan & BIT(i)))
2551                 return 0;
2552
2553         if (a == 3) {                           /* beep */
2554                 if (!data->has_beep)
2555                         return 0;
2556                 /* first fan beep attribute is writable */
2557                 if (i == __ffs(data->has_fan))
2558                         return attr->mode | S_IWUSR;
2559         }
2560
2561         if (a == 4 && has_16bit_fans(data))     /* divisor */
2562                 return 0;
2563
2564         return attr->mode;
2565 }
2566
2567 static struct attribute *it87_attributes_fan[] = {
2568         &sensor_dev_attr_fan1_input.dev_attr.attr,
2569         &sensor_dev_attr_fan1_min.dev_attr.attr,
2570         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2571         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2572         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2573
2574         &sensor_dev_attr_fan2_input.dev_attr.attr,
2575         &sensor_dev_attr_fan2_min.dev_attr.attr,
2576         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2577         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2578         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2579
2580         &sensor_dev_attr_fan3_input.dev_attr.attr,
2581         &sensor_dev_attr_fan3_min.dev_attr.attr,
2582         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2583         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2584         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2585
2586         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2587         &sensor_dev_attr_fan4_min.dev_attr.attr,
2588         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2589         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2590
2591         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2592         &sensor_dev_attr_fan5_min.dev_attr.attr,
2593         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2594         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2595
2596         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2597         &sensor_dev_attr_fan6_min.dev_attr.attr,
2598         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2599         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2600         NULL
2601 };
2602
2603 static const struct attribute_group it87_group_fan = {
2604         .attrs = it87_attributes_fan,
2605         .is_visible = it87_fan_is_visible,
2606 };
2607
2608 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2609                                    struct attribute *attr, int index)
2610 {
2611         struct device *dev = container_of(kobj, struct device, kobj);
2612         struct it87_data *data = dev_get_drvdata(dev);
2613         int i = index / 4;      /* pwm index */
2614         int a = index % 4;      /* attribute index */
2615
2616         if (!(data->has_pwm & BIT(i)))
2617                 return 0;
2618
2619         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2620         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2621                 return attr->mode | S_IWUSR;
2622
2623         /* pwm2_freq is writable if there are two pwm frequency selects */
2624         if (has_pwm_freq2(data) && i == 1 && a == 2)
2625                 return attr->mode | S_IWUSR;
2626
2627         return attr->mode;
2628 }
2629
2630 static struct attribute *it87_attributes_pwm[] = {
2631         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2632         &sensor_dev_attr_pwm1.dev_attr.attr,
2633         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2634         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2635
2636         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2637         &sensor_dev_attr_pwm2.dev_attr.attr,
2638         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2639         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2640
2641         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2642         &sensor_dev_attr_pwm3.dev_attr.attr,
2643         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2644         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2645
2646         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2647         &sensor_dev_attr_pwm4.dev_attr.attr,
2648         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2649         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2650
2651         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2652         &sensor_dev_attr_pwm5.dev_attr.attr,
2653         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2654         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2655
2656         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2657         &sensor_dev_attr_pwm6.dev_attr.attr,
2658         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2659         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2660
2661         NULL
2662 };
2663
2664 static const struct attribute_group it87_group_pwm = {
2665         .attrs = it87_attributes_pwm,
2666         .is_visible = it87_pwm_is_visible,
2667 };
2668
2669 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2670                                         struct attribute *attr, int index)
2671 {
2672         struct device *dev = container_of(kobj, struct device, kobj);
2673         struct it87_data *data = dev_get_drvdata(dev);
2674         int i = index / 11;     /* pwm index */
2675         int a = index % 11;     /* attribute index */
2676
2677         if (index >= 33) {      /* pwm 4..6 */
2678                 i = (index - 33) / 6 + 3;
2679                 a = (index - 33) % 6 + 4;
2680         }
2681
2682         if (!(data->has_pwm & BIT(i)))
2683                 return 0;
2684
2685         if (has_newer_autopwm(data)) {
2686                 if (a < 4)      /* no auto point pwm */
2687                         return 0;
2688                 if (a == 8)     /* no auto_point4 */
2689                         return 0;
2690         }
2691         if (has_old_autopwm(data)) {
2692                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2693                         return 0;
2694         }
2695
2696         return attr->mode;
2697 }
2698
2699 static struct attribute *it87_attributes_auto_pwm[] = {
2700         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2701         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2702         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2703         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2704         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2705         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2706         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2707         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2708         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2709         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2710         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2711
2712         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2713         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2714         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2715         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2716         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2717         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2718         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2719         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2720         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2721         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2722         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2723
2724         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2725         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2726         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2727         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2728         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2729         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2730         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2731         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2732         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2733         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2734         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2735
2736         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2737         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2738         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2739         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2740         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2741         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2742
2743         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2744         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2745         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2746         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2747         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2748         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2749
2750         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2751         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2752         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2753         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2754         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2755         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2756
2757         NULL,
2758 };
2759
2760 static const struct attribute_group it87_group_auto_pwm = {
2761         .attrs = it87_attributes_auto_pwm,
2762         .is_visible = it87_auto_pwm_is_visible,
2763 };
2764
2765 /* SuperIO detection - will change isa_address if a chip is found */
2766 static int __init it87_find(int sioaddr, unsigned short *address,
2767                             struct it87_sio_data *sio_data)
2768 {
2769         const struct it87_devices *config;
2770         bool doexit = true;
2771         u16 chip_type;
2772         int err;
2773
2774         err = superio_enter(sioaddr);
2775         if (err)
2776                 return err;
2777
2778         err = -ENODEV;
2779         chip_type = superio_inw(sioaddr, DEVID);
2780         if (chip_type == 0xffff)
2781                 goto exit;
2782
2783         if (force_id)
2784                 chip_type = force_id;
2785
2786         switch (chip_type) {
2787         case IT8705F_DEVID:
2788                 sio_data->type = it87;
2789                 break;
2790         case IT8712F_DEVID:
2791                 sio_data->type = it8712;
2792                 break;
2793         case IT8716F_DEVID:
2794         case IT8726F_DEVID:
2795                 sio_data->type = it8716;
2796                 break;
2797         case IT8718F_DEVID:
2798                 sio_data->type = it8718;
2799                 break;
2800         case IT8720F_DEVID:
2801                 sio_data->type = it8720;
2802                 break;
2803         case IT8721F_DEVID:
2804                 sio_data->type = it8721;
2805                 break;
2806         case IT8728F_DEVID:
2807                 sio_data->type = it8728;
2808                 break;
2809         case IT8732F_DEVID:
2810                 sio_data->type = it8732;
2811                 break;
2812         case IT8792E_DEVID:
2813                 sio_data->type = it8792;
2814                 /*
2815                  * Disabling configuration mode on IT8792E can result in system
2816                  * hang-ups and access failures to the Super-IO chip at the
2817                  * second SIO address. Never exit configuration mode on this
2818                  * chip to avoid the problem.
2819                  */
2820                 doexit = false;
2821                 break;
2822         case IT8771E_DEVID:
2823                 sio_data->type = it8771;
2824                 break;
2825         case IT8772E_DEVID:
2826                 sio_data->type = it8772;
2827                 break;
2828         case IT8781F_DEVID:
2829                 sio_data->type = it8781;
2830                 break;
2831         case IT8782F_DEVID:
2832                 sio_data->type = it8782;
2833                 break;
2834         case IT8783E_DEVID:
2835                 sio_data->type = it8783;
2836                 break;
2837         case IT8786E_DEVID:
2838                 sio_data->type = it8786;
2839                 break;
2840         case IT8790E_DEVID:
2841                 sio_data->type = it8790;
2842                 doexit = false;         /* See IT8792E comment above */
2843                 break;
2844         case IT8603E_DEVID:
2845         case IT8623E_DEVID:
2846                 sio_data->type = it8603;
2847                 break;
2848         case IT8607E_DEVID:
2849                 sio_data->type = it8607;
2850                 break;
2851         case IT8613E_DEVID:
2852                 sio_data->type = it8613;
2853                 break;
2854         case IT8620E_DEVID:
2855                 sio_data->type = it8620;
2856                 break;
2857         case IT8622E_DEVID:
2858                 sio_data->type = it8622;
2859                 break;
2860         case IT8625E_DEVID:
2861                 sio_data->type = it8625;
2862                 break;
2863         case IT8628E_DEVID:
2864                 sio_data->type = it8628;
2865                 break;
2866         case IT8655E_DEVID:
2867                 sio_data->type = it8655;
2868                 break;
2869         case IT8665E_DEVID:
2870                 sio_data->type = it8665;
2871                 break;
2872         case IT8686E_DEVID:
2873                 sio_data->type = it8686;
2874                 break;
2875         case 0xffff:    /* No device at all */
2876                 goto exit;
2877         default:
2878                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2879                 goto exit;
2880         }
2881
2882         superio_select(sioaddr, PME);
2883         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2884                 pr_info("Device not activated, skipping\n");
2885                 goto exit;
2886         }
2887
2888         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2889         if (*address == 0) {
2890                 pr_info("Base address not set, skipping\n");
2891                 goto exit;
2892         }
2893
2894         err = 0;
2895         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2896         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2897                 it87_devices[sio_data->type].suffix,
2898                 *address, sio_data->revision);
2899
2900         config = &it87_devices[sio_data->type];
2901
2902         /* in7 (VSB or VCCH5V) is always internal on some chips */
2903         if (has_in7_internal(config))
2904                 sio_data->internal |= BIT(1);
2905
2906         /* in8 (Vbat) is always internal */
2907         sio_data->internal |= BIT(2);
2908
2909         /* in9 (AVCC3), always internal if supported */
2910         if (has_avcc3(config))
2911                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2912         else
2913                 sio_data->skip_in |= BIT(9);
2914
2915         if (!has_four_pwm(config))
2916                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2917         else if (!has_five_pwm(config))
2918                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2919         else if (!has_six_pwm(config))
2920                 sio_data->skip_pwm |= BIT(5);
2921
2922         if (!has_vid(config))
2923                 sio_data->skip_vid = 1;
2924
2925         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2926         if (sio_data->type == it87) {
2927                 /* The IT8705F has a different LD number for GPIO */
2928                 superio_select(sioaddr, 5);
2929                 sio_data->beep_pin = superio_inb(sioaddr,
2930                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2931         } else if (sio_data->type == it8783) {
2932                 int reg25, reg27, reg2a, reg2c, regef;
2933
2934                 superio_select(sioaddr, GPIO);
2935
2936                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2937                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2938                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2939                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2940                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2941
2942                 /* Check if fan3 is there or not */
2943                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2944                         sio_data->skip_fan |= BIT(2);
2945                 if ((reg25 & BIT(4)) ||
2946                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2947                         sio_data->skip_pwm |= BIT(2);
2948
2949                 /* Check if fan2 is there or not */
2950                 if (reg27 & BIT(7))
2951                         sio_data->skip_fan |= BIT(1);
2952                 if (reg27 & BIT(3))
2953                         sio_data->skip_pwm |= BIT(1);
2954
2955                 /* VIN5 */
2956                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2957                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2958
2959                 /* VIN6 */
2960                 if (reg27 & BIT(1))
2961                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2962
2963                 /*
2964                  * VIN7
2965                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2966                  */
2967                 if (reg27 & BIT(2)) {
2968                         /*
2969                          * The data sheet is a bit unclear regarding the
2970                          * internal voltage divider for VCCH5V. It says
2971                          * "This bit enables and switches VIN7 (pin 91) to the
2972                          * internal voltage divider for VCCH5V".
2973                          * This is different to other chips, where the internal
2974                          * voltage divider would connect VIN7 to an internal
2975                          * voltage source. Maybe that is the case here as well.
2976                          *
2977                          * Since we don't know for sure, re-route it if that is
2978                          * not the case, and ask the user to report if the
2979                          * resulting voltage is sane.
2980                          */
2981                         if (!(reg2c & BIT(1))) {
2982                                 reg2c |= BIT(1);
2983                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2984                                              reg2c);
2985                                 pr_notice("Routing internal VCCH5V to in7.\n");
2986                         }
2987                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2988                         pr_notice("Please report if it displays a reasonable voltage.\n");
2989                 }
2990
2991                 if (reg2c & BIT(0))
2992                         sio_data->internal |= BIT(0);
2993                 if (reg2c & BIT(1))
2994                         sio_data->internal |= BIT(1);
2995
2996                 sio_data->beep_pin = superio_inb(sioaddr,
2997                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2998         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2999                 int reg27, reg29;
3000
3001                 superio_select(sioaddr, GPIO);
3002
3003                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3004
3005                 /* Check if fan3 is there or not */
3006                 if (reg27 & BIT(6))
3007                         sio_data->skip_pwm |= BIT(2);
3008                 if (reg27 & BIT(7))
3009                         sio_data->skip_fan |= BIT(2);
3010
3011                 /* Check if fan2 is there or not */
3012                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3013                 if (reg29 & BIT(1))
3014                         sio_data->skip_pwm |= BIT(1);
3015                 if (reg29 & BIT(2))
3016                         sio_data->skip_fan |= BIT(1);
3017
3018                 switch (sio_data->type) {
3019                 case it8603:
3020                         sio_data->skip_in |= BIT(5); /* No VIN5 */
3021                         sio_data->skip_in |= BIT(6); /* No VIN6 */
3022                         break;
3023                 case it8607:
3024                         sio_data->skip_pwm |= BIT(0);/* No fan1 */
3025                         sio_data->skip_fan |= BIT(0);
3026                 default:
3027                         break;
3028                 }
3029
3030                 sio_data->beep_pin = superio_inb(sioaddr,
3031                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3032         } else if (sio_data->type == it8613) {
3033                 int reg27, reg29, reg2a;
3034
3035                 superio_select(sioaddr, GPIO);
3036
3037                 /* Check for pwm3, fan3, pwm5, fan5 */
3038                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3039                 if (reg27 & BIT(1))
3040                         sio_data->skip_fan |= BIT(4);
3041                 if (reg27 & BIT(3))
3042                         sio_data->skip_pwm |= BIT(4);
3043                 if (reg27 & BIT(6))
3044                         sio_data->skip_pwm |= BIT(2);
3045                 if (reg27 & BIT(7))
3046                         sio_data->skip_fan |= BIT(2);
3047
3048                 /* Check for pwm2, fan2 */
3049                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3050                 if (reg29 & BIT(1))
3051                         sio_data->skip_pwm |= BIT(1);
3052                 if (reg29 & BIT(2))
3053                         sio_data->skip_fan |= BIT(1);
3054
3055                 /* Check for pwm4, fan4 */
3056                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3057                 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3058                         sio_data->skip_fan |= BIT(3);
3059                         sio_data->skip_pwm |= BIT(3);
3060                 }
3061
3062                 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3063                 sio_data->skip_fan |= BIT(0); /* No fan1 */
3064                 sio_data->skip_in |= BIT(3);  /* No VIN3 */
3065                 sio_data->skip_in |= BIT(6);  /* No VIN6 */
3066
3067                 sio_data->beep_pin = superio_inb(sioaddr,
3068                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3069         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3070                    sio_data->type == it8686) {
3071                 int reg;
3072
3073                 superio_select(sioaddr, GPIO);
3074
3075                 /* Check for pwm5 */
3076                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3077                 if (reg & BIT(6))
3078                         sio_data->skip_pwm |= BIT(4);
3079
3080                 /* Check for fan4, fan5 */
3081                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3082                 if (!(reg & BIT(5)))
3083                         sio_data->skip_fan |= BIT(3);
3084                 if (!(reg & BIT(4)))
3085                         sio_data->skip_fan |= BIT(4);
3086
3087                 /* Check for pwm3, fan3 */
3088                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3089                 if (reg & BIT(6))
3090                         sio_data->skip_pwm |= BIT(2);
3091                 if (reg & BIT(7))
3092                         sio_data->skip_fan |= BIT(2);
3093
3094                 /* Check for pwm4 */
3095                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3096                 if (reg & BIT(2))
3097                         sio_data->skip_pwm |= BIT(3);
3098
3099                 /* Check for pwm2, fan2 */
3100                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3101                 if (reg & BIT(1))
3102                         sio_data->skip_pwm |= BIT(1);
3103                 if (reg & BIT(2))
3104                         sio_data->skip_fan |= BIT(1);
3105                 /* Check for pwm6, fan6 */
3106                 if (!(reg & BIT(7))) {
3107                         sio_data->skip_pwm |= BIT(5);
3108                         sio_data->skip_fan |= BIT(5);
3109                 }
3110
3111                 /* Check if AVCC is on VIN3 */
3112                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3113                 if (reg & BIT(0)) {
3114                         /* For it8686, the bit just enables AVCC3 */
3115                         if (sio_data->type != it8686)
3116                                 sio_data->internal |= BIT(0);
3117                 } else {
3118                         sio_data->internal &= ~BIT(3);
3119                         sio_data->skip_in |= BIT(9);
3120                 }
3121
3122                 sio_data->beep_pin = superio_inb(sioaddr,
3123                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3124         } else if (sio_data->type == it8622) {
3125                 int reg;
3126
3127                 superio_select(sioaddr, GPIO);
3128
3129                 /* Check for pwm4, fan4 */
3130                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3131                 if (reg & BIT(6))
3132                         sio_data->skip_fan |= BIT(3);
3133                 if (reg & BIT(5))
3134                         sio_data->skip_pwm |= BIT(3);
3135
3136                 /* Check for pwm3, fan3, pwm5, fan5 */
3137                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3138                 if (reg & BIT(6))
3139                         sio_data->skip_pwm |= BIT(2);
3140                 if (reg & BIT(7))
3141                         sio_data->skip_fan |= BIT(2);
3142                 if (reg & BIT(3))
3143                         sio_data->skip_pwm |= BIT(4);
3144                 if (reg & BIT(1))
3145                         sio_data->skip_fan |= BIT(4);
3146
3147                 /* Check for pwm2, fan2 */
3148                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3149                 if (reg & BIT(1))
3150                         sio_data->skip_pwm |= BIT(1);
3151                 if (reg & BIT(2))
3152                         sio_data->skip_fan |= BIT(1);
3153
3154                 /* Check for AVCC */
3155                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3156                 if (!(reg & BIT(0)))
3157                         sio_data->skip_in |= BIT(9);
3158
3159                 sio_data->beep_pin = superio_inb(sioaddr,
3160                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3161         } else if (sio_data->type == it8732) {
3162                 int reg;
3163
3164                 superio_select(sioaddr, GPIO);
3165
3166                 /* Check for pwm2, fan2 */
3167                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3168                 if (reg & BIT(1))
3169                         sio_data->skip_pwm |= BIT(1);
3170                 if (reg & BIT(2))
3171                         sio_data->skip_fan |= BIT(1);
3172
3173                 /* Check for pwm3, fan3, fan4 */
3174                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3175                 if (reg & BIT(6))
3176                         sio_data->skip_pwm |= BIT(2);
3177                 if (reg & BIT(7))
3178                         sio_data->skip_fan |= BIT(2);
3179                 if (reg & BIT(5))
3180                         sio_data->skip_fan |= BIT(3);
3181
3182                 /* Check if AVCC is on VIN3 */
3183                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3184                 if (reg & BIT(0))
3185                         sio_data->internal |= BIT(0);
3186
3187                 sio_data->beep_pin = superio_inb(sioaddr,
3188                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3189         } else if (sio_data->type == it8655) {
3190                 int reg;
3191
3192                 superio_select(sioaddr, GPIO);
3193
3194                 /* Check for pwm2 */
3195                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3196                 if (reg & BIT(1))
3197                         sio_data->skip_pwm |= BIT(1);
3198
3199                 /* Check for fan2 */
3200                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3201                 if (reg & BIT(4))
3202                         sio_data->skip_fan |= BIT(1);
3203
3204                 /* Check for pwm3, fan3 */
3205                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3206                 if (reg & BIT(6))
3207                         sio_data->skip_pwm |= BIT(2);
3208                 if (reg & BIT(7))
3209                         sio_data->skip_fan |= BIT(2);
3210
3211                 sio_data->beep_pin = superio_inb(sioaddr,
3212                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3213         } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3214                 int reg27, reg29, reg2d, regd3;
3215
3216                 superio_select(sioaddr, GPIO);
3217
3218                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3219                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3220                 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3221                 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3222
3223                 /* Check for pwm2, fan2 */
3224                 if (reg29 & BIT(1))
3225                         sio_data->skip_pwm |= BIT(1);
3226                 if (reg2d & BIT(4))
3227                         sio_data->skip_fan |= BIT(1);
3228
3229                 /* Check for pwm3, fan3 */
3230                 if (reg27 & BIT(6))
3231                         sio_data->skip_pwm |= BIT(2);
3232                 if (reg27 & BIT(7))
3233                         sio_data->skip_fan |= BIT(2);
3234
3235                 /* Check for pwm4, fan4, pwm5, fan5 */
3236                 if (sio_data->type == it8625) {
3237                         int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3238
3239                         if (reg25 & BIT(6))
3240                                 sio_data->skip_fan |= BIT(3);
3241                         if (reg25 & BIT(5))
3242                                 sio_data->skip_pwm |= BIT(3);
3243                         if (reg27 & BIT(3))
3244                                 sio_data->skip_pwm |= BIT(4);
3245                         if (reg27 & BIT(1))
3246                                 sio_data->skip_fan |= BIT(4);
3247                 } else {
3248                         int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3249
3250                         if (regd3 & BIT(2))
3251                                 sio_data->skip_pwm |= BIT(3);
3252                         if (regd3 & BIT(3))
3253                                 sio_data->skip_fan |= BIT(3);
3254                         if (reg26 & BIT(5))
3255                                 sio_data->skip_pwm |= BIT(4);
3256                         if (!(reg26 & BIT(4)))
3257                                 sio_data->skip_fan |= BIT(4);
3258                 }
3259
3260                 /* Check for pwm6, fan6 */
3261                 if (regd3 & BIT(0))
3262                         sio_data->skip_pwm |= BIT(5);
3263                 if (regd3 & BIT(1))
3264                         sio_data->skip_fan |= BIT(5);
3265
3266                 sio_data->beep_pin = superio_inb(sioaddr,
3267                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3268         } else {
3269                 int reg;
3270                 bool uart6;
3271
3272                 superio_select(sioaddr, GPIO);
3273
3274                 /* Check for fan4, fan5 */
3275                 if (has_five_fans(config)) {
3276                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3277                         switch (sio_data->type) {
3278                         case it8718:
3279                                 if (reg & BIT(5))
3280                                         sio_data->skip_fan |= BIT(3);
3281                                 if (reg & BIT(4))
3282                                         sio_data->skip_fan |= BIT(4);
3283                                 break;
3284                         case it8720:
3285                         case it8721:
3286                         case it8728:
3287                                 if (!(reg & BIT(5)))
3288                                         sio_data->skip_fan |= BIT(3);
3289                                 if (!(reg & BIT(4)))
3290                                         sio_data->skip_fan |= BIT(4);
3291                                 break;
3292                         default:
3293                                 break;
3294                         }
3295                 }
3296
3297                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3298                 if (!sio_data->skip_vid) {
3299                         /* We need at least 4 VID pins */
3300                         if (reg & 0x0f) {
3301                                 pr_info("VID is disabled (pins used for GPIO)\n");
3302                                 sio_data->skip_vid = 1;
3303                         }
3304                 }
3305
3306                 /* Check if fan3 is there or not */
3307                 if (reg & BIT(6))
3308                         sio_data->skip_pwm |= BIT(2);
3309                 if (reg & BIT(7))
3310                         sio_data->skip_fan |= BIT(2);
3311
3312                 /* Check if fan2 is there or not */
3313                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3314                 if (reg & BIT(1))
3315                         sio_data->skip_pwm |= BIT(1);
3316                 if (reg & BIT(2))
3317                         sio_data->skip_fan |= BIT(1);
3318
3319                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3320                     !(sio_data->skip_vid))
3321                         sio_data->vid_value = superio_inb(sioaddr,
3322                                                           IT87_SIO_VID_REG);
3323
3324                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3325
3326                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3327
3328                 /*
3329                  * The IT8720F has no VIN7 pin, so VCCH should always be
3330                  * routed internally to VIN7 with an internal divider.
3331                  * Curiously, there still is a configuration bit to control
3332                  * this, which means it can be set incorrectly. And even
3333                  * more curiously, many boards out there are improperly
3334                  * configured, even though the IT8720F datasheet claims
3335                  * that the internal routing of VCCH to VIN7 is the default
3336                  * setting. So we force the internal routing in this case.
3337                  *
3338                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3339                  * If UART6 is enabled, re-route VIN7 to the internal divider
3340                  * if that is not already the case.
3341                  */
3342                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3343                         reg |= BIT(1);
3344                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3345                         pr_notice("Routing internal VCCH to in7\n");
3346                 }
3347                 if (reg & BIT(0))
3348                         sio_data->internal |= BIT(0);
3349                 if (reg & BIT(1))
3350                         sio_data->internal |= BIT(1);
3351
3352                 /*
3353                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3354                  * While VIN7 can be routed to the internal voltage divider,
3355                  * VIN5 and VIN6 are not available if UART6 is enabled.
3356                  *
3357                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3358                  * is the temperature source. Since we can not read the
3359                  * temperature source here, skip_temp is preliminary.
3360                  */
3361                 if (uart6) {
3362                         sio_data->skip_in |= BIT(5) | BIT(6);
3363                         sio_data->skip_temp |= BIT(2);
3364                 }
3365
3366                 sio_data->beep_pin = superio_inb(sioaddr,
3367                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3368         }
3369         if (sio_data->beep_pin)
3370                 pr_info("Beeping is supported\n");
3371
3372 exit:
3373         superio_exit(sioaddr, doexit);
3374         return err;
3375 }
3376
3377 static void it87_init_regs(struct platform_device *pdev)
3378 {
3379         struct it87_data *data = platform_get_drvdata(pdev);
3380
3381         /* Initialize chip specific register pointers */
3382         switch (data->type) {
3383         case it8628:
3384         case it8686:
3385                 data->REG_FAN = IT87_REG_FAN;
3386                 data->REG_FANX = IT87_REG_FANX;
3387                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3388                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3389                 data->REG_PWM = IT87_REG_PWM;
3390                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3391                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3392                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3393                 break;
3394         case it8625:
3395         case it8655:
3396         case it8665:
3397                 data->REG_FAN = IT87_REG_FAN_8665;
3398                 data->REG_FANX = IT87_REG_FANX_8665;
3399                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3400                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3401                 data->REG_PWM = IT87_REG_PWM_8665;
3402                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3403                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3404                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3405                 break;
3406         case it8622:
3407                 data->REG_FAN = IT87_REG_FAN;
3408                 data->REG_FANX = IT87_REG_FANX;
3409                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3410                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3411                 data->REG_PWM = IT87_REG_PWM_8665;
3412                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3413                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3414                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3415                 break;
3416         case it8613:
3417                 data->REG_FAN = IT87_REG_FAN;
3418                 data->REG_FANX = IT87_REG_FANX;
3419                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3420                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3421                 data->REG_PWM = IT87_REG_PWM_8665;
3422                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3423                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3424                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3425                 break;
3426         default:
3427                 data->REG_FAN = IT87_REG_FAN;
3428                 data->REG_FANX = IT87_REG_FANX;
3429                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3430                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3431                 data->REG_PWM = IT87_REG_PWM;
3432                 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3433                 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3434                 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3435                 break;
3436         }
3437 }
3438
3439 /* Called when we have found a new IT87. */
3440 static void it87_init_device(struct platform_device *pdev)
3441 {
3442         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3443         struct it87_data *data = platform_get_drvdata(pdev);
3444         int tmp, i;
3445         u8 mask;
3446
3447         if (has_new_tempmap(data)) {
3448                 data->pwm_temp_map_shift = 3;
3449                 data->pwm_temp_map_mask = 0x07;
3450         } else {
3451                 data->pwm_temp_map_shift = 0;
3452                 data->pwm_temp_map_mask = 0x03;
3453         }
3454
3455         /*
3456          * For each PWM channel:
3457          * - If it is in automatic mode, setting to manual mode should set
3458          *   the fan to full speed by default.
3459          * - If it is in manual mode, we need a mapping to temperature
3460          *   channels to use when later setting to automatic mode later.
3461          *   Map to the first sensor by default (we are clueless.)
3462          * In both cases, the value can (and should) be changed by the user
3463          * prior to switching to a different mode.
3464          * Note that this is no longer needed for the IT8721F and later, as
3465          * these have separate registers for the temperature mapping and the
3466          * manual duty cycle.
3467          */
3468         for (i = 0; i < NUM_AUTO_PWM; i++) {
3469                 data->pwm_temp_map[i] = 0;
3470                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3471                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3472         }
3473
3474         /*
3475          * Some chips seem to have default value 0xff for all limit
3476          * registers. For low voltage limits it makes no sense and triggers
3477          * alarms, so change to 0 instead. For high temperature limits, it
3478          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3479          * but is still confusing, so change to 127 degrees C.
3480          */
3481         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3482                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3483                 if (tmp == 0xff)
3484                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3485         }
3486         for (i = 0; i < data->num_temp_limit; i++) {
3487                 tmp = it87_read_value(data, data->REG_TEMP_HIGH[i]);
3488                 if (tmp == 0xff)
3489                         it87_write_value(data, data->REG_TEMP_HIGH[i], 127);
3490         }
3491
3492         /*
3493          * Temperature channels are not forcibly enabled, as they can be
3494          * set to two different sensor types and we can't guess which one
3495          * is correct for a given system. These channels can be enabled at
3496          * run-time through the temp{1-3}_type sysfs accessors if needed.
3497          */
3498
3499         /* Check if voltage monitors are reset manually or by some reason */
3500         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3501         if ((tmp & 0xff) == 0) {
3502                 /* Enable all voltage monitors */
3503                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3504         }
3505
3506         /* Check if tachometers are reset manually or by some reason */
3507         mask = 0x70 & ~(sio_data->skip_fan << 4);
3508         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3509         if ((data->fan_main_ctrl & mask) == 0) {
3510                 /* Enable all fan tachometers */
3511                 data->fan_main_ctrl |= mask;
3512                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3513                                  data->fan_main_ctrl);
3514         }
3515         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3516
3517         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3518
3519         /* Set tachometers to 16-bit mode if needed */
3520         if (has_fan16_config(data)) {
3521                 if (~tmp & 0x07 & data->has_fan) {
3522                         dev_dbg(&pdev->dev,
3523                                 "Setting fan1-3 to 16-bit mode\n");
3524                         it87_write_value(data, IT87_REG_FAN_16BIT,
3525                                          tmp | 0x07);
3526                 }
3527         }
3528
3529         /* Check for additional fans */
3530         if (has_four_fans(data) && (tmp & BIT(4)))
3531                 data->has_fan |= BIT(3); /* fan4 enabled */
3532         if (has_five_fans(data) && (tmp & BIT(5)))
3533                 data->has_fan |= BIT(4); /* fan5 enabled */
3534         if (has_six_fans(data)) {
3535                 switch (data->type) {
3536                 case it8620:
3537                 case it8628:
3538                 case it8686:
3539                         if (tmp & BIT(2))
3540                                 data->has_fan |= BIT(5); /* fan6 enabled */
3541                         break;
3542                 case it8625:
3543                 case it8665:
3544                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3545                         if (tmp & BIT(3))
3546                                 data->has_fan |= BIT(5); /* fan6 enabled */
3547                         break;
3548                 default:
3549                         break;
3550                 }
3551         }
3552
3553         /* Fan input pins may be used for alternative functions */
3554         data->has_fan &= ~sio_data->skip_fan;
3555
3556         /* Check if pwm6 is enabled */
3557         if (has_six_pwm(data)) {
3558                 switch (data->type) {
3559                 case it8620:
3560                 case it8686:
3561                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3562                         if (!(tmp & BIT(3)))
3563                                 sio_data->skip_pwm |= BIT(5);
3564                         break;
3565                 default:
3566                         break;
3567                 }
3568         }
3569
3570         /* Start monitoring */
3571         it87_write_value(data, IT87_REG_CONFIG,
3572                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3573                          | (update_vbat ? 0x41 : 0x01));
3574 }
3575
3576 /* Return 1 if and only if the PWM interface is safe to use */
3577 static int it87_check_pwm(struct device *dev)
3578 {
3579         struct it87_data *data = dev_get_drvdata(dev);
3580         /*
3581          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3582          * and polarity set to active low is sign that this is the case so we
3583          * disable pwm control to protect the user.
3584          */
3585         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3586
3587         if ((tmp & 0x87) == 0) {
3588                 if (fix_pwm_polarity) {
3589                         /*
3590                          * The user asks us to attempt a chip reconfiguration.
3591                          * This means switching to active high polarity and
3592                          * inverting all fan speed values.
3593                          */
3594                         int i;
3595                         u8 pwm[3];
3596
3597                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3598                                 pwm[i] = it87_read_value(data,
3599                                                          data->REG_PWM[i]);
3600
3601                         /*
3602                          * If any fan is in automatic pwm mode, the polarity
3603                          * might be correct, as suspicious as it seems, so we
3604                          * better don't change anything (but still disable the
3605                          * PWM interface).
3606                          */
3607                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3608                                 dev_info(dev,
3609                                          "Reconfiguring PWM to active high polarity\n");
3610                                 it87_write_value(data, IT87_REG_FAN_CTL,
3611                                                  tmp | 0x87);
3612                                 for (i = 0; i < 3; i++)
3613                                         it87_write_value(data,
3614                                                          data->REG_PWM[i],
3615                                                          0x7f & ~pwm[i]);
3616                                 return 1;
3617                         }
3618
3619                         dev_info(dev,
3620                                  "PWM configuration is too broken to be fixed\n");
3621                 }
3622
3623                 dev_info(dev,
3624                          "Detected broken BIOS defaults, disabling PWM interface\n");
3625                 return 0;
3626         } else if (fix_pwm_polarity) {
3627                 dev_info(dev,
3628                          "PWM configuration looks sane, won't touch\n");
3629         }
3630
3631         return 1;
3632 }
3633
3634 static int it87_probe(struct platform_device *pdev)
3635 {
3636         struct it87_data *data;
3637         struct resource *res;
3638         struct device *dev = &pdev->dev;
3639         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3640         int enable_pwm_interface;
3641         struct device *hwmon_dev;
3642
3643         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3644         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3645                                  DRVNAME)) {
3646                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3647                         (unsigned long)res->start,
3648                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3649                 return -EBUSY;
3650         }
3651
3652         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3653         if (!data)
3654                 return -ENOMEM;
3655
3656         data->addr = res->start;
3657         data->type = sio_data->type;
3658         data->features = it87_devices[sio_data->type].features;
3659         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3660         data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset;
3661         data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map;
3662         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3663         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3664         data->bank = 0xff;
3665
3666         /*
3667          * IT8705F Datasheet 0.4.1, 3h == Version G.
3668          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3669          * These are the first revisions with 16-bit tachometer support.
3670          */
3671         switch (data->type) {
3672         case it87:
3673                 if (sio_data->revision >= 0x03) {
3674                         data->features &= ~FEAT_OLD_AUTOPWM;
3675                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3676                 }
3677                 break;
3678         case it8712:
3679                 if (sio_data->revision >= 0x08) {
3680                         data->features &= ~FEAT_OLD_AUTOPWM;
3681                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3682                                           FEAT_FIVE_FANS;
3683                 }
3684                 break;
3685         default:
3686                 break;
3687         }
3688
3689         /* Now, we do the remaining detection. */
3690         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3691             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3692                 return -ENODEV;
3693
3694         platform_set_drvdata(pdev, data);
3695
3696         mutex_init(&data->update_lock);
3697
3698         /* Initialize register pointers */
3699         it87_init_regs(pdev);
3700
3701         /* Check PWM configuration */
3702         enable_pwm_interface = it87_check_pwm(dev);
3703
3704         /* Starting with IT8721F, we handle scaling of internal voltages */
3705         if (has_scaling(data)) {
3706                 if (sio_data->internal & BIT(0))
3707                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3708                 if (sio_data->internal & BIT(1))
3709                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3710                 if (sio_data->internal & BIT(2))
3711                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3712                 if (sio_data->internal & BIT(3))
3713                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3714         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3715                    sio_data->type == it8783) {
3716                 if (sio_data->internal & BIT(0))
3717                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3718                 if (sio_data->internal & BIT(1))
3719                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3720         }
3721
3722         data->has_temp = 0x07;
3723         if (sio_data->skip_temp & BIT(2)) {
3724                 if (sio_data->type == it8782 &&
3725                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3726                         data->has_temp &= ~BIT(2);
3727         }
3728
3729         data->in_internal = sio_data->internal;
3730         data->has_in = 0x3ff & ~sio_data->skip_in;
3731
3732         if (has_six_temp(data)) {
3733                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3734
3735                 /* Check for additional temperature sensors */
3736                 if ((reg & 0x03) >= 0x02)
3737                         data->has_temp |= BIT(3);
3738                 if (((reg >> 2) & 0x03) >= 0x02)
3739                         data->has_temp |= BIT(4);
3740                 if (((reg >> 4) & 0x03) >= 0x02)
3741                         data->has_temp |= BIT(5);
3742
3743                 /* Check for additional voltage sensors */
3744                 if ((reg & 0x03) == 0x01)
3745                         data->has_in |= BIT(10);
3746                 if (((reg >> 2) & 0x03) == 0x01)
3747                         data->has_in |= BIT(11);
3748                 if (((reg >> 4) & 0x03) == 0x01)
3749                         data->has_in |= BIT(12);
3750         }
3751
3752         data->has_beep = !!sio_data->beep_pin;
3753
3754         /* Initialize the IT87 chip */
3755         it87_init_device(pdev);
3756
3757         if (!sio_data->skip_vid) {
3758                 data->has_vid = true;
3759                 data->vrm = vid_which_vrm();
3760                 /* VID reading from Super-I/O config space if available */
3761                 data->vid = sio_data->vid_value;
3762         }
3763
3764         /* Prepare for sysfs hooks */
3765         data->groups[0] = &it87_group;
3766         data->groups[1] = &it87_group_in;
3767         data->groups[2] = &it87_group_temp;
3768         data->groups[3] = &it87_group_fan;
3769
3770         if (enable_pwm_interface) {
3771                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3772                 data->has_pwm &= ~sio_data->skip_pwm;
3773
3774                 data->groups[4] = &it87_group_pwm;
3775                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3776                         data->groups[5] = &it87_group_auto_pwm;
3777         }
3778
3779         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3780                                         it87_devices[sio_data->type].name,
3781                                         data, data->groups);
3782         return PTR_ERR_OR_ZERO(hwmon_dev);
3783 }
3784
3785 static struct platform_driver it87_driver = {
3786         .driver = {
3787                 .name   = DRVNAME,
3788         },
3789         .probe  = it87_probe,
3790 };
3791
3792 static int __init it87_device_add(int index, unsigned short address,
3793                                   const struct it87_sio_data *sio_data)
3794 {
3795         struct platform_device *pdev;
3796         struct resource res = {
3797                 .start  = address + IT87_EC_OFFSET,
3798                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3799                 .name   = DRVNAME,
3800                 .flags  = IORESOURCE_IO,
3801         };
3802         int err;
3803
3804         err = acpi_check_resource_conflict(&res);
3805         if (err) {
3806                 if (!ignore_resource_conflict)
3807                         return err;
3808         }
3809
3810         pdev = platform_device_alloc(DRVNAME, address);
3811         if (!pdev)
3812                 return -ENOMEM;
3813
3814         err = platform_device_add_resources(pdev, &res, 1);
3815         if (err) {
3816                 pr_err("Device resource addition failed (%d)\n", err);
3817                 goto exit_device_put;
3818         }
3819
3820         err = platform_device_add_data(pdev, sio_data,
3821                                        sizeof(struct it87_sio_data));
3822         if (err) {
3823                 pr_err("Platform data allocation failed\n");
3824                 goto exit_device_put;
3825         }
3826
3827         err = platform_device_add(pdev);
3828         if (err) {
3829                 pr_err("Device addition failed (%d)\n", err);
3830                 goto exit_device_put;
3831         }
3832
3833         it87_pdev[index] = pdev;
3834         return 0;
3835
3836 exit_device_put:
3837         platform_device_put(pdev);
3838         return err;
3839 }
3840
3841 struct it87_dmi_data {
3842         bool sio2_force_config; /* force sio2 into configuration mode   */
3843         u8 skip_pwm;            /* pwm channels to skip for this board  */
3844 };
3845
3846 /*
3847  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
3848  * (IT8792E) needs to be in configuration mode before accessing the first
3849  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
3850  * This needs to be done before accessing the first Super-IO chip since
3851  * the second chip may have been accessed prior to loading this driver.
3852  *
3853  * The problem is also reported to affect IT8795E, which is used on X299 boards
3854  * and has the same chip ID as IT8792E (0x8733). It also appears to affect
3855  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
3856  * Z87X-OC.
3857  * DMI entries for those systems will be added as they become available and
3858  * as the problem is confirmed to affect those boards.
3859  */
3860 static struct it87_dmi_data gigabyte_sio2_force = {
3861         .sio2_force_config = true,
3862 };
3863
3864 /*
3865  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3866  * connected to a fan, but to something else. One user
3867  * has reported instant system power-off when changing
3868  * the PWM2 duty cycle, so we disable it.
3869  * I use the board name string as the trigger in case
3870  * the same board is ever used in other systems.
3871  */
3872 static struct it87_dmi_data nvidia_fn68pt = {
3873         .skip_pwm = BIT(1),
3874 };
3875
3876 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3877         {
3878                 .matches = {
3879                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3880                         DMI_MATCH(DMI_BOARD_NAME, "AB350"),
3881                 },
3882                 .driver_data = &gigabyte_sio2_force,
3883         },
3884         {
3885                 .matches = {
3886                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3887                         DMI_MATCH(DMI_BOARD_NAME, "AX370"),
3888                 },
3889                 .driver_data = &gigabyte_sio2_force,
3890         },
3891         {
3892                 .matches = {
3893                         DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3894                         DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"),
3895                 },
3896                 .driver_data = &gigabyte_sio2_force,
3897         },
3898         {
3899                 .matches = {
3900                         DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
3901                         DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
3902                 },
3903                 .driver_data = &nvidia_fn68pt,
3904         },
3905         { }
3906 };
3907
3908 static int __init sm_it87_init(void)
3909 {
3910         const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
3911         struct it87_dmi_data *dmi_data = NULL;
3912         int sioaddr[2] = { REG_2E, REG_4E };
3913         struct it87_sio_data sio_data;
3914         unsigned short isa_address;
3915         bool found = false;
3916         int i, err;
3917
3918         if (dmi)
3919                 dmi_data = dmi->driver_data;
3920
3921         err = platform_driver_register(&it87_driver);
3922         if (err)
3923                 return err;
3924
3925         if (dmi_data && dmi_data->sio2_force_config)
3926                 __superio_enter(REG_4E);
3927
3928         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3929                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3930                 isa_address = 0;
3931                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3932                 if (err || isa_address == 0)
3933                         continue;
3934
3935                 if (dmi_data)
3936                         sio_data.skip_pwm |= dmi_data->skip_pwm;
3937                 err = it87_device_add(i, isa_address, &sio_data);
3938                 if (err)
3939                         goto exit_dev_unregister;
3940                 found = true;
3941         }
3942
3943         if (!found) {
3944                 err = -ENODEV;
3945                 goto exit_unregister;
3946         }
3947         return 0;
3948
3949 exit_dev_unregister:
3950         /* NULL check handled by platform_device_unregister */
3951         platform_device_unregister(it87_pdev[0]);
3952 exit_unregister:
3953         platform_driver_unregister(&it87_driver);
3954         return err;
3955 }
3956
3957 static void __exit sm_it87_exit(void)
3958 {
3959         /* NULL check handled by platform_device_unregister */
3960         platform_device_unregister(it87_pdev[1]);
3961         platform_device_unregister(it87_pdev[0]);
3962         platform_driver_unregister(&it87_driver);
3963 }
3964
3965 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3966 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3967 module_param(update_vbat, bool, 0);
3968 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3969 module_param(fix_pwm_polarity, bool, 0);
3970 MODULE_PARM_DESC(fix_pwm_polarity,
3971                  "Force PWM polarity to active high (DANGEROUS)");
3972 MODULE_LICENSE("GPL");
3973
3974 module_init(sm_it87_init);
3975 module_exit(sm_it87_exit);