2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8607E Super I/O chip w/LPC interface
15 * IT8620E Super I/O chip w/LPC interface
16 * IT8622E Super I/O chip w/LPC interface
17 * IT8623E Super I/O chip w/LPC interface
18 * IT8628E Super I/O chip w/LPC interface
19 * IT8705F Super I/O chip w/LPC interface
20 * IT8712F Super I/O chip w/LPC interface
21 * IT8716F Super I/O chip w/LPC interface
22 * IT8718F Super I/O chip w/LPC interface
23 * IT8720F Super I/O chip w/LPC interface
24 * IT8721F Super I/O chip w/LPC interface
25 * IT8726F Super I/O chip w/LPC interface
26 * IT8728F Super I/O chip w/LPC interface
27 * IT8732F Super I/O chip w/LPC interface
28 * IT8758E Super I/O chip w/LPC interface
29 * IT8771E Super I/O chip w/LPC interface
30 * IT8772E Super I/O chip w/LPC interface
31 * IT8781F Super I/O chip w/LPC interface
32 * IT8782F Super I/O chip w/LPC interface
33 * IT8783E/F Super I/O chip w/LPC interface
34 * IT8786E Super I/O chip w/LPC interface
35 * IT8790E Super I/O chip w/LPC interface
36 * IT8792E Super I/O chip w/LPC interface
37 * Sis950 A clone of the IT8705F
39 * Copyright (C) 2001 Chris Gauthron
40 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
42 * This program is free software; you can redistribute it and/or modify
43 * it under the terms of the GNU General Public License as published by
44 * the Free Software Foundation; either version 2 of the License, or
45 * (at your option) any later version.
47 * This program is distributed in the hope that it will be useful,
48 * but WITHOUT ANY WARRANTY; without even the implied warranty of
49 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
50 * GNU General Public License for more details.
53 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
55 #include <linux/bitops.h>
56 #include <linux/module.h>
57 #include <linux/init.h>
58 #include <linux/slab.h>
59 #include <linux/jiffies.h>
60 #include <linux/platform_device.h>
61 #include <linux/hwmon.h>
62 #include <linux/hwmon-sysfs.h>
63 #include <linux/hwmon-vid.h>
64 #include <linux/err.h>
65 #include <linux/mutex.h>
66 #include <linux/sysfs.h>
67 #include <linux/string.h>
68 #include <linux/dmi.h>
69 #include <linux/acpi.h>
73 #define DRVNAME "it87"
75 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
76 it8771, it8772, it8781, it8782, it8783, it8786, it8790,
77 it8792, it8603, it8607, it8620, it8622, it8628 };
79 static unsigned short force_id;
80 module_param(force_id, ushort, 0);
81 MODULE_PARM_DESC(force_id, "Override the detected device ID");
83 static struct platform_device *it87_pdev[2];
85 #define REG_2E 0x2e /* The register to read/write */
86 #define REG_4E 0x4e /* Secondary register to read/write */
88 #define DEV 0x07 /* Register: Logical device select */
89 #define PME 0x04 /* The device with the fan registers in it */
91 /* The device with the IT8718F/IT8720F VID value in it */
94 #define DEVID 0x20 /* Register: Device ID */
95 #define DEVREV 0x22 /* Register: Device Revision */
97 static inline int superio_inb(int ioreg, int reg)
100 return inb(ioreg + 1);
103 static inline void superio_outb(int ioreg, int reg, int val)
106 outb(val, ioreg + 1);
109 static int superio_inw(int ioreg, int reg)
114 val = inb(ioreg + 1) << 8;
116 val |= inb(ioreg + 1);
120 static inline void superio_select(int ioreg, int ldn)
123 outb(ldn, ioreg + 1);
126 static inline int superio_enter(int ioreg)
129 * Try to reserve ioreg and ioreg + 1 for exclusive access.
131 if (!request_muxed_region(ioreg, 2, DRVNAME))
137 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
141 static inline void superio_exit(int ioreg)
144 outb(0x02, ioreg + 1);
145 release_region(ioreg, 2);
148 /* Logical device 4 registers */
149 #define IT8712F_DEVID 0x8712
150 #define IT8705F_DEVID 0x8705
151 #define IT8716F_DEVID 0x8716
152 #define IT8718F_DEVID 0x8718
153 #define IT8720F_DEVID 0x8720
154 #define IT8721F_DEVID 0x8721
155 #define IT8726F_DEVID 0x8726
156 #define IT8728F_DEVID 0x8728
157 #define IT8732F_DEVID 0x8732
158 #define IT8792E_DEVID 0x8733
159 #define IT8771E_DEVID 0x8771
160 #define IT8772E_DEVID 0x8772
161 #define IT8781F_DEVID 0x8781
162 #define IT8782F_DEVID 0x8782
163 #define IT8783E_DEVID 0x8783
164 #define IT8786E_DEVID 0x8786
165 #define IT8790E_DEVID 0x8790
166 #define IT8603E_DEVID 0x8603
167 #define IT8607E_DEVID 0x8607
168 #define IT8620E_DEVID 0x8620
169 #define IT8622E_DEVID 0x8622
170 #define IT8623E_DEVID 0x8623
171 #define IT8628E_DEVID 0x8628
172 #define IT87_ACT_REG 0x30
173 #define IT87_BASE_REG 0x60
175 /* Logical device 7 registers (IT8712F and later) */
176 #define IT87_SIO_GPIO1_REG 0x25
177 #define IT87_SIO_GPIO2_REG 0x26
178 #define IT87_SIO_GPIO3_REG 0x27
179 #define IT87_SIO_GPIO4_REG 0x28
180 #define IT87_SIO_GPIO5_REG 0x29
181 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
182 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
183 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
184 #define IT87_SIO_VID_REG 0xfc /* VID value */
185 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
187 /* Update battery voltage after every reading if true */
188 static bool update_vbat;
190 /* Not all BIOSes properly configure the PWM registers */
191 static bool fix_pwm_polarity;
193 /* Many IT87 constants specified below */
195 /* Length of ISA address segment */
196 #define IT87_EXTENT 8
198 /* Length of ISA address segment for Environmental Controller */
199 #define IT87_EC_EXTENT 2
201 /* Offset of EC registers from ISA base address */
202 #define IT87_EC_OFFSET 5
204 /* Where are the ISA address/data registers relative to the EC base address */
205 #define IT87_ADDR_REG_OFFSET 0
206 #define IT87_DATA_REG_OFFSET 1
208 /*----- The IT87 registers -----*/
210 #define IT87_REG_CONFIG 0x00
212 #define IT87_REG_ALARM1 0x01
213 #define IT87_REG_ALARM2 0x02
214 #define IT87_REG_ALARM3 0x03
217 * The IT8718F and IT8720F have the VID value in a different register, in
218 * Super-I/O configuration space.
220 #define IT87_REG_VID 0x0a
222 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
223 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
226 #define IT87_REG_FAN_DIV 0x0b
227 #define IT87_REG_FAN_16BIT 0x0c
231 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
232 * - up to 6 temp (1 to 6)
233 * - up to 6 fan (1 to 6)
236 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
237 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
238 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
239 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
240 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
242 #define IT87_REG_FAN_MAIN_CTRL 0x13
243 #define IT87_REG_FAN_CTL 0x14
244 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
245 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
247 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
248 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
250 #define IT87_REG_TEMP(nr) (0x29 + (nr))
252 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
253 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
254 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
255 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
257 #define IT87_REG_VIN_ENABLE 0x50
258 #define IT87_REG_TEMP_ENABLE 0x51
259 #define IT87_REG_TEMP_EXTRA 0x55
260 #define IT87_REG_BEEP_ENABLE 0x5c
262 #define IT87_REG_CHIPID 0x58
264 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
266 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
267 #define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
269 #define IT87_REG_TEMP456_ENABLE 0x77
271 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
272 #define NUM_VIN_LIMIT 8
274 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
275 #define NUM_TEMP_LIMIT 3
276 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
277 #define NUM_FAN_DIV 3
278 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
279 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
281 struct it87_devices {
283 const char * const suffix;
289 #define FEAT_12MV_ADC BIT(0)
290 #define FEAT_NEWER_AUTOPWM BIT(1)
291 #define FEAT_OLD_AUTOPWM BIT(2)
292 #define FEAT_16BIT_FANS BIT(3)
293 #define FEAT_TEMP_OFFSET BIT(4)
294 #define FEAT_TEMP_PECI BIT(5)
295 #define FEAT_TEMP_OLD_PECI BIT(6)
296 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
297 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
298 #define FEAT_VID BIT(9) /* Set if chip supports VID */
299 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
300 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
301 #define FEAT_10_9MV_ADC BIT(12)
302 #define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
303 #define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
304 #define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
305 #define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
306 #define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
307 #define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
308 #define FEAT_FOUR_FANS BIT(19) /* Supports four fans */
309 #define FEAT_FOUR_PWM BIT(20) /* Supports four fan controls */
311 static const struct it87_devices it87_devices[] = {
315 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
320 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
321 /* may need to overwrite */
326 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
327 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
332 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
333 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
335 .old_peci_mask = 0x4,
340 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
341 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
343 .old_peci_mask = 0x4,
348 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
349 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
350 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
353 .old_peci_mask = 0x02, /* Actually reports PCH */
358 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
359 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
360 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
366 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
367 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
368 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
371 .old_peci_mask = 0x02, /* Actually reports PCH */
376 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
377 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
379 /* PECI: guesswork */
381 /* 16 bit fans (OHM) */
382 /* three fans, always 16 bit (guesswork) */
388 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
389 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
391 /* PECI (coreboot) */
392 /* 12mV ADC (HWSensors4, OHM) */
393 /* 16 bit fans (HWSensors4, OHM) */
394 /* three fans, always 16 bit (datasheet) */
400 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
401 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
402 .old_peci_mask = 0x4,
407 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
408 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
409 .old_peci_mask = 0x4,
414 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
415 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
416 .old_peci_mask = 0x4,
421 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
422 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
429 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
430 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
437 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
438 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
445 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
446 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
447 | FEAT_AVCC3 | FEAT_PWM_FREQ2,
453 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
454 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
455 | FEAT_AVCC3 | FEAT_PWM_FREQ2,
461 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
462 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
463 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
464 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
470 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
471 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
472 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
473 | FEAT_AVCC3 | FEAT_VIN3_5V,
479 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
480 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
481 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
482 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
487 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
488 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
489 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
490 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
491 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
492 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
493 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
494 ((data)->peci_mask & BIT(nr)))
495 #define has_temp_old_peci(data, nr) \
496 (((data)->features & FEAT_TEMP_OLD_PECI) && \
497 ((data)->old_peci_mask & BIT(nr)))
498 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
499 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
501 #define has_vid(data) ((data)->features & FEAT_VID)
502 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
503 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
504 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
505 #define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM \
507 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
508 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
509 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
510 #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
511 #define has_four_fans(data) ((data)->features & (FEAT_FOUR_FANS | \
514 #define has_four_pwm(data) ((data)->features & (FEAT_FOUR_PWM | \
518 struct it87_sio_data {
520 /* Values read from Super-I/O config space */
524 u8 internal; /* Internal sensors can be labeled */
525 /* Features skipped based on config or DMI */
534 * For each registered chip, we need to keep some data in memory.
535 * The structure is dynamically allocated.
538 const struct attribute_group *groups[7];
546 struct mutex update_lock;
547 char valid; /* !=0 if following fields are valid */
548 unsigned long last_updated; /* In jiffies */
550 u16 in_scaled; /* Internal voltage sensors are scaled */
551 u16 in_internal; /* Bitfield, internal sensors (for labels) */
552 u16 has_in; /* Bitfield, voltage sensors enabled */
553 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
554 u8 has_fan; /* Bitfield, fans enabled */
555 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
556 u8 has_temp; /* Bitfield, temp sensors enabled */
557 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
558 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
559 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
560 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
561 bool has_vid; /* True if VID supported */
562 u8 vid; /* Register encoding, combined */
564 u32 alarms; /* Register encoding, combined */
565 bool has_beep; /* true if beep supported */
566 u8 beeps; /* Register encoding */
567 u8 fan_main_ctrl; /* Register value */
568 u8 fan_ctl; /* Register value */
571 * The following 3 arrays correspond to the same registers up to
572 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
573 * 7, and we want to preserve settings on mode changes, so we have
574 * to track all values separately.
575 * Starting with the IT8721F, the manual PWM duty cycles are stored
576 * in separate registers (8-bit values), so the separate tracking
577 * is no longer needed, but it is still done to keep the driver
580 u8 has_pwm; /* Bitfield, pwm control enabled */
581 u8 pwm_ctrl[NUM_PWM]; /* Register value */
582 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
583 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
585 /* Automatic fan speed control registers */
586 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
587 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
590 static int adc_lsb(const struct it87_data *data, int nr)
594 if (has_12mv_adc(data))
596 else if (has_10_9mv_adc(data))
600 if (data->in_scaled & BIT(nr))
605 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
607 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
608 return clamp_val(val, 0, 255);
611 static int in_from_reg(const struct it87_data *data, int nr, int val)
613 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
616 static inline u8 FAN_TO_REG(long rpm, int div)
620 rpm = clamp_val(rpm, 1, 1000000);
621 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
624 static inline u16 FAN16_TO_REG(long rpm)
628 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
631 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
632 1350000 / ((val) * (div)))
633 /* The divider is fixed to 2 in 16-bit mode */
634 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
635 1350000 / ((val) * 2))
637 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
638 ((val) + 500) / 1000), -128, 127))
639 #define TEMP_FROM_REG(val) ((val) * 1000)
641 static u8 pwm_to_reg(const struct it87_data *data, long val)
643 if (has_newer_autopwm(data))
649 static int pwm_from_reg(const struct it87_data *data, u8 reg)
651 if (has_newer_autopwm(data))
654 return (reg & 0x7f) << 1;
657 static int DIV_TO_REG(int val)
661 while (answer < 7 && (val >>= 1))
666 #define DIV_FROM_REG(val) BIT(val)
669 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
670 * depending on the chip type, to calculate the actual PWM frequency.
672 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
673 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
674 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
675 * sometimes just one. It is unknown if this is a datasheet error or real,
676 * so this is ignored for now.
678 static const unsigned int pwm_freq[8] = {
690 * Must be called with data->update_lock held, except during initialization.
691 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
692 * would slow down the IT87 access and should not be necessary.
694 static int it87_read_value(struct it87_data *data, u8 reg)
696 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
697 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
701 * Must be called with data->update_lock held, except during initialization.
702 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
703 * would slow down the IT87 access and should not be necessary.
705 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
707 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
708 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
711 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
713 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
714 if (has_newer_autopwm(data)) {
715 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
716 data->pwm_duty[nr] = it87_read_value(data,
717 IT87_REG_PWM_DUTY[nr]);
719 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
720 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
721 else /* Manual mode */
722 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
725 if (has_old_autopwm(data)) {
728 for (i = 0; i < 5 ; i++)
729 data->auto_temp[nr][i] = it87_read_value(data,
730 IT87_REG_AUTO_TEMP(nr, i));
731 for (i = 0; i < 3 ; i++)
732 data->auto_pwm[nr][i] = it87_read_value(data,
733 IT87_REG_AUTO_PWM(nr, i));
734 } else if (has_newer_autopwm(data)) {
738 * 0: temperature hysteresis (base + 5)
739 * 1: fan off temperature (base + 0)
740 * 2: fan start temperature (base + 1)
741 * 3: fan max temperature (base + 2)
743 data->auto_temp[nr][0] =
744 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
746 for (i = 0; i < 3 ; i++)
747 data->auto_temp[nr][i + 1] =
748 it87_read_value(data,
749 IT87_REG_AUTO_TEMP(nr, i));
751 * 0: start pwm value (base + 3)
752 * 1: pwm slope (base + 4, 1/8th pwm)
754 data->auto_pwm[nr][0] =
755 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
756 data->auto_pwm[nr][1] =
757 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
761 static struct it87_data *it87_update_device(struct device *dev)
763 struct it87_data *data = dev_get_drvdata(dev);
766 mutex_lock(&data->update_lock);
768 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
772 * Cleared after each update, so reenable. Value
773 * returned by this read will be previous value
775 it87_write_value(data, IT87_REG_CONFIG,
776 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
778 for (i = 0; i < NUM_VIN; i++) {
779 if (!(data->has_in & BIT(i)))
783 it87_read_value(data, IT87_REG_VIN[i]);
785 /* VBAT and AVCC don't have limit registers */
786 if (i >= NUM_VIN_LIMIT)
790 it87_read_value(data, IT87_REG_VIN_MIN(i));
792 it87_read_value(data, IT87_REG_VIN_MAX(i));
795 for (i = 0; i < NUM_FAN; i++) {
796 /* Skip disabled fans */
797 if (!(data->has_fan & BIT(i)))
801 it87_read_value(data, IT87_REG_FAN_MIN[i]);
802 data->fan[i][0] = it87_read_value(data,
804 /* Add high byte if in 16-bit mode */
805 if (has_16bit_fans(data)) {
806 data->fan[i][0] |= it87_read_value(data,
807 IT87_REG_FANX[i]) << 8;
808 data->fan[i][1] |= it87_read_value(data,
809 IT87_REG_FANX_MIN[i]) << 8;
812 for (i = 0; i < NUM_TEMP; i++) {
813 if (!(data->has_temp & BIT(i)))
816 it87_read_value(data, IT87_REG_TEMP(i));
818 if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
820 it87_read_value(data,
821 IT87_REG_TEMP_OFFSET[i]);
823 if (i >= NUM_TEMP_LIMIT)
827 it87_read_value(data, IT87_REG_TEMP_LOW(i));
829 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
832 /* Newer chips don't have clock dividers */
833 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
834 i = it87_read_value(data, IT87_REG_FAN_DIV);
835 data->fan_div[0] = i & 0x07;
836 data->fan_div[1] = (i >> 3) & 0x07;
837 data->fan_div[2] = (i & 0x40) ? 3 : 1;
841 it87_read_value(data, IT87_REG_ALARM1) |
842 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
843 (it87_read_value(data, IT87_REG_ALARM3) << 16);
844 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
846 data->fan_main_ctrl = it87_read_value(data,
847 IT87_REG_FAN_MAIN_CTRL);
848 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
849 for (i = 0; i < NUM_PWM; i++) {
850 if (!(data->has_pwm & BIT(i)))
852 it87_update_pwm_ctrl(data, i);
855 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
856 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
858 * The IT8705F does not have VID capability.
859 * The IT8718F and later don't use IT87_REG_VID for the
862 if (data->type == it8712 || data->type == it8716) {
863 data->vid = it87_read_value(data, IT87_REG_VID);
865 * The older IT8712F revisions had only 5 VID pins,
866 * but we assume it is always safe to read 6 bits.
870 data->last_updated = jiffies;
874 mutex_unlock(&data->update_lock);
879 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
882 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
883 struct it87_data *data = it87_update_device(dev);
884 int index = sattr->index;
887 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
890 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
891 const char *buf, size_t count)
893 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
894 struct it87_data *data = dev_get_drvdata(dev);
895 int index = sattr->index;
899 if (kstrtoul(buf, 10, &val) < 0)
902 mutex_lock(&data->update_lock);
903 data->in[nr][index] = in_to_reg(data, nr, val);
904 it87_write_value(data,
905 index == 1 ? IT87_REG_VIN_MIN(nr)
906 : IT87_REG_VIN_MAX(nr),
907 data->in[nr][index]);
908 mutex_unlock(&data->update_lock);
912 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
913 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
915 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
918 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
919 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
921 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
924 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
925 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
927 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
930 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
931 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
933 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
936 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
937 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
939 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
942 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
943 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
945 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
948 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
949 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
951 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
954 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
955 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
957 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
960 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
961 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
962 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
963 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
964 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
966 /* Up to 6 temperatures */
967 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
970 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
972 int index = sattr->index;
973 struct it87_data *data = it87_update_device(dev);
975 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
978 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
979 const char *buf, size_t count)
981 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
983 int index = sattr->index;
984 struct it87_data *data = dev_get_drvdata(dev);
988 if (kstrtol(buf, 10, &val) < 0)
991 mutex_lock(&data->update_lock);
996 reg = IT87_REG_TEMP_LOW(nr);
999 reg = IT87_REG_TEMP_HIGH(nr);
1002 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1003 if (!(regval & 0x80)) {
1005 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1008 reg = IT87_REG_TEMP_OFFSET[nr];
1012 data->temp[nr][index] = TEMP_TO_REG(val);
1013 it87_write_value(data, reg, data->temp[nr][index]);
1014 mutex_unlock(&data->update_lock);
1018 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1019 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1021 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1023 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1025 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1026 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1028 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1030 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1032 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1033 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1035 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1037 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1039 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1040 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1041 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1043 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1046 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1047 int nr = sensor_attr->index;
1048 struct it87_data *data = it87_update_device(dev);
1049 u8 reg = data->sensor; /* In case value is updated while used */
1050 u8 extra = data->extra;
1052 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1053 (has_temp_old_peci(data, nr) && (extra & 0x80)))
1054 return sprintf(buf, "6\n"); /* Intel PECI */
1055 if (reg & (1 << nr))
1056 return sprintf(buf, "3\n"); /* thermal diode */
1057 if (reg & (8 << nr))
1058 return sprintf(buf, "4\n"); /* thermistor */
1059 return sprintf(buf, "0\n"); /* disabled */
1062 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1063 const char *buf, size_t count)
1065 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1066 int nr = sensor_attr->index;
1068 struct it87_data *data = dev_get_drvdata(dev);
1072 if (kstrtol(buf, 10, &val) < 0)
1075 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1078 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1080 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1081 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1083 if (val == 2) { /* backwards compatibility */
1085 "Sensor type 2 is deprecated, please use 4 instead\n");
1088 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1093 else if (has_temp_peci(data, nr) && val == 6)
1094 reg |= (nr + 1) << 6;
1095 else if (has_temp_old_peci(data, nr) && val == 6)
1100 mutex_lock(&data->update_lock);
1102 data->extra = extra;
1103 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1104 if (has_temp_old_peci(data, nr))
1105 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1106 data->valid = 0; /* Force cache refresh */
1107 mutex_unlock(&data->update_lock);
1111 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1113 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1115 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1120 static int pwm_mode(const struct it87_data *data, int nr)
1122 if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1123 return 0; /* Full speed */
1124 if (data->pwm_ctrl[nr] & 0x80)
1125 return 2; /* Automatic mode */
1126 if ((data->type == it8603 || nr >= 3) &&
1127 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1128 return 0; /* Full speed */
1130 return 1; /* Manual mode */
1133 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1136 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1138 int index = sattr->index;
1140 struct it87_data *data = it87_update_device(dev);
1142 speed = has_16bit_fans(data) ?
1143 FAN16_FROM_REG(data->fan[nr][index]) :
1144 FAN_FROM_REG(data->fan[nr][index],
1145 DIV_FROM_REG(data->fan_div[nr]));
1146 return sprintf(buf, "%d\n", speed);
1149 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1152 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1153 struct it87_data *data = it87_update_device(dev);
1154 int nr = sensor_attr->index;
1156 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1159 static ssize_t show_pwm_enable(struct device *dev,
1160 struct device_attribute *attr, char *buf)
1162 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1163 struct it87_data *data = it87_update_device(dev);
1164 int nr = sensor_attr->index;
1166 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1169 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1172 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1173 struct it87_data *data = it87_update_device(dev);
1174 int nr = sensor_attr->index;
1176 return sprintf(buf, "%d\n",
1177 pwm_from_reg(data, data->pwm_duty[nr]));
1180 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1183 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1184 struct it87_data *data = it87_update_device(dev);
1185 int nr = sensor_attr->index;
1189 if (has_pwm_freq2(data) && nr == 1)
1190 index = (data->extra >> 4) & 0x07;
1192 index = (data->fan_ctl >> 4) & 0x07;
1194 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1196 return sprintf(buf, "%u\n", freq);
1199 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1200 const char *buf, size_t count)
1202 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1204 int index = sattr->index;
1206 struct it87_data *data = dev_get_drvdata(dev);
1210 if (kstrtol(buf, 10, &val) < 0)
1213 mutex_lock(&data->update_lock);
1215 if (has_16bit_fans(data)) {
1216 data->fan[nr][index] = FAN16_TO_REG(val);
1217 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1218 data->fan[nr][index] & 0xff);
1219 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1220 data->fan[nr][index] >> 8);
1222 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1225 data->fan_div[nr] = reg & 0x07;
1228 data->fan_div[nr] = (reg >> 3) & 0x07;
1231 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1234 data->fan[nr][index] =
1235 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1236 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1237 data->fan[nr][index]);
1240 mutex_unlock(&data->update_lock);
1244 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1245 const char *buf, size_t count)
1247 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1248 struct it87_data *data = dev_get_drvdata(dev);
1249 int nr = sensor_attr->index;
1254 if (kstrtoul(buf, 10, &val) < 0)
1257 mutex_lock(&data->update_lock);
1258 old = it87_read_value(data, IT87_REG_FAN_DIV);
1260 /* Save fan min limit */
1261 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1266 data->fan_div[nr] = DIV_TO_REG(val);
1270 data->fan_div[nr] = 1;
1272 data->fan_div[nr] = 3;
1275 val |= (data->fan_div[0] & 0x07);
1276 val |= (data->fan_div[1] & 0x07) << 3;
1277 if (data->fan_div[2] == 3)
1279 it87_write_value(data, IT87_REG_FAN_DIV, val);
1281 /* Restore fan min limit */
1282 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1283 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1285 mutex_unlock(&data->update_lock);
1289 /* Returns 0 if OK, -EINVAL otherwise */
1290 static int check_trip_points(struct device *dev, int nr)
1292 const struct it87_data *data = dev_get_drvdata(dev);
1295 if (has_old_autopwm(data)) {
1296 for (i = 0; i < 3; i++) {
1297 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1300 for (i = 0; i < 2; i++) {
1301 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1304 } else if (has_newer_autopwm(data)) {
1305 for (i = 1; i < 3; i++) {
1306 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1313 "Inconsistent trip points, not switching to automatic mode\n");
1314 dev_err(dev, "Adjust the trip points and try again\n");
1319 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1320 const char *buf, size_t count)
1322 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1323 struct it87_data *data = dev_get_drvdata(dev);
1324 int nr = sensor_attr->index;
1327 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1330 /* Check trip points before switching to automatic mode */
1332 if (check_trip_points(dev, nr) < 0)
1336 mutex_lock(&data->update_lock);
1339 if (nr < 3 && data->type != it8603) {
1341 /* make sure the fan is on when in on/off mode */
1342 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1343 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1344 /* set on/off mode */
1345 data->fan_main_ctrl &= ~BIT(nr);
1346 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1347 data->fan_main_ctrl);
1351 /* No on/off mode, set maximum pwm value */
1352 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1353 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1354 data->pwm_duty[nr]);
1355 /* and set manual mode */
1356 if (has_newer_autopwm(data)) {
1357 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1358 data->pwm_temp_map[nr];
1360 ctrl = data->pwm_duty[nr];
1362 data->pwm_ctrl[nr] = ctrl;
1363 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1368 if (has_newer_autopwm(data)) {
1369 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1370 data->pwm_temp_map[nr];
1374 ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1376 data->pwm_ctrl[nr] = ctrl;
1377 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1379 if (data->type != it8603 && nr < 3) {
1380 /* set SmartGuardian mode */
1381 data->fan_main_ctrl |= BIT(nr);
1382 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1383 data->fan_main_ctrl);
1387 mutex_unlock(&data->update_lock);
1391 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1392 const char *buf, size_t count)
1394 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1395 struct it87_data *data = dev_get_drvdata(dev);
1396 int nr = sensor_attr->index;
1399 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1402 mutex_lock(&data->update_lock);
1403 it87_update_pwm_ctrl(data, nr);
1404 if (has_newer_autopwm(data)) {
1406 * If we are in automatic mode, the PWM duty cycle register
1407 * is read-only so we can't write the value.
1409 if (data->pwm_ctrl[nr] & 0x80) {
1410 mutex_unlock(&data->update_lock);
1413 data->pwm_duty[nr] = pwm_to_reg(data, val);
1414 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1415 data->pwm_duty[nr]);
1417 data->pwm_duty[nr] = pwm_to_reg(data, val);
1419 * If we are in manual mode, write the duty cycle immediately;
1420 * otherwise, just store it for later use.
1422 if (!(data->pwm_ctrl[nr] & 0x80)) {
1423 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1424 it87_write_value(data, IT87_REG_PWM[nr],
1425 data->pwm_ctrl[nr]);
1428 mutex_unlock(&data->update_lock);
1432 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1433 const char *buf, size_t count)
1435 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1436 struct it87_data *data = dev_get_drvdata(dev);
1437 int nr = sensor_attr->index;
1441 if (kstrtoul(buf, 10, &val) < 0)
1444 val = clamp_val(val, 0, 1000000);
1445 val *= has_newer_autopwm(data) ? 256 : 128;
1447 /* Search for the nearest available frequency */
1448 for (i = 0; i < 7; i++) {
1449 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1453 mutex_lock(&data->update_lock);
1455 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1456 data->fan_ctl |= i << 4;
1457 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1459 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1460 data->extra |= i << 4;
1461 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1463 mutex_unlock(&data->update_lock);
1468 static ssize_t show_pwm_temp_map(struct device *dev,
1469 struct device_attribute *attr, char *buf)
1471 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1472 struct it87_data *data = it87_update_device(dev);
1473 int nr = sensor_attr->index;
1476 map = data->pwm_temp_map[nr];
1478 map = 0; /* Should never happen */
1479 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1482 return sprintf(buf, "%d\n", (int)BIT(map));
1485 static ssize_t set_pwm_temp_map(struct device *dev,
1486 struct device_attribute *attr, const char *buf,
1489 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1490 struct it87_data *data = dev_get_drvdata(dev);
1491 int nr = sensor_attr->index;
1495 if (kstrtol(buf, 10, &val) < 0)
1515 mutex_lock(&data->update_lock);
1516 it87_update_pwm_ctrl(data, nr);
1517 data->pwm_temp_map[nr] = reg;
1519 * If we are in automatic mode, write the temp mapping immediately;
1520 * otherwise, just store it for later use.
1522 if (data->pwm_ctrl[nr] & 0x80) {
1523 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1524 data->pwm_temp_map[nr];
1525 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1527 mutex_unlock(&data->update_lock);
1531 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1534 struct it87_data *data = it87_update_device(dev);
1535 struct sensor_device_attribute_2 *sensor_attr =
1536 to_sensor_dev_attr_2(attr);
1537 int nr = sensor_attr->nr;
1538 int point = sensor_attr->index;
1540 return sprintf(buf, "%d\n",
1541 pwm_from_reg(data, data->auto_pwm[nr][point]));
1544 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1545 const char *buf, size_t count)
1547 struct it87_data *data = dev_get_drvdata(dev);
1548 struct sensor_device_attribute_2 *sensor_attr =
1549 to_sensor_dev_attr_2(attr);
1550 int nr = sensor_attr->nr;
1551 int point = sensor_attr->index;
1555 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1558 mutex_lock(&data->update_lock);
1559 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1560 if (has_newer_autopwm(data))
1561 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1563 regaddr = IT87_REG_AUTO_PWM(nr, point);
1564 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1565 mutex_unlock(&data->update_lock);
1569 static ssize_t show_auto_pwm_slope(struct device *dev,
1570 struct device_attribute *attr, char *buf)
1572 struct it87_data *data = it87_update_device(dev);
1573 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1574 int nr = sensor_attr->index;
1576 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1579 static ssize_t set_auto_pwm_slope(struct device *dev,
1580 struct device_attribute *attr,
1581 const char *buf, size_t count)
1583 struct it87_data *data = dev_get_drvdata(dev);
1584 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1585 int nr = sensor_attr->index;
1588 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1591 mutex_lock(&data->update_lock);
1592 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1593 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1594 data->auto_pwm[nr][1]);
1595 mutex_unlock(&data->update_lock);
1599 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1602 struct it87_data *data = it87_update_device(dev);
1603 struct sensor_device_attribute_2 *sensor_attr =
1604 to_sensor_dev_attr_2(attr);
1605 int nr = sensor_attr->nr;
1606 int point = sensor_attr->index;
1609 if (has_old_autopwm(data) || point)
1610 reg = data->auto_temp[nr][point];
1612 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1614 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1617 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1618 const char *buf, size_t count)
1620 struct it87_data *data = dev_get_drvdata(dev);
1621 struct sensor_device_attribute_2 *sensor_attr =
1622 to_sensor_dev_attr_2(attr);
1623 int nr = sensor_attr->nr;
1624 int point = sensor_attr->index;
1628 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1631 mutex_lock(&data->update_lock);
1632 if (has_newer_autopwm(data) && !point) {
1633 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1634 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1635 data->auto_temp[nr][0] = reg;
1636 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1638 reg = TEMP_TO_REG(val);
1639 data->auto_temp[nr][point] = reg;
1640 if (has_newer_autopwm(data))
1642 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1644 mutex_unlock(&data->update_lock);
1648 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1649 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1651 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1654 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1655 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1657 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1660 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1661 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1663 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1666 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1667 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1670 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1671 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1674 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1675 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1678 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1679 show_pwm_enable, set_pwm_enable, 0);
1680 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1681 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1683 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1684 show_pwm_temp_map, set_pwm_temp_map, 0);
1685 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1686 show_auto_pwm, set_auto_pwm, 0, 0);
1687 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1688 show_auto_pwm, set_auto_pwm, 0, 1);
1689 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1690 show_auto_pwm, set_auto_pwm, 0, 2);
1691 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1692 show_auto_pwm, NULL, 0, 3);
1693 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1694 show_auto_temp, set_auto_temp, 0, 1);
1695 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1696 show_auto_temp, set_auto_temp, 0, 0);
1697 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1698 show_auto_temp, set_auto_temp, 0, 2);
1699 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1700 show_auto_temp, set_auto_temp, 0, 3);
1701 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1702 show_auto_temp, set_auto_temp, 0, 4);
1703 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1704 show_auto_pwm, set_auto_pwm, 0, 0);
1705 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1706 show_auto_pwm_slope, set_auto_pwm_slope, 0);
1708 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1709 show_pwm_enable, set_pwm_enable, 1);
1710 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1711 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1712 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1713 show_pwm_temp_map, set_pwm_temp_map, 1);
1714 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1715 show_auto_pwm, set_auto_pwm, 1, 0);
1716 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1717 show_auto_pwm, set_auto_pwm, 1, 1);
1718 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1719 show_auto_pwm, set_auto_pwm, 1, 2);
1720 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1721 show_auto_pwm, NULL, 1, 3);
1722 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1723 show_auto_temp, set_auto_temp, 1, 1);
1724 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1725 show_auto_temp, set_auto_temp, 1, 0);
1726 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1727 show_auto_temp, set_auto_temp, 1, 2);
1728 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1729 show_auto_temp, set_auto_temp, 1, 3);
1730 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1731 show_auto_temp, set_auto_temp, 1, 4);
1732 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1733 show_auto_pwm, set_auto_pwm, 1, 0);
1734 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1735 show_auto_pwm_slope, set_auto_pwm_slope, 1);
1737 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1738 show_pwm_enable, set_pwm_enable, 2);
1739 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1740 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1741 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1742 show_pwm_temp_map, set_pwm_temp_map, 2);
1743 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1744 show_auto_pwm, set_auto_pwm, 2, 0);
1745 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1746 show_auto_pwm, set_auto_pwm, 2, 1);
1747 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1748 show_auto_pwm, set_auto_pwm, 2, 2);
1749 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1750 show_auto_pwm, NULL, 2, 3);
1751 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1752 show_auto_temp, set_auto_temp, 2, 1);
1753 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1754 show_auto_temp, set_auto_temp, 2, 0);
1755 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1756 show_auto_temp, set_auto_temp, 2, 2);
1757 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1758 show_auto_temp, set_auto_temp, 2, 3);
1759 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1760 show_auto_temp, set_auto_temp, 2, 4);
1761 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1762 show_auto_pwm, set_auto_pwm, 2, 0);
1763 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1764 show_auto_pwm_slope, set_auto_pwm_slope, 2);
1766 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1767 show_pwm_enable, set_pwm_enable, 3);
1768 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1769 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1770 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1771 show_pwm_temp_map, set_pwm_temp_map, 3);
1772 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1773 show_auto_temp, set_auto_temp, 2, 1);
1774 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1775 show_auto_temp, set_auto_temp, 2, 0);
1776 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1777 show_auto_temp, set_auto_temp, 2, 2);
1778 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1779 show_auto_temp, set_auto_temp, 2, 3);
1780 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1781 show_auto_pwm, set_auto_pwm, 3, 0);
1782 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1783 show_auto_pwm_slope, set_auto_pwm_slope, 3);
1785 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1786 show_pwm_enable, set_pwm_enable, 4);
1787 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1788 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1789 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1790 show_pwm_temp_map, set_pwm_temp_map, 4);
1791 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1792 show_auto_temp, set_auto_temp, 2, 1);
1793 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1794 show_auto_temp, set_auto_temp, 2, 0);
1795 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1796 show_auto_temp, set_auto_temp, 2, 2);
1797 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1798 show_auto_temp, set_auto_temp, 2, 3);
1799 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1800 show_auto_pwm, set_auto_pwm, 4, 0);
1801 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1802 show_auto_pwm_slope, set_auto_pwm_slope, 4);
1804 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1805 show_pwm_enable, set_pwm_enable, 5);
1806 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1807 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1808 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1809 show_pwm_temp_map, set_pwm_temp_map, 5);
1810 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1811 show_auto_temp, set_auto_temp, 2, 1);
1812 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1813 show_auto_temp, set_auto_temp, 2, 0);
1814 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1815 show_auto_temp, set_auto_temp, 2, 2);
1816 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1817 show_auto_temp, set_auto_temp, 2, 3);
1818 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1819 show_auto_pwm, set_auto_pwm, 5, 0);
1820 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1821 show_auto_pwm_slope, set_auto_pwm_slope, 5);
1824 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1827 struct it87_data *data = it87_update_device(dev);
1829 return sprintf(buf, "%u\n", data->alarms);
1831 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1833 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1836 struct it87_data *data = it87_update_device(dev);
1837 int bitnr = to_sensor_dev_attr(attr)->index;
1839 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1842 static ssize_t clear_intrusion(struct device *dev,
1843 struct device_attribute *attr, const char *buf,
1846 struct it87_data *data = dev_get_drvdata(dev);
1850 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1853 mutex_lock(&data->update_lock);
1854 config = it87_read_value(data, IT87_REG_CONFIG);
1859 it87_write_value(data, IT87_REG_CONFIG, config);
1860 /* Invalidate cache to force re-read */
1863 mutex_unlock(&data->update_lock);
1868 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1869 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1870 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1871 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1872 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1873 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1874 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1875 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1876 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1877 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1878 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1879 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1880 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1881 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1882 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1883 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1884 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1885 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1886 show_alarm, clear_intrusion, 4);
1888 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1891 struct it87_data *data = it87_update_device(dev);
1892 int bitnr = to_sensor_dev_attr(attr)->index;
1894 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1897 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1898 const char *buf, size_t count)
1900 int bitnr = to_sensor_dev_attr(attr)->index;
1901 struct it87_data *data = dev_get_drvdata(dev);
1904 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1907 mutex_lock(&data->update_lock);
1908 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1910 data->beeps |= BIT(bitnr);
1912 data->beeps &= ~BIT(bitnr);
1913 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1914 mutex_unlock(&data->update_lock);
1918 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1919 show_beep, set_beep, 1);
1920 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1921 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1922 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1923 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1924 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1925 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1926 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1927 /* fanX_beep writability is set later */
1928 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1929 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1930 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1931 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1932 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1933 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1934 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1935 show_beep, set_beep, 2);
1936 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1937 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1939 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1942 struct it87_data *data = dev_get_drvdata(dev);
1944 return sprintf(buf, "%u\n", data->vrm);
1947 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1948 const char *buf, size_t count)
1950 struct it87_data *data = dev_get_drvdata(dev);
1953 if (kstrtoul(buf, 10, &val) < 0)
1960 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1962 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1965 struct it87_data *data = it87_update_device(dev);
1967 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1969 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1971 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1974 static const char * const labels[] = {
1980 static const char * const labels_it8721[] = {
1986 struct it87_data *data = dev_get_drvdata(dev);
1987 int nr = to_sensor_dev_attr(attr)->index;
1990 if (has_vin3_5v(data) && nr == 0)
1992 else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1993 label = labels_it8721[nr];
1997 return sprintf(buf, "%s\n", label);
1999 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2000 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2001 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2003 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2005 static umode_t it87_in_is_visible(struct kobject *kobj,
2006 struct attribute *attr, int index)
2008 struct device *dev = container_of(kobj, struct device, kobj);
2009 struct it87_data *data = dev_get_drvdata(dev);
2010 int i = index / 5; /* voltage index */
2011 int a = index % 5; /* attribute index */
2013 if (index >= 40) { /* in8 and higher only have input attributes */
2018 if (!(data->has_in & BIT(i)))
2021 if (a == 4 && !data->has_beep)
2027 static struct attribute *it87_attributes_in[] = {
2028 &sensor_dev_attr_in0_input.dev_attr.attr,
2029 &sensor_dev_attr_in0_min.dev_attr.attr,
2030 &sensor_dev_attr_in0_max.dev_attr.attr,
2031 &sensor_dev_attr_in0_alarm.dev_attr.attr,
2032 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
2034 &sensor_dev_attr_in1_input.dev_attr.attr,
2035 &sensor_dev_attr_in1_min.dev_attr.attr,
2036 &sensor_dev_attr_in1_max.dev_attr.attr,
2037 &sensor_dev_attr_in1_alarm.dev_attr.attr,
2038 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
2040 &sensor_dev_attr_in2_input.dev_attr.attr,
2041 &sensor_dev_attr_in2_min.dev_attr.attr,
2042 &sensor_dev_attr_in2_max.dev_attr.attr,
2043 &sensor_dev_attr_in2_alarm.dev_attr.attr,
2044 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
2046 &sensor_dev_attr_in3_input.dev_attr.attr,
2047 &sensor_dev_attr_in3_min.dev_attr.attr,
2048 &sensor_dev_attr_in3_max.dev_attr.attr,
2049 &sensor_dev_attr_in3_alarm.dev_attr.attr,
2050 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
2052 &sensor_dev_attr_in4_input.dev_attr.attr,
2053 &sensor_dev_attr_in4_min.dev_attr.attr,
2054 &sensor_dev_attr_in4_max.dev_attr.attr,
2055 &sensor_dev_attr_in4_alarm.dev_attr.attr,
2056 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
2058 &sensor_dev_attr_in5_input.dev_attr.attr,
2059 &sensor_dev_attr_in5_min.dev_attr.attr,
2060 &sensor_dev_attr_in5_max.dev_attr.attr,
2061 &sensor_dev_attr_in5_alarm.dev_attr.attr,
2062 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2064 &sensor_dev_attr_in6_input.dev_attr.attr,
2065 &sensor_dev_attr_in6_min.dev_attr.attr,
2066 &sensor_dev_attr_in6_max.dev_attr.attr,
2067 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2068 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2070 &sensor_dev_attr_in7_input.dev_attr.attr,
2071 &sensor_dev_attr_in7_min.dev_attr.attr,
2072 &sensor_dev_attr_in7_max.dev_attr.attr,
2073 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2074 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2076 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2077 &sensor_dev_attr_in9_input.dev_attr.attr, /* 41 */
2078 &sensor_dev_attr_in10_input.dev_attr.attr, /* 41 */
2079 &sensor_dev_attr_in11_input.dev_attr.attr, /* 41 */
2080 &sensor_dev_attr_in12_input.dev_attr.attr, /* 41 */
2084 static const struct attribute_group it87_group_in = {
2085 .attrs = it87_attributes_in,
2086 .is_visible = it87_in_is_visible,
2089 static umode_t it87_temp_is_visible(struct kobject *kobj,
2090 struct attribute *attr, int index)
2092 struct device *dev = container_of(kobj, struct device, kobj);
2093 struct it87_data *data = dev_get_drvdata(dev);
2094 int i = index / 7; /* temperature index */
2095 int a = index % 7; /* attribute index */
2102 if (!(data->has_temp & BIT(i)))
2105 if (a == 5 && !has_temp_offset(data))
2108 if (a == 6 && !data->has_beep)
2114 static struct attribute *it87_attributes_temp[] = {
2115 &sensor_dev_attr_temp1_input.dev_attr.attr,
2116 &sensor_dev_attr_temp1_max.dev_attr.attr,
2117 &sensor_dev_attr_temp1_min.dev_attr.attr,
2118 &sensor_dev_attr_temp1_type.dev_attr.attr,
2119 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2120 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2121 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2123 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2124 &sensor_dev_attr_temp2_max.dev_attr.attr,
2125 &sensor_dev_attr_temp2_min.dev_attr.attr,
2126 &sensor_dev_attr_temp2_type.dev_attr.attr,
2127 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2128 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2129 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2131 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2132 &sensor_dev_attr_temp3_max.dev_attr.attr,
2133 &sensor_dev_attr_temp3_min.dev_attr.attr,
2134 &sensor_dev_attr_temp3_type.dev_attr.attr,
2135 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2136 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2137 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2139 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2140 &sensor_dev_attr_temp5_input.dev_attr.attr,
2141 &sensor_dev_attr_temp6_input.dev_attr.attr,
2145 static const struct attribute_group it87_group_temp = {
2146 .attrs = it87_attributes_temp,
2147 .is_visible = it87_temp_is_visible,
2150 static umode_t it87_is_visible(struct kobject *kobj,
2151 struct attribute *attr, int index)
2153 struct device *dev = container_of(kobj, struct device, kobj);
2154 struct it87_data *data = dev_get_drvdata(dev);
2156 if ((index == 2 || index == 3) && !data->has_vid)
2159 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2165 static struct attribute *it87_attributes[] = {
2166 &dev_attr_alarms.attr,
2167 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2168 &dev_attr_vrm.attr, /* 2 */
2169 &dev_attr_cpu0_vid.attr, /* 3 */
2170 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2171 &sensor_dev_attr_in7_label.dev_attr.attr,
2172 &sensor_dev_attr_in8_label.dev_attr.attr,
2173 &sensor_dev_attr_in9_label.dev_attr.attr,
2177 static const struct attribute_group it87_group = {
2178 .attrs = it87_attributes,
2179 .is_visible = it87_is_visible,
2182 static umode_t it87_fan_is_visible(struct kobject *kobj,
2183 struct attribute *attr, int index)
2185 struct device *dev = container_of(kobj, struct device, kobj);
2186 struct it87_data *data = dev_get_drvdata(dev);
2187 int i = index / 5; /* fan index */
2188 int a = index % 5; /* attribute index */
2190 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2191 i = (index - 15) / 4 + 3;
2192 a = (index - 15) % 4;
2195 if (!(data->has_fan & BIT(i)))
2198 if (a == 3) { /* beep */
2199 if (!data->has_beep)
2201 /* first fan beep attribute is writable */
2202 if (i == __ffs(data->has_fan))
2203 return attr->mode | S_IWUSR;
2206 if (a == 4 && has_16bit_fans(data)) /* divisor */
2212 static struct attribute *it87_attributes_fan[] = {
2213 &sensor_dev_attr_fan1_input.dev_attr.attr,
2214 &sensor_dev_attr_fan1_min.dev_attr.attr,
2215 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2216 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2217 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2219 &sensor_dev_attr_fan2_input.dev_attr.attr,
2220 &sensor_dev_attr_fan2_min.dev_attr.attr,
2221 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2222 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2223 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2225 &sensor_dev_attr_fan3_input.dev_attr.attr,
2226 &sensor_dev_attr_fan3_min.dev_attr.attr,
2227 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2228 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2229 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2231 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2232 &sensor_dev_attr_fan4_min.dev_attr.attr,
2233 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2234 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2236 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2237 &sensor_dev_attr_fan5_min.dev_attr.attr,
2238 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2239 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2241 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2242 &sensor_dev_attr_fan6_min.dev_attr.attr,
2243 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2244 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2248 static const struct attribute_group it87_group_fan = {
2249 .attrs = it87_attributes_fan,
2250 .is_visible = it87_fan_is_visible,
2253 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2254 struct attribute *attr, int index)
2256 struct device *dev = container_of(kobj, struct device, kobj);
2257 struct it87_data *data = dev_get_drvdata(dev);
2258 int i = index / 4; /* pwm index */
2259 int a = index % 4; /* attribute index */
2261 if (!(data->has_pwm & BIT(i)))
2264 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2265 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2266 return attr->mode | S_IWUSR;
2268 /* pwm2_freq is writable if there are two pwm frequency selects */
2269 if (has_pwm_freq2(data) && i == 1 && a == 2)
2270 return attr->mode | S_IWUSR;
2275 static struct attribute *it87_attributes_pwm[] = {
2276 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2277 &sensor_dev_attr_pwm1.dev_attr.attr,
2278 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2279 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2281 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2282 &sensor_dev_attr_pwm2.dev_attr.attr,
2283 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2284 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2286 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2287 &sensor_dev_attr_pwm3.dev_attr.attr,
2288 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2289 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2291 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2292 &sensor_dev_attr_pwm4.dev_attr.attr,
2293 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2294 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2296 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2297 &sensor_dev_attr_pwm5.dev_attr.attr,
2298 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2299 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2301 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2302 &sensor_dev_attr_pwm6.dev_attr.attr,
2303 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2304 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2309 static const struct attribute_group it87_group_pwm = {
2310 .attrs = it87_attributes_pwm,
2311 .is_visible = it87_pwm_is_visible,
2314 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2315 struct attribute *attr, int index)
2317 struct device *dev = container_of(kobj, struct device, kobj);
2318 struct it87_data *data = dev_get_drvdata(dev);
2319 int i = index / 11; /* pwm index */
2320 int a = index % 11; /* attribute index */
2322 if (index >= 33) { /* pwm 4..6 */
2323 i = (index - 33) / 6 + 3;
2324 a = (index - 33) % 6 + 4;
2327 if (!(data->has_pwm & BIT(i)))
2330 if (has_newer_autopwm(data)) {
2331 if (a < 4) /* no auto point pwm */
2333 if (a == 8) /* no auto_point4 */
2336 if (has_old_autopwm(data)) {
2337 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2344 static struct attribute *it87_attributes_auto_pwm[] = {
2345 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2346 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2347 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2348 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2349 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2350 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2351 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2352 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2353 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2354 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2355 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2357 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2358 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2359 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2360 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2361 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2362 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2363 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2364 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2365 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2366 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2367 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2369 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2370 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2371 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2372 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2373 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2374 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2375 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2376 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2377 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2378 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2379 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2381 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2382 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2383 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2384 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2385 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2386 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2388 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2389 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2390 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2391 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2392 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2393 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2395 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2396 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2397 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2398 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2399 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2400 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2405 static const struct attribute_group it87_group_auto_pwm = {
2406 .attrs = it87_attributes_auto_pwm,
2407 .is_visible = it87_auto_pwm_is_visible,
2410 /* SuperIO detection - will change isa_address if a chip is found */
2411 static int __init it87_find(int sioaddr, unsigned short *address,
2412 struct it87_sio_data *sio_data)
2416 const char *board_vendor, *board_name;
2417 const struct it87_devices *config;
2419 err = superio_enter(sioaddr);
2424 chip_type = superio_inw(sioaddr, DEVID);
2425 if (chip_type == 0xffff)
2429 chip_type = force_id;
2431 switch (chip_type) {
2433 sio_data->type = it87;
2436 sio_data->type = it8712;
2440 sio_data->type = it8716;
2443 sio_data->type = it8718;
2446 sio_data->type = it8720;
2449 sio_data->type = it8721;
2452 sio_data->type = it8728;
2455 sio_data->type = it8732;
2458 sio_data->type = it8792;
2461 sio_data->type = it8771;
2464 sio_data->type = it8772;
2467 sio_data->type = it8781;
2470 sio_data->type = it8782;
2473 sio_data->type = it8783;
2476 sio_data->type = it8786;
2479 sio_data->type = it8790;
2483 sio_data->type = it8603;
2486 sio_data->type = it8607;
2489 sio_data->type = it8620;
2492 sio_data->type = it8622;
2495 sio_data->type = it8628;
2497 case 0xffff: /* No device at all */
2500 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2504 superio_select(sioaddr, PME);
2505 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2506 pr_info("Device not activated, skipping\n");
2510 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2511 if (*address == 0) {
2512 pr_info("Base address not set, skipping\n");
2517 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2518 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2519 it87_devices[sio_data->type].suffix,
2520 *address, sio_data->revision);
2522 config = &it87_devices[sio_data->type];
2524 /* in7 (VSB or VCCH5V) is always internal on some chips */
2525 if (has_in7_internal(config))
2526 sio_data->internal |= BIT(1);
2528 /* in8 (Vbat) is always internal */
2529 sio_data->internal |= BIT(2);
2531 /* in9 (AVCC3), always internal if supported */
2532 if (has_avcc3(config))
2533 sio_data->internal |= BIT(3); /* in9 is AVCC */
2535 sio_data->skip_in |= BIT(9);
2537 if (!has_four_pwm(config))
2538 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2539 else if (!has_five_pwm(config))
2540 sio_data->skip_pwm |= BIT(4) | BIT(5);
2541 else if (!has_six_pwm(config))
2542 sio_data->skip_pwm |= BIT(5);
2544 if (!has_vid(config))
2545 sio_data->skip_vid = 1;
2547 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2548 if (sio_data->type == it87) {
2549 /* The IT8705F has a different LD number for GPIO */
2550 superio_select(sioaddr, 5);
2551 sio_data->beep_pin = superio_inb(sioaddr,
2552 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2553 } else if (sio_data->type == it8783) {
2554 int reg25, reg27, reg2a, reg2c, regef;
2556 superio_select(sioaddr, GPIO);
2558 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2559 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2560 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2561 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2562 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2564 /* Check if fan3 is there or not */
2565 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2566 sio_data->skip_fan |= BIT(2);
2567 if ((reg25 & BIT(4)) ||
2568 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2569 sio_data->skip_pwm |= BIT(2);
2571 /* Check if fan2 is there or not */
2573 sio_data->skip_fan |= BIT(1);
2575 sio_data->skip_pwm |= BIT(1);
2578 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2579 sio_data->skip_in |= BIT(5); /* No VIN5 */
2583 sio_data->skip_in |= BIT(6); /* No VIN6 */
2587 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2589 if (reg27 & BIT(2)) {
2591 * The data sheet is a bit unclear regarding the
2592 * internal voltage divider for VCCH5V. It says
2593 * "This bit enables and switches VIN7 (pin 91) to the
2594 * internal voltage divider for VCCH5V".
2595 * This is different to other chips, where the internal
2596 * voltage divider would connect VIN7 to an internal
2597 * voltage source. Maybe that is the case here as well.
2599 * Since we don't know for sure, re-route it if that is
2600 * not the case, and ask the user to report if the
2601 * resulting voltage is sane.
2603 if (!(reg2c & BIT(1))) {
2605 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2607 pr_notice("Routing internal VCCH5V to in7.\n");
2609 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2610 pr_notice("Please report if it displays a reasonable voltage.\n");
2614 sio_data->internal |= BIT(0);
2616 sio_data->internal |= BIT(1);
2618 sio_data->beep_pin = superio_inb(sioaddr,
2619 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2620 } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2623 superio_select(sioaddr, GPIO);
2625 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2627 /* Check if fan3 is there or not */
2629 sio_data->skip_pwm |= BIT(2);
2631 sio_data->skip_fan |= BIT(2);
2633 /* Check if fan2 is there or not */
2634 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2636 sio_data->skip_pwm |= BIT(1);
2638 sio_data->skip_fan |= BIT(1);
2640 if (sio_data->type == it8603) {
2641 sio_data->skip_in |= BIT(5); /* No VIN5 */
2642 sio_data->skip_in |= BIT(6); /* No VIN6 */
2645 sio_data->beep_pin = superio_inb(sioaddr,
2646 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2647 } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2650 superio_select(sioaddr, GPIO);
2652 /* Check for pwm5 */
2653 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2655 sio_data->skip_pwm |= BIT(4);
2657 /* Check for fan4, fan5 */
2658 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2659 if (!(reg & BIT(5)))
2660 sio_data->skip_fan |= BIT(3);
2661 if (!(reg & BIT(4)))
2662 sio_data->skip_fan |= BIT(4);
2664 /* Check for pwm3, fan3 */
2665 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2667 sio_data->skip_pwm |= BIT(2);
2669 sio_data->skip_fan |= BIT(2);
2671 /* Check for pwm4 */
2672 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2674 sio_data->skip_pwm |= BIT(3);
2676 /* Check for pwm2, fan2 */
2677 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2679 sio_data->skip_pwm |= BIT(1);
2681 sio_data->skip_fan |= BIT(1);
2682 /* Check for pwm6, fan6 */
2683 if (!(reg & BIT(7))) {
2684 sio_data->skip_pwm |= BIT(5);
2685 sio_data->skip_fan |= BIT(5);
2688 /* Check if AVCC is on VIN3 */
2689 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2691 sio_data->internal |= BIT(0);
2693 sio_data->skip_in |= BIT(9);
2695 sio_data->beep_pin = superio_inb(sioaddr,
2696 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2697 } else if (sio_data->type == it8622) {
2700 superio_select(sioaddr, GPIO);
2702 /* Check for pwm4, fan4 */
2703 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2705 sio_data->skip_fan |= BIT(3);
2707 sio_data->skip_pwm |= BIT(3);
2709 /* Check for pwm3, fan3, pwm5, fan5 */
2710 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2712 sio_data->skip_pwm |= BIT(2);
2714 sio_data->skip_fan |= BIT(2);
2716 sio_data->skip_pwm |= BIT(4);
2718 sio_data->skip_fan |= BIT(4);
2720 /* Check for pwm2, fan2 */
2721 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2723 sio_data->skip_pwm |= BIT(1);
2725 sio_data->skip_fan |= BIT(1);
2727 /* Check for AVCC */
2728 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2729 if (!(reg & BIT(0)))
2730 sio_data->skip_in |= BIT(9);
2732 sio_data->beep_pin = superio_inb(sioaddr,
2733 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2734 } else if (sio_data->type == it8732) {
2737 superio_select(sioaddr, GPIO);
2739 /* Check for pwm2, fan2 */
2740 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2742 sio_data->skip_pwm |= BIT(1);
2744 sio_data->skip_fan |= BIT(1);
2746 /* Check for pwm3, fan3, fan4 */
2747 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2749 sio_data->skip_pwm |= BIT(2);
2751 sio_data->skip_fan |= BIT(2);
2753 sio_data->skip_fan |= BIT(3);
2755 /* Check if AVCC is on VIN3 */
2756 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2758 sio_data->internal |= BIT(0);
2760 sio_data->beep_pin = superio_inb(sioaddr,
2761 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2766 superio_select(sioaddr, GPIO);
2768 /* Check for fan4, fan5 */
2769 if (has_five_fans(config)) {
2770 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2771 switch (sio_data->type) {
2774 sio_data->skip_fan |= BIT(3);
2776 sio_data->skip_fan |= BIT(4);
2781 if (!(reg & BIT(5)))
2782 sio_data->skip_fan |= BIT(3);
2783 if (!(reg & BIT(4)))
2784 sio_data->skip_fan |= BIT(4);
2791 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2792 if (!sio_data->skip_vid) {
2793 /* We need at least 4 VID pins */
2795 pr_info("VID is disabled (pins used for GPIO)\n");
2796 sio_data->skip_vid = 1;
2800 /* Check if fan3 is there or not */
2802 sio_data->skip_pwm |= BIT(2);
2804 sio_data->skip_fan |= BIT(2);
2806 /* Check if fan2 is there or not */
2807 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2809 sio_data->skip_pwm |= BIT(1);
2811 sio_data->skip_fan |= BIT(1);
2813 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2814 !(sio_data->skip_vid))
2815 sio_data->vid_value = superio_inb(sioaddr,
2818 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2820 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2823 * The IT8720F has no VIN7 pin, so VCCH should always be
2824 * routed internally to VIN7 with an internal divider.
2825 * Curiously, there still is a configuration bit to control
2826 * this, which means it can be set incorrectly. And even
2827 * more curiously, many boards out there are improperly
2828 * configured, even though the IT8720F datasheet claims
2829 * that the internal routing of VCCH to VIN7 is the default
2830 * setting. So we force the internal routing in this case.
2832 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2833 * If UART6 is enabled, re-route VIN7 to the internal divider
2834 * if that is not already the case.
2836 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2838 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2839 pr_notice("Routing internal VCCH to in7\n");
2842 sio_data->internal |= BIT(0);
2844 sio_data->internal |= BIT(1);
2847 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2848 * While VIN7 can be routed to the internal voltage divider,
2849 * VIN5 and VIN6 are not available if UART6 is enabled.
2851 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2852 * is the temperature source. Since we can not read the
2853 * temperature source here, skip_temp is preliminary.
2856 sio_data->skip_in |= BIT(5) | BIT(6);
2857 sio_data->skip_temp |= BIT(2);
2860 sio_data->beep_pin = superio_inb(sioaddr,
2861 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2863 if (sio_data->beep_pin)
2864 pr_info("Beeping is supported\n");
2866 /* Disable specific features based on DMI strings */
2867 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2868 board_name = dmi_get_system_info(DMI_BOARD_NAME);
2869 if (board_vendor && board_name) {
2870 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2871 strcmp(board_name, "FN68PT") == 0) {
2873 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2874 * connected to a fan, but to something else. One user
2875 * has reported instant system power-off when changing
2876 * the PWM2 duty cycle, so we disable it.
2877 * I use the board name string as the trigger in case
2878 * the same board is ever used in other systems.
2880 pr_info("Disabling pwm2 due to hardware constraints\n");
2881 sio_data->skip_pwm = BIT(1);
2886 superio_exit(sioaddr);
2890 /* Called when we have found a new IT87. */
2891 static void it87_init_device(struct platform_device *pdev)
2893 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2894 struct it87_data *data = platform_get_drvdata(pdev);
2899 * For each PWM channel:
2900 * - If it is in automatic mode, setting to manual mode should set
2901 * the fan to full speed by default.
2902 * - If it is in manual mode, we need a mapping to temperature
2903 * channels to use when later setting to automatic mode later.
2904 * Use a 1:1 mapping by default (we are clueless.)
2905 * In both cases, the value can (and should) be changed by the user
2906 * prior to switching to a different mode.
2907 * Note that this is no longer needed for the IT8721F and later, as
2908 * these have separate registers for the temperature mapping and the
2909 * manual duty cycle.
2911 for (i = 0; i < NUM_AUTO_PWM; i++) {
2912 data->pwm_temp_map[i] = i;
2913 data->pwm_duty[i] = 0x7f; /* Full speed */
2914 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2918 * Some chips seem to have default value 0xff for all limit
2919 * registers. For low voltage limits it makes no sense and triggers
2920 * alarms, so change to 0 instead. For high temperature limits, it
2921 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2922 * but is still confusing, so change to 127 degrees C.
2924 for (i = 0; i < NUM_VIN_LIMIT; i++) {
2925 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2927 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2929 for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2930 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2932 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2936 * Temperature channels are not forcibly enabled, as they can be
2937 * set to two different sensor types and we can't guess which one
2938 * is correct for a given system. These channels can be enabled at
2939 * run-time through the temp{1-3}_type sysfs accessors if needed.
2942 /* Check if voltage monitors are reset manually or by some reason */
2943 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2944 if ((tmp & 0xff) == 0) {
2945 /* Enable all voltage monitors */
2946 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2949 /* Check if tachometers are reset manually or by some reason */
2950 mask = 0x70 & ~(sio_data->skip_fan << 4);
2951 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2952 if ((data->fan_main_ctrl & mask) == 0) {
2953 /* Enable all fan tachometers */
2954 data->fan_main_ctrl |= mask;
2955 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2956 data->fan_main_ctrl);
2958 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2960 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2962 /* Set tachometers to 16-bit mode if needed */
2963 if (has_fan16_config(data)) {
2964 if (~tmp & 0x07 & data->has_fan) {
2966 "Setting fan1-3 to 16-bit mode\n");
2967 it87_write_value(data, IT87_REG_FAN_16BIT,
2972 /* Check for additional fans */
2973 if (has_four_fans(data) && (tmp & BIT(4)))
2974 data->has_fan |= BIT(3); /* fan4 enabled */
2975 if (has_five_fans(data) && (tmp & BIT(5)))
2976 data->has_fan |= BIT(4); /* fan5 enabled */
2977 if (!has_fan16_config(data) && has_six_fans(data) && (tmp & BIT(2)))
2978 data->has_fan |= BIT(5); /* fan6 enabled */
2980 /* Fan input pins may be used for alternative functions */
2981 data->has_fan &= ~sio_data->skip_fan;
2983 /* Check if pwm5, pwm6 are enabled */
2984 if (has_six_pwm(data)) {
2985 /* The following code may be IT8620E specific */
2986 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2987 if ((tmp & 0xc0) == 0xc0)
2988 sio_data->skip_pwm |= BIT(4);
2989 if (!(tmp & BIT(3)))
2990 sio_data->skip_pwm |= BIT(5);
2993 /* Start monitoring */
2994 it87_write_value(data, IT87_REG_CONFIG,
2995 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2996 | (update_vbat ? 0x41 : 0x01));
2999 /* Return 1 if and only if the PWM interface is safe to use */
3000 static int it87_check_pwm(struct device *dev)
3002 struct it87_data *data = dev_get_drvdata(dev);
3004 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3005 * and polarity set to active low is sign that this is the case so we
3006 * disable pwm control to protect the user.
3008 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3010 if ((tmp & 0x87) == 0) {
3011 if (fix_pwm_polarity) {
3013 * The user asks us to attempt a chip reconfiguration.
3014 * This means switching to active high polarity and
3015 * inverting all fan speed values.
3020 for (i = 0; i < ARRAY_SIZE(pwm); i++)
3021 pwm[i] = it87_read_value(data,
3025 * If any fan is in automatic pwm mode, the polarity
3026 * might be correct, as suspicious as it seems, so we
3027 * better don't change anything (but still disable the
3030 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3032 "Reconfiguring PWM to active high polarity\n");
3033 it87_write_value(data, IT87_REG_FAN_CTL,
3035 for (i = 0; i < 3; i++)
3036 it87_write_value(data,
3043 "PWM configuration is too broken to be fixed\n");
3047 "Detected broken BIOS defaults, disabling PWM interface\n");
3049 } else if (fix_pwm_polarity) {
3051 "PWM configuration looks sane, won't touch\n");
3057 static int it87_probe(struct platform_device *pdev)
3059 struct it87_data *data;
3060 struct resource *res;
3061 struct device *dev = &pdev->dev;
3062 struct it87_sio_data *sio_data = dev_get_platdata(dev);
3063 int enable_pwm_interface;
3064 struct device *hwmon_dev;
3066 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3067 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3069 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3070 (unsigned long)res->start,
3071 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3075 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3079 data->addr = res->start;
3080 data->type = sio_data->type;
3081 data->features = it87_devices[sio_data->type].features;
3082 data->peci_mask = it87_devices[sio_data->type].peci_mask;
3083 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3085 * IT8705F Datasheet 0.4.1, 3h == Version G.
3086 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3087 * These are the first revisions with 16-bit tachometer support.
3089 switch (data->type) {
3091 if (sio_data->revision >= 0x03) {
3092 data->features &= ~FEAT_OLD_AUTOPWM;
3093 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3097 if (sio_data->revision >= 0x08) {
3098 data->features &= ~FEAT_OLD_AUTOPWM;
3099 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3107 /* Now, we do the remaining detection. */
3108 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3109 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3112 platform_set_drvdata(pdev, data);
3114 mutex_init(&data->update_lock);
3116 /* Check PWM configuration */
3117 enable_pwm_interface = it87_check_pwm(dev);
3119 /* Starting with IT8721F, we handle scaling of internal voltages */
3120 if (has_12mv_adc(data)) {
3121 if (sio_data->internal & BIT(0))
3122 data->in_scaled |= BIT(3); /* in3 is AVCC */
3123 if (sio_data->internal & BIT(1))
3124 data->in_scaled |= BIT(7); /* in7 is VSB */
3125 if (sio_data->internal & BIT(2))
3126 data->in_scaled |= BIT(8); /* in8 is Vbat */
3127 if (sio_data->internal & BIT(3))
3128 data->in_scaled |= BIT(9); /* in9 is AVCC */
3129 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3130 sio_data->type == it8783) {
3131 if (sio_data->internal & BIT(0))
3132 data->in_scaled |= BIT(3); /* in3 is VCC5V */
3133 if (sio_data->internal & BIT(1))
3134 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
3137 data->has_temp = 0x07;
3138 if (sio_data->skip_temp & BIT(2)) {
3139 if (sio_data->type == it8782 &&
3140 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3141 data->has_temp &= ~BIT(2);
3144 data->in_internal = sio_data->internal;
3145 data->has_in = 0x3ff & ~sio_data->skip_in;
3147 if (has_six_temp(data)) {
3148 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3150 /* Check for additional temperature sensors */
3151 if ((reg & 0x03) >= 0x02)
3152 data->has_temp |= BIT(3);
3153 if (((reg >> 2) & 0x03) >= 0x02)
3154 data->has_temp |= BIT(4);
3155 if (((reg >> 4) & 0x03) >= 0x02)
3156 data->has_temp |= BIT(5);
3158 /* Check for additional voltage sensors */
3159 if ((reg & 0x03) == 0x01)
3160 data->has_in |= BIT(10);
3161 if (((reg >> 2) & 0x03) == 0x01)
3162 data->has_in |= BIT(11);
3163 if (((reg >> 4) & 0x03) == 0x01)
3164 data->has_in |= BIT(12);
3167 data->has_beep = !!sio_data->beep_pin;
3169 /* Initialize the IT87 chip */
3170 it87_init_device(pdev);
3172 if (!sio_data->skip_vid) {
3173 data->has_vid = true;
3174 data->vrm = vid_which_vrm();
3175 /* VID reading from Super-I/O config space if available */
3176 data->vid = sio_data->vid_value;
3179 /* Prepare for sysfs hooks */
3180 data->groups[0] = &it87_group;
3181 data->groups[1] = &it87_group_in;
3182 data->groups[2] = &it87_group_temp;
3183 data->groups[3] = &it87_group_fan;
3185 if (enable_pwm_interface) {
3186 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3187 data->has_pwm &= ~sio_data->skip_pwm;
3189 data->groups[4] = &it87_group_pwm;
3190 if (has_old_autopwm(data) || has_newer_autopwm(data))
3191 data->groups[5] = &it87_group_auto_pwm;
3194 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3195 it87_devices[sio_data->type].name,
3196 data, data->groups);
3197 return PTR_ERR_OR_ZERO(hwmon_dev);
3200 static struct platform_driver it87_driver = {
3204 .probe = it87_probe,
3207 static int __init it87_device_add(int index, unsigned short address,
3208 const struct it87_sio_data *sio_data)
3210 struct platform_device *pdev;
3211 struct resource res = {
3212 .start = address + IT87_EC_OFFSET,
3213 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3215 .flags = IORESOURCE_IO,
3219 err = acpi_check_resource_conflict(&res);
3223 pdev = platform_device_alloc(DRVNAME, address);
3227 err = platform_device_add_resources(pdev, &res, 1);
3229 pr_err("Device resource addition failed (%d)\n", err);
3230 goto exit_device_put;
3233 err = platform_device_add_data(pdev, sio_data,
3234 sizeof(struct it87_sio_data));
3236 pr_err("Platform data allocation failed\n");
3237 goto exit_device_put;
3240 err = platform_device_add(pdev);
3242 pr_err("Device addition failed (%d)\n", err);
3243 goto exit_device_put;
3246 it87_pdev[index] = pdev;
3250 platform_device_put(pdev);
3254 static int __init sm_it87_init(void)
3256 int sioaddr[2] = { REG_2E, REG_4E };
3257 struct it87_sio_data sio_data;
3258 unsigned short isa_address;
3262 err = platform_driver_register(&it87_driver);
3266 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3267 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3269 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3270 if (err || isa_address == 0)
3273 err = it87_device_add(i, isa_address, &sio_data);
3275 goto exit_dev_unregister;
3281 goto exit_unregister;
3285 exit_dev_unregister:
3286 /* NULL check handled by platform_device_unregister */
3287 platform_device_unregister(it87_pdev[0]);
3289 platform_driver_unregister(&it87_driver);
3293 static void __exit sm_it87_exit(void)
3295 /* NULL check handled by platform_device_unregister */
3296 platform_device_unregister(it87_pdev[1]);
3297 platform_device_unregister(it87_pdev[0]);
3298 platform_driver_unregister(&it87_driver);
3301 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3302 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3303 module_param(update_vbat, bool, 0);
3304 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3305 module_param(fix_pwm_polarity, bool, 0);
3306 MODULE_PARM_DESC(fix_pwm_polarity,
3307 "Force PWM polarity to active high (DANGEROUS)");
3308 MODULE_LICENSE("GPL");
3310 module_init(sm_it87_init);
3311 module_exit(sm_it87_exit);