git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8686E  Super I/O chip w/LPC interface
  20  *            IT8705F  Super I/O chip w/LPC interface
  21  *            IT8712F  Super I/O chip w/LPC interface
  22  *            IT8716F  Super I/O chip w/LPC interface
  23  *            IT8718F  Super I/O chip w/LPC interface
  24  *            IT8720F  Super I/O chip w/LPC interface
  25  *            IT8721F  Super I/O chip w/LPC interface
  26  *            IT8726F  Super I/O chip w/LPC interface
  27  *            IT8728F  Super I/O chip w/LPC interface
  28  *            IT8732F  Super I/O chip w/LPC interface
  29  *            IT8758E  Super I/O chip w/LPC interface
  30  *            IT8771E  Super I/O chip w/LPC interface
  31  *            IT8772E  Super I/O chip w/LPC interface
  32  *            IT8781F  Super I/O chip w/LPC interface
  33  *            IT8782F  Super I/O chip w/LPC interface
  34  *            IT8783E/F Super I/O chip w/LPC interface
  35  *            IT8786E  Super I/O chip w/LPC interface
  36  *            IT8790E  Super I/O chip w/LPC interface
  37  *            IT8792E  Super I/O chip w/LPC interface
  38  *            Sis950   A clone of the IT8705F
  39  *
  40  *  Copyright (C) 2001 Chris Gauthron
  41  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  42  *
  43  *  This program is free software; you can redistribute it and/or modify
  44  *  it under the terms of the GNU General Public License as published by
  45  *  the Free Software Foundation; either version 2 of the License, or
  46  *  (at your option) any later version.
  47  *
  48  *  This program is distributed in the hope that it will be useful,
  49  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  50  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  51  *  GNU General Public License for more details.
  52  */
  53
  54 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  55
  56 #include <linux/bitops.h>
  57 #include <linux/module.h>
  58 #include <linux/init.h>
  59 #include <linux/slab.h>
  60 #include <linux/jiffies.h>
  61 #include <linux/platform_device.h>
  62 #include <linux/hwmon.h>
  63 #include <linux/hwmon-sysfs.h>
  64 #include <linux/hwmon-vid.h>
  65 #include <linux/err.h>
  66 #include <linux/mutex.h>
  67 #include <linux/sysfs.h>
  68 #include <linux/string.h>
  69 #include <linux/dmi.h>
  70 #include <linux/acpi.h>
  71 #include <linux/io.h>
  72 #include "compat.h"
  73
  74 #define DRVNAME "it87"
  75
  76 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  77              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  78              it8792, it8603, it8607, it8620, it8622, it8628, it8686 };
  79
  80 static unsigned short force_id;
  81 module_param(force_id, ushort, 0);
  82 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  83
  84 static struct platform_device *it87_pdev[2];
  85
  86 #define REG_2E  0x2e    /* The register to read/write */
  87 #define REG_4E  0x4e    /* Secondary register to read/write */
  88
  89 #define DEV     0x07    /* Register: Logical device select */
  90 #define PME     0x04    /* The device with the fan registers in it */
  91
  92 /* The device with the IT8718F/IT8720F VID value in it */
  93 #define GPIO    0x07
  94
  95 #define DEVID   0x20    /* Register: Device ID */
  96 #define DEVREV  0x22    /* Register: Device Revision */
  97
  98 static inline int superio_inb(int ioreg, int reg)
  99 {
 100         outb(reg, ioreg);
 101         return inb(ioreg + 1);
 102 }
 103
 104 static inline void superio_outb(int ioreg, int reg, int val)
 105 {
 106         outb(reg, ioreg);
 107         outb(val, ioreg + 1);
 108 }
 109
 110 static int superio_inw(int ioreg, int reg)
 111 {
 112         int val;
 113
 114         outb(reg++, ioreg);
 115         val = inb(ioreg + 1) << 8;
 116         outb(reg, ioreg);
 117         val |= inb(ioreg + 1);
 118         return val;
 119 }
 120
 121 static inline void superio_select(int ioreg, int ldn)
 122 {
 123         outb(DEV, ioreg);
 124         outb(ldn, ioreg + 1);
 125 }
 126
 127 static inline int superio_enter(int ioreg)
 128 {
 129         /*
 130          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 131          */
 132         if (!request_muxed_region(ioreg, 2, DRVNAME))
 133                 return -EBUSY;
 134
 135         outb(0x87, ioreg);
 136         outb(0x01, ioreg);
 137         outb(0x55, ioreg);
 138         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 139         return 0;
 140 }
 141
 142 static inline void superio_exit(int ioreg)
 143 {
 144         outb(0x02, ioreg);
 145         outb(0x02, ioreg + 1);
 146         release_region(ioreg, 2);
 147 }
 148
 149 /* Logical device 4 registers */
 150 #define IT8712F_DEVID 0x8712
 151 #define IT8705F_DEVID 0x8705
 152 #define IT8716F_DEVID 0x8716
 153 #define IT8718F_DEVID 0x8718
 154 #define IT8720F_DEVID 0x8720
 155 #define IT8721F_DEVID 0x8721
 156 #define IT8726F_DEVID 0x8726
 157 #define IT8728F_DEVID 0x8728
 158 #define IT8732F_DEVID 0x8732
 159 #define IT8792E_DEVID 0x8733
 160 #define IT8771E_DEVID 0x8771
 161 #define IT8772E_DEVID 0x8772
 162 #define IT8781F_DEVID 0x8781
 163 #define IT8782F_DEVID 0x8782
 164 #define IT8783E_DEVID 0x8783
 165 #define IT8786E_DEVID 0x8786
 166 #define IT8790E_DEVID 0x8790
 167 #define IT8603E_DEVID 0x8603
 168 #define IT8607E_DEVID 0x8607
 169 #define IT8620E_DEVID 0x8620
 170 #define IT8622E_DEVID 0x8622
 171 #define IT8623E_DEVID 0x8623
 172 #define IT8628E_DEVID 0x8628
 173 #define IT8686E_DEVID 0x8686
 174 #define IT87_ACT_REG  0x30
 175 #define IT87_BASE_REG 0x60
 176
 177 /* Logical device 7 registers (IT8712F and later) */
 178 #define IT87_SIO_GPIO1_REG      0x25
 179 #define IT87_SIO_GPIO2_REG      0x26
 180 #define IT87_SIO_GPIO3_REG      0x27
 181 #define IT87_SIO_GPIO4_REG      0x28
 182 #define IT87_SIO_GPIO5_REG      0x29
 183 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 184 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 185 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 186 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 187 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 188
 189 /* Update battery voltage after every reading if true */
 190 static bool update_vbat;
 191
 192 /* Not all BIOSes properly configure the PWM registers */
 193 static bool fix_pwm_polarity;
 194
 195 /* Many IT87 constants specified below */
 196
 197 /* Length of ISA address segment */
 198 #define IT87_EXTENT 8
 199
 200 /* Length of ISA address segment for Environmental Controller */
 201 #define IT87_EC_EXTENT 2
 202
 203 /* Offset of EC registers from ISA base address */
 204 #define IT87_EC_OFFSET 5
 205
 206 /* Where are the ISA address/data registers relative to the EC base address */
 207 #define IT87_ADDR_REG_OFFSET 0
 208 #define IT87_DATA_REG_OFFSET 1
 209
 210 /*----- The IT87 registers -----*/
 211
 212 #define IT87_REG_CONFIG        0x00
 213
 214 #define IT87_REG_ALARM1        0x01
 215 #define IT87_REG_ALARM2        0x02
 216 #define IT87_REG_ALARM3        0x03
 217
 218 #define IT87_REG_BANK           0x06
 219
 220 /*
 221  * The IT8718F and IT8720F have the VID value in a different register, in
 222  * Super-I/O configuration space.
 223  */
 224 #define IT87_REG_VID           0x0a
 225 /*
 226  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 227  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 228  * mode.
 229  */
 230 #define IT87_REG_FAN_DIV       0x0b
 231 #define IT87_REG_FAN_16BIT     0x0c
 232
 233 /*
 234  * Monitors:
 235  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 236  * - up to 6 temp (1 to 6)
 237  * - up to 6 fan (1 to 6)
 238  */
 239
 240 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 241 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 242 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 243 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 244 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 245
 246 #define IT87_REG_FAN_MAIN_CTRL 0x13
 247 #define IT87_REG_FAN_CTL       0x14
 248 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 249 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 250
 251 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 252                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 253
 254 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 255
 256 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 257 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 258 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 259 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 260
 261 #define IT87_REG_VIN_ENABLE    0x50
 262 #define IT87_REG_TEMP_ENABLE   0x51
 263 #define IT87_REG_TEMP_EXTRA    0x55
 264 #define IT87_REG_BEEP_ENABLE   0x5c
 265
 266 #define IT87_REG_CHIPID        0x58
 267
 268 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 269
 270 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 271 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 272
 273 #define IT87_REG_TEMP456_ENABLE 0x77
 274
 275 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 276 #define NUM_VIN_LIMIT           8
 277 #define NUM_TEMP                6
 278 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 279 #define NUM_TEMP_LIMIT          3
 280 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 281 #define NUM_FAN_DIV             3
 282 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 283 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 284
 285 struct it87_devices {
 286         const char *name;
 287         const char * const suffix;
 288         u32 features;
 289         u8 peci_mask;
 290         u8 old_peci_mask;
 291 };
 292
 293 #define FEAT_12MV_ADC           BIT(0)
 294 #define FEAT_NEWER_AUTOPWM      BIT(1)
 295 #define FEAT_OLD_AUTOPWM        BIT(2)
 296 #define FEAT_16BIT_FANS         BIT(3)
 297 #define FEAT_TEMP_OFFSET        BIT(4)
 298 #define FEAT_TEMP_PECI          BIT(5)
 299 #define FEAT_TEMP_OLD_PECI      BIT(6)
 300 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 301 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 302 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 303 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 304 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 305 #define FEAT_10_9MV_ADC         BIT(12)
 306 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 307 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 308 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 309 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 310 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 311 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 312 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 313 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 314 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 315 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 316
 317 static const struct it87_devices it87_devices[] = {
 318         [it87] = {
 319                 .name = "it87",
 320                 .suffix = "F",
 321                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 322         },
 323         [it8712] = {
 324                 .name = "it8712",
 325                 .suffix = "F",
 326                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 327                                                 /* may need to overwrite */
 328         },
 329         [it8716] = {
 330                 .name = "it8716",
 331                 .suffix = "F",
 332                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 333                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 334         },
 335         [it8718] = {
 336                 .name = "it8718",
 337                 .suffix = "F",
 338                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 339                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 340                   | FEAT_PWM_FREQ2,
 341                 .old_peci_mask = 0x4,
 342         },
 343         [it8720] = {
 344                 .name = "it8720",
 345                 .suffix = "F",
 346                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 347                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 348                   | FEAT_PWM_FREQ2,
 349                 .old_peci_mask = 0x4,
 350         },
 351         [it8721] = {
 352                 .name = "it8721",
 353                 .suffix = "F",
 354                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 355                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 356                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 357                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 358                 .peci_mask = 0x05,
 359                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 360         },
 361         [it8728] = {
 362                 .name = "it8728",
 363                 .suffix = "F",
 364                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 365                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 366                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING,
 367                 .peci_mask = 0x07,
 368         },
 369         [it8732] = {
 370                 .name = "it8732",
 371                 .suffix = "F",
 372                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 373                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 374                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 375                   | FEAT_FOUR_PWM,
 376                 .peci_mask = 0x07,
 377                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 378         },
 379         [it8771] = {
 380                 .name = "it8771",
 381                 .suffix = "E",
 382                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 383                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 384                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 385                                 /* PECI: guesswork */
 386                                 /* 12mV ADC (OHM) */
 387                                 /* 16 bit fans (OHM) */
 388                                 /* three fans, always 16 bit (guesswork) */
 389                 .peci_mask = 0x07,
 390         },
 391         [it8772] = {
 392                 .name = "it8772",
 393                 .suffix = "E",
 394                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 395                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 396                   | FEAT_PWM_FREQ2 | FEAT_SCALING,
 397                                 /* PECI (coreboot) */
 398                                 /* 12mV ADC (HWSensors4, OHM) */
 399                                 /* 16 bit fans (HWSensors4, OHM) */
 400                                 /* three fans, always 16 bit (datasheet) */
 401                 .peci_mask = 0x07,
 402         },
 403         [it8781] = {
 404                 .name = "it8781",
 405                 .suffix = "F",
 406                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 407                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 408                 .old_peci_mask = 0x4,
 409         },
 410         [it8782] = {
 411                 .name = "it8782",
 412                 .suffix = "F",
 413                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 414                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 415                 .old_peci_mask = 0x4,
 416         },
 417         [it8783] = {
 418                 .name = "it8783",
 419                 .suffix = "E/F",
 420                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 421                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 422                 .old_peci_mask = 0x4,
 423         },
 424         [it8786] = {
 425                 .name = "it8786",
 426                 .suffix = "E",
 427                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 428                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 429                   | FEAT_PWM_FREQ2,
 430                 .peci_mask = 0x07,
 431         },
 432         [it8790] = {
 433                 .name = "it8790",
 434                 .suffix = "E",
 435                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 436                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 437                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 438                 .peci_mask = 0x07,
 439         },
 440         [it8792] = {
 441                 .name = "it8792",
 442                 .suffix = "E",
 443                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 444                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 445                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 446                 .peci_mask = 0x07,
 447         },
 448         [it8603] = {
 449                 .name = "it8603",
 450                 .suffix = "E",
 451                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 452                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 453                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 454                 .peci_mask = 0x07,
 455         },
 456         [it8607] = {
 457                 .name = "it8607",
 458                 .suffix = "E",
 459                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 460                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 461                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 462                 .peci_mask = 0x07,
 463         },
 464         [it8620] = {
 465                 .name = "it8620",
 466                 .suffix = "E",
 467                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 468                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 469                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 470                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING,
 471                 .peci_mask = 0x07,
 472         },
 473         [it8622] = {
 474                 .name = "it8622",
 475                 .suffix = "E",
 476                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 477                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 478                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 479                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 480                 .peci_mask = 0x07,
 481         },
 482         [it8628] = {
 483                 .name = "it8628",
 484                 .suffix = "E",
 485                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 486                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 487                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 488                   | FEAT_SIX_TEMP | FEAT_SCALING,
 489                 .peci_mask = 0x07,
 490         },
 491         [it8686] = {
 492                 .name = "it8686",
 493                 .suffix = "E",
 494                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 495                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 496                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 497                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING,
 498                 .peci_mask = 0x07,
 499         },
 500 };
 501
 502 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 503 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 504 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 505 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 506 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 507 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 508 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 509                                  ((data)->peci_mask & BIT(nr)))
 510 #define has_temp_old_peci(data, nr) \
 511                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 512                                  ((data)->old_peci_mask & BIT(nr)))
 513 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 514 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 515                                                      FEAT_SIX_FANS))
 516 #define has_vid(data)           ((data)->features & FEAT_VID)
 517 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 518 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 519 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 520 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 521                                                      | FEAT_SIX_PWM))
 522 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 523 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 524 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 525 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 526 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 527                                                      FEAT_FIVE_FANS | \
 528                                                      FEAT_SIX_FANS))
 529 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 530                                                      FEAT_FIVE_PWM \
 531                                                      | FEAT_SIX_PWM))
 532 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 533 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 534
 535 struct it87_sio_data {
 536         enum chips type;
 537         /* Values read from Super-I/O config space */
 538         u8 revision;
 539         u8 vid_value;
 540         u8 beep_pin;
 541         u8 internal;    /* Internal sensors can be labeled */
 542         /* Features skipped based on config or DMI */
 543         u16 skip_in;
 544         u8 skip_vid;
 545         u8 skip_fan;
 546         u8 skip_pwm;
 547         u8 skip_temp;
 548 };
 549
 550 /*
 551  * For each registered chip, we need to keep some data in memory.
 552  * The structure is dynamically allocated.
 553  */
 554 struct it87_data {
 555         const struct attribute_group *groups[7];
 556         enum chips type;
 557         u32 features;
 558         u8 bank;
 559         u8 peci_mask;
 560         u8 old_peci_mask;
 561
 562         unsigned short addr;
 563         const char *name;
 564         struct mutex update_lock;
 565         char valid;             /* !=0 if following fields are valid */
 566         unsigned long last_updated;     /* In jiffies */
 567
 568         u16 in_scaled;          /* Internal voltage sensors are scaled */
 569         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 570         u16 has_in;             /* Bitfield, voltage sensors enabled */
 571         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 572         u8 has_fan;             /* Bitfield, fans enabled */
 573         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 574         u8 has_temp;            /* Bitfield, temp sensors enabled */
 575         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 576         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 577         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 578         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 579         bool has_vid;           /* True if VID supported */
 580         u8 vid;                 /* Register encoding, combined */
 581         u8 vrm;
 582         u32 alarms;             /* Register encoding, combined */
 583         bool has_beep;          /* true if beep supported */
 584         u8 beeps;               /* Register encoding */
 585         u8 fan_main_ctrl;       /* Register value */
 586         u8 fan_ctl;             /* Register value */
 587
 588         /*
 589          * The following 3 arrays correspond to the same registers up to
 590          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 591          * 7, and we want to preserve settings on mode changes, so we have
 592          * to track all values separately.
 593          * Starting with the IT8721F, the manual PWM duty cycles are stored
 594          * in separate registers (8-bit values), so the separate tracking
 595          * is no longer needed, but it is still done to keep the driver
 596          * simple.
 597          */
 598         u8 has_pwm;             /* Bitfield, pwm control enabled */
 599         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 600         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 601         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 602
 603         /* Automatic fan speed control registers */
 604         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 605         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 606 };
 607
 608 static int adc_lsb(const struct it87_data *data, int nr)
 609 {
 610         int lsb;
 611
 612         if (has_12mv_adc(data))
 613                 lsb = 120;
 614         else if (has_10_9mv_adc(data))
 615                 lsb = 109;
 616         else
 617                 lsb = 160;
 618         if (data->in_scaled & BIT(nr))
 619                 lsb <<= 1;
 620         return lsb;
 621 }
 622
 623 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 624 {
 625         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 626         return clamp_val(val, 0, 255);
 627 }
 628
 629 static int in_from_reg(const struct it87_data *data, int nr, int val)
 630 {
 631         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 632 }
 633
 634 static inline u8 FAN_TO_REG(long rpm, int div)
 635 {
 636         if (rpm == 0)
 637                 return 255;
 638         rpm = clamp_val(rpm, 1, 1000000);
 639         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 640 }
 641
 642 static inline u16 FAN16_TO_REG(long rpm)
 643 {
 644         if (rpm == 0)
 645                 return 0xffff;
 646         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 647 }
 648
 649 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 650                                 1350000 / ((val) * (div)))
 651 /* The divider is fixed to 2 in 16-bit mode */
 652 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 653                              1350000 / ((val) * 2))
 654
 655 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 656                                     ((val) + 500) / 1000), -128, 127))
 657 #define TEMP_FROM_REG(val) ((val) * 1000)
 658
 659 static u8 pwm_to_reg(const struct it87_data *data, long val)
 660 {
 661         if (has_newer_autopwm(data))
 662                 return val;
 663         else
 664                 return val >> 1;
 665 }
 666
 667 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 668 {
 669         if (has_newer_autopwm(data))
 670                 return reg;
 671         else
 672                 return (reg & 0x7f) << 1;
 673 }
 674
 675 static int DIV_TO_REG(int val)
 676 {
 677         int answer = 0;
 678
 679         while (answer < 7 && (val >>= 1))
 680                 answer++;
 681         return answer;
 682 }
 683
 684 #define DIV_FROM_REG(val) BIT(val)
 685
 686 /*
 687  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 688  * depending on the chip type, to calculate the actual PWM frequency.
 689  *
 690  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 691  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 692  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 693  * sometimes just one. It is unknown if this is a datasheet error or real,
 694  * so this is ignored for now.
 695  */
 696 static const unsigned int pwm_freq[8] = {
 697         48000000,
 698         24000000,
 699         12000000,
 700         8000000,
 701         6000000,
 702         3000000,
 703         1500000,
 704         750000,
 705 };
 706
 707 static int _it87_read_value(struct it87_data *data, u8 reg)
 708 {
 709         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 710         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 711 }
 712
 713 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 714 {
 715         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 716         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 717 }
 718
 719 static void it87_set_bank(struct it87_data *data, u8 bank)
 720 {
 721         if (has_bank_sel(data) && bank != data->bank) {
 722                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 723
 724                 breg &= 0x1f;
 725                 breg |= (bank << 5);
 726                 data->bank = bank;
 727                 _it87_write_value(data, IT87_REG_BANK, breg);
 728         }
 729 }
 730
 731 /*
 732  * Must be called with data->update_lock held, except during initialization.
 733  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 734  * would slow down the IT87 access and should not be necessary.
 735  */
 736 static int it87_read_value(struct it87_data *data, u16 reg)
 737 {
 738         it87_set_bank(data, reg >> 8);
 739         return _it87_read_value(data, reg & 0xff);
 740 }
 741
 742 /*
 743  * Must be called with data->update_lock held, except during initialization.
 744  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 745  * would slow down the IT87 access and should not be necessary.
 746  */
 747 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 748 {
 749         it87_set_bank(data, reg >> 8);
 750         _it87_write_value(data, reg & 0xff, value);
 751 }
 752
 753 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 754 {
 755         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 756         if (has_newer_autopwm(data)) {
 757                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 758                 data->pwm_duty[nr] = it87_read_value(data,
 759                                                      IT87_REG_PWM_DUTY[nr]);
 760         } else {
 761                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 762                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 763                 else                            /* Manual mode */
 764                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 765         }
 766
 767         if (has_old_autopwm(data)) {
 768                 int i;
 769
 770                 for (i = 0; i < 5 ; i++)
 771                         data->auto_temp[nr][i] = it87_read_value(data,
 772                                                 IT87_REG_AUTO_TEMP(nr, i));
 773                 for (i = 0; i < 3 ; i++)
 774                         data->auto_pwm[nr][i] = it87_read_value(data,
 775                                                 IT87_REG_AUTO_PWM(nr, i));
 776         } else if (has_newer_autopwm(data)) {
 777                 int i;
 778
 779                 /*
 780                  * 0: temperature hysteresis (base + 5)
 781                  * 1: fan off temperature (base + 0)
 782                  * 2: fan start temperature (base + 1)
 783                  * 3: fan max temperature (base + 2)
 784                  */
 785                 data->auto_temp[nr][0] =
 786                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 787
 788                 for (i = 0; i < 3 ; i++)
 789                         data->auto_temp[nr][i + 1] =
 790                                 it87_read_value(data,
 791                                                 IT87_REG_AUTO_TEMP(nr, i));
 792                 /*
 793                  * 0: start pwm value (base + 3)
 794                  * 1: pwm slope (base + 4, 1/8th pwm)
 795                  */
 796                 data->auto_pwm[nr][0] =
 797                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 798                 data->auto_pwm[nr][1] =
 799                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 800         }
 801 }
 802
 803 static struct it87_data *it87_update_device(struct device *dev)
 804 {
 805         struct it87_data *data = dev_get_drvdata(dev);
 806         int i;
 807
 808         mutex_lock(&data->update_lock);
 809
 810         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 811             !data->valid) {
 812                 if (update_vbat) {
 813                         /*
 814                          * Cleared after each update, so reenable.  Value
 815                          * returned by this read will be previous value
 816                          */
 817                         it87_write_value(data, IT87_REG_CONFIG,
 818                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 819                 }
 820                 for (i = 0; i < NUM_VIN; i++) {
 821                         if (!(data->has_in & BIT(i)))
 822                                 continue;
 823
 824                         data->in[i][0] =
 825                                 it87_read_value(data, IT87_REG_VIN[i]);
 826
 827                         /* VBAT and AVCC don't have limit registers */
 828                         if (i >= NUM_VIN_LIMIT)
 829                                 continue;
 830
 831                         data->in[i][1] =
 832                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 833                         data->in[i][2] =
 834                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 835                 }
 836
 837                 for (i = 0; i < NUM_FAN; i++) {
 838                         /* Skip disabled fans */
 839                         if (!(data->has_fan & BIT(i)))
 840                                 continue;
 841
 842                         data->fan[i][1] =
 843                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 844                         data->fan[i][0] = it87_read_value(data,
 845                                        IT87_REG_FAN[i]);
 846                         /* Add high byte if in 16-bit mode */
 847                         if (has_16bit_fans(data)) {
 848                                 data->fan[i][0] |= it87_read_value(data,
 849                                                 IT87_REG_FANX[i]) << 8;
 850                                 data->fan[i][1] |= it87_read_value(data,
 851                                                 IT87_REG_FANX_MIN[i]) << 8;
 852                         }
 853                 }
 854                 for (i = 0; i < NUM_TEMP; i++) {
 855                         if (!(data->has_temp & BIT(i)))
 856                                 continue;
 857                         data->temp[i][0] =
 858                                 it87_read_value(data, IT87_REG_TEMP(i));
 859
 860                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 861                                 data->temp[i][3] =
 862                                   it87_read_value(data,
 863                                                   IT87_REG_TEMP_OFFSET[i]);
 864
 865                         if (i >= NUM_TEMP_LIMIT)
 866                                 continue;
 867
 868                         data->temp[i][1] =
 869                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 870                         data->temp[i][2] =
 871                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 872                 }
 873
 874                 /* Newer chips don't have clock dividers */
 875                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 876                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 877                         data->fan_div[0] = i & 0x07;
 878                         data->fan_div[1] = (i >> 3) & 0x07;
 879                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 880                 }
 881
 882                 data->alarms =
 883                         it87_read_value(data, IT87_REG_ALARM1) |
 884                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 885                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 886                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 887
 888                 data->fan_main_ctrl = it87_read_value(data,
 889                                 IT87_REG_FAN_MAIN_CTRL);
 890                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 891                 for (i = 0; i < NUM_PWM; i++) {
 892                         if (!(data->has_pwm & BIT(i)))
 893                                 continue;
 894                         it87_update_pwm_ctrl(data, i);
 895                 }
 896
 897                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 898                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 899                 /*
 900                  * The IT8705F does not have VID capability.
 901                  * The IT8718F and later don't use IT87_REG_VID for the
 902                  * same purpose.
 903                  */
 904                 if (data->type == it8712 || data->type == it8716) {
 905                         data->vid = it87_read_value(data, IT87_REG_VID);
 906                         /*
 907                          * The older IT8712F revisions had only 5 VID pins,
 908                          * but we assume it is always safe to read 6 bits.
 909                          */
 910                         data->vid &= 0x3f;
 911                 }
 912                 data->last_updated = jiffies;
 913                 data->valid = 1;
 914         }
 915
 916         mutex_unlock(&data->update_lock);
 917
 918         return data;
 919 }
 920
 921 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 922                        char *buf)
 923 {
 924         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 925         struct it87_data *data = it87_update_device(dev);
 926         int index = sattr->index;
 927         int nr = sattr->nr;
 928
 929         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 930 }
 931
 932 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 933                       const char *buf, size_t count)
 934 {
 935         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 936         struct it87_data *data = dev_get_drvdata(dev);
 937         int index = sattr->index;
 938         int nr = sattr->nr;
 939         unsigned long val;
 940
 941         if (kstrtoul(buf, 10, &val) < 0)
 942                 return -EINVAL;
 943
 944         mutex_lock(&data->update_lock);
 945         data->in[nr][index] = in_to_reg(data, nr, val);
 946         it87_write_value(data,
 947                          index == 1 ? IT87_REG_VIN_MIN(nr)
 948                                     : IT87_REG_VIN_MAX(nr),
 949                          data->in[nr][index]);
 950         mutex_unlock(&data->update_lock);
 951         return count;
 952 }
 953
 954 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 955 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 956                             0, 1);
 957 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 958                             0, 2);
 959
 960 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 961 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 962                             1, 1);
 963 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 964                             1, 2);
 965
 966 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 967 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 968                             2, 1);
 969 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 970                             2, 2);
 971
 972 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 973 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 974                             3, 1);
 975 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 976                             3, 2);
 977
 978 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 979 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 980                             4, 1);
 981 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 982                             4, 2);
 983
 984 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 985 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 986                             5, 1);
 987 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 988                             5, 2);
 989
 990 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 991 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 992                             6, 1);
 993 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 994                             6, 2);
 995
 996 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 997 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 998                             7, 1);
 999 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1000                             7, 2);
1001
1002 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1003 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1004 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1005 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1006 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1007
1008 /* Up to 6 temperatures */
1009 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1010                          char *buf)
1011 {
1012         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1013         int nr = sattr->nr;
1014         int index = sattr->index;
1015         struct it87_data *data = it87_update_device(dev);
1016
1017         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1018 }
1019
1020 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1021                         const char *buf, size_t count)
1022 {
1023         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1024         int nr = sattr->nr;
1025         int index = sattr->index;
1026         struct it87_data *data = dev_get_drvdata(dev);
1027         long val;
1028         u8 reg, regval;
1029
1030         if (kstrtol(buf, 10, &val) < 0)
1031                 return -EINVAL;
1032
1033         mutex_lock(&data->update_lock);
1034
1035         switch (index) {
1036         default:
1037         case 1:
1038                 reg = IT87_REG_TEMP_LOW(nr);
1039                 break;
1040         case 2:
1041                 reg = IT87_REG_TEMP_HIGH(nr);
1042                 break;
1043         case 3:
1044                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1045                 if (!(regval & 0x80)) {
1046                         regval |= 0x80;
1047                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1048                 }
1049                 data->valid = 0;
1050                 reg = IT87_REG_TEMP_OFFSET[nr];
1051                 break;
1052         }
1053
1054         data->temp[nr][index] = TEMP_TO_REG(val);
1055         it87_write_value(data, reg, data->temp[nr][index]);
1056         mutex_unlock(&data->update_lock);
1057         return count;
1058 }
1059
1060 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1061 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1062                             0, 1);
1063 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1064                             0, 2);
1065 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1066                             set_temp, 0, 3);
1067 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1068 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1069                             1, 1);
1070 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1071                             1, 2);
1072 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1073                             set_temp, 1, 3);
1074 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1075 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1076                             2, 1);
1077 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1078                             2, 2);
1079 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1080                             set_temp, 2, 3);
1081 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1082 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1083 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1084
1085 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1086                               char *buf)
1087 {
1088         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1089         int nr = sensor_attr->index;
1090         struct it87_data *data = it87_update_device(dev);
1091         u8 reg = data->sensor;      /* In case value is updated while used */
1092         u8 extra = data->extra;
1093
1094         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1095             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1096                 return sprintf(buf, "6\n");  /* Intel PECI */
1097         if (reg & (1 << nr))
1098                 return sprintf(buf, "3\n");  /* thermal diode */
1099         if (reg & (8 << nr))
1100                 return sprintf(buf, "4\n");  /* thermistor */
1101         return sprintf(buf, "0\n");      /* disabled */
1102 }
1103
1104 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1105                              const char *buf, size_t count)
1106 {
1107         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1108         int nr = sensor_attr->index;
1109
1110         struct it87_data *data = dev_get_drvdata(dev);
1111         long val;
1112         u8 reg, extra;
1113
1114         if (kstrtol(buf, 10, &val) < 0)
1115                 return -EINVAL;
1116
1117         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1118         reg &= ~(1 << nr);
1119         reg &= ~(8 << nr);
1120         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1121                 reg &= 0x3f;
1122         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1123         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1124                 extra &= 0x7f;
1125         if (val == 2) { /* backwards compatibility */
1126                 dev_warn(dev,
1127                          "Sensor type 2 is deprecated, please use 4 instead\n");
1128                 val = 4;
1129         }
1130         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1131         if (val == 3)
1132                 reg |= 1 << nr;
1133         else if (val == 4)
1134                 reg |= 8 << nr;
1135         else if (has_temp_peci(data, nr) && val == 6)
1136                 reg |= (nr + 1) << 6;
1137         else if (has_temp_old_peci(data, nr) && val == 6)
1138                 extra |= 0x80;
1139         else if (val != 0)
1140                 return -EINVAL;
1141
1142         mutex_lock(&data->update_lock);
1143         data->sensor = reg;
1144         data->extra = extra;
1145         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1146         if (has_temp_old_peci(data, nr))
1147                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1148         data->valid = 0;        /* Force cache refresh */
1149         mutex_unlock(&data->update_lock);
1150         return count;
1151 }
1152
1153 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1154                           set_temp_type, 0);
1155 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1156                           set_temp_type, 1);
1157 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1158                           set_temp_type, 2);
1159
1160 /* 6 Fans */
1161
1162 static int pwm_mode(const struct it87_data *data, int nr)
1163 {
1164         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1165                 return 0;                               /* Full speed */
1166         if (data->pwm_ctrl[nr] & 0x80)
1167                 return 2;                               /* Automatic mode */
1168         if ((data->type == it8603 || nr >= 3) &&
1169             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1170                 return 0;                       /* Full speed */
1171
1172         return 1;                               /* Manual mode */
1173 }
1174
1175 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1176                         char *buf)
1177 {
1178         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1179         int nr = sattr->nr;
1180         int index = sattr->index;
1181         int speed;
1182         struct it87_data *data = it87_update_device(dev);
1183
1184         speed = has_16bit_fans(data) ?
1185                 FAN16_FROM_REG(data->fan[nr][index]) :
1186                 FAN_FROM_REG(data->fan[nr][index],
1187                              DIV_FROM_REG(data->fan_div[nr]));
1188         return sprintf(buf, "%d\n", speed);
1189 }
1190
1191 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1192                             char *buf)
1193 {
1194         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1195         struct it87_data *data = it87_update_device(dev);
1196         int nr = sensor_attr->index;
1197
1198         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1199 }
1200
1201 static ssize_t show_pwm_enable(struct device *dev,
1202                                struct device_attribute *attr, char *buf)
1203 {
1204         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1205         struct it87_data *data = it87_update_device(dev);
1206         int nr = sensor_attr->index;
1207
1208         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1209 }
1210
1211 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1212                         char *buf)
1213 {
1214         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1215         struct it87_data *data = it87_update_device(dev);
1216         int nr = sensor_attr->index;
1217
1218         return sprintf(buf, "%d\n",
1219                        pwm_from_reg(data, data->pwm_duty[nr]));
1220 }
1221
1222 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1223                              char *buf)
1224 {
1225         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1226         struct it87_data *data = it87_update_device(dev);
1227         int nr = sensor_attr->index;
1228         unsigned int freq;
1229         int index;
1230
1231         if (has_pwm_freq2(data) && nr == 1)
1232                 index = (data->extra >> 4) & 0x07;
1233         else
1234                 index = (data->fan_ctl >> 4) & 0x07;
1235
1236         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1237
1238         return sprintf(buf, "%u\n", freq);
1239 }
1240
1241 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1242                        const char *buf, size_t count)
1243 {
1244         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1245         int nr = sattr->nr;
1246         int index = sattr->index;
1247
1248         struct it87_data *data = dev_get_drvdata(dev);
1249         long val;
1250         u8 reg;
1251
1252         if (kstrtol(buf, 10, &val) < 0)
1253                 return -EINVAL;
1254
1255         mutex_lock(&data->update_lock);
1256
1257         if (has_16bit_fans(data)) {
1258                 data->fan[nr][index] = FAN16_TO_REG(val);
1259                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1260                                  data->fan[nr][index] & 0xff);
1261                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1262                                  data->fan[nr][index] >> 8);
1263         } else {
1264                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1265                 switch (nr) {
1266                 case 0:
1267                         data->fan_div[nr] = reg & 0x07;
1268                         break;
1269                 case 1:
1270                         data->fan_div[nr] = (reg >> 3) & 0x07;
1271                         break;
1272                 case 2:
1273                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1274                         break;
1275                 }
1276                 data->fan[nr][index] =
1277                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1278                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1279                                  data->fan[nr][index]);
1280         }
1281
1282         mutex_unlock(&data->update_lock);
1283         return count;
1284 }
1285
1286 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1287                            const char *buf, size_t count)
1288 {
1289         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1290         struct it87_data *data = dev_get_drvdata(dev);
1291         int nr = sensor_attr->index;
1292         unsigned long val;
1293         int min;
1294         u8 old;
1295
1296         if (kstrtoul(buf, 10, &val) < 0)
1297                 return -EINVAL;
1298
1299         mutex_lock(&data->update_lock);
1300         old = it87_read_value(data, IT87_REG_FAN_DIV);
1301
1302         /* Save fan min limit */
1303         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1304
1305         switch (nr) {
1306         case 0:
1307         case 1:
1308                 data->fan_div[nr] = DIV_TO_REG(val);
1309                 break;
1310         case 2:
1311                 if (val < 8)
1312                         data->fan_div[nr] = 1;
1313                 else
1314                         data->fan_div[nr] = 3;
1315         }
1316         val = old & 0x80;
1317         val |= (data->fan_div[0] & 0x07);
1318         val |= (data->fan_div[1] & 0x07) << 3;
1319         if (data->fan_div[2] == 3)
1320                 val |= 0x1 << 6;
1321         it87_write_value(data, IT87_REG_FAN_DIV, val);
1322
1323         /* Restore fan min limit */
1324         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1325         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1326
1327         mutex_unlock(&data->update_lock);
1328         return count;
1329 }
1330
1331 /* Returns 0 if OK, -EINVAL otherwise */
1332 static int check_trip_points(struct device *dev, int nr)
1333 {
1334         const struct it87_data *data = dev_get_drvdata(dev);
1335         int i, err = 0;
1336
1337         if (has_old_autopwm(data)) {
1338                 for (i = 0; i < 3; i++) {
1339                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1340                                 err = -EINVAL;
1341                 }
1342                 for (i = 0; i < 2; i++) {
1343                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1344                                 err = -EINVAL;
1345                 }
1346         } else if (has_newer_autopwm(data)) {
1347                 for (i = 1; i < 3; i++) {
1348                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1349                                 err = -EINVAL;
1350                 }
1351         }
1352
1353         if (err) {
1354                 dev_err(dev,
1355                         "Inconsistent trip points, not switching to automatic mode\n");
1356                 dev_err(dev, "Adjust the trip points and try again\n");
1357         }
1358         return err;
1359 }
1360
1361 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1362                               const char *buf, size_t count)
1363 {
1364         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1365         struct it87_data *data = dev_get_drvdata(dev);
1366         int nr = sensor_attr->index;
1367         long val;
1368
1369         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1370                 return -EINVAL;
1371
1372         /* Check trip points before switching to automatic mode */
1373         if (val == 2) {
1374                 if (check_trip_points(dev, nr) < 0)
1375                         return -EINVAL;
1376         }
1377
1378         mutex_lock(&data->update_lock);
1379
1380         if (val == 0) {
1381                 if (nr < 3 && data->type != it8603) {
1382                         int tmp;
1383                         /* make sure the fan is on when in on/off mode */
1384                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1385                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1386                         /* set on/off mode */
1387                         data->fan_main_ctrl &= ~BIT(nr);
1388                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1389                                          data->fan_main_ctrl);
1390                 } else {
1391                         u8 ctrl;
1392
1393                         /* No on/off mode, set maximum pwm value */
1394                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1395                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1396                                          data->pwm_duty[nr]);
1397                         /* and set manual mode */
1398                         if (has_newer_autopwm(data)) {
1399                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1400                                         data->pwm_temp_map[nr];
1401                         } else {
1402                                 ctrl = data->pwm_duty[nr];
1403                         }
1404                         data->pwm_ctrl[nr] = ctrl;
1405                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1406                 }
1407         } else {
1408                 u8 ctrl;
1409
1410                 if (has_newer_autopwm(data)) {
1411                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1412                                 data->pwm_temp_map[nr];
1413                         if (val != 1)
1414                                 ctrl |= 0x80;
1415                 } else {
1416                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1417                 }
1418                 data->pwm_ctrl[nr] = ctrl;
1419                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1420
1421                 if (data->type != it8603 && nr < 3) {
1422                         /* set SmartGuardian mode */
1423                         data->fan_main_ctrl |= BIT(nr);
1424                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1425                                          data->fan_main_ctrl);
1426                 }
1427         }
1428
1429         mutex_unlock(&data->update_lock);
1430         return count;
1431 }
1432
1433 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1434                        const char *buf, size_t count)
1435 {
1436         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1437         struct it87_data *data = dev_get_drvdata(dev);
1438         int nr = sensor_attr->index;
1439         long val;
1440
1441         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1442                 return -EINVAL;
1443
1444         mutex_lock(&data->update_lock);
1445         it87_update_pwm_ctrl(data, nr);
1446         if (has_newer_autopwm(data)) {
1447                 /*
1448                  * If we are in automatic mode, the PWM duty cycle register
1449                  * is read-only so we can't write the value.
1450                  */
1451                 if (data->pwm_ctrl[nr] & 0x80) {
1452                         mutex_unlock(&data->update_lock);
1453                         return -EBUSY;
1454                 }
1455                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1456                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1457                                  data->pwm_duty[nr]);
1458         } else {
1459                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1460                 /*
1461                  * If we are in manual mode, write the duty cycle immediately;
1462                  * otherwise, just store it for later use.
1463                  */
1464                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1465                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1466                         it87_write_value(data, IT87_REG_PWM[nr],
1467                                          data->pwm_ctrl[nr]);
1468                 }
1469         }
1470         mutex_unlock(&data->update_lock);
1471         return count;
1472 }
1473
1474 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1475                             const char *buf, size_t count)
1476 {
1477         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1478         struct it87_data *data = dev_get_drvdata(dev);
1479         int nr = sensor_attr->index;
1480         unsigned long val;
1481         int i;
1482
1483         if (kstrtoul(buf, 10, &val) < 0)
1484                 return -EINVAL;
1485
1486         val = clamp_val(val, 0, 1000000);
1487         val *= has_newer_autopwm(data) ? 256 : 128;
1488
1489         /* Search for the nearest available frequency */
1490         for (i = 0; i < 7; i++) {
1491                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1492                         break;
1493         }
1494
1495         mutex_lock(&data->update_lock);
1496         if (nr == 0) {
1497                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1498                 data->fan_ctl |= i << 4;
1499                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1500         } else {
1501                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1502                 data->extra |= i << 4;
1503                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1504         }
1505         mutex_unlock(&data->update_lock);
1506
1507         return count;
1508 }
1509
1510 static ssize_t show_pwm_temp_map(struct device *dev,
1511                                  struct device_attribute *attr, char *buf)
1512 {
1513         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1514         struct it87_data *data = it87_update_device(dev);
1515         int nr = sensor_attr->index;
1516         int map;
1517
1518         map = data->pwm_temp_map[nr];
1519         if (map >= 3)
1520                 map = 0;        /* Should never happen */
1521         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1522                 map += 3;
1523
1524         return sprintf(buf, "%d\n", (int)BIT(map));
1525 }
1526
1527 static ssize_t set_pwm_temp_map(struct device *dev,
1528                                 struct device_attribute *attr, const char *buf,
1529                                 size_t count)
1530 {
1531         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1532         struct it87_data *data = dev_get_drvdata(dev);
1533         int nr = sensor_attr->index;
1534         long val;
1535         u8 reg;
1536
1537         if (kstrtol(buf, 10, &val) < 0)
1538                 return -EINVAL;
1539
1540         if (nr >= 3)
1541                 val -= 3;
1542
1543         switch (val) {
1544         case BIT(0):
1545                 reg = 0x00;
1546                 break;
1547         case BIT(1):
1548                 reg = 0x01;
1549                 break;
1550         case BIT(2):
1551                 reg = 0x02;
1552                 break;
1553         default:
1554                 return -EINVAL;
1555         }
1556
1557         mutex_lock(&data->update_lock);
1558         it87_update_pwm_ctrl(data, nr);
1559         data->pwm_temp_map[nr] = reg;
1560         /*
1561          * If we are in automatic mode, write the temp mapping immediately;
1562          * otherwise, just store it for later use.
1563          */
1564         if (data->pwm_ctrl[nr] & 0x80) {
1565                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1566                                                 data->pwm_temp_map[nr];
1567                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1568         }
1569         mutex_unlock(&data->update_lock);
1570         return count;
1571 }
1572
1573 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1574                              char *buf)
1575 {
1576         struct it87_data *data = it87_update_device(dev);
1577         struct sensor_device_attribute_2 *sensor_attr =
1578                         to_sensor_dev_attr_2(attr);
1579         int nr = sensor_attr->nr;
1580         int point = sensor_attr->index;
1581
1582         return sprintf(buf, "%d\n",
1583                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1584 }
1585
1586 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1587                             const char *buf, size_t count)
1588 {
1589         struct it87_data *data = dev_get_drvdata(dev);
1590         struct sensor_device_attribute_2 *sensor_attr =
1591                         to_sensor_dev_attr_2(attr);
1592         int nr = sensor_attr->nr;
1593         int point = sensor_attr->index;
1594         int regaddr;
1595         long val;
1596
1597         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1598                 return -EINVAL;
1599
1600         mutex_lock(&data->update_lock);
1601         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1602         if (has_newer_autopwm(data))
1603                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1604         else
1605                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1606         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1607         mutex_unlock(&data->update_lock);
1608         return count;
1609 }
1610
1611 static ssize_t show_auto_pwm_slope(struct device *dev,
1612                                    struct device_attribute *attr, char *buf)
1613 {
1614         struct it87_data *data = it87_update_device(dev);
1615         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1616         int nr = sensor_attr->index;
1617
1618         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1619 }
1620
1621 static ssize_t set_auto_pwm_slope(struct device *dev,
1622                                   struct device_attribute *attr,
1623                                   const char *buf, size_t count)
1624 {
1625         struct it87_data *data = dev_get_drvdata(dev);
1626         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1627         int nr = sensor_attr->index;
1628         unsigned long val;
1629
1630         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1631                 return -EINVAL;
1632
1633         mutex_lock(&data->update_lock);
1634         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1635         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1636                          data->auto_pwm[nr][1]);
1637         mutex_unlock(&data->update_lock);
1638         return count;
1639 }
1640
1641 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1642                               char *buf)
1643 {
1644         struct it87_data *data = it87_update_device(dev);
1645         struct sensor_device_attribute_2 *sensor_attr =
1646                         to_sensor_dev_attr_2(attr);
1647         int nr = sensor_attr->nr;
1648         int point = sensor_attr->index;
1649         int reg;
1650
1651         if (has_old_autopwm(data) || point)
1652                 reg = data->auto_temp[nr][point];
1653         else
1654                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1655
1656         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1657 }
1658
1659 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1660                              const char *buf, size_t count)
1661 {
1662         struct it87_data *data = dev_get_drvdata(dev);
1663         struct sensor_device_attribute_2 *sensor_attr =
1664                         to_sensor_dev_attr_2(attr);
1665         int nr = sensor_attr->nr;
1666         int point = sensor_attr->index;
1667         long val;
1668         int reg;
1669
1670         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1671                 return -EINVAL;
1672
1673         mutex_lock(&data->update_lock);
1674         if (has_newer_autopwm(data) && !point) {
1675                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1676                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1677                 data->auto_temp[nr][0] = reg;
1678                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1679         } else {
1680                 reg = TEMP_TO_REG(val);
1681                 data->auto_temp[nr][point] = reg;
1682                 if (has_newer_autopwm(data))
1683                         point--;
1684                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1685         }
1686         mutex_unlock(&data->update_lock);
1687         return count;
1688 }
1689
1690 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1691 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1692                             0, 1);
1693 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1694                           set_fan_div, 0);
1695
1696 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1697 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1698                             1, 1);
1699 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1700                           set_fan_div, 1);
1701
1702 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1703 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1704                             2, 1);
1705 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1706                           set_fan_div, 2);
1707
1708 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1709 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1710                             3, 1);
1711
1712 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1713 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1714                             4, 1);
1715
1716 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1717 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1718                             5, 1);
1719
1720 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1721                           show_pwm_enable, set_pwm_enable, 0);
1722 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1723 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1724                           set_pwm_freq, 0);
1725 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1726                           show_pwm_temp_map, set_pwm_temp_map, 0);
1727 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1728                             show_auto_pwm, set_auto_pwm, 0, 0);
1729 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1730                             show_auto_pwm, set_auto_pwm, 0, 1);
1731 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1732                             show_auto_pwm, set_auto_pwm, 0, 2);
1733 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1734                             show_auto_pwm, NULL, 0, 3);
1735 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1736                             show_auto_temp, set_auto_temp, 0, 1);
1737 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1738                             show_auto_temp, set_auto_temp, 0, 0);
1739 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1740                             show_auto_temp, set_auto_temp, 0, 2);
1741 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1742                             show_auto_temp, set_auto_temp, 0, 3);
1743 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1744                             show_auto_temp, set_auto_temp, 0, 4);
1745 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1746                             show_auto_pwm, set_auto_pwm, 0, 0);
1747 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1748                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1749
1750 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1751                           show_pwm_enable, set_pwm_enable, 1);
1752 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1753 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1754 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1755                           show_pwm_temp_map, set_pwm_temp_map, 1);
1756 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1757                             show_auto_pwm, set_auto_pwm, 1, 0);
1758 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1759                             show_auto_pwm, set_auto_pwm, 1, 1);
1760 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1761                             show_auto_pwm, set_auto_pwm, 1, 2);
1762 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1763                             show_auto_pwm, NULL, 1, 3);
1764 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1765                             show_auto_temp, set_auto_temp, 1, 1);
1766 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1767                             show_auto_temp, set_auto_temp, 1, 0);
1768 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1769                             show_auto_temp, set_auto_temp, 1, 2);
1770 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1771                             show_auto_temp, set_auto_temp, 1, 3);
1772 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1773                             show_auto_temp, set_auto_temp, 1, 4);
1774 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1775                             show_auto_pwm, set_auto_pwm, 1, 0);
1776 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1777                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1778
1779 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1780                           show_pwm_enable, set_pwm_enable, 2);
1781 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1782 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1783 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1784                           show_pwm_temp_map, set_pwm_temp_map, 2);
1785 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1786                             show_auto_pwm, set_auto_pwm, 2, 0);
1787 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1788                             show_auto_pwm, set_auto_pwm, 2, 1);
1789 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1790                             show_auto_pwm, set_auto_pwm, 2, 2);
1791 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1792                             show_auto_pwm, NULL, 2, 3);
1793 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1794                             show_auto_temp, set_auto_temp, 2, 1);
1795 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1796                             show_auto_temp, set_auto_temp, 2, 0);
1797 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1798                             show_auto_temp, set_auto_temp, 2, 2);
1799 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1800                             show_auto_temp, set_auto_temp, 2, 3);
1801 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1802                             show_auto_temp, set_auto_temp, 2, 4);
1803 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1804                             show_auto_pwm, set_auto_pwm, 2, 0);
1805 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1806                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1807
1808 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1809                           show_pwm_enable, set_pwm_enable, 3);
1810 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1811 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1812 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1813                           show_pwm_temp_map, set_pwm_temp_map, 3);
1814 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1815                             show_auto_temp, set_auto_temp, 2, 1);
1816 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1817                             show_auto_temp, set_auto_temp, 2, 0);
1818 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1819                             show_auto_temp, set_auto_temp, 2, 2);
1820 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1821                             show_auto_temp, set_auto_temp, 2, 3);
1822 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1823                             show_auto_pwm, set_auto_pwm, 3, 0);
1824 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1825                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1826
1827 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1828                           show_pwm_enable, set_pwm_enable, 4);
1829 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1830 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1831 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1832                           show_pwm_temp_map, set_pwm_temp_map, 4);
1833 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1834                             show_auto_temp, set_auto_temp, 2, 1);
1835 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1836                             show_auto_temp, set_auto_temp, 2, 0);
1837 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1838                             show_auto_temp, set_auto_temp, 2, 2);
1839 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1840                             show_auto_temp, set_auto_temp, 2, 3);
1841 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1842                             show_auto_pwm, set_auto_pwm, 4, 0);
1843 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1844                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1845
1846 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1847                           show_pwm_enable, set_pwm_enable, 5);
1848 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1849 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1850 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1851                           show_pwm_temp_map, set_pwm_temp_map, 5);
1852 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1853                             show_auto_temp, set_auto_temp, 2, 1);
1854 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1855                             show_auto_temp, set_auto_temp, 2, 0);
1856 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1857                             show_auto_temp, set_auto_temp, 2, 2);
1858 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1859                             show_auto_temp, set_auto_temp, 2, 3);
1860 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1861                             show_auto_pwm, set_auto_pwm, 5, 0);
1862 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1863                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1864
1865 /* Alarms */
1866 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1867                            char *buf)
1868 {
1869         struct it87_data *data = it87_update_device(dev);
1870
1871         return sprintf(buf, "%u\n", data->alarms);
1872 }
1873 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1874
1875 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1876                           char *buf)
1877 {
1878         struct it87_data *data = it87_update_device(dev);
1879         int bitnr = to_sensor_dev_attr(attr)->index;
1880
1881         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1882 }
1883
1884 static ssize_t clear_intrusion(struct device *dev,
1885                                struct device_attribute *attr, const char *buf,
1886                                size_t count)
1887 {
1888         struct it87_data *data = dev_get_drvdata(dev);
1889         int config;
1890         long val;
1891
1892         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1893                 return -EINVAL;
1894
1895         mutex_lock(&data->update_lock);
1896         config = it87_read_value(data, IT87_REG_CONFIG);
1897         if (config < 0) {
1898                 count = config;
1899         } else {
1900                 config |= BIT(5);
1901                 it87_write_value(data, IT87_REG_CONFIG, config);
1902                 /* Invalidate cache to force re-read */
1903                 data->valid = 0;
1904         }
1905         mutex_unlock(&data->update_lock);
1906
1907         return count;
1908 }
1909
1910 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1911 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1912 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1913 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1914 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1915 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1916 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1917 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1918 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1919 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1920 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1921 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1922 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1923 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1924 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1925 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1926 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1927 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1928                           show_alarm, clear_intrusion, 4);
1929
1930 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1931                          char *buf)
1932 {
1933         struct it87_data *data = it87_update_device(dev);
1934         int bitnr = to_sensor_dev_attr(attr)->index;
1935
1936         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1937 }
1938
1939 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1940                         const char *buf, size_t count)
1941 {
1942         int bitnr = to_sensor_dev_attr(attr)->index;
1943         struct it87_data *data = dev_get_drvdata(dev);
1944         long val;
1945
1946         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1947                 return -EINVAL;
1948
1949         mutex_lock(&data->update_lock);
1950         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1951         if (val)
1952                 data->beeps |= BIT(bitnr);
1953         else
1954                 data->beeps &= ~BIT(bitnr);
1955         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1956         mutex_unlock(&data->update_lock);
1957         return count;
1958 }
1959
1960 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1961                           show_beep, set_beep, 1);
1962 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1963 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1964 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1965 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1966 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1967 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1968 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1969 /* fanX_beep writability is set later */
1970 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1971 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1972 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1973 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1974 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1975 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1976 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1977                           show_beep, set_beep, 2);
1978 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1979 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1980
1981 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1982                             char *buf)
1983 {
1984         struct it87_data *data = dev_get_drvdata(dev);
1985
1986         return sprintf(buf, "%u\n", data->vrm);
1987 }
1988
1989 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1990                              const char *buf, size_t count)
1991 {
1992         struct it87_data *data = dev_get_drvdata(dev);
1993         unsigned long val;
1994
1995         if (kstrtoul(buf, 10, &val) < 0)
1996                 return -EINVAL;
1997
1998         data->vrm = val;
1999
2000         return count;
2001 }
2002 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2003
2004 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2005                             char *buf)
2006 {
2007         struct it87_data *data = it87_update_device(dev);
2008
2009         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2010 }
2011 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2012
2013 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2014                           char *buf)
2015 {
2016         static const char * const labels[] = {
2017                 "+5V",
2018                 "5VSB",
2019                 "Vbat",
2020                 "AVCC",
2021         };
2022         static const char * const labels_it8721[] = {
2023                 "+3.3V",
2024                 "3VSB",
2025                 "Vbat",
2026                 "+3.3V",
2027         };
2028         struct it87_data *data = dev_get_drvdata(dev);
2029         int nr = to_sensor_dev_attr(attr)->index;
2030         const char *label;
2031
2032         if (has_vin3_5v(data) && nr == 0)
2033                 label = labels[0];
2034         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2035                 label = labels_it8721[nr];
2036         else
2037                 label = labels[nr];
2038
2039         return sprintf(buf, "%s\n", label);
2040 }
2041 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2042 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2043 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2044 /* AVCC3 */
2045 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2046
2047 static umode_t it87_in_is_visible(struct kobject *kobj,
2048                                   struct attribute *attr, int index)
2049 {
2050         struct device *dev = container_of(kobj, struct device, kobj);
2051         struct it87_data *data = dev_get_drvdata(dev);
2052         int i = index / 5;      /* voltage index */
2053         int a = index % 5;      /* attribute index */
2054
2055         if (index >= 40) {      /* in8 and higher only have input attributes */
2056                 i = index - 40 + 8;
2057                 a = 0;
2058         }
2059
2060         if (!(data->has_in & BIT(i)))
2061                 return 0;
2062
2063         if (a == 4 && !data->has_beep)
2064                 return 0;
2065
2066         return attr->mode;
2067 }
2068
2069 static struct attribute *it87_attributes_in[] = {
2070         &sensor_dev_attr_in0_input.dev_attr.attr,
2071         &sensor_dev_attr_in0_min.dev_attr.attr,
2072         &sensor_dev_attr_in0_max.dev_attr.attr,
2073         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2074         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2075
2076         &sensor_dev_attr_in1_input.dev_attr.attr,
2077         &sensor_dev_attr_in1_min.dev_attr.attr,
2078         &sensor_dev_attr_in1_max.dev_attr.attr,
2079         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2080         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2081
2082         &sensor_dev_attr_in2_input.dev_attr.attr,
2083         &sensor_dev_attr_in2_min.dev_attr.attr,
2084         &sensor_dev_attr_in2_max.dev_attr.attr,
2085         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2086         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2087
2088         &sensor_dev_attr_in3_input.dev_attr.attr,
2089         &sensor_dev_attr_in3_min.dev_attr.attr,
2090         &sensor_dev_attr_in3_max.dev_attr.attr,
2091         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2092         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2093
2094         &sensor_dev_attr_in4_input.dev_attr.attr,
2095         &sensor_dev_attr_in4_min.dev_attr.attr,
2096         &sensor_dev_attr_in4_max.dev_attr.attr,
2097         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2098         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2099
2100         &sensor_dev_attr_in5_input.dev_attr.attr,
2101         &sensor_dev_attr_in5_min.dev_attr.attr,
2102         &sensor_dev_attr_in5_max.dev_attr.attr,
2103         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2104         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2105
2106         &sensor_dev_attr_in6_input.dev_attr.attr,
2107         &sensor_dev_attr_in6_min.dev_attr.attr,
2108         &sensor_dev_attr_in6_max.dev_attr.attr,
2109         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2110         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2111
2112         &sensor_dev_attr_in7_input.dev_attr.attr,
2113         &sensor_dev_attr_in7_min.dev_attr.attr,
2114         &sensor_dev_attr_in7_max.dev_attr.attr,
2115         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2116         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2117
2118         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2119         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2120         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 41 */
2121         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 41 */
2122         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 41 */
2123         NULL
2124 };
2125
2126 static const struct attribute_group it87_group_in = {
2127         .attrs = it87_attributes_in,
2128         .is_visible = it87_in_is_visible,
2129 };
2130
2131 static umode_t it87_temp_is_visible(struct kobject *kobj,
2132                                     struct attribute *attr, int index)
2133 {
2134         struct device *dev = container_of(kobj, struct device, kobj);
2135         struct it87_data *data = dev_get_drvdata(dev);
2136         int i = index / 7;      /* temperature index */
2137         int a = index % 7;      /* attribute index */
2138
2139         if (index >= 21) {
2140                 i = index - 21 + 3;
2141                 a = 0;
2142         }
2143
2144         if (!(data->has_temp & BIT(i)))
2145                 return 0;
2146
2147         if (a == 5 && !has_temp_offset(data))
2148                 return 0;
2149
2150         if (a == 6 && !data->has_beep)
2151                 return 0;
2152
2153         return attr->mode;
2154 }
2155
2156 static struct attribute *it87_attributes_temp[] = {
2157         &sensor_dev_attr_temp1_input.dev_attr.attr,
2158         &sensor_dev_attr_temp1_max.dev_attr.attr,
2159         &sensor_dev_attr_temp1_min.dev_attr.attr,
2160         &sensor_dev_attr_temp1_type.dev_attr.attr,
2161         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2162         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2163         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2164
2165         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2166         &sensor_dev_attr_temp2_max.dev_attr.attr,
2167         &sensor_dev_attr_temp2_min.dev_attr.attr,
2168         &sensor_dev_attr_temp2_type.dev_attr.attr,
2169         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2170         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2171         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2172
2173         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2174         &sensor_dev_attr_temp3_max.dev_attr.attr,
2175         &sensor_dev_attr_temp3_min.dev_attr.attr,
2176         &sensor_dev_attr_temp3_type.dev_attr.attr,
2177         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2178         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2179         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2180
2181         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2182         &sensor_dev_attr_temp5_input.dev_attr.attr,
2183         &sensor_dev_attr_temp6_input.dev_attr.attr,
2184         NULL
2185 };
2186
2187 static const struct attribute_group it87_group_temp = {
2188         .attrs = it87_attributes_temp,
2189         .is_visible = it87_temp_is_visible,
2190 };
2191
2192 static umode_t it87_is_visible(struct kobject *kobj,
2193                                struct attribute *attr, int index)
2194 {
2195         struct device *dev = container_of(kobj, struct device, kobj);
2196         struct it87_data *data = dev_get_drvdata(dev);
2197
2198         if ((index == 2 || index == 3) && !data->has_vid)
2199                 return 0;
2200
2201         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2202                 return 0;
2203
2204         return attr->mode;
2205 }
2206
2207 static struct attribute *it87_attributes[] = {
2208         &dev_attr_alarms.attr,
2209         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2210         &dev_attr_vrm.attr,                             /* 2 */
2211         &dev_attr_cpu0_vid.attr,                        /* 3 */
2212         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2213         &sensor_dev_attr_in7_label.dev_attr.attr,
2214         &sensor_dev_attr_in8_label.dev_attr.attr,
2215         &sensor_dev_attr_in9_label.dev_attr.attr,
2216         NULL
2217 };
2218
2219 static const struct attribute_group it87_group = {
2220         .attrs = it87_attributes,
2221         .is_visible = it87_is_visible,
2222 };
2223
2224 static umode_t it87_fan_is_visible(struct kobject *kobj,
2225                                    struct attribute *attr, int index)
2226 {
2227         struct device *dev = container_of(kobj, struct device, kobj);
2228         struct it87_data *data = dev_get_drvdata(dev);
2229         int i = index / 5;      /* fan index */
2230         int a = index % 5;      /* attribute index */
2231
2232         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2233                 i = (index - 15) / 4 + 3;
2234                 a = (index - 15) % 4;
2235         }
2236
2237         if (!(data->has_fan & BIT(i)))
2238                 return 0;
2239
2240         if (a == 3) {                           /* beep */
2241                 if (!data->has_beep)
2242                         return 0;
2243                 /* first fan beep attribute is writable */
2244                 if (i == __ffs(data->has_fan))
2245                         return attr->mode | S_IWUSR;
2246         }
2247
2248         if (a == 4 && has_16bit_fans(data))     /* divisor */
2249                 return 0;
2250
2251         return attr->mode;
2252 }
2253
2254 static struct attribute *it87_attributes_fan[] = {
2255         &sensor_dev_attr_fan1_input.dev_attr.attr,
2256         &sensor_dev_attr_fan1_min.dev_attr.attr,
2257         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2258         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2259         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2260
2261         &sensor_dev_attr_fan2_input.dev_attr.attr,
2262         &sensor_dev_attr_fan2_min.dev_attr.attr,
2263         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2264         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2265         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2266
2267         &sensor_dev_attr_fan3_input.dev_attr.attr,
2268         &sensor_dev_attr_fan3_min.dev_attr.attr,
2269         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2270         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2271         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2272
2273         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2274         &sensor_dev_attr_fan4_min.dev_attr.attr,
2275         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2276         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2277
2278         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2279         &sensor_dev_attr_fan5_min.dev_attr.attr,
2280         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2281         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2282
2283         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2284         &sensor_dev_attr_fan6_min.dev_attr.attr,
2285         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2286         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2287         NULL
2288 };
2289
2290 static const struct attribute_group it87_group_fan = {
2291         .attrs = it87_attributes_fan,
2292         .is_visible = it87_fan_is_visible,
2293 };
2294
2295 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2296                                    struct attribute *attr, int index)
2297 {
2298         struct device *dev = container_of(kobj, struct device, kobj);
2299         struct it87_data *data = dev_get_drvdata(dev);
2300         int i = index / 4;      /* pwm index */
2301         int a = index % 4;      /* attribute index */
2302
2303         if (!(data->has_pwm & BIT(i)))
2304                 return 0;
2305
2306         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2307         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2308                 return attr->mode | S_IWUSR;
2309
2310         /* pwm2_freq is writable if there are two pwm frequency selects */
2311         if (has_pwm_freq2(data) && i == 1 && a == 2)
2312                 return attr->mode | S_IWUSR;
2313
2314         return attr->mode;
2315 }
2316
2317 static struct attribute *it87_attributes_pwm[] = {
2318         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2319         &sensor_dev_attr_pwm1.dev_attr.attr,
2320         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2321         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2322
2323         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2324         &sensor_dev_attr_pwm2.dev_attr.attr,
2325         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2326         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2327
2328         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2329         &sensor_dev_attr_pwm3.dev_attr.attr,
2330         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2331         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2332
2333         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2334         &sensor_dev_attr_pwm4.dev_attr.attr,
2335         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2336         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2337
2338         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2339         &sensor_dev_attr_pwm5.dev_attr.attr,
2340         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2341         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2342
2343         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2344         &sensor_dev_attr_pwm6.dev_attr.attr,
2345         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2346         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2347
2348         NULL
2349 };
2350
2351 static const struct attribute_group it87_group_pwm = {
2352         .attrs = it87_attributes_pwm,
2353         .is_visible = it87_pwm_is_visible,
2354 };
2355
2356 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2357                                         struct attribute *attr, int index)
2358 {
2359         struct device *dev = container_of(kobj, struct device, kobj);
2360         struct it87_data *data = dev_get_drvdata(dev);
2361         int i = index / 11;     /* pwm index */
2362         int a = index % 11;     /* attribute index */
2363
2364         if (index >= 33) {      /* pwm 4..6 */
2365                 i = (index - 33) / 6 + 3;
2366                 a = (index - 33) % 6 + 4;
2367         }
2368
2369         if (!(data->has_pwm & BIT(i)))
2370                 return 0;
2371
2372         if (has_newer_autopwm(data)) {
2373                 if (a < 4)      /* no auto point pwm */
2374                         return 0;
2375                 if (a == 8)     /* no auto_point4 */
2376                         return 0;
2377         }
2378         if (has_old_autopwm(data)) {
2379                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2380                         return 0;
2381         }
2382
2383         return attr->mode;
2384 }
2385
2386 static struct attribute *it87_attributes_auto_pwm[] = {
2387         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2388         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2389         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2390         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2391         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2392         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2393         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2394         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2395         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2396         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2397         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2398
2399         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2400         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2401         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2402         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2403         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2404         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2405         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2406         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2407         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2408         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2409         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2410
2411         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2412         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2413         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2414         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2415         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2416         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2417         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2418         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2419         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2420         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2421         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2422
2423         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2424         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2425         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2426         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2427         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2428         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2429
2430         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2431         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2432         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2433         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2434         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2435         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2436
2437         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2438         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2439         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2440         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2441         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2442         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2443
2444         NULL,
2445 };
2446
2447 static const struct attribute_group it87_group_auto_pwm = {
2448         .attrs = it87_attributes_auto_pwm,
2449         .is_visible = it87_auto_pwm_is_visible,
2450 };
2451
2452 /* SuperIO detection - will change isa_address if a chip is found */
2453 static int __init it87_find(int sioaddr, unsigned short *address,
2454                             struct it87_sio_data *sio_data)
2455 {
2456         int err;
2457         u16 chip_type;
2458         const char *board_vendor, *board_name;
2459         const struct it87_devices *config;
2460
2461         err = superio_enter(sioaddr);
2462         if (err)
2463                 return err;
2464
2465         err = -ENODEV;
2466         chip_type = superio_inw(sioaddr, DEVID);
2467         if (chip_type == 0xffff)
2468                 goto exit;
2469
2470         if (force_id)
2471                 chip_type = force_id;
2472
2473         switch (chip_type) {
2474         case IT8705F_DEVID:
2475                 sio_data->type = it87;
2476                 break;
2477         case IT8712F_DEVID:
2478                 sio_data->type = it8712;
2479                 break;
2480         case IT8716F_DEVID:
2481         case IT8726F_DEVID:
2482                 sio_data->type = it8716;
2483                 break;
2484         case IT8718F_DEVID:
2485                 sio_data->type = it8718;
2486                 break;
2487         case IT8720F_DEVID:
2488                 sio_data->type = it8720;
2489                 break;
2490         case IT8721F_DEVID:
2491                 sio_data->type = it8721;
2492                 break;
2493         case IT8728F_DEVID:
2494                 sio_data->type = it8728;
2495                 break;
2496         case IT8732F_DEVID:
2497                 sio_data->type = it8732;
2498                 break;
2499         case IT8792E_DEVID:
2500                 sio_data->type = it8792;
2501                 break;
2502         case IT8771E_DEVID:
2503                 sio_data->type = it8771;
2504                 break;
2505         case IT8772E_DEVID:
2506                 sio_data->type = it8772;
2507                 break;
2508         case IT8781F_DEVID:
2509                 sio_data->type = it8781;
2510                 break;
2511         case IT8782F_DEVID:
2512                 sio_data->type = it8782;
2513                 break;
2514         case IT8783E_DEVID:
2515                 sio_data->type = it8783;
2516                 break;
2517         case IT8786E_DEVID:
2518                 sio_data->type = it8786;
2519                 break;
2520         case IT8790E_DEVID:
2521                 sio_data->type = it8790;
2522                 break;
2523         case IT8603E_DEVID:
2524         case IT8623E_DEVID:
2525                 sio_data->type = it8603;
2526                 break;
2527         case IT8607E_DEVID:
2528                 sio_data->type = it8607;
2529                 break;
2530         case IT8620E_DEVID:
2531                 sio_data->type = it8620;
2532                 break;
2533         case IT8622E_DEVID:
2534                 sio_data->type = it8622;
2535                 break;
2536         case IT8628E_DEVID:
2537                 sio_data->type = it8628;
2538                 break;
2539         case IT8686E_DEVID:
2540                 sio_data->type = it8686;
2541                 break;
2542         case 0xffff:    /* No device at all */
2543                 goto exit;
2544         default:
2545                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2546                 goto exit;
2547         }
2548
2549         superio_select(sioaddr, PME);
2550         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2551                 pr_info("Device not activated, skipping\n");
2552                 goto exit;
2553         }
2554
2555         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2556         if (*address == 0) {
2557                 pr_info("Base address not set, skipping\n");
2558                 goto exit;
2559         }
2560
2561         err = 0;
2562         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2563         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2564                 it87_devices[sio_data->type].suffix,
2565                 *address, sio_data->revision);
2566
2567         config = &it87_devices[sio_data->type];
2568
2569         /* in7 (VSB or VCCH5V) is always internal on some chips */
2570         if (has_in7_internal(config))
2571                 sio_data->internal |= BIT(1);
2572
2573         /* in8 (Vbat) is always internal */
2574         sio_data->internal |= BIT(2);
2575
2576         /* in9 (AVCC3), always internal if supported */
2577         if (has_avcc3(config))
2578                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2579         else
2580                 sio_data->skip_in |= BIT(9);
2581
2582         if (!has_four_pwm(config))
2583                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2584         else if (!has_five_pwm(config))
2585                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2586         else if (!has_six_pwm(config))
2587                 sio_data->skip_pwm |= BIT(5);
2588
2589         if (!has_vid(config))
2590                 sio_data->skip_vid = 1;
2591
2592         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2593         if (sio_data->type == it87) {
2594                 /* The IT8705F has a different LD number for GPIO */
2595                 superio_select(sioaddr, 5);
2596                 sio_data->beep_pin = superio_inb(sioaddr,
2597                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2598         } else if (sio_data->type == it8783) {
2599                 int reg25, reg27, reg2a, reg2c, regef;
2600
2601                 superio_select(sioaddr, GPIO);
2602
2603                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2604                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2605                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2606                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2607                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2608
2609                 /* Check if fan3 is there or not */
2610                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2611                         sio_data->skip_fan |= BIT(2);
2612                 if ((reg25 & BIT(4)) ||
2613                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2614                         sio_data->skip_pwm |= BIT(2);
2615
2616                 /* Check if fan2 is there or not */
2617                 if (reg27 & BIT(7))
2618                         sio_data->skip_fan |= BIT(1);
2619                 if (reg27 & BIT(3))
2620                         sio_data->skip_pwm |= BIT(1);
2621
2622                 /* VIN5 */
2623                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2624                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2625
2626                 /* VIN6 */
2627                 if (reg27 & BIT(1))
2628                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2629
2630                 /*
2631                  * VIN7
2632                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2633                  */
2634                 if (reg27 & BIT(2)) {
2635                         /*
2636                          * The data sheet is a bit unclear regarding the
2637                          * internal voltage divider for VCCH5V. It says
2638                          * "This bit enables and switches VIN7 (pin 91) to the
2639                          * internal voltage divider for VCCH5V".
2640                          * This is different to other chips, where the internal
2641                          * voltage divider would connect VIN7 to an internal
2642                          * voltage source. Maybe that is the case here as well.
2643                          *
2644                          * Since we don't know for sure, re-route it if that is
2645                          * not the case, and ask the user to report if the
2646                          * resulting voltage is sane.
2647                          */
2648                         if (!(reg2c & BIT(1))) {
2649                                 reg2c |= BIT(1);
2650                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2651                                              reg2c);
2652                                 pr_notice("Routing internal VCCH5V to in7.\n");
2653                         }
2654                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2655                         pr_notice("Please report if it displays a reasonable voltage.\n");
2656                 }
2657
2658                 if (reg2c & BIT(0))
2659                         sio_data->internal |= BIT(0);
2660                 if (reg2c & BIT(1))
2661                         sio_data->internal |= BIT(1);
2662
2663                 sio_data->beep_pin = superio_inb(sioaddr,
2664                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2665         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2666                 int reg27, reg29;
2667
2668                 superio_select(sioaddr, GPIO);
2669
2670                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2671
2672                 /* Check if fan3 is there or not */
2673                 if (reg27 & BIT(6))
2674                         sio_data->skip_pwm |= BIT(2);
2675                 if (reg27 & BIT(7))
2676                         sio_data->skip_fan |= BIT(2);
2677
2678                 /* Check if fan2 is there or not */
2679                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2680                 if (reg29 & BIT(1))
2681                         sio_data->skip_pwm |= BIT(1);
2682                 if (reg29 & BIT(2))
2683                         sio_data->skip_fan |= BIT(1);
2684
2685                 if (sio_data->type == it8603) {
2686                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2687                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2688                 }
2689
2690                 sio_data->beep_pin = superio_inb(sioaddr,
2691                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2692         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2693                    sio_data->type == it8686) {
2694                 int reg;
2695
2696                 superio_select(sioaddr, GPIO);
2697
2698                 /* Check for pwm5 */
2699                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2700                 if (reg & BIT(6))
2701                         sio_data->skip_pwm |= BIT(4);
2702
2703                 /* Check for fan4, fan5 */
2704                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2705                 if (!(reg & BIT(5)))
2706                         sio_data->skip_fan |= BIT(3);
2707                 if (!(reg & BIT(4)))
2708                         sio_data->skip_fan |= BIT(4);
2709
2710                 /* Check for pwm3, fan3 */
2711                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2712                 if (reg & BIT(6))
2713                         sio_data->skip_pwm |= BIT(2);
2714                 if (reg & BIT(7))
2715                         sio_data->skip_fan |= BIT(2);
2716
2717                 /* Check for pwm4 */
2718                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2719                 if (reg & BIT(2))
2720                         sio_data->skip_pwm |= BIT(3);
2721
2722                 /* Check for pwm2, fan2 */
2723                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2724                 if (reg & BIT(1))
2725                         sio_data->skip_pwm |= BIT(1);
2726                 if (reg & BIT(2))
2727                         sio_data->skip_fan |= BIT(1);
2728                 /* Check for pwm6, fan6 */
2729                 if (!(reg & BIT(7))) {
2730                         sio_data->skip_pwm |= BIT(5);
2731                         sio_data->skip_fan |= BIT(5);
2732                 }
2733
2734                 /* Check if AVCC is on VIN3 */
2735                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2736                 if (reg & BIT(0))
2737                         sio_data->internal |= BIT(0);
2738                 else
2739                         sio_data->skip_in |= BIT(9);
2740
2741                 sio_data->beep_pin = superio_inb(sioaddr,
2742                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2743         } else if (sio_data->type == it8622) {
2744                 int reg;
2745
2746                 superio_select(sioaddr, GPIO);
2747
2748                 /* Check for pwm4, fan4 */
2749                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2750                 if (reg & BIT(6))
2751                         sio_data->skip_fan |= BIT(3);
2752                 if (reg & BIT(5))
2753                         sio_data->skip_pwm |= BIT(3);
2754
2755                 /* Check for pwm3, fan3, pwm5, fan5 */
2756                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2757                 if (reg & BIT(6))
2758                         sio_data->skip_pwm |= BIT(2);
2759                 if (reg & BIT(7))
2760                         sio_data->skip_fan |= BIT(2);
2761                 if (reg & BIT(3))
2762                         sio_data->skip_pwm |= BIT(4);
2763                 if (reg & BIT(1))
2764                         sio_data->skip_fan |= BIT(4);
2765
2766                 /* Check for pwm2, fan2 */
2767                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2768                 if (reg & BIT(1))
2769                         sio_data->skip_pwm |= BIT(1);
2770                 if (reg & BIT(2))
2771                         sio_data->skip_fan |= BIT(1);
2772
2773                 /* Check for AVCC */
2774                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2775                 if (!(reg & BIT(0)))
2776                         sio_data->skip_in |= BIT(9);
2777
2778                 sio_data->beep_pin = superio_inb(sioaddr,
2779                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2780         } else if (sio_data->type == it8732) {
2781                 int reg;
2782
2783                 superio_select(sioaddr, GPIO);
2784
2785                 /* Check for pwm2, fan2 */
2786                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2787                 if (reg & BIT(1))
2788                         sio_data->skip_pwm |= BIT(1);
2789                 if (reg & BIT(2))
2790                         sio_data->skip_fan |= BIT(1);
2791
2792                 /* Check for pwm3, fan3, fan4 */
2793                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2794                 if (reg & BIT(6))
2795                         sio_data->skip_pwm |= BIT(2);
2796                 if (reg & BIT(7))
2797                         sio_data->skip_fan |= BIT(2);
2798                 if (reg & BIT(5))
2799                         sio_data->skip_fan |= BIT(3);
2800
2801                 /* Check if AVCC is on VIN3 */
2802                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2803                 if (reg & BIT(0))
2804                         sio_data->internal |= BIT(0);
2805
2806                 sio_data->beep_pin = superio_inb(sioaddr,
2807                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2808         } else {
2809                 int reg;
2810                 bool uart6;
2811
2812                 superio_select(sioaddr, GPIO);
2813
2814                 /* Check for fan4, fan5 */
2815                 if (has_five_fans(config)) {
2816                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2817                         switch (sio_data->type) {
2818                         case it8718:
2819                                 if (reg & BIT(5))
2820                                         sio_data->skip_fan |= BIT(3);
2821                                 if (reg & BIT(4))
2822                                         sio_data->skip_fan |= BIT(4);
2823                                 break;
2824                         case it8720:
2825                         case it8721:
2826                         case it8728:
2827                                 if (!(reg & BIT(5)))
2828                                         sio_data->skip_fan |= BIT(3);
2829                                 if (!(reg & BIT(4)))
2830                                         sio_data->skip_fan |= BIT(4);
2831                                 break;
2832                         default:
2833                                 break;
2834                         }
2835                 }
2836
2837                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2838                 if (!sio_data->skip_vid) {
2839                         /* We need at least 4 VID pins */
2840                         if (reg & 0x0f) {
2841                                 pr_info("VID is disabled (pins used for GPIO)\n");
2842                                 sio_data->skip_vid = 1;
2843                         }
2844                 }
2845
2846                 /* Check if fan3 is there or not */
2847                 if (reg & BIT(6))
2848                         sio_data->skip_pwm |= BIT(2);
2849                 if (reg & BIT(7))
2850                         sio_data->skip_fan |= BIT(2);
2851
2852                 /* Check if fan2 is there or not */
2853                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2854                 if (reg & BIT(1))
2855                         sio_data->skip_pwm |= BIT(1);
2856                 if (reg & BIT(2))
2857                         sio_data->skip_fan |= BIT(1);
2858
2859                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2860                     !(sio_data->skip_vid))
2861                         sio_data->vid_value = superio_inb(sioaddr,
2862                                                           IT87_SIO_VID_REG);
2863
2864                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2865
2866                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2867
2868                 /*
2869                  * The IT8720F has no VIN7 pin, so VCCH should always be
2870                  * routed internally to VIN7 with an internal divider.
2871                  * Curiously, there still is a configuration bit to control
2872                  * this, which means it can be set incorrectly. And even
2873                  * more curiously, many boards out there are improperly
2874                  * configured, even though the IT8720F datasheet claims
2875                  * that the internal routing of VCCH to VIN7 is the default
2876                  * setting. So we force the internal routing in this case.
2877                  *
2878                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2879                  * If UART6 is enabled, re-route VIN7 to the internal divider
2880                  * if that is not already the case.
2881                  */
2882                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2883                         reg |= BIT(1);
2884                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2885                         pr_notice("Routing internal VCCH to in7\n");
2886                 }
2887                 if (reg & BIT(0))
2888                         sio_data->internal |= BIT(0);
2889                 if (reg & BIT(1))
2890                         sio_data->internal |= BIT(1);
2891
2892                 /*
2893                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2894                  * While VIN7 can be routed to the internal voltage divider,
2895                  * VIN5 and VIN6 are not available if UART6 is enabled.
2896                  *
2897                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2898                  * is the temperature source. Since we can not read the
2899                  * temperature source here, skip_temp is preliminary.
2900                  */
2901                 if (uart6) {
2902                         sio_data->skip_in |= BIT(5) | BIT(6);
2903                         sio_data->skip_temp |= BIT(2);
2904                 }
2905
2906                 sio_data->beep_pin = superio_inb(sioaddr,
2907                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2908         }
2909         if (sio_data->beep_pin)
2910                 pr_info("Beeping is supported\n");
2911
2912         /* Disable specific features based on DMI strings */
2913         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2914         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2915         if (board_vendor && board_name) {
2916                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2917                     strcmp(board_name, "FN68PT") == 0) {
2918                         /*
2919                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2920                          * connected to a fan, but to something else. One user
2921                          * has reported instant system power-off when changing
2922                          * the PWM2 duty cycle, so we disable it.
2923                          * I use the board name string as the trigger in case
2924                          * the same board is ever used in other systems.
2925                          */
2926                         pr_info("Disabling pwm2 due to hardware constraints\n");
2927                         sio_data->skip_pwm = BIT(1);
2928                 }
2929         }
2930
2931 exit:
2932         superio_exit(sioaddr);
2933         return err;
2934 }
2935
2936 /* Called when we have found a new IT87. */
2937 static void it87_init_device(struct platform_device *pdev)
2938 {
2939         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2940         struct it87_data *data = platform_get_drvdata(pdev);
2941         int tmp, i;
2942         u8 mask;
2943
2944         /*
2945          * For each PWM channel:
2946          * - If it is in automatic mode, setting to manual mode should set
2947          *   the fan to full speed by default.
2948          * - If it is in manual mode, we need a mapping to temperature
2949          *   channels to use when later setting to automatic mode later.
2950          *   Use a 1:1 mapping by default (we are clueless.)
2951          * In both cases, the value can (and should) be changed by the user
2952          * prior to switching to a different mode.
2953          * Note that this is no longer needed for the IT8721F and later, as
2954          * these have separate registers for the temperature mapping and the
2955          * manual duty cycle.
2956          */
2957         for (i = 0; i < NUM_AUTO_PWM; i++) {
2958                 data->pwm_temp_map[i] = i;
2959                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2960                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2961         }
2962
2963         /*
2964          * Some chips seem to have default value 0xff for all limit
2965          * registers. For low voltage limits it makes no sense and triggers
2966          * alarms, so change to 0 instead. For high temperature limits, it
2967          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2968          * but is still confusing, so change to 127 degrees C.
2969          */
2970         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2971                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2972                 if (tmp == 0xff)
2973                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2974         }
2975         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2976                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2977                 if (tmp == 0xff)
2978                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2979         }
2980
2981         /*
2982          * Temperature channels are not forcibly enabled, as they can be
2983          * set to two different sensor types and we can't guess which one
2984          * is correct for a given system. These channels can be enabled at
2985          * run-time through the temp{1-3}_type sysfs accessors if needed.
2986          */
2987
2988         /* Check if voltage monitors are reset manually or by some reason */
2989         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2990         if ((tmp & 0xff) == 0) {
2991                 /* Enable all voltage monitors */
2992                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2993         }
2994
2995         /* Check if tachometers are reset manually or by some reason */
2996         mask = 0x70 & ~(sio_data->skip_fan << 4);
2997         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2998         if ((data->fan_main_ctrl & mask) == 0) {
2999                 /* Enable all fan tachometers */
3000                 data->fan_main_ctrl |= mask;
3001                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3002                                  data->fan_main_ctrl);
3003         }
3004         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3005
3006         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3007
3008         /* Set tachometers to 16-bit mode if needed */
3009         if (has_fan16_config(data)) {
3010                 if (~tmp & 0x07 & data->has_fan) {
3011                         dev_dbg(&pdev->dev,
3012                                 "Setting fan1-3 to 16-bit mode\n");
3013                         it87_write_value(data, IT87_REG_FAN_16BIT,
3014                                          tmp | 0x07);
3015                 }
3016         }
3017
3018         /* Check for additional fans */
3019         if (has_four_fans(data) && (tmp & BIT(4)))
3020                 data->has_fan |= BIT(3); /* fan4 enabled */
3021         if (has_five_fans(data) && (tmp & BIT(5)))
3022                 data->has_fan |= BIT(4); /* fan5 enabled */
3023         if (!has_fan16_config(data) && has_six_fans(data) && (tmp & BIT(2)))
3024                 data->has_fan |= BIT(5); /* fan6 enabled */
3025
3026         /* Fan input pins may be used for alternative functions */
3027         data->has_fan &= ~sio_data->skip_fan;
3028
3029         /* Check if pwm5, pwm6 are enabled */
3030         if (has_six_pwm(data)) {
3031                 /* The following code may be IT8620E specific */
3032                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3033                 if ((tmp & 0xc0) == 0xc0)
3034                         sio_data->skip_pwm |= BIT(4);
3035                 if (!(tmp & BIT(3)))
3036                         sio_data->skip_pwm |= BIT(5);
3037         }
3038
3039         /* Start monitoring */
3040         it87_write_value(data, IT87_REG_CONFIG,
3041                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3042                          | (update_vbat ? 0x41 : 0x01));
3043 }
3044
3045 /* Return 1 if and only if the PWM interface is safe to use */
3046 static int it87_check_pwm(struct device *dev)
3047 {
3048         struct it87_data *data = dev_get_drvdata(dev);
3049         /*
3050          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3051          * and polarity set to active low is sign that this is the case so we
3052          * disable pwm control to protect the user.
3053          */
3054         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3055
3056         if ((tmp & 0x87) == 0) {
3057                 if (fix_pwm_polarity) {
3058                         /*
3059                          * The user asks us to attempt a chip reconfiguration.
3060                          * This means switching to active high polarity and
3061                          * inverting all fan speed values.
3062                          */
3063                         int i;
3064                         u8 pwm[3];
3065
3066                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3067                                 pwm[i] = it87_read_value(data,
3068                                                          IT87_REG_PWM[i]);
3069
3070                         /*
3071                          * If any fan is in automatic pwm mode, the polarity
3072                          * might be correct, as suspicious as it seems, so we
3073                          * better don't change anything (but still disable the
3074                          * PWM interface).
3075                          */
3076                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3077                                 dev_info(dev,
3078                                          "Reconfiguring PWM to active high polarity\n");
3079                                 it87_write_value(data, IT87_REG_FAN_CTL,
3080                                                  tmp | 0x87);
3081                                 for (i = 0; i < 3; i++)
3082                                         it87_write_value(data,
3083                                                          IT87_REG_PWM[i],
3084                                                          0x7f & ~pwm[i]);
3085                                 return 1;
3086                         }
3087
3088                         dev_info(dev,
3089                                  "PWM configuration is too broken to be fixed\n");
3090                 }
3091
3092                 dev_info(dev,
3093                          "Detected broken BIOS defaults, disabling PWM interface\n");
3094                 return 0;
3095         } else if (fix_pwm_polarity) {
3096                 dev_info(dev,
3097                          "PWM configuration looks sane, won't touch\n");
3098         }
3099
3100         return 1;
3101 }
3102
3103 static int it87_probe(struct platform_device *pdev)
3104 {
3105         struct it87_data *data;
3106         struct resource *res;
3107         struct device *dev = &pdev->dev;
3108         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3109         int enable_pwm_interface;
3110         struct device *hwmon_dev;
3111
3112         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3113         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3114                                  DRVNAME)) {
3115                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3116                         (unsigned long)res->start,
3117                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3118                 return -EBUSY;
3119         }
3120
3121         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3122         if (!data)
3123                 return -ENOMEM;
3124
3125         data->addr = res->start;
3126         data->type = sio_data->type;
3127         data->features = it87_devices[sio_data->type].features;
3128         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3129         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3130         data->bank = 0xff;
3131
3132         /*
3133          * IT8705F Datasheet 0.4.1, 3h == Version G.
3134          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3135          * These are the first revisions with 16-bit tachometer support.
3136          */
3137         switch (data->type) {
3138         case it87:
3139                 if (sio_data->revision >= 0x03) {
3140                         data->features &= ~FEAT_OLD_AUTOPWM;
3141                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3142                 }
3143                 break;
3144         case it8712:
3145                 if (sio_data->revision >= 0x08) {
3146                         data->features &= ~FEAT_OLD_AUTOPWM;
3147                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3148                                           FEAT_FIVE_FANS;
3149                 }
3150                 break;
3151         default:
3152                 break;
3153         }
3154
3155         /* Now, we do the remaining detection. */
3156         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3157             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3158                 return -ENODEV;
3159
3160         platform_set_drvdata(pdev, data);
3161
3162         mutex_init(&data->update_lock);
3163
3164         /* Check PWM configuration */
3165         enable_pwm_interface = it87_check_pwm(dev);
3166
3167         /* Starting with IT8721F, we handle scaling of internal voltages */
3168         if (has_scaling(data)) {
3169                 if (sio_data->internal & BIT(0))
3170                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3171                 if (sio_data->internal & BIT(1))
3172                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3173                 if (sio_data->internal & BIT(2))
3174                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3175                 if (sio_data->internal & BIT(3))
3176                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3177         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3178                    sio_data->type == it8783) {
3179                 if (sio_data->internal & BIT(0))
3180                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3181                 if (sio_data->internal & BIT(1))
3182                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3183         }
3184
3185         data->has_temp = 0x07;
3186         if (sio_data->skip_temp & BIT(2)) {
3187                 if (sio_data->type == it8782 &&
3188                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3189                         data->has_temp &= ~BIT(2);
3190         }
3191
3192         data->in_internal = sio_data->internal;
3193         data->has_in = 0x3ff & ~sio_data->skip_in;
3194
3195         if (has_six_temp(data)) {
3196                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3197
3198                 /* Check for additional temperature sensors */
3199                 if ((reg & 0x03) >= 0x02)
3200                         data->has_temp |= BIT(3);
3201                 if (((reg >> 2) & 0x03) >= 0x02)
3202                         data->has_temp |= BIT(4);
3203                 if (((reg >> 4) & 0x03) >= 0x02)
3204                         data->has_temp |= BIT(5);
3205
3206                 /* Check for additional voltage sensors */
3207                 if ((reg & 0x03) == 0x01)
3208                         data->has_in |= BIT(10);
3209                 if (((reg >> 2) & 0x03) == 0x01)
3210                         data->has_in |= BIT(11);
3211                 if (((reg >> 4) & 0x03) == 0x01)
3212                         data->has_in |= BIT(12);
3213         }
3214
3215         data->has_beep = !!sio_data->beep_pin;
3216
3217         /* Initialize the IT87 chip */
3218         it87_init_device(pdev);
3219
3220         if (!sio_data->skip_vid) {
3221                 data->has_vid = true;
3222                 data->vrm = vid_which_vrm();
3223                 /* VID reading from Super-I/O config space if available */
3224                 data->vid = sio_data->vid_value;
3225         }
3226
3227         /* Prepare for sysfs hooks */
3228         data->groups[0] = &it87_group;
3229         data->groups[1] = &it87_group_in;
3230         data->groups[2] = &it87_group_temp;
3231         data->groups[3] = &it87_group_fan;
3232
3233         if (enable_pwm_interface) {
3234                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3235                 data->has_pwm &= ~sio_data->skip_pwm;
3236
3237                 data->groups[4] = &it87_group_pwm;
3238                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3239                         data->groups[5] = &it87_group_auto_pwm;
3240         }
3241
3242         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3243                                         it87_devices[sio_data->type].name,
3244                                         data, data->groups);
3245         return PTR_ERR_OR_ZERO(hwmon_dev);
3246 }
3247
3248 static struct platform_driver it87_driver = {
3249         .driver = {
3250                 .name   = DRVNAME,
3251         },
3252         .probe  = it87_probe,
3253 };
3254
3255 static int __init it87_device_add(int index, unsigned short address,
3256                                   const struct it87_sio_data *sio_data)
3257 {
3258         struct platform_device *pdev;
3259         struct resource res = {
3260                 .start  = address + IT87_EC_OFFSET,
3261                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3262                 .name   = DRVNAME,
3263                 .flags  = IORESOURCE_IO,
3264         };
3265         int err;
3266
3267         err = acpi_check_resource_conflict(&res);
3268         if (err)
3269                 return err;
3270
3271         pdev = platform_device_alloc(DRVNAME, address);
3272         if (!pdev)
3273                 return -ENOMEM;
3274
3275         err = platform_device_add_resources(pdev, &res, 1);
3276         if (err) {
3277                 pr_err("Device resource addition failed (%d)\n", err);
3278                 goto exit_device_put;
3279         }
3280
3281         err = platform_device_add_data(pdev, sio_data,
3282                                        sizeof(struct it87_sio_data));
3283         if (err) {
3284                 pr_err("Platform data allocation failed\n");
3285                 goto exit_device_put;
3286         }
3287
3288         err = platform_device_add(pdev);
3289         if (err) {
3290                 pr_err("Device addition failed (%d)\n", err);
3291                 goto exit_device_put;
3292         }
3293
3294         it87_pdev[index] = pdev;
3295         return 0;
3296
3297 exit_device_put:
3298         platform_device_put(pdev);
3299         return err;
3300 }
3301
3302 static int __init sm_it87_init(void)
3303 {
3304         int sioaddr[2] = { REG_2E, REG_4E };
3305         struct it87_sio_data sio_data;
3306         unsigned short isa_address;
3307         bool found = false;
3308         int i, err;
3309
3310         err = platform_driver_register(&it87_driver);
3311         if (err)
3312                 return err;
3313
3314         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3315                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3316                 isa_address = 0;
3317                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3318                 if (err || isa_address == 0)
3319                         continue;
3320
3321                 err = it87_device_add(i, isa_address, &sio_data);
3322                 if (err)
3323                         goto exit_dev_unregister;
3324                 found = true;
3325         }
3326
3327         if (!found) {
3328                 err = -ENODEV;
3329                 goto exit_unregister;
3330         }
3331         return 0;
3332
3333 exit_dev_unregister:
3334         /* NULL check handled by platform_device_unregister */
3335         platform_device_unregister(it87_pdev[0]);
3336 exit_unregister:
3337         platform_driver_unregister(&it87_driver);
3338         return err;
3339 }
3340
3341 static void __exit sm_it87_exit(void)
3342 {
3343         /* NULL check handled by platform_device_unregister */
3344         platform_device_unregister(it87_pdev[1]);
3345         platform_device_unregister(it87_pdev[0]);
3346         platform_driver_unregister(&it87_driver);
3347 }
3348
3349 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3350 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3351 module_param(update_vbat, bool, 0);
3352 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3353 module_param(fix_pwm_polarity, bool, 0);
3354 MODULE_PARM_DESC(fix_pwm_polarity,
3355                  "Force PWM polarity to active high (DANGEROUS)");
3356 MODULE_LICENSE("GPL");
3357
3358 module_init(sm_it87_init);
3359 module_exit(sm_it87_exit);