git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8655E  Super I/O chip w/LPC interface
  20  *            IT8665E  Super I/O chip w/LPC interface
  21  *            IT8686E  Super I/O chip w/LPC interface
  22  *            IT8705F  Super I/O chip w/LPC interface
  23  *            IT8712F  Super I/O chip w/LPC interface
  24  *            IT8716F  Super I/O chip w/LPC interface
  25  *            IT8718F  Super I/O chip w/LPC interface
  26  *            IT8720F  Super I/O chip w/LPC interface
  27  *            IT8721F  Super I/O chip w/LPC interface
  28  *            IT8726F  Super I/O chip w/LPC interface
  29  *            IT8728F  Super I/O chip w/LPC interface
  30  *            IT8732F  Super I/O chip w/LPC interface
  31  *            IT8758E  Super I/O chip w/LPC interface
  32  *            IT8771E  Super I/O chip w/LPC interface
  33  *            IT8772E  Super I/O chip w/LPC interface
  34  *            IT8781F  Super I/O chip w/LPC interface
  35  *            IT8782F  Super I/O chip w/LPC interface
  36  *            IT8783E/F Super I/O chip w/LPC interface
  37  *            IT8786E  Super I/O chip w/LPC interface
  38  *            IT8790E  Super I/O chip w/LPC interface
  39  *            IT8792E  Super I/O chip w/LPC interface
  40  *            Sis950   A clone of the IT8705F
  41  *
  42  *  Copyright (C) 2001 Chris Gauthron
  43  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  44  *
  45  *  This program is free software; you can redistribute it and/or modify
  46  *  it under the terms of the GNU General Public License as published by
  47  *  the Free Software Foundation; either version 2 of the License, or
  48  *  (at your option) any later version.
  49  *
  50  *  This program is distributed in the hope that it will be useful,
  51  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  52  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  53  *  GNU General Public License for more details.
  54  */
  55
  56 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  57
  58 #include <linux/bitops.h>
  59 #include <linux/module.h>
  60 #include <linux/init.h>
  61 #include <linux/slab.h>
  62 #include <linux/jiffies.h>
  63 #include <linux/platform_device.h>
  64 #include <linux/hwmon.h>
  65 #include <linux/hwmon-sysfs.h>
  66 #include <linux/hwmon-vid.h>
  67 #include <linux/err.h>
  68 #include <linux/mutex.h>
  69 #include <linux/sysfs.h>
  70 #include <linux/string.h>
  71 #include <linux/dmi.h>
  72 #include <linux/acpi.h>
  73 #include <linux/io.h>
  74 #include "compat.h"
  75
  76 #define DRVNAME "it87"
  77
  78 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  79              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  80              it8792, it8603, it8607, it8620, it8622, it8628, it8655, it8665,
  81              it8686 };
  82
  83 static unsigned short force_id;
  84 module_param(force_id, ushort, 0);
  85 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  86
  87 static struct platform_device *it87_pdev[2];
  88
  89 #define REG_2E  0x2e    /* The register to read/write */
  90 #define REG_4E  0x4e    /* Secondary register to read/write */
  91
  92 #define DEV     0x07    /* Register: Logical device select */
  93 #define PME     0x04    /* The device with the fan registers in it */
  94
  95 /* The device with the IT8718F/IT8720F VID value in it */
  96 #define GPIO    0x07
  97
  98 #define DEVID   0x20    /* Register: Device ID */
  99 #define DEVREV  0x22    /* Register: Device Revision */
 100
 101 static inline int superio_inb(int ioreg, int reg)
 102 {
 103         outb(reg, ioreg);
 104         return inb(ioreg + 1);
 105 }
 106
 107 static inline void superio_outb(int ioreg, int reg, int val)
 108 {
 109         outb(reg, ioreg);
 110         outb(val, ioreg + 1);
 111 }
 112
 113 static int superio_inw(int ioreg, int reg)
 114 {
 115         int val;
 116
 117         outb(reg++, ioreg);
 118         val = inb(ioreg + 1) << 8;
 119         outb(reg, ioreg);
 120         val |= inb(ioreg + 1);
 121         return val;
 122 }
 123
 124 static inline void superio_select(int ioreg, int ldn)
 125 {
 126         outb(DEV, ioreg);
 127         outb(ldn, ioreg + 1);
 128 }
 129
 130 static inline int superio_enter(int ioreg)
 131 {
 132         /*
 133          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 134          */
 135         if (!request_muxed_region(ioreg, 2, DRVNAME))
 136                 return -EBUSY;
 137
 138         outb(0x87, ioreg);
 139         outb(0x01, ioreg);
 140         outb(0x55, ioreg);
 141         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 142         return 0;
 143 }
 144
 145 static inline void superio_exit(int ioreg)
 146 {
 147         outb(0x02, ioreg);
 148         outb(0x02, ioreg + 1);
 149         release_region(ioreg, 2);
 150 }
 151
 152 /* Logical device 4 registers */
 153 #define IT8712F_DEVID 0x8712
 154 #define IT8705F_DEVID 0x8705
 155 #define IT8716F_DEVID 0x8716
 156 #define IT8718F_DEVID 0x8718
 157 #define IT8720F_DEVID 0x8720
 158 #define IT8721F_DEVID 0x8721
 159 #define IT8726F_DEVID 0x8726
 160 #define IT8728F_DEVID 0x8728
 161 #define IT8732F_DEVID 0x8732
 162 #define IT8792E_DEVID 0x8733
 163 #define IT8771E_DEVID 0x8771
 164 #define IT8772E_DEVID 0x8772
 165 #define IT8781F_DEVID 0x8781
 166 #define IT8782F_DEVID 0x8782
 167 #define IT8783E_DEVID 0x8783
 168 #define IT8786E_DEVID 0x8786
 169 #define IT8790E_DEVID 0x8790
 170 #define IT8603E_DEVID 0x8603
 171 #define IT8607E_DEVID 0x8607
 172 #define IT8620E_DEVID 0x8620
 173 #define IT8622E_DEVID 0x8622
 174 #define IT8623E_DEVID 0x8623
 175 #define IT8628E_DEVID 0x8628
 176 #define IT8655E_DEVID 0x8655
 177 #define IT8665E_DEVID 0x8665
 178 #define IT8686E_DEVID 0x8686
 179 #define IT87_ACT_REG  0x30
 180 #define IT87_BASE_REG 0x60
 181
 182 /* Logical device 7 registers (IT8712F and later) */
 183 #define IT87_SIO_GPIO1_REG      0x25
 184 #define IT87_SIO_GPIO2_REG      0x26
 185 #define IT87_SIO_GPIO3_REG      0x27
 186 #define IT87_SIO_GPIO4_REG      0x28
 187 #define IT87_SIO_GPIO5_REG      0x29
 188 #define IT87_SIO_GPIO9_REG      0xd3
 189 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 190 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 191 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 192 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 193 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 194 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 195
 196 /* Update battery voltage after every reading if true */
 197 static bool update_vbat;
 198
 199 /* Not all BIOSes properly configure the PWM registers */
 200 static bool fix_pwm_polarity;
 201
 202 /* Many IT87 constants specified below */
 203
 204 /* Length of ISA address segment */
 205 #define IT87_EXTENT 8
 206
 207 /* Length of ISA address segment for Environmental Controller */
 208 #define IT87_EC_EXTENT 2
 209
 210 /* Offset of EC registers from ISA base address */
 211 #define IT87_EC_OFFSET 5
 212
 213 /* Where are the ISA address/data registers relative to the EC base address */
 214 #define IT87_ADDR_REG_OFFSET 0
 215 #define IT87_DATA_REG_OFFSET 1
 216
 217 /*----- The IT87 registers -----*/
 218
 219 #define IT87_REG_CONFIG        0x00
 220
 221 #define IT87_REG_ALARM1        0x01
 222 #define IT87_REG_ALARM2        0x02
 223 #define IT87_REG_ALARM3        0x03
 224
 225 #define IT87_REG_BANK           0x06
 226
 227 /*
 228  * The IT8718F and IT8720F have the VID value in a different register, in
 229  * Super-I/O configuration space.
 230  */
 231 #define IT87_REG_VID           0x0a
 232 /*
 233  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 234  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 235  * mode.
 236  */
 237 #define IT87_REG_FAN_DIV       0x0b
 238 #define IT87_REG_FAN_16BIT     0x0c
 239
 240 /*
 241  * Monitors:
 242  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 243  * - up to 6 temp (1 to 6)
 244  * - up to 6 fan (1 to 6)
 245  */
 246
 247 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 248 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 249 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 250 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 251
 252 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 253 static const u8 IT87_REG_FAN_MIN_8665[] =
 254                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 255 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 256 static const u8 IT87_REG_FANX_MIN_8665[] =
 257                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 258
 259 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x91, 0x90 };
 260
 261 #define IT87_REG_FAN_MAIN_CTRL 0x13
 262 #define IT87_REG_FAN_CTL       0x14
 263
 264 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 265 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 266
 267 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 268
 269 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 270                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 271
 272 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 273
 274 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 275 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 276
 277 static const u8 IT87_REG_TEMP_HIGH[] =  { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
 278 static const u8 IT87_REG_TEMP_LOW[] =   { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
 279
 280 #define IT87_REG_VIN_ENABLE    0x50
 281 #define IT87_REG_TEMP_ENABLE   0x51
 282 #define IT87_REG_TEMP_EXTRA    0x55
 283 #define IT87_REG_BEEP_ENABLE   0x5c
 284
 285 #define IT87_REG_CHIPID        0x58
 286
 287 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 288
 289 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 290 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 291
 292 #define IT87_REG_TEMP456_ENABLE 0x77
 293
 294 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 295 #define NUM_VIN_LIMIT           8
 296 #define NUM_TEMP                6
 297 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 298 #define NUM_FAN_DIV             3
 299 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 300 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 301
 302 struct it87_devices {
 303         const char *name;
 304         const char * const suffix;
 305         u32 features;
 306         u8 num_temp_limit;
 307         u8 peci_mask;
 308         u8 old_peci_mask;
 309 };
 310
 311 #define FEAT_12MV_ADC           BIT(0)
 312 #define FEAT_NEWER_AUTOPWM      BIT(1)
 313 #define FEAT_OLD_AUTOPWM        BIT(2)
 314 #define FEAT_16BIT_FANS         BIT(3)
 315 #define FEAT_TEMP_OFFSET        BIT(4)
 316 #define FEAT_TEMP_PECI          BIT(5)
 317 #define FEAT_TEMP_OLD_PECI      BIT(6)
 318 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 319 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 320 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 321 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 322 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 323 #define FEAT_10_9MV_ADC         BIT(12)
 324 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 325 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 326 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 327 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 328 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 329 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 330 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 331 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 332 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 333 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 334 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 335
 336 static const struct it87_devices it87_devices[] = {
 337         [it87] = {
 338                 .name = "it87",
 339                 .suffix = "F",
 340                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 341                                                 /* may need to overwrite */
 342                 .num_temp_limit = 3,
 343         },
 344         [it8712] = {
 345                 .name = "it8712",
 346                 .suffix = "F",
 347                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 348                                                 /* may need to overwrite */
 349                 .num_temp_limit = 3,
 350         },
 351         [it8716] = {
 352                 .name = "it8716",
 353                 .suffix = "F",
 354                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 355                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 356                   | FEAT_FANCTL_ONOFF,
 357                 .num_temp_limit = 3,
 358         },
 359         [it8718] = {
 360                 .name = "it8718",
 361                 .suffix = "F",
 362                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 363                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 364                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 365                 .num_temp_limit = 3,
 366                 .old_peci_mask = 0x4,
 367         },
 368         [it8720] = {
 369                 .name = "it8720",
 370                 .suffix = "F",
 371                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 372                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 373                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 374                 .num_temp_limit = 3,
 375                 .old_peci_mask = 0x4,
 376         },
 377         [it8721] = {
 378                 .name = "it8721",
 379                 .suffix = "F",
 380                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 381                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 382                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 383                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 384                 .num_temp_limit = 3,
 385                 .peci_mask = 0x05,
 386                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 387         },
 388         [it8728] = {
 389                 .name = "it8728",
 390                 .suffix = "F",
 391                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 392                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 393                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 394                   | FEAT_FANCTL_ONOFF,
 395                 .num_temp_limit = 3,
 396                 .peci_mask = 0x07,
 397         },
 398         [it8732] = {
 399                 .name = "it8732",
 400                 .suffix = "F",
 401                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 402                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 403                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 404                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 405                 .num_temp_limit = 3,
 406                 .peci_mask = 0x07,
 407                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 408         },
 409         [it8771] = {
 410                 .name = "it8771",
 411                 .suffix = "E",
 412                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 413                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 414                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 415                                 /* PECI: guesswork */
 416                                 /* 12mV ADC (OHM) */
 417                                 /* 16 bit fans (OHM) */
 418                                 /* three fans, always 16 bit (guesswork) */
 419                 .num_temp_limit = 3,
 420                 .peci_mask = 0x07,
 421         },
 422         [it8772] = {
 423                 .name = "it8772",
 424                 .suffix = "E",
 425                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 426                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 427                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 428                                 /* PECI (coreboot) */
 429                                 /* 12mV ADC (HWSensors4, OHM) */
 430                                 /* 16 bit fans (HWSensors4, OHM) */
 431                                 /* three fans, always 16 bit (datasheet) */
 432                 .num_temp_limit = 3,
 433                 .peci_mask = 0x07,
 434         },
 435         [it8781] = {
 436                 .name = "it8781",
 437                 .suffix = "F",
 438                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 439                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 440                   | FEAT_FANCTL_ONOFF,
 441                 .num_temp_limit = 3,
 442                 .old_peci_mask = 0x4,
 443         },
 444         [it8782] = {
 445                 .name = "it8782",
 446                 .suffix = "F",
 447                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 448                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 449                   | FEAT_FANCTL_ONOFF,
 450                 .num_temp_limit = 3,
 451                 .old_peci_mask = 0x4,
 452         },
 453         [it8783] = {
 454                 .name = "it8783",
 455                 .suffix = "E/F",
 456                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 457                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 458                   | FEAT_FANCTL_ONOFF,
 459                 .num_temp_limit = 3,
 460                 .old_peci_mask = 0x4,
 461         },
 462         [it8786] = {
 463                 .name = "it8786",
 464                 .suffix = "E",
 465                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 466                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 467                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 468                 .num_temp_limit = 3,
 469                 .peci_mask = 0x07,
 470         },
 471         [it8790] = {
 472                 .name = "it8790",
 473                 .suffix = "E",
 474                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 475                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 476                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 477                 .num_temp_limit = 3,
 478                 .peci_mask = 0x07,
 479         },
 480         [it8792] = {
 481                 .name = "it8792",
 482                 .suffix = "E",
 483                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 484                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 485                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 486                 .num_temp_limit = 3,
 487                 .peci_mask = 0x07,
 488         },
 489         [it8603] = {
 490                 .name = "it8603",
 491                 .suffix = "E",
 492                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 493                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 494                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 495                 .num_temp_limit = 3,
 496                 .peci_mask = 0x07,
 497         },
 498         [it8607] = {
 499                 .name = "it8607",
 500                 .suffix = "E",
 501                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 502                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 503                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 504                   | FEAT_FANCTL_ONOFF,
 505                 .num_temp_limit = 3,
 506                 .peci_mask = 0x07,
 507         },
 508         [it8620] = {
 509                 .name = "it8620",
 510                 .suffix = "E",
 511                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 512                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 513                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 514                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 515                   | FEAT_FANCTL_ONOFF,
 516                 .num_temp_limit = 3,
 517                 .peci_mask = 0x07,
 518         },
 519         [it8622] = {
 520                 .name = "it8622",
 521                 .suffix = "E",
 522                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 523                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 524                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 525                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 526                 .num_temp_limit = 3,
 527                 .peci_mask = 0x07,
 528         },
 529         [it8628] = {
 530                 .name = "it8628",
 531                 .suffix = "E",
 532                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 533                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 534                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 535                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 536                   | FEAT_FANCTL_ONOFF,
 537                 .num_temp_limit = 3,
 538                 .peci_mask = 0x07,
 539         },
 540         [it8655] = {
 541                 .name = "it8655",
 542                 .suffix = "E",
 543                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 544                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_AVCC3
 545                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 546                 .num_temp_limit = 6,
 547                 .peci_mask = 0x07,
 548         },
 549         [it8665] = {
 550                 .name = "it8665",
 551                 .suffix = "E",
 552                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 553                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_AVCC3
 554                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 555                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 556                 .num_temp_limit = 6,
 557                 .peci_mask = 0x07,
 558         },
 559         [it8686] = {
 560                 .name = "it8686",
 561                 .suffix = "E",
 562                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 563                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 564                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 565                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 566                 .num_temp_limit = 6,
 567                 .peci_mask = 0x07,
 568         },
 569 };
 570
 571 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 572 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 573 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 574 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 575 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 576 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 577 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 578                                  ((data)->peci_mask & BIT(nr)))
 579 #define has_temp_old_peci(data, nr) \
 580                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 581                                  ((data)->old_peci_mask & BIT(nr)))
 582 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 583 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 584                                                      FEAT_SIX_FANS))
 585 #define has_vid(data)           ((data)->features & FEAT_VID)
 586 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 587 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 588 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 589 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 590                                                      | FEAT_SIX_PWM))
 591 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 592 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 593 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 594 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 595 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 596                                                      FEAT_FIVE_FANS | \
 597                                                      FEAT_SIX_FANS))
 598 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 599                                                      FEAT_FIVE_PWM \
 600                                                      | FEAT_SIX_PWM))
 601 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 602 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 603 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 604
 605 struct it87_sio_data {
 606         enum chips type;
 607         /* Values read from Super-I/O config space */
 608         u8 revision;
 609         u8 vid_value;
 610         u8 beep_pin;
 611         u8 internal;    /* Internal sensors can be labeled */
 612         /* Features skipped based on config or DMI */
 613         u16 skip_in;
 614         u8 skip_vid;
 615         u8 skip_fan;
 616         u8 skip_pwm;
 617         u8 skip_temp;
 618 };
 619
 620 /*
 621  * For each registered chip, we need to keep some data in memory.
 622  * The structure is dynamically allocated.
 623  */
 624 struct it87_data {
 625         const struct attribute_group *groups[7];
 626         enum chips type;
 627         u32 features;
 628         u8 bank;
 629         u8 peci_mask;
 630         u8 old_peci_mask;
 631
 632         const u8 *REG_FAN;
 633         const u8 *REG_FANX;
 634         const u8 *REG_FAN_MIN;
 635         const u8 *REG_FANX_MIN;
 636
 637         const u8 *REG_PWM;
 638
 639         unsigned short addr;
 640         const char *name;
 641         struct mutex update_lock;
 642         char valid;             /* !=0 if following fields are valid */
 643         unsigned long last_updated;     /* In jiffies */
 644
 645         u16 in_scaled;          /* Internal voltage sensors are scaled */
 646         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 647         u16 has_in;             /* Bitfield, voltage sensors enabled */
 648         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 649         u8 has_fan;             /* Bitfield, fans enabled */
 650         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 651         u8 has_temp;            /* Bitfield, temp sensors enabled */
 652         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 653         u8 num_temp_limit;      /* Number of temp limit/offset registers */
 654         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 655         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 656         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 657         bool has_vid;           /* True if VID supported */
 658         u8 vid;                 /* Register encoding, combined */
 659         u8 vrm;
 660         u32 alarms;             /* Register encoding, combined */
 661         bool has_beep;          /* true if beep supported */
 662         u8 beeps;               /* Register encoding */
 663         u8 fan_main_ctrl;       /* Register value */
 664         u8 fan_ctl;             /* Register value */
 665
 666         /*
 667          * The following 3 arrays correspond to the same registers up to
 668          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 669          * 7, and we want to preserve settings on mode changes, so we have
 670          * to track all values separately.
 671          * Starting with the IT8721F, the manual PWM duty cycles are stored
 672          * in separate registers (8-bit values), so the separate tracking
 673          * is no longer needed, but it is still done to keep the driver
 674          * simple.
 675          */
 676         u8 has_pwm;             /* Bitfield, pwm control enabled */
 677         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 678         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 679         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 680
 681         /* Automatic fan speed control registers */
 682         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 683         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 684 };
 685
 686 static int adc_lsb(const struct it87_data *data, int nr)
 687 {
 688         int lsb;
 689
 690         if (has_12mv_adc(data))
 691                 lsb = 120;
 692         else if (has_10_9mv_adc(data))
 693                 lsb = 109;
 694         else
 695                 lsb = 160;
 696         if (data->in_scaled & BIT(nr))
 697                 lsb <<= 1;
 698         return lsb;
 699 }
 700
 701 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 702 {
 703         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 704         return clamp_val(val, 0, 255);
 705 }
 706
 707 static int in_from_reg(const struct it87_data *data, int nr, int val)
 708 {
 709         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 710 }
 711
 712 static inline u8 FAN_TO_REG(long rpm, int div)
 713 {
 714         if (rpm == 0)
 715                 return 255;
 716         rpm = clamp_val(rpm, 1, 1000000);
 717         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 718 }
 719
 720 static inline u16 FAN16_TO_REG(long rpm)
 721 {
 722         if (rpm == 0)
 723                 return 0xffff;
 724         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 725 }
 726
 727 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 728                                 1350000 / ((val) * (div)))
 729 /* The divider is fixed to 2 in 16-bit mode */
 730 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 731                              1350000 / ((val) * 2))
 732
 733 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 734                                     ((val) + 500) / 1000), -128, 127))
 735 #define TEMP_FROM_REG(val) ((val) * 1000)
 736
 737 static u8 pwm_to_reg(const struct it87_data *data, long val)
 738 {
 739         if (has_newer_autopwm(data))
 740                 return val;
 741         else
 742                 return val >> 1;
 743 }
 744
 745 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 746 {
 747         if (has_newer_autopwm(data))
 748                 return reg;
 749         else
 750                 return (reg & 0x7f) << 1;
 751 }
 752
 753 static int DIV_TO_REG(int val)
 754 {
 755         int answer = 0;
 756
 757         while (answer < 7 && (val >>= 1))
 758                 answer++;
 759         return answer;
 760 }
 761
 762 #define DIV_FROM_REG(val) BIT(val)
 763
 764 /*
 765  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 766  * depending on the chip type, to calculate the actual PWM frequency.
 767  *
 768  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 769  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 770  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 771  * sometimes just one. It is unknown if this is a datasheet error or real,
 772  * so this is ignored for now.
 773  */
 774 static const unsigned int pwm_freq[8] = {
 775         48000000,
 776         24000000,
 777         12000000,
 778         8000000,
 779         6000000,
 780         3000000,
 781         1500000,
 782         750000,
 783 };
 784
 785 static int _it87_read_value(struct it87_data *data, u8 reg)
 786 {
 787         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 788         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 789 }
 790
 791 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 792 {
 793         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 794         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 795 }
 796
 797 static void it87_set_bank(struct it87_data *data, u8 bank)
 798 {
 799         if (has_bank_sel(data) && bank != data->bank) {
 800                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 801
 802                 breg &= 0x1f;
 803                 breg |= (bank << 5);
 804                 data->bank = bank;
 805                 _it87_write_value(data, IT87_REG_BANK, breg);
 806         }
 807 }
 808
 809 /*
 810  * Must be called with data->update_lock held, except during initialization.
 811  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 812  * would slow down the IT87 access and should not be necessary.
 813  */
 814 static int it87_read_value(struct it87_data *data, u16 reg)
 815 {
 816         it87_set_bank(data, reg >> 8);
 817         return _it87_read_value(data, reg & 0xff);
 818 }
 819
 820 /*
 821  * Must be called with data->update_lock held, except during initialization.
 822  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 823  * would slow down the IT87 access and should not be necessary.
 824  */
 825 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 826 {
 827         it87_set_bank(data, reg >> 8);
 828         _it87_write_value(data, reg & 0xff, value);
 829 }
 830
 831 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 832 {
 833         data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
 834         if (has_newer_autopwm(data)) {
 835                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 836                 data->pwm_duty[nr] = it87_read_value(data,
 837                                                      IT87_REG_PWM_DUTY[nr]);
 838         } else {
 839                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 840                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 841                 else                            /* Manual mode */
 842                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 843         }
 844
 845         if (has_old_autopwm(data)) {
 846                 int i;
 847
 848                 for (i = 0; i < 5 ; i++)
 849                         data->auto_temp[nr][i] = it87_read_value(data,
 850                                                 IT87_REG_AUTO_TEMP(nr, i));
 851                 for (i = 0; i < 3 ; i++)
 852                         data->auto_pwm[nr][i] = it87_read_value(data,
 853                                                 IT87_REG_AUTO_PWM(nr, i));
 854         } else if (has_newer_autopwm(data)) {
 855                 int i;
 856
 857                 /*
 858                  * 0: temperature hysteresis (base + 5)
 859                  * 1: fan off temperature (base + 0)
 860                  * 2: fan start temperature (base + 1)
 861                  * 3: fan max temperature (base + 2)
 862                  */
 863                 data->auto_temp[nr][0] =
 864                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 865
 866                 for (i = 0; i < 3 ; i++)
 867                         data->auto_temp[nr][i + 1] =
 868                                 it87_read_value(data,
 869                                                 IT87_REG_AUTO_TEMP(nr, i));
 870                 /*
 871                  * 0: start pwm value (base + 3)
 872                  * 1: pwm slope (base + 4, 1/8th pwm)
 873                  */
 874                 data->auto_pwm[nr][0] =
 875                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 876                 data->auto_pwm[nr][1] =
 877                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 878         }
 879 }
 880
 881 static struct it87_data *it87_update_device(struct device *dev)
 882 {
 883         struct it87_data *data = dev_get_drvdata(dev);
 884         int i;
 885
 886         mutex_lock(&data->update_lock);
 887
 888         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 889             !data->valid) {
 890                 if (update_vbat) {
 891                         /*
 892                          * Cleared after each update, so reenable.  Value
 893                          * returned by this read will be previous value
 894                          */
 895                         it87_write_value(data, IT87_REG_CONFIG,
 896                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 897                 }
 898                 for (i = 0; i < NUM_VIN; i++) {
 899                         if (!(data->has_in & BIT(i)))
 900                                 continue;
 901
 902                         data->in[i][0] =
 903                                 it87_read_value(data, IT87_REG_VIN[i]);
 904
 905                         /* VBAT and AVCC don't have limit registers */
 906                         if (i >= NUM_VIN_LIMIT)
 907                                 continue;
 908
 909                         data->in[i][1] =
 910                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 911                         data->in[i][2] =
 912                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 913                 }
 914
 915                 for (i = 0; i < NUM_FAN; i++) {
 916                         /* Skip disabled fans */
 917                         if (!(data->has_fan & BIT(i)))
 918                                 continue;
 919
 920                         data->fan[i][1] =
 921                                 it87_read_value(data, data->REG_FAN_MIN[i]);
 922                         data->fan[i][0] = it87_read_value(data,
 923                                        data->REG_FAN[i]);
 924                         /* Add high byte if in 16-bit mode */
 925                         if (has_16bit_fans(data)) {
 926                                 data->fan[i][0] |= it87_read_value(data,
 927                                                 data->REG_FANX[i]) << 8;
 928                                 data->fan[i][1] |= it87_read_value(data,
 929                                                 data->REG_FANX_MIN[i]) << 8;
 930                         }
 931                 }
 932                 for (i = 0; i < NUM_TEMP; i++) {
 933                         if (!(data->has_temp & BIT(i)))
 934                                 continue;
 935                         data->temp[i][0] =
 936                                 it87_read_value(data, IT87_REG_TEMP(i));
 937
 938                         if (i >= data->num_temp_limit)
 939                                 continue;
 940
 941                         if (has_temp_offset(data))
 942                                 data->temp[i][3] =
 943                                   it87_read_value(data,
 944                                                   IT87_REG_TEMP_OFFSET[i]);
 945
 946                         data->temp[i][1] =
 947                                 it87_read_value(data, IT87_REG_TEMP_LOW[i]);
 948                         data->temp[i][2] =
 949                                 it87_read_value(data, IT87_REG_TEMP_HIGH[i]);
 950                 }
 951
 952                 /* Newer chips don't have clock dividers */
 953                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 954                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 955                         data->fan_div[0] = i & 0x07;
 956                         data->fan_div[1] = (i >> 3) & 0x07;
 957                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 958                 }
 959
 960                 data->alarms =
 961                         it87_read_value(data, IT87_REG_ALARM1) |
 962                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 963                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 964                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 965
 966                 data->fan_main_ctrl = it87_read_value(data,
 967                                 IT87_REG_FAN_MAIN_CTRL);
 968                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 969                 for (i = 0; i < NUM_PWM; i++) {
 970                         if (!(data->has_pwm & BIT(i)))
 971                                 continue;
 972                         it87_update_pwm_ctrl(data, i);
 973                 }
 974
 975                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 976                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 977                 /*
 978                  * The IT8705F does not have VID capability.
 979                  * The IT8718F and later don't use IT87_REG_VID for the
 980                  * same purpose.
 981                  */
 982                 if (data->type == it8712 || data->type == it8716) {
 983                         data->vid = it87_read_value(data, IT87_REG_VID);
 984                         /*
 985                          * The older IT8712F revisions had only 5 VID pins,
 986                          * but we assume it is always safe to read 6 bits.
 987                          */
 988                         data->vid &= 0x3f;
 989                 }
 990                 data->last_updated = jiffies;
 991                 data->valid = 1;
 992         }
 993
 994         mutex_unlock(&data->update_lock);
 995
 996         return data;
 997 }
 998
 999 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1000                        char *buf)
1001 {
1002         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1003         struct it87_data *data = it87_update_device(dev);
1004         int index = sattr->index;
1005         int nr = sattr->nr;
1006
1007         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1008 }
1009
1010 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1011                       const char *buf, size_t count)
1012 {
1013         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1014         struct it87_data *data = dev_get_drvdata(dev);
1015         int index = sattr->index;
1016         int nr = sattr->nr;
1017         unsigned long val;
1018
1019         if (kstrtoul(buf, 10, &val) < 0)
1020                 return -EINVAL;
1021
1022         mutex_lock(&data->update_lock);
1023         data->in[nr][index] = in_to_reg(data, nr, val);
1024         it87_write_value(data,
1025                          index == 1 ? IT87_REG_VIN_MIN(nr)
1026                                     : IT87_REG_VIN_MAX(nr),
1027                          data->in[nr][index]);
1028         mutex_unlock(&data->update_lock);
1029         return count;
1030 }
1031
1032 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1033 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1034                             0, 1);
1035 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1036                             0, 2);
1037
1038 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1039 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1040                             1, 1);
1041 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1042                             1, 2);
1043
1044 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1045 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1046                             2, 1);
1047 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1048                             2, 2);
1049
1050 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1051 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1052                             3, 1);
1053 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1054                             3, 2);
1055
1056 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1057 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1058                             4, 1);
1059 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1060                             4, 2);
1061
1062 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1063 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1064                             5, 1);
1065 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1066                             5, 2);
1067
1068 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1069 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1070                             6, 1);
1071 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1072                             6, 2);
1073
1074 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1075 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1076                             7, 1);
1077 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1078                             7, 2);
1079
1080 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1081 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1082 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1083 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1084 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1085
1086 /* Up to 6 temperatures */
1087 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1088                          char *buf)
1089 {
1090         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1091         int nr = sattr->nr;
1092         int index = sattr->index;
1093         struct it87_data *data = it87_update_device(dev);
1094
1095         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1096 }
1097
1098 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1099                         const char *buf, size_t count)
1100 {
1101         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1102         int nr = sattr->nr;
1103         int index = sattr->index;
1104         struct it87_data *data = dev_get_drvdata(dev);
1105         long val;
1106         u8 reg, regval;
1107
1108         if (kstrtol(buf, 10, &val) < 0)
1109                 return -EINVAL;
1110
1111         mutex_lock(&data->update_lock);
1112
1113         switch (index) {
1114         default:
1115         case 1:
1116                 reg = IT87_REG_TEMP_LOW[nr];
1117                 break;
1118         case 2:
1119                 reg = IT87_REG_TEMP_HIGH[nr];
1120                 break;
1121         case 3:
1122                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1123                 if (!(regval & 0x80)) {
1124                         regval |= 0x80;
1125                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1126                 }
1127                 data->valid = 0;
1128                 reg = IT87_REG_TEMP_OFFSET[nr];
1129                 break;
1130         }
1131
1132         data->temp[nr][index] = TEMP_TO_REG(val);
1133         it87_write_value(data, reg, data->temp[nr][index]);
1134         mutex_unlock(&data->update_lock);
1135         return count;
1136 }
1137
1138 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1139 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1140                             0, 1);
1141 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1142                             0, 2);
1143 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1144                             set_temp, 0, 3);
1145 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1146 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1147                             1, 1);
1148 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1149                             1, 2);
1150 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1151                             set_temp, 1, 3);
1152 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1153 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1154                             2, 1);
1155 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1156                             2, 2);
1157 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1158                             set_temp, 2, 3);
1159 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1160 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1161                             3, 1);
1162 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1163                             3, 2);
1164 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1165                             set_temp, 3, 3);
1166 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1167 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1168                             4, 1);
1169 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1170                             4, 2);
1171 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1172                             set_temp, 4, 3);
1173 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1174 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1175                             5, 1);
1176 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1177                             5, 2);
1178 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1179                             set_temp, 5, 3);
1180
1181 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1182                               char *buf)
1183 {
1184         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1185         int nr = sensor_attr->index;
1186         struct it87_data *data = it87_update_device(dev);
1187         u8 reg = data->sensor;      /* In case value is updated while used */
1188         u8 extra = data->extra;
1189
1190         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1191             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1192                 return sprintf(buf, "6\n");  /* Intel PECI */
1193         if (reg & (1 << nr))
1194                 return sprintf(buf, "3\n");  /* thermal diode */
1195         if (reg & (8 << nr))
1196                 return sprintf(buf, "4\n");  /* thermistor */
1197         return sprintf(buf, "0\n");      /* disabled */
1198 }
1199
1200 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1201                              const char *buf, size_t count)
1202 {
1203         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1204         int nr = sensor_attr->index;
1205
1206         struct it87_data *data = dev_get_drvdata(dev);
1207         long val;
1208         u8 reg, extra;
1209
1210         if (kstrtol(buf, 10, &val) < 0)
1211                 return -EINVAL;
1212
1213         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1214         reg &= ~(1 << nr);
1215         reg &= ~(8 << nr);
1216         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1217                 reg &= 0x3f;
1218         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1219         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1220                 extra &= 0x7f;
1221         if (val == 2) { /* backwards compatibility */
1222                 dev_warn(dev,
1223                          "Sensor type 2 is deprecated, please use 4 instead\n");
1224                 val = 4;
1225         }
1226         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1227         if (val == 3)
1228                 reg |= 1 << nr;
1229         else if (val == 4)
1230                 reg |= 8 << nr;
1231         else if (has_temp_peci(data, nr) && val == 6)
1232                 reg |= (nr + 1) << 6;
1233         else if (has_temp_old_peci(data, nr) && val == 6)
1234                 extra |= 0x80;
1235         else if (val != 0)
1236                 return -EINVAL;
1237
1238         mutex_lock(&data->update_lock);
1239         data->sensor = reg;
1240         data->extra = extra;
1241         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1242         if (has_temp_old_peci(data, nr))
1243                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1244         data->valid = 0;        /* Force cache refresh */
1245         mutex_unlock(&data->update_lock);
1246         return count;
1247 }
1248
1249 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1250                           set_temp_type, 0);
1251 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1252                           set_temp_type, 1);
1253 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1254                           set_temp_type, 2);
1255 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1256                           set_temp_type, 3);
1257 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1258                           set_temp_type, 4);
1259 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1260                           set_temp_type, 5);
1261
1262 /* 6 Fans */
1263
1264 static int pwm_mode(const struct it87_data *data, int nr)
1265 {
1266         if (has_fanctl_onoff(data) && nr < 3 &&
1267             !(data->fan_main_ctrl & BIT(nr)))
1268                 return 0;                               /* Full speed */
1269         if (data->pwm_ctrl[nr] & 0x80)
1270                 return 2;                               /* Automatic mode */
1271         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1272             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1273                 return 0;                       /* Full speed */
1274
1275         return 1;                               /* Manual mode */
1276 }
1277
1278 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1279                         char *buf)
1280 {
1281         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1282         int nr = sattr->nr;
1283         int index = sattr->index;
1284         int speed;
1285         struct it87_data *data = it87_update_device(dev);
1286
1287         speed = has_16bit_fans(data) ?
1288                 FAN16_FROM_REG(data->fan[nr][index]) :
1289                 FAN_FROM_REG(data->fan[nr][index],
1290                              DIV_FROM_REG(data->fan_div[nr]));
1291         return sprintf(buf, "%d\n", speed);
1292 }
1293
1294 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1295                             char *buf)
1296 {
1297         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1298         struct it87_data *data = it87_update_device(dev);
1299         int nr = sensor_attr->index;
1300
1301         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1302 }
1303
1304 static ssize_t show_pwm_enable(struct device *dev,
1305                                struct device_attribute *attr, char *buf)
1306 {
1307         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1308         struct it87_data *data = it87_update_device(dev);
1309         int nr = sensor_attr->index;
1310
1311         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1312 }
1313
1314 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1315                         char *buf)
1316 {
1317         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1318         struct it87_data *data = it87_update_device(dev);
1319         int nr = sensor_attr->index;
1320
1321         return sprintf(buf, "%d\n",
1322                        pwm_from_reg(data, data->pwm_duty[nr]));
1323 }
1324
1325 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1326                              char *buf)
1327 {
1328         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1329         struct it87_data *data = it87_update_device(dev);
1330         int nr = sensor_attr->index;
1331         unsigned int freq;
1332         int index;
1333
1334         if (has_pwm_freq2(data) && nr == 1)
1335                 index = (data->extra >> 4) & 0x07;
1336         else
1337                 index = (data->fan_ctl >> 4) & 0x07;
1338
1339         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1340
1341         return sprintf(buf, "%u\n", freq);
1342 }
1343
1344 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1345                        const char *buf, size_t count)
1346 {
1347         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1348         int nr = sattr->nr;
1349         int index = sattr->index;
1350
1351         struct it87_data *data = dev_get_drvdata(dev);
1352         long val;
1353         u8 reg;
1354
1355         if (kstrtol(buf, 10, &val) < 0)
1356                 return -EINVAL;
1357
1358         mutex_lock(&data->update_lock);
1359
1360         if (has_16bit_fans(data)) {
1361                 data->fan[nr][index] = FAN16_TO_REG(val);
1362                 it87_write_value(data, data->REG_FAN_MIN[nr],
1363                                  data->fan[nr][index] & 0xff);
1364                 it87_write_value(data, data->REG_FANX_MIN[nr],
1365                                  data->fan[nr][index] >> 8);
1366         } else {
1367                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1368                 switch (nr) {
1369                 case 0:
1370                         data->fan_div[nr] = reg & 0x07;
1371                         break;
1372                 case 1:
1373                         data->fan_div[nr] = (reg >> 3) & 0x07;
1374                         break;
1375                 case 2:
1376                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1377                         break;
1378                 }
1379                 data->fan[nr][index] =
1380                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1381                 it87_write_value(data, data->REG_FAN_MIN[nr],
1382                                  data->fan[nr][index]);
1383         }
1384
1385         mutex_unlock(&data->update_lock);
1386         return count;
1387 }
1388
1389 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1390                            const char *buf, size_t count)
1391 {
1392         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1393         struct it87_data *data = dev_get_drvdata(dev);
1394         int nr = sensor_attr->index;
1395         unsigned long val;
1396         int min;
1397         u8 old;
1398
1399         if (kstrtoul(buf, 10, &val) < 0)
1400                 return -EINVAL;
1401
1402         mutex_lock(&data->update_lock);
1403         old = it87_read_value(data, IT87_REG_FAN_DIV);
1404
1405         /* Save fan min limit */
1406         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1407
1408         switch (nr) {
1409         case 0:
1410         case 1:
1411                 data->fan_div[nr] = DIV_TO_REG(val);
1412                 break;
1413         case 2:
1414                 if (val < 8)
1415                         data->fan_div[nr] = 1;
1416                 else
1417                         data->fan_div[nr] = 3;
1418         }
1419         val = old & 0x80;
1420         val |= (data->fan_div[0] & 0x07);
1421         val |= (data->fan_div[1] & 0x07) << 3;
1422         if (data->fan_div[2] == 3)
1423                 val |= 0x1 << 6;
1424         it87_write_value(data, IT87_REG_FAN_DIV, val);
1425
1426         /* Restore fan min limit */
1427         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1428         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1429
1430         mutex_unlock(&data->update_lock);
1431         return count;
1432 }
1433
1434 /* Returns 0 if OK, -EINVAL otherwise */
1435 static int check_trip_points(struct device *dev, int nr)
1436 {
1437         const struct it87_data *data = dev_get_drvdata(dev);
1438         int i, err = 0;
1439
1440         if (has_old_autopwm(data)) {
1441                 for (i = 0; i < 3; i++) {
1442                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1443                                 err = -EINVAL;
1444                 }
1445                 for (i = 0; i < 2; i++) {
1446                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1447                                 err = -EINVAL;
1448                 }
1449         } else if (has_newer_autopwm(data)) {
1450                 for (i = 1; i < 3; i++) {
1451                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1452                                 err = -EINVAL;
1453                 }
1454         }
1455
1456         if (err) {
1457                 dev_err(dev,
1458                         "Inconsistent trip points, not switching to automatic mode\n");
1459                 dev_err(dev, "Adjust the trip points and try again\n");
1460         }
1461         return err;
1462 }
1463
1464 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1465                               const char *buf, size_t count)
1466 {
1467         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1468         struct it87_data *data = dev_get_drvdata(dev);
1469         int nr = sensor_attr->index;
1470         long val;
1471
1472         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1473                 return -EINVAL;
1474
1475         /* Check trip points before switching to automatic mode */
1476         if (val == 2) {
1477                 if (check_trip_points(dev, nr) < 0)
1478                         return -EINVAL;
1479         }
1480
1481         mutex_lock(&data->update_lock);
1482
1483         if (val == 0) {
1484                 if (nr < 3 && has_fanctl_onoff(data)) {
1485                         int tmp;
1486                         /* make sure the fan is on when in on/off mode */
1487                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1488                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1489                         /* set on/off mode */
1490                         data->fan_main_ctrl &= ~BIT(nr);
1491                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1492                                          data->fan_main_ctrl);
1493                 } else {
1494                         u8 ctrl;
1495
1496                         /* No on/off mode, set maximum pwm value */
1497                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1498                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1499                                          data->pwm_duty[nr]);
1500                         /* and set manual mode */
1501                         if (has_newer_autopwm(data)) {
1502                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1503                                         data->pwm_temp_map[nr];
1504                         } else {
1505                                 ctrl = data->pwm_duty[nr];
1506                         }
1507                         data->pwm_ctrl[nr] = ctrl;
1508                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1509                 }
1510         } else {
1511                 u8 ctrl;
1512
1513                 if (has_newer_autopwm(data)) {
1514                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1515                                 data->pwm_temp_map[nr];
1516                         if (val != 1)
1517                                 ctrl |= 0x80;
1518                 } else {
1519                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1520                 }
1521                 data->pwm_ctrl[nr] = ctrl;
1522                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1523
1524                 if (has_fanctl_onoff(data) && nr < 3) {
1525                         /* set SmartGuardian mode */
1526                         data->fan_main_ctrl |= BIT(nr);
1527                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1528                                          data->fan_main_ctrl);
1529                 }
1530         }
1531
1532         mutex_unlock(&data->update_lock);
1533         return count;
1534 }
1535
1536 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1537                        const char *buf, size_t count)
1538 {
1539         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1540         struct it87_data *data = dev_get_drvdata(dev);
1541         int nr = sensor_attr->index;
1542         long val;
1543
1544         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1545                 return -EINVAL;
1546
1547         mutex_lock(&data->update_lock);
1548         it87_update_pwm_ctrl(data, nr);
1549         if (has_newer_autopwm(data)) {
1550                 /*
1551                  * If we are in automatic mode, the PWM duty cycle register
1552                  * is read-only so we can't write the value.
1553                  */
1554                 if (data->pwm_ctrl[nr] & 0x80) {
1555                         mutex_unlock(&data->update_lock);
1556                         return -EBUSY;
1557                 }
1558                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1559                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1560                                  data->pwm_duty[nr]);
1561         } else {
1562                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1563                 /*
1564                  * If we are in manual mode, write the duty cycle immediately;
1565                  * otherwise, just store it for later use.
1566                  */
1567                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1568                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1569                         it87_write_value(data, data->REG_PWM[nr],
1570                                          data->pwm_ctrl[nr]);
1571                 }
1572         }
1573         mutex_unlock(&data->update_lock);
1574         return count;
1575 }
1576
1577 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1578                             const char *buf, size_t count)
1579 {
1580         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1581         struct it87_data *data = dev_get_drvdata(dev);
1582         int nr = sensor_attr->index;
1583         unsigned long val;
1584         int i;
1585
1586         if (kstrtoul(buf, 10, &val) < 0)
1587                 return -EINVAL;
1588
1589         val = clamp_val(val, 0, 1000000);
1590         val *= has_newer_autopwm(data) ? 256 : 128;
1591
1592         /* Search for the nearest available frequency */
1593         for (i = 0; i < 7; i++) {
1594                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1595                         break;
1596         }
1597
1598         mutex_lock(&data->update_lock);
1599         if (nr == 0) {
1600                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1601                 data->fan_ctl |= i << 4;
1602                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1603         } else {
1604                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1605                 data->extra |= i << 4;
1606                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1607         }
1608         mutex_unlock(&data->update_lock);
1609
1610         return count;
1611 }
1612
1613 static ssize_t show_pwm_temp_map(struct device *dev,
1614                                  struct device_attribute *attr, char *buf)
1615 {
1616         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1617         struct it87_data *data = it87_update_device(dev);
1618         int nr = sensor_attr->index;
1619         int map;
1620
1621         map = data->pwm_temp_map[nr];
1622         if (map >= 3)
1623                 map = 0;        /* Should never happen */
1624         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1625                 map += 3;
1626
1627         return sprintf(buf, "%d\n", (int)BIT(map));
1628 }
1629
1630 static ssize_t set_pwm_temp_map(struct device *dev,
1631                                 struct device_attribute *attr, const char *buf,
1632                                 size_t count)
1633 {
1634         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1635         struct it87_data *data = dev_get_drvdata(dev);
1636         int nr = sensor_attr->index;
1637         long val;
1638         u8 reg;
1639
1640         if (kstrtol(buf, 10, &val) < 0)
1641                 return -EINVAL;
1642
1643         if (nr >= 3)
1644                 val -= 3;
1645
1646         switch (val) {
1647         case BIT(0):
1648                 reg = 0x00;
1649                 break;
1650         case BIT(1):
1651                 reg = 0x01;
1652                 break;
1653         case BIT(2):
1654                 reg = 0x02;
1655                 break;
1656         default:
1657                 return -EINVAL;
1658         }
1659
1660         mutex_lock(&data->update_lock);
1661         it87_update_pwm_ctrl(data, nr);
1662         data->pwm_temp_map[nr] = reg;
1663         /*
1664          * If we are in automatic mode, write the temp mapping immediately;
1665          * otherwise, just store it for later use.
1666          */
1667         if (data->pwm_ctrl[nr] & 0x80) {
1668                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1669                                                 data->pwm_temp_map[nr];
1670                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1671         }
1672         mutex_unlock(&data->update_lock);
1673         return count;
1674 }
1675
1676 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1677                              char *buf)
1678 {
1679         struct it87_data *data = it87_update_device(dev);
1680         struct sensor_device_attribute_2 *sensor_attr =
1681                         to_sensor_dev_attr_2(attr);
1682         int nr = sensor_attr->nr;
1683         int point = sensor_attr->index;
1684
1685         return sprintf(buf, "%d\n",
1686                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1687 }
1688
1689 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1690                             const char *buf, size_t count)
1691 {
1692         struct it87_data *data = dev_get_drvdata(dev);
1693         struct sensor_device_attribute_2 *sensor_attr =
1694                         to_sensor_dev_attr_2(attr);
1695         int nr = sensor_attr->nr;
1696         int point = sensor_attr->index;
1697         int regaddr;
1698         long val;
1699
1700         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1701                 return -EINVAL;
1702
1703         mutex_lock(&data->update_lock);
1704         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1705         if (has_newer_autopwm(data))
1706                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1707         else
1708                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1709         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1710         mutex_unlock(&data->update_lock);
1711         return count;
1712 }
1713
1714 static ssize_t show_auto_pwm_slope(struct device *dev,
1715                                    struct device_attribute *attr, char *buf)
1716 {
1717         struct it87_data *data = it87_update_device(dev);
1718         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1719         int nr = sensor_attr->index;
1720
1721         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1722 }
1723
1724 static ssize_t set_auto_pwm_slope(struct device *dev,
1725                                   struct device_attribute *attr,
1726                                   const char *buf, size_t count)
1727 {
1728         struct it87_data *data = dev_get_drvdata(dev);
1729         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1730         int nr = sensor_attr->index;
1731         unsigned long val;
1732
1733         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1734                 return -EINVAL;
1735
1736         mutex_lock(&data->update_lock);
1737         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1738         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1739                          data->auto_pwm[nr][1]);
1740         mutex_unlock(&data->update_lock);
1741         return count;
1742 }
1743
1744 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1745                               char *buf)
1746 {
1747         struct it87_data *data = it87_update_device(dev);
1748         struct sensor_device_attribute_2 *sensor_attr =
1749                         to_sensor_dev_attr_2(attr);
1750         int nr = sensor_attr->nr;
1751         int point = sensor_attr->index;
1752         int reg;
1753
1754         if (has_old_autopwm(data) || point)
1755                 reg = data->auto_temp[nr][point];
1756         else
1757                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1758
1759         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1760 }
1761
1762 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1763                              const char *buf, size_t count)
1764 {
1765         struct it87_data *data = dev_get_drvdata(dev);
1766         struct sensor_device_attribute_2 *sensor_attr =
1767                         to_sensor_dev_attr_2(attr);
1768         int nr = sensor_attr->nr;
1769         int point = sensor_attr->index;
1770         long val;
1771         int reg;
1772
1773         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1774                 return -EINVAL;
1775
1776         mutex_lock(&data->update_lock);
1777         if (has_newer_autopwm(data) && !point) {
1778                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1779                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1780                 data->auto_temp[nr][0] = reg;
1781                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1782         } else {
1783                 reg = TEMP_TO_REG(val);
1784                 data->auto_temp[nr][point] = reg;
1785                 if (has_newer_autopwm(data))
1786                         point--;
1787                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1788         }
1789         mutex_unlock(&data->update_lock);
1790         return count;
1791 }
1792
1793 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1794 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1795                             0, 1);
1796 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1797                           set_fan_div, 0);
1798
1799 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1800 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1801                             1, 1);
1802 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1803                           set_fan_div, 1);
1804
1805 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1806 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1807                             2, 1);
1808 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1809                           set_fan_div, 2);
1810
1811 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1812 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1813                             3, 1);
1814
1815 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1816 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1817                             4, 1);
1818
1819 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1820 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1821                             5, 1);
1822
1823 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1824                           show_pwm_enable, set_pwm_enable, 0);
1825 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1826 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1827                           set_pwm_freq, 0);
1828 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1829                           show_pwm_temp_map, set_pwm_temp_map, 0);
1830 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1831                             show_auto_pwm, set_auto_pwm, 0, 0);
1832 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1833                             show_auto_pwm, set_auto_pwm, 0, 1);
1834 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1835                             show_auto_pwm, set_auto_pwm, 0, 2);
1836 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1837                             show_auto_pwm, NULL, 0, 3);
1838 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1839                             show_auto_temp, set_auto_temp, 0, 1);
1840 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1841                             show_auto_temp, set_auto_temp, 0, 0);
1842 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1843                             show_auto_temp, set_auto_temp, 0, 2);
1844 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1845                             show_auto_temp, set_auto_temp, 0, 3);
1846 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1847                             show_auto_temp, set_auto_temp, 0, 4);
1848 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1849                             show_auto_pwm, set_auto_pwm, 0, 0);
1850 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1851                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1852
1853 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1854                           show_pwm_enable, set_pwm_enable, 1);
1855 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1856 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1857 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1858                           show_pwm_temp_map, set_pwm_temp_map, 1);
1859 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1860                             show_auto_pwm, set_auto_pwm, 1, 0);
1861 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1862                             show_auto_pwm, set_auto_pwm, 1, 1);
1863 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1864                             show_auto_pwm, set_auto_pwm, 1, 2);
1865 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1866                             show_auto_pwm, NULL, 1, 3);
1867 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1868                             show_auto_temp, set_auto_temp, 1, 1);
1869 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1870                             show_auto_temp, set_auto_temp, 1, 0);
1871 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1872                             show_auto_temp, set_auto_temp, 1, 2);
1873 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1874                             show_auto_temp, set_auto_temp, 1, 3);
1875 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1876                             show_auto_temp, set_auto_temp, 1, 4);
1877 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1878                             show_auto_pwm, set_auto_pwm, 1, 0);
1879 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1880                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1881
1882 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1883                           show_pwm_enable, set_pwm_enable, 2);
1884 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1885 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1886 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1887                           show_pwm_temp_map, set_pwm_temp_map, 2);
1888 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1889                             show_auto_pwm, set_auto_pwm, 2, 0);
1890 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1891                             show_auto_pwm, set_auto_pwm, 2, 1);
1892 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1893                             show_auto_pwm, set_auto_pwm, 2, 2);
1894 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1895                             show_auto_pwm, NULL, 2, 3);
1896 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1897                             show_auto_temp, set_auto_temp, 2, 1);
1898 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1899                             show_auto_temp, set_auto_temp, 2, 0);
1900 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1901                             show_auto_temp, set_auto_temp, 2, 2);
1902 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1903                             show_auto_temp, set_auto_temp, 2, 3);
1904 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1905                             show_auto_temp, set_auto_temp, 2, 4);
1906 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1907                             show_auto_pwm, set_auto_pwm, 2, 0);
1908 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1909                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1910
1911 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1912                           show_pwm_enable, set_pwm_enable, 3);
1913 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1914 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1915 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1916                           show_pwm_temp_map, set_pwm_temp_map, 3);
1917 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1918                             show_auto_temp, set_auto_temp, 2, 1);
1919 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1920                             show_auto_temp, set_auto_temp, 2, 0);
1921 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1922                             show_auto_temp, set_auto_temp, 2, 2);
1923 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1924                             show_auto_temp, set_auto_temp, 2, 3);
1925 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1926                             show_auto_pwm, set_auto_pwm, 3, 0);
1927 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1928                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1929
1930 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1931                           show_pwm_enable, set_pwm_enable, 4);
1932 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1933 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1934 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1935                           show_pwm_temp_map, set_pwm_temp_map, 4);
1936 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1937                             show_auto_temp, set_auto_temp, 2, 1);
1938 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1939                             show_auto_temp, set_auto_temp, 2, 0);
1940 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1941                             show_auto_temp, set_auto_temp, 2, 2);
1942 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1943                             show_auto_temp, set_auto_temp, 2, 3);
1944 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1945                             show_auto_pwm, set_auto_pwm, 4, 0);
1946 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1947                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1948
1949 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1950                           show_pwm_enable, set_pwm_enable, 5);
1951 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1952 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1953 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1954                           show_pwm_temp_map, set_pwm_temp_map, 5);
1955 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1956                             show_auto_temp, set_auto_temp, 2, 1);
1957 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1958                             show_auto_temp, set_auto_temp, 2, 0);
1959 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1960                             show_auto_temp, set_auto_temp, 2, 2);
1961 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1962                             show_auto_temp, set_auto_temp, 2, 3);
1963 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1964                             show_auto_pwm, set_auto_pwm, 5, 0);
1965 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1966                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1967
1968 /* Alarms */
1969 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1970                            char *buf)
1971 {
1972         struct it87_data *data = it87_update_device(dev);
1973
1974         return sprintf(buf, "%u\n", data->alarms);
1975 }
1976 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1977
1978 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1979                           char *buf)
1980 {
1981         struct it87_data *data = it87_update_device(dev);
1982         int bitnr = to_sensor_dev_attr(attr)->index;
1983
1984         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1985 }
1986
1987 static ssize_t clear_intrusion(struct device *dev,
1988                                struct device_attribute *attr, const char *buf,
1989                                size_t count)
1990 {
1991         struct it87_data *data = dev_get_drvdata(dev);
1992         int config;
1993         long val;
1994
1995         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1996                 return -EINVAL;
1997
1998         mutex_lock(&data->update_lock);
1999         config = it87_read_value(data, IT87_REG_CONFIG);
2000         if (config < 0) {
2001                 count = config;
2002         } else {
2003                 config |= BIT(5);
2004                 it87_write_value(data, IT87_REG_CONFIG, config);
2005                 /* Invalidate cache to force re-read */
2006                 data->valid = 0;
2007         }
2008         mutex_unlock(&data->update_lock);
2009
2010         return count;
2011 }
2012
2013 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2014 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2015 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2016 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2017 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2018 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2019 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2020 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2021 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2022 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2023 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2024 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2025 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2026 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2027 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2028 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2029 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2030 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2031 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2032 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2033 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2034                           show_alarm, clear_intrusion, 4);
2035
2036 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2037                          char *buf)
2038 {
2039         struct it87_data *data = it87_update_device(dev);
2040         int bitnr = to_sensor_dev_attr(attr)->index;
2041
2042         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2043 }
2044
2045 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2046                         const char *buf, size_t count)
2047 {
2048         int bitnr = to_sensor_dev_attr(attr)->index;
2049         struct it87_data *data = dev_get_drvdata(dev);
2050         long val;
2051
2052         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2053                 return -EINVAL;
2054
2055         mutex_lock(&data->update_lock);
2056         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2057         if (val)
2058                 data->beeps |= BIT(bitnr);
2059         else
2060                 data->beeps &= ~BIT(bitnr);
2061         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2062         mutex_unlock(&data->update_lock);
2063         return count;
2064 }
2065
2066 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2067                           show_beep, set_beep, 1);
2068 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2069 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2070 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2071 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2072 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2073 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2074 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2075 /* fanX_beep writability is set later */
2076 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2077 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2078 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2079 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2080 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2081 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2082 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2083                           show_beep, set_beep, 2);
2084 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2085 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2086 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2087 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2088 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2089
2090 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2091                             char *buf)
2092 {
2093         struct it87_data *data = dev_get_drvdata(dev);
2094
2095         return sprintf(buf, "%u\n", data->vrm);
2096 }
2097
2098 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2099                              const char *buf, size_t count)
2100 {
2101         struct it87_data *data = dev_get_drvdata(dev);
2102         unsigned long val;
2103
2104         if (kstrtoul(buf, 10, &val) < 0)
2105                 return -EINVAL;
2106
2107         data->vrm = val;
2108
2109         return count;
2110 }
2111 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2112
2113 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2114                             char *buf)
2115 {
2116         struct it87_data *data = it87_update_device(dev);
2117
2118         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2119 }
2120 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2121
2122 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2123                           char *buf)
2124 {
2125         static const char * const labels[] = {
2126                 "+5V",
2127                 "5VSB",
2128                 "Vbat",
2129                 "AVCC",
2130         };
2131         static const char * const labels_it8721[] = {
2132                 "+3.3V",
2133                 "3VSB",
2134                 "Vbat",
2135                 "+3.3V",
2136         };
2137         struct it87_data *data = dev_get_drvdata(dev);
2138         int nr = to_sensor_dev_attr(attr)->index;
2139         const char *label;
2140
2141         if (has_vin3_5v(data) && nr == 0)
2142                 label = labels[0];
2143         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2144                 label = labels_it8721[nr];
2145         else
2146                 label = labels[nr];
2147
2148         return sprintf(buf, "%s\n", label);
2149 }
2150 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2151 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2152 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2153 /* AVCC3 */
2154 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2155
2156 static umode_t it87_in_is_visible(struct kobject *kobj,
2157                                   struct attribute *attr, int index)
2158 {
2159         struct device *dev = container_of(kobj, struct device, kobj);
2160         struct it87_data *data = dev_get_drvdata(dev);
2161         int i = index / 5;      /* voltage index */
2162         int a = index % 5;      /* attribute index */
2163
2164         if (index >= 40) {      /* in8 and higher only have input attributes */
2165                 i = index - 40 + 8;
2166                 a = 0;
2167         }
2168
2169         if (!(data->has_in & BIT(i)))
2170                 return 0;
2171
2172         if (a == 4 && !data->has_beep)
2173                 return 0;
2174
2175         return attr->mode;
2176 }
2177
2178 static struct attribute *it87_attributes_in[] = {
2179         &sensor_dev_attr_in0_input.dev_attr.attr,
2180         &sensor_dev_attr_in0_min.dev_attr.attr,
2181         &sensor_dev_attr_in0_max.dev_attr.attr,
2182         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2183         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2184
2185         &sensor_dev_attr_in1_input.dev_attr.attr,
2186         &sensor_dev_attr_in1_min.dev_attr.attr,
2187         &sensor_dev_attr_in1_max.dev_attr.attr,
2188         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2189         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2190
2191         &sensor_dev_attr_in2_input.dev_attr.attr,
2192         &sensor_dev_attr_in2_min.dev_attr.attr,
2193         &sensor_dev_attr_in2_max.dev_attr.attr,
2194         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2195         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2196
2197         &sensor_dev_attr_in3_input.dev_attr.attr,
2198         &sensor_dev_attr_in3_min.dev_attr.attr,
2199         &sensor_dev_attr_in3_max.dev_attr.attr,
2200         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2201         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2202
2203         &sensor_dev_attr_in4_input.dev_attr.attr,
2204         &sensor_dev_attr_in4_min.dev_attr.attr,
2205         &sensor_dev_attr_in4_max.dev_attr.attr,
2206         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2207         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2208
2209         &sensor_dev_attr_in5_input.dev_attr.attr,
2210         &sensor_dev_attr_in5_min.dev_attr.attr,
2211         &sensor_dev_attr_in5_max.dev_attr.attr,
2212         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2213         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2214
2215         &sensor_dev_attr_in6_input.dev_attr.attr,
2216         &sensor_dev_attr_in6_min.dev_attr.attr,
2217         &sensor_dev_attr_in6_max.dev_attr.attr,
2218         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2219         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2220
2221         &sensor_dev_attr_in7_input.dev_attr.attr,
2222         &sensor_dev_attr_in7_min.dev_attr.attr,
2223         &sensor_dev_attr_in7_max.dev_attr.attr,
2224         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2225         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2226
2227         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2228         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2229         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2230         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2231         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2232         NULL
2233 };
2234
2235 static const struct attribute_group it87_group_in = {
2236         .attrs = it87_attributes_in,
2237         .is_visible = it87_in_is_visible,
2238 };
2239
2240 static umode_t it87_temp_is_visible(struct kobject *kobj,
2241                                     struct attribute *attr, int index)
2242 {
2243         struct device *dev = container_of(kobj, struct device, kobj);
2244         struct it87_data *data = dev_get_drvdata(dev);
2245         int i = index / 7;      /* temperature index */
2246         int a = index % 7;      /* attribute index */
2247
2248         if (!(data->has_temp & BIT(i)))
2249                 return 0;
2250
2251         if (a && i >= data->num_temp_limit)
2252                 return 0;
2253
2254         if (a == 5 && !has_temp_offset(data))
2255                 return 0;
2256
2257         if (a == 6 && !data->has_beep)
2258                 return 0;
2259
2260         return attr->mode;
2261 }
2262
2263 static struct attribute *it87_attributes_temp[] = {
2264         &sensor_dev_attr_temp1_input.dev_attr.attr,
2265         &sensor_dev_attr_temp1_max.dev_attr.attr,
2266         &sensor_dev_attr_temp1_min.dev_attr.attr,
2267         &sensor_dev_attr_temp1_type.dev_attr.attr,
2268         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2269         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2270         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2271
2272         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2273         &sensor_dev_attr_temp2_max.dev_attr.attr,
2274         &sensor_dev_attr_temp2_min.dev_attr.attr,
2275         &sensor_dev_attr_temp2_type.dev_attr.attr,
2276         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2277         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2278         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2279
2280         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2281         &sensor_dev_attr_temp3_max.dev_attr.attr,
2282         &sensor_dev_attr_temp3_min.dev_attr.attr,
2283         &sensor_dev_attr_temp3_type.dev_attr.attr,
2284         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2285         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2286         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2287
2288         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2289         &sensor_dev_attr_temp4_max.dev_attr.attr,
2290         &sensor_dev_attr_temp4_min.dev_attr.attr,
2291         &sensor_dev_attr_temp4_type.dev_attr.attr,
2292         &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2293         &sensor_dev_attr_temp4_offset.dev_attr.attr,
2294         &sensor_dev_attr_temp4_beep.dev_attr.attr,
2295         &sensor_dev_attr_temp5_input.dev_attr.attr,
2296         &sensor_dev_attr_temp5_max.dev_attr.attr,
2297         &sensor_dev_attr_temp5_min.dev_attr.attr,
2298         &sensor_dev_attr_temp5_type.dev_attr.attr,
2299         &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2300         &sensor_dev_attr_temp5_offset.dev_attr.attr,
2301         &sensor_dev_attr_temp5_beep.dev_attr.attr,
2302         &sensor_dev_attr_temp6_input.dev_attr.attr,
2303         &sensor_dev_attr_temp6_max.dev_attr.attr,
2304         &sensor_dev_attr_temp6_min.dev_attr.attr,
2305         &sensor_dev_attr_temp6_type.dev_attr.attr,
2306         &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2307         &sensor_dev_attr_temp6_offset.dev_attr.attr,
2308         &sensor_dev_attr_temp6_beep.dev_attr.attr,
2309         NULL
2310 };
2311
2312 static const struct attribute_group it87_group_temp = {
2313         .attrs = it87_attributes_temp,
2314         .is_visible = it87_temp_is_visible,
2315 };
2316
2317 static umode_t it87_is_visible(struct kobject *kobj,
2318                                struct attribute *attr, int index)
2319 {
2320         struct device *dev = container_of(kobj, struct device, kobj);
2321         struct it87_data *data = dev_get_drvdata(dev);
2322
2323         if ((index == 2 || index == 3) && !data->has_vid)
2324                 return 0;
2325
2326         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2327                 return 0;
2328
2329         return attr->mode;
2330 }
2331
2332 static struct attribute *it87_attributes[] = {
2333         &dev_attr_alarms.attr,
2334         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2335         &dev_attr_vrm.attr,                             /* 2 */
2336         &dev_attr_cpu0_vid.attr,                        /* 3 */
2337         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2338         &sensor_dev_attr_in7_label.dev_attr.attr,
2339         &sensor_dev_attr_in8_label.dev_attr.attr,
2340         &sensor_dev_attr_in9_label.dev_attr.attr,
2341         NULL
2342 };
2343
2344 static const struct attribute_group it87_group = {
2345         .attrs = it87_attributes,
2346         .is_visible = it87_is_visible,
2347 };
2348
2349 static umode_t it87_fan_is_visible(struct kobject *kobj,
2350                                    struct attribute *attr, int index)
2351 {
2352         struct device *dev = container_of(kobj, struct device, kobj);
2353         struct it87_data *data = dev_get_drvdata(dev);
2354         int i = index / 5;      /* fan index */
2355         int a = index % 5;      /* attribute index */
2356
2357         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2358                 i = (index - 15) / 4 + 3;
2359                 a = (index - 15) % 4;
2360         }
2361
2362         if (!(data->has_fan & BIT(i)))
2363                 return 0;
2364
2365         if (a == 3) {                           /* beep */
2366                 if (!data->has_beep)
2367                         return 0;
2368                 /* first fan beep attribute is writable */
2369                 if (i == __ffs(data->has_fan))
2370                         return attr->mode | S_IWUSR;
2371         }
2372
2373         if (a == 4 && has_16bit_fans(data))     /* divisor */
2374                 return 0;
2375
2376         return attr->mode;
2377 }
2378
2379 static struct attribute *it87_attributes_fan[] = {
2380         &sensor_dev_attr_fan1_input.dev_attr.attr,
2381         &sensor_dev_attr_fan1_min.dev_attr.attr,
2382         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2383         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2384         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2385
2386         &sensor_dev_attr_fan2_input.dev_attr.attr,
2387         &sensor_dev_attr_fan2_min.dev_attr.attr,
2388         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2389         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2390         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2391
2392         &sensor_dev_attr_fan3_input.dev_attr.attr,
2393         &sensor_dev_attr_fan3_min.dev_attr.attr,
2394         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2395         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2396         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2397
2398         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2399         &sensor_dev_attr_fan4_min.dev_attr.attr,
2400         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2401         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2402
2403         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2404         &sensor_dev_attr_fan5_min.dev_attr.attr,
2405         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2406         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2407
2408         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2409         &sensor_dev_attr_fan6_min.dev_attr.attr,
2410         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2411         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2412         NULL
2413 };
2414
2415 static const struct attribute_group it87_group_fan = {
2416         .attrs = it87_attributes_fan,
2417         .is_visible = it87_fan_is_visible,
2418 };
2419
2420 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2421                                    struct attribute *attr, int index)
2422 {
2423         struct device *dev = container_of(kobj, struct device, kobj);
2424         struct it87_data *data = dev_get_drvdata(dev);
2425         int i = index / 4;      /* pwm index */
2426         int a = index % 4;      /* attribute index */
2427
2428         if (!(data->has_pwm & BIT(i)))
2429                 return 0;
2430
2431         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2432         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2433                 return attr->mode | S_IWUSR;
2434
2435         /* pwm2_freq is writable if there are two pwm frequency selects */
2436         if (has_pwm_freq2(data) && i == 1 && a == 2)
2437                 return attr->mode | S_IWUSR;
2438
2439         return attr->mode;
2440 }
2441
2442 static struct attribute *it87_attributes_pwm[] = {
2443         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2444         &sensor_dev_attr_pwm1.dev_attr.attr,
2445         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2446         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2447
2448         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2449         &sensor_dev_attr_pwm2.dev_attr.attr,
2450         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2451         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2452
2453         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2454         &sensor_dev_attr_pwm3.dev_attr.attr,
2455         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2456         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2457
2458         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2459         &sensor_dev_attr_pwm4.dev_attr.attr,
2460         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2461         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2462
2463         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2464         &sensor_dev_attr_pwm5.dev_attr.attr,
2465         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2466         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2467
2468         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2469         &sensor_dev_attr_pwm6.dev_attr.attr,
2470         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2471         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2472
2473         NULL
2474 };
2475
2476 static const struct attribute_group it87_group_pwm = {
2477         .attrs = it87_attributes_pwm,
2478         .is_visible = it87_pwm_is_visible,
2479 };
2480
2481 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2482                                         struct attribute *attr, int index)
2483 {
2484         struct device *dev = container_of(kobj, struct device, kobj);
2485         struct it87_data *data = dev_get_drvdata(dev);
2486         int i = index / 11;     /* pwm index */
2487         int a = index % 11;     /* attribute index */
2488
2489         if (index >= 33) {      /* pwm 4..6 */
2490                 i = (index - 33) / 6 + 3;
2491                 a = (index - 33) % 6 + 4;
2492         }
2493
2494         if (!(data->has_pwm & BIT(i)))
2495                 return 0;
2496
2497         if (has_newer_autopwm(data)) {
2498                 if (a < 4)      /* no auto point pwm */
2499                         return 0;
2500                 if (a == 8)     /* no auto_point4 */
2501                         return 0;
2502         }
2503         if (has_old_autopwm(data)) {
2504                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2505                         return 0;
2506         }
2507
2508         return attr->mode;
2509 }
2510
2511 static struct attribute *it87_attributes_auto_pwm[] = {
2512         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2513         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2514         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2515         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2516         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2517         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2518         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2519         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2520         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2521         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2522         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2523
2524         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2525         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2526         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2527         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2528         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2529         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2530         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2531         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2532         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2533         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2534         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2535
2536         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2537         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2538         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2539         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2540         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2541         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2542         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2543         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2544         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2545         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2546         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2547
2548         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2549         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2550         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2551         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2552         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2553         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2554
2555         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2556         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2557         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2558         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2559         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2560         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2561
2562         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2563         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2564         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2565         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2566         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2567         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2568
2569         NULL,
2570 };
2571
2572 static const struct attribute_group it87_group_auto_pwm = {
2573         .attrs = it87_attributes_auto_pwm,
2574         .is_visible = it87_auto_pwm_is_visible,
2575 };
2576
2577 /* SuperIO detection - will change isa_address if a chip is found */
2578 static int __init it87_find(int sioaddr, unsigned short *address,
2579                             struct it87_sio_data *sio_data)
2580 {
2581         int err;
2582         u16 chip_type;
2583         const char *board_vendor, *board_name;
2584         const struct it87_devices *config;
2585
2586         err = superio_enter(sioaddr);
2587         if (err)
2588                 return err;
2589
2590         err = -ENODEV;
2591         chip_type = superio_inw(sioaddr, DEVID);
2592         if (chip_type == 0xffff)
2593                 goto exit;
2594
2595         if (force_id)
2596                 chip_type = force_id;
2597
2598         switch (chip_type) {
2599         case IT8705F_DEVID:
2600                 sio_data->type = it87;
2601                 break;
2602         case IT8712F_DEVID:
2603                 sio_data->type = it8712;
2604                 break;
2605         case IT8716F_DEVID:
2606         case IT8726F_DEVID:
2607                 sio_data->type = it8716;
2608                 break;
2609         case IT8718F_DEVID:
2610                 sio_data->type = it8718;
2611                 break;
2612         case IT8720F_DEVID:
2613                 sio_data->type = it8720;
2614                 break;
2615         case IT8721F_DEVID:
2616                 sio_data->type = it8721;
2617                 break;
2618         case IT8728F_DEVID:
2619                 sio_data->type = it8728;
2620                 break;
2621         case IT8732F_DEVID:
2622                 sio_data->type = it8732;
2623                 break;
2624         case IT8792E_DEVID:
2625                 sio_data->type = it8792;
2626                 break;
2627         case IT8771E_DEVID:
2628                 sio_data->type = it8771;
2629                 break;
2630         case IT8772E_DEVID:
2631                 sio_data->type = it8772;
2632                 break;
2633         case IT8781F_DEVID:
2634                 sio_data->type = it8781;
2635                 break;
2636         case IT8782F_DEVID:
2637                 sio_data->type = it8782;
2638                 break;
2639         case IT8783E_DEVID:
2640                 sio_data->type = it8783;
2641                 break;
2642         case IT8786E_DEVID:
2643                 sio_data->type = it8786;
2644                 break;
2645         case IT8790E_DEVID:
2646                 sio_data->type = it8790;
2647                 break;
2648         case IT8603E_DEVID:
2649         case IT8623E_DEVID:
2650                 sio_data->type = it8603;
2651                 break;
2652         case IT8607E_DEVID:
2653                 sio_data->type = it8607;
2654                 break;
2655         case IT8620E_DEVID:
2656                 sio_data->type = it8620;
2657                 break;
2658         case IT8622E_DEVID:
2659                 sio_data->type = it8622;
2660                 break;
2661         case IT8628E_DEVID:
2662                 sio_data->type = it8628;
2663                 break;
2664         case IT8655E_DEVID:
2665                 sio_data->type = it8655;
2666                 break;
2667         case IT8665E_DEVID:
2668                 sio_data->type = it8665;
2669                 break;
2670         case IT8686E_DEVID:
2671                 sio_data->type = it8686;
2672                 break;
2673         case 0xffff:    /* No device at all */
2674                 goto exit;
2675         default:
2676                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2677                 goto exit;
2678         }
2679
2680         superio_select(sioaddr, PME);
2681         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2682                 pr_info("Device not activated, skipping\n");
2683                 goto exit;
2684         }
2685
2686         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2687         if (*address == 0) {
2688                 pr_info("Base address not set, skipping\n");
2689                 goto exit;
2690         }
2691
2692         err = 0;
2693         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2694         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2695                 it87_devices[sio_data->type].suffix,
2696                 *address, sio_data->revision);
2697
2698         config = &it87_devices[sio_data->type];
2699
2700         /* in7 (VSB or VCCH5V) is always internal on some chips */
2701         if (has_in7_internal(config))
2702                 sio_data->internal |= BIT(1);
2703
2704         /* in8 (Vbat) is always internal */
2705         sio_data->internal |= BIT(2);
2706
2707         /* in9 (AVCC3), always internal if supported */
2708         if (has_avcc3(config))
2709                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2710         else
2711                 sio_data->skip_in |= BIT(9);
2712
2713         if (!has_four_pwm(config))
2714                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2715         else if (!has_five_pwm(config))
2716                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2717         else if (!has_six_pwm(config))
2718                 sio_data->skip_pwm |= BIT(5);
2719
2720         if (!has_vid(config))
2721                 sio_data->skip_vid = 1;
2722
2723         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2724         if (sio_data->type == it87) {
2725                 /* The IT8705F has a different LD number for GPIO */
2726                 superio_select(sioaddr, 5);
2727                 sio_data->beep_pin = superio_inb(sioaddr,
2728                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2729         } else if (sio_data->type == it8783) {
2730                 int reg25, reg27, reg2a, reg2c, regef;
2731
2732                 superio_select(sioaddr, GPIO);
2733
2734                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2735                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2736                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2737                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2738                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2739
2740                 /* Check if fan3 is there or not */
2741                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2742                         sio_data->skip_fan |= BIT(2);
2743                 if ((reg25 & BIT(4)) ||
2744                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2745                         sio_data->skip_pwm |= BIT(2);
2746
2747                 /* Check if fan2 is there or not */
2748                 if (reg27 & BIT(7))
2749                         sio_data->skip_fan |= BIT(1);
2750                 if (reg27 & BIT(3))
2751                         sio_data->skip_pwm |= BIT(1);
2752
2753                 /* VIN5 */
2754                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2755                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2756
2757                 /* VIN6 */
2758                 if (reg27 & BIT(1))
2759                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2760
2761                 /*
2762                  * VIN7
2763                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2764                  */
2765                 if (reg27 & BIT(2)) {
2766                         /*
2767                          * The data sheet is a bit unclear regarding the
2768                          * internal voltage divider for VCCH5V. It says
2769                          * "This bit enables and switches VIN7 (pin 91) to the
2770                          * internal voltage divider for VCCH5V".
2771                          * This is different to other chips, where the internal
2772                          * voltage divider would connect VIN7 to an internal
2773                          * voltage source. Maybe that is the case here as well.
2774                          *
2775                          * Since we don't know for sure, re-route it if that is
2776                          * not the case, and ask the user to report if the
2777                          * resulting voltage is sane.
2778                          */
2779                         if (!(reg2c & BIT(1))) {
2780                                 reg2c |= BIT(1);
2781                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2782                                              reg2c);
2783                                 pr_notice("Routing internal VCCH5V to in7.\n");
2784                         }
2785                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2786                         pr_notice("Please report if it displays a reasonable voltage.\n");
2787                 }
2788
2789                 if (reg2c & BIT(0))
2790                         sio_data->internal |= BIT(0);
2791                 if (reg2c & BIT(1))
2792                         sio_data->internal |= BIT(1);
2793
2794                 sio_data->beep_pin = superio_inb(sioaddr,
2795                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2796         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2797                 int reg27, reg29;
2798
2799                 superio_select(sioaddr, GPIO);
2800
2801                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2802
2803                 /* Check if fan3 is there or not */
2804                 if (reg27 & BIT(6))
2805                         sio_data->skip_pwm |= BIT(2);
2806                 if (reg27 & BIT(7))
2807                         sio_data->skip_fan |= BIT(2);
2808
2809                 /* Check if fan2 is there or not */
2810                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2811                 if (reg29 & BIT(1))
2812                         sio_data->skip_pwm |= BIT(1);
2813                 if (reg29 & BIT(2))
2814                         sio_data->skip_fan |= BIT(1);
2815
2816                 if (sio_data->type == it8603) {
2817                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2818                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2819                 }
2820
2821                 sio_data->beep_pin = superio_inb(sioaddr,
2822                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2823         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2824                    sio_data->type == it8686) {
2825                 int reg;
2826
2827                 superio_select(sioaddr, GPIO);
2828
2829                 /* Check for pwm5 */
2830                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2831                 if (reg & BIT(6))
2832                         sio_data->skip_pwm |= BIT(4);
2833
2834                 /* Check for fan4, fan5 */
2835                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2836                 if (!(reg & BIT(5)))
2837                         sio_data->skip_fan |= BIT(3);
2838                 if (!(reg & BIT(4)))
2839                         sio_data->skip_fan |= BIT(4);
2840
2841                 /* Check for pwm3, fan3 */
2842                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2843                 if (reg & BIT(6))
2844                         sio_data->skip_pwm |= BIT(2);
2845                 if (reg & BIT(7))
2846                         sio_data->skip_fan |= BIT(2);
2847
2848                 /* Check for pwm4 */
2849                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2850                 if (reg & BIT(2))
2851                         sio_data->skip_pwm |= BIT(3);
2852
2853                 /* Check for pwm2, fan2 */
2854                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2855                 if (reg & BIT(1))
2856                         sio_data->skip_pwm |= BIT(1);
2857                 if (reg & BIT(2))
2858                         sio_data->skip_fan |= BIT(1);
2859                 /* Check for pwm6, fan6 */
2860                 if (!(reg & BIT(7))) {
2861                         sio_data->skip_pwm |= BIT(5);
2862                         sio_data->skip_fan |= BIT(5);
2863                 }
2864
2865                 /* Check if AVCC is on VIN3 */
2866                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2867                 if (reg & BIT(0)) {
2868                         /* For it8686, the bit just enables AVCC3 */
2869                         if (sio_data->type != it8686)
2870                                 sio_data->internal |= BIT(0);
2871                 } else {
2872                         sio_data->internal &= ~BIT(3);
2873                         sio_data->skip_in |= BIT(9);
2874                 }
2875
2876                 sio_data->beep_pin = superio_inb(sioaddr,
2877                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2878         } else if (sio_data->type == it8622) {
2879                 int reg;
2880
2881                 superio_select(sioaddr, GPIO);
2882
2883                 /* Check for pwm4, fan4 */
2884                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2885                 if (reg & BIT(6))
2886                         sio_data->skip_fan |= BIT(3);
2887                 if (reg & BIT(5))
2888                         sio_data->skip_pwm |= BIT(3);
2889
2890                 /* Check for pwm3, fan3, pwm5, fan5 */
2891                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2892                 if (reg & BIT(6))
2893                         sio_data->skip_pwm |= BIT(2);
2894                 if (reg & BIT(7))
2895                         sio_data->skip_fan |= BIT(2);
2896                 if (reg & BIT(3))
2897                         sio_data->skip_pwm |= BIT(4);
2898                 if (reg & BIT(1))
2899                         sio_data->skip_fan |= BIT(4);
2900
2901                 /* Check for pwm2, fan2 */
2902                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2903                 if (reg & BIT(1))
2904                         sio_data->skip_pwm |= BIT(1);
2905                 if (reg & BIT(2))
2906                         sio_data->skip_fan |= BIT(1);
2907
2908                 /* Check for AVCC */
2909                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2910                 if (!(reg & BIT(0)))
2911                         sio_data->skip_in |= BIT(9);
2912
2913                 sio_data->beep_pin = superio_inb(sioaddr,
2914                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2915         } else if (sio_data->type == it8732) {
2916                 int reg;
2917
2918                 superio_select(sioaddr, GPIO);
2919
2920                 /* Check for pwm2, fan2 */
2921                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2922                 if (reg & BIT(1))
2923                         sio_data->skip_pwm |= BIT(1);
2924                 if (reg & BIT(2))
2925                         sio_data->skip_fan |= BIT(1);
2926
2927                 /* Check for pwm3, fan3, fan4 */
2928                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2929                 if (reg & BIT(6))
2930                         sio_data->skip_pwm |= BIT(2);
2931                 if (reg & BIT(7))
2932                         sio_data->skip_fan |= BIT(2);
2933                 if (reg & BIT(5))
2934                         sio_data->skip_fan |= BIT(3);
2935
2936                 /* Check if AVCC is on VIN3 */
2937                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2938                 if (reg & BIT(0))
2939                         sio_data->internal |= BIT(0);
2940
2941                 sio_data->beep_pin = superio_inb(sioaddr,
2942                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2943         } else if (sio_data->type == it8655) {
2944                 int reg;
2945
2946                 superio_select(sioaddr, GPIO);
2947
2948                 /* Check for pwm2 */
2949                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2950                 if (reg & BIT(1))
2951                         sio_data->skip_pwm |= BIT(1);
2952
2953                 /* Check for fan2 */
2954                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2955                 if (reg & BIT(4))
2956                         sio_data->skip_fan |= BIT(1);
2957
2958                 /* Check for pwm3, fan3 */
2959                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2960                 if (reg & BIT(6))
2961                         sio_data->skip_pwm |= BIT(2);
2962                 if (reg & BIT(7))
2963                         sio_data->skip_fan |= BIT(2);
2964
2965                 sio_data->beep_pin = superio_inb(sioaddr,
2966                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2967         } else if (sio_data->type == it8665) {
2968                 int reg;
2969
2970                 superio_select(sioaddr, GPIO);
2971
2972                 /* Check for pwm2 */
2973                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2974                 if (reg & BIT(1))
2975                         sio_data->skip_pwm |= BIT(1);
2976
2977                 /* Check for fan2 */
2978                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2979                 if (reg & BIT(4))
2980                         sio_data->skip_fan |= BIT(1);
2981
2982                 /* Check for pwm3, fan3 */
2983                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2984                 if (reg & BIT(6))
2985                         sio_data->skip_pwm |= BIT(2);
2986                 if (reg & BIT(7))
2987                         sio_data->skip_fan |= BIT(2);
2988
2989                 /* Check for pwm5, fan5 */
2990                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2991                 if (reg & BIT(5))
2992                         sio_data->skip_pwm |= BIT(4);
2993                 if (!(reg & BIT(4)))
2994                         sio_data->skip_fan |= BIT(4);
2995
2996                 /* Check for pwm4, fan4, pwm6, fan6 */
2997                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
2998                 if (reg & BIT(2))
2999                         sio_data->skip_pwm |= BIT(3);
3000                 if (reg & BIT(3))
3001                         sio_data->skip_fan |= BIT(3);
3002                 if (reg & BIT(0))
3003                         sio_data->skip_pwm |= BIT(5);
3004                 if (reg & BIT(1))
3005                         sio_data->skip_fan |= BIT(5);
3006
3007                 sio_data->beep_pin = superio_inb(sioaddr,
3008                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3009         } else {
3010                 int reg;
3011                 bool uart6;
3012
3013                 superio_select(sioaddr, GPIO);
3014
3015                 /* Check for fan4, fan5 */
3016                 if (has_five_fans(config)) {
3017                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3018                         switch (sio_data->type) {
3019                         case it8718:
3020                                 if (reg & BIT(5))
3021                                         sio_data->skip_fan |= BIT(3);
3022                                 if (reg & BIT(4))
3023                                         sio_data->skip_fan |= BIT(4);
3024                                 break;
3025                         case it8720:
3026                         case it8721:
3027                         case it8728:
3028                                 if (!(reg & BIT(5)))
3029                                         sio_data->skip_fan |= BIT(3);
3030                                 if (!(reg & BIT(4)))
3031                                         sio_data->skip_fan |= BIT(4);
3032                                 break;
3033                         default:
3034                                 break;
3035                         }
3036                 }
3037
3038                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3039                 if (!sio_data->skip_vid) {
3040                         /* We need at least 4 VID pins */
3041                         if (reg & 0x0f) {
3042                                 pr_info("VID is disabled (pins used for GPIO)\n");
3043                                 sio_data->skip_vid = 1;
3044                         }
3045                 }
3046
3047                 /* Check if fan3 is there or not */
3048                 if (reg & BIT(6))
3049                         sio_data->skip_pwm |= BIT(2);
3050                 if (reg & BIT(7))
3051                         sio_data->skip_fan |= BIT(2);
3052
3053                 /* Check if fan2 is there or not */
3054                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3055                 if (reg & BIT(1))
3056                         sio_data->skip_pwm |= BIT(1);
3057                 if (reg & BIT(2))
3058                         sio_data->skip_fan |= BIT(1);
3059
3060                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3061                     !(sio_data->skip_vid))
3062                         sio_data->vid_value = superio_inb(sioaddr,
3063                                                           IT87_SIO_VID_REG);
3064
3065                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3066
3067                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3068
3069                 /*
3070                  * The IT8720F has no VIN7 pin, so VCCH should always be
3071                  * routed internally to VIN7 with an internal divider.
3072                  * Curiously, there still is a configuration bit to control
3073                  * this, which means it can be set incorrectly. And even
3074                  * more curiously, many boards out there are improperly
3075                  * configured, even though the IT8720F datasheet claims
3076                  * that the internal routing of VCCH to VIN7 is the default
3077                  * setting. So we force the internal routing in this case.
3078                  *
3079                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3080                  * If UART6 is enabled, re-route VIN7 to the internal divider
3081                  * if that is not already the case.
3082                  */
3083                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3084                         reg |= BIT(1);
3085                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3086                         pr_notice("Routing internal VCCH to in7\n");
3087                 }
3088                 if (reg & BIT(0))
3089                         sio_data->internal |= BIT(0);
3090                 if (reg & BIT(1))
3091                         sio_data->internal |= BIT(1);
3092
3093                 /*
3094                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3095                  * While VIN7 can be routed to the internal voltage divider,
3096                  * VIN5 and VIN6 are not available if UART6 is enabled.
3097                  *
3098                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3099                  * is the temperature source. Since we can not read the
3100                  * temperature source here, skip_temp is preliminary.
3101                  */
3102                 if (uart6) {
3103                         sio_data->skip_in |= BIT(5) | BIT(6);
3104                         sio_data->skip_temp |= BIT(2);
3105                 }
3106
3107                 sio_data->beep_pin = superio_inb(sioaddr,
3108                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3109         }
3110         if (sio_data->beep_pin)
3111                 pr_info("Beeping is supported\n");
3112
3113         /* Disable specific features based on DMI strings */
3114         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3115         board_name = dmi_get_system_info(DMI_BOARD_NAME);
3116         if (board_vendor && board_name) {
3117                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
3118                     strcmp(board_name, "FN68PT") == 0) {
3119                         /*
3120                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3121                          * connected to a fan, but to something else. One user
3122                          * has reported instant system power-off when changing
3123                          * the PWM2 duty cycle, so we disable it.
3124                          * I use the board name string as the trigger in case
3125                          * the same board is ever used in other systems.
3126                          */
3127                         pr_info("Disabling pwm2 due to hardware constraints\n");
3128                         sio_data->skip_pwm = BIT(1);
3129                 }
3130         }
3131
3132 exit:
3133         superio_exit(sioaddr);
3134         return err;
3135 }
3136
3137 /* Called when we have found a new IT87. */
3138 static void it87_init_device(struct platform_device *pdev)
3139 {
3140         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3141         struct it87_data *data = platform_get_drvdata(pdev);
3142         int tmp, i;
3143         u8 mask;
3144
3145         /* Initialize chip specific register pointers */
3146         switch (data->type) {
3147         case it8655:
3148         case it8665:
3149                 data->REG_FAN = IT87_REG_FAN_8665;
3150                 data->REG_FANX = IT87_REG_FANX_8665;
3151                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3152                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3153                 data->REG_PWM = IT87_REG_PWM_8665;
3154                 break;
3155         case it8622:
3156                 data->REG_FAN = IT87_REG_FAN;
3157                 data->REG_FANX = IT87_REG_FANX;
3158                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3159                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3160                 data->REG_PWM = IT87_REG_PWM_8665;
3161                 break;
3162         default:
3163                 data->REG_FAN = IT87_REG_FAN;
3164                 data->REG_FANX = IT87_REG_FANX;
3165                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3166                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3167                 data->REG_PWM = IT87_REG_PWM;
3168                 break;
3169         }
3170
3171         /*
3172          * For each PWM channel:
3173          * - If it is in automatic mode, setting to manual mode should set
3174          *   the fan to full speed by default.
3175          * - If it is in manual mode, we need a mapping to temperature
3176          *   channels to use when later setting to automatic mode later.
3177          *   Use a 1:1 mapping by default (we are clueless.)
3178          * In both cases, the value can (and should) be changed by the user
3179          * prior to switching to a different mode.
3180          * Note that this is no longer needed for the IT8721F and later, as
3181          * these have separate registers for the temperature mapping and the
3182          * manual duty cycle.
3183          */
3184         for (i = 0; i < NUM_AUTO_PWM; i++) {
3185                 data->pwm_temp_map[i] = i;
3186                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3187                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3188         }
3189
3190         /*
3191          * Some chips seem to have default value 0xff for all limit
3192          * registers. For low voltage limits it makes no sense and triggers
3193          * alarms, so change to 0 instead. For high temperature limits, it
3194          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3195          * but is still confusing, so change to 127 degrees C.
3196          */
3197         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3198                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3199                 if (tmp == 0xff)
3200                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3201         }
3202         for (i = 0; i < data->num_temp_limit; i++) {
3203                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH[i]);
3204                 if (tmp == 0xff)
3205                         it87_write_value(data, IT87_REG_TEMP_HIGH[i], 127);
3206         }
3207
3208         /*
3209          * Temperature channels are not forcibly enabled, as they can be
3210          * set to two different sensor types and we can't guess which one
3211          * is correct for a given system. These channels can be enabled at
3212          * run-time through the temp{1-3}_type sysfs accessors if needed.
3213          */
3214
3215         /* Check if voltage monitors are reset manually or by some reason */
3216         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3217         if ((tmp & 0xff) == 0) {
3218                 /* Enable all voltage monitors */
3219                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3220         }
3221
3222         /* Check if tachometers are reset manually or by some reason */
3223         mask = 0x70 & ~(sio_data->skip_fan << 4);
3224         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3225         if ((data->fan_main_ctrl & mask) == 0) {
3226                 /* Enable all fan tachometers */
3227                 data->fan_main_ctrl |= mask;
3228                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3229                                  data->fan_main_ctrl);
3230         }
3231         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3232
3233         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3234
3235         /* Set tachometers to 16-bit mode if needed */
3236         if (has_fan16_config(data)) {
3237                 if (~tmp & 0x07 & data->has_fan) {
3238                         dev_dbg(&pdev->dev,
3239                                 "Setting fan1-3 to 16-bit mode\n");
3240                         it87_write_value(data, IT87_REG_FAN_16BIT,
3241                                          tmp | 0x07);
3242                 }
3243         }
3244
3245         /* Check for additional fans */
3246         if (has_four_fans(data) && (tmp & BIT(4)))
3247                 data->has_fan |= BIT(3); /* fan4 enabled */
3248         if (has_five_fans(data) && (tmp & BIT(5)))
3249                 data->has_fan |= BIT(4); /* fan5 enabled */
3250         if (has_six_fans(data)) {
3251                 switch (data->type) {
3252                 case it8620:
3253                 case it8628:
3254                 case it8686:
3255                         if (tmp & BIT(2))
3256                                 data->has_fan |= BIT(5); /* fan6 enabled */
3257                         break;
3258                 case it8665:
3259                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3260                         if (tmp & BIT(3))
3261                                 data->has_fan |= BIT(5); /* fan6 enabled */
3262                         break;
3263                 default:
3264                         break;
3265                 }
3266         }
3267
3268         /* Fan input pins may be used for alternative functions */
3269         data->has_fan &= ~sio_data->skip_fan;
3270
3271         /* Check if pwm6 is enabled */
3272         if (has_six_pwm(data)) {
3273                 switch (data->type) {
3274                 case it8620:
3275                 case it8686:
3276                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3277                         if (!(tmp & BIT(3)))
3278                                 sio_data->skip_pwm |= BIT(5);
3279                         break;
3280                 default:
3281                         break;
3282                 }
3283         }
3284
3285         /* Start monitoring */
3286         it87_write_value(data, IT87_REG_CONFIG,
3287                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3288                          | (update_vbat ? 0x41 : 0x01));
3289 }
3290
3291 /* Return 1 if and only if the PWM interface is safe to use */
3292 static int it87_check_pwm(struct device *dev)
3293 {
3294         struct it87_data *data = dev_get_drvdata(dev);
3295         /*
3296          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3297          * and polarity set to active low is sign that this is the case so we
3298          * disable pwm control to protect the user.
3299          */
3300         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3301
3302         if ((tmp & 0x87) == 0) {
3303                 if (fix_pwm_polarity) {
3304                         /*
3305                          * The user asks us to attempt a chip reconfiguration.
3306                          * This means switching to active high polarity and
3307                          * inverting all fan speed values.
3308                          */
3309                         int i;
3310                         u8 pwm[3];
3311
3312                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3313                                 pwm[i] = it87_read_value(data,
3314                                                          data->REG_PWM[i]);
3315
3316                         /*
3317                          * If any fan is in automatic pwm mode, the polarity
3318                          * might be correct, as suspicious as it seems, so we
3319                          * better don't change anything (but still disable the
3320                          * PWM interface).
3321                          */
3322                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3323                                 dev_info(dev,
3324                                          "Reconfiguring PWM to active high polarity\n");
3325                                 it87_write_value(data, IT87_REG_FAN_CTL,
3326                                                  tmp | 0x87);
3327                                 for (i = 0; i < 3; i++)
3328                                         it87_write_value(data,
3329                                                          data->REG_PWM[i],
3330                                                          0x7f & ~pwm[i]);
3331                                 return 1;
3332                         }
3333
3334                         dev_info(dev,
3335                                  "PWM configuration is too broken to be fixed\n");
3336                 }
3337
3338                 dev_info(dev,
3339                          "Detected broken BIOS defaults, disabling PWM interface\n");
3340                 return 0;
3341         } else if (fix_pwm_polarity) {
3342                 dev_info(dev,
3343                          "PWM configuration looks sane, won't touch\n");
3344         }
3345
3346         return 1;
3347 }
3348
3349 static int it87_probe(struct platform_device *pdev)
3350 {
3351         struct it87_data *data;
3352         struct resource *res;
3353         struct device *dev = &pdev->dev;
3354         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3355         int enable_pwm_interface;
3356         struct device *hwmon_dev;
3357
3358         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3359         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3360                                  DRVNAME)) {
3361                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3362                         (unsigned long)res->start,
3363                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3364                 return -EBUSY;
3365         }
3366
3367         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3368         if (!data)
3369                 return -ENOMEM;
3370
3371         data->addr = res->start;
3372         data->type = sio_data->type;
3373         data->features = it87_devices[sio_data->type].features;
3374         data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3375         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3376         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3377         data->bank = 0xff;
3378
3379         /*
3380          * IT8705F Datasheet 0.4.1, 3h == Version G.
3381          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3382          * These are the first revisions with 16-bit tachometer support.
3383          */
3384         switch (data->type) {
3385         case it87:
3386                 if (sio_data->revision >= 0x03) {
3387                         data->features &= ~FEAT_OLD_AUTOPWM;
3388                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3389                 }
3390                 break;
3391         case it8712:
3392                 if (sio_data->revision >= 0x08) {
3393                         data->features &= ~FEAT_OLD_AUTOPWM;
3394                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3395                                           FEAT_FIVE_FANS;
3396                 }
3397                 break;
3398         default:
3399                 break;
3400         }
3401
3402         /* Now, we do the remaining detection. */
3403         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3404             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3405                 return -ENODEV;
3406
3407         platform_set_drvdata(pdev, data);
3408
3409         mutex_init(&data->update_lock);
3410
3411         /* Check PWM configuration */
3412         enable_pwm_interface = it87_check_pwm(dev);
3413
3414         /* Starting with IT8721F, we handle scaling of internal voltages */
3415         if (has_scaling(data)) {
3416                 if (sio_data->internal & BIT(0))
3417                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3418                 if (sio_data->internal & BIT(1))
3419                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3420                 if (sio_data->internal & BIT(2))
3421                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3422                 if (sio_data->internal & BIT(3))
3423                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3424         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3425                    sio_data->type == it8783) {
3426                 if (sio_data->internal & BIT(0))
3427                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3428                 if (sio_data->internal & BIT(1))
3429                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3430         }
3431
3432         data->has_temp = 0x07;
3433         if (sio_data->skip_temp & BIT(2)) {
3434                 if (sio_data->type == it8782 &&
3435                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3436                         data->has_temp &= ~BIT(2);
3437         }
3438
3439         data->in_internal = sio_data->internal;
3440         data->has_in = 0x3ff & ~sio_data->skip_in;
3441
3442         if (has_six_temp(data)) {
3443                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3444
3445                 /* Check for additional temperature sensors */
3446                 if ((reg & 0x03) >= 0x02)
3447                         data->has_temp |= BIT(3);
3448                 if (((reg >> 2) & 0x03) >= 0x02)
3449                         data->has_temp |= BIT(4);
3450                 if (((reg >> 4) & 0x03) >= 0x02)
3451                         data->has_temp |= BIT(5);
3452
3453                 /* Check for additional voltage sensors */
3454                 if ((reg & 0x03) == 0x01)
3455                         data->has_in |= BIT(10);
3456                 if (((reg >> 2) & 0x03) == 0x01)
3457                         data->has_in |= BIT(11);
3458                 if (((reg >> 4) & 0x03) == 0x01)
3459                         data->has_in |= BIT(12);
3460         }
3461
3462         data->has_beep = !!sio_data->beep_pin;
3463
3464         /* Initialize the IT87 chip */
3465         it87_init_device(pdev);
3466
3467         if (!sio_data->skip_vid) {
3468                 data->has_vid = true;
3469                 data->vrm = vid_which_vrm();
3470                 /* VID reading from Super-I/O config space if available */
3471                 data->vid = sio_data->vid_value;
3472         }
3473
3474         /* Prepare for sysfs hooks */
3475         data->groups[0] = &it87_group;
3476         data->groups[1] = &it87_group_in;
3477         data->groups[2] = &it87_group_temp;
3478         data->groups[3] = &it87_group_fan;
3479
3480         if (enable_pwm_interface) {
3481                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3482                 data->has_pwm &= ~sio_data->skip_pwm;
3483
3484                 data->groups[4] = &it87_group_pwm;
3485                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3486                         data->groups[5] = &it87_group_auto_pwm;
3487         }
3488
3489         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3490                                         it87_devices[sio_data->type].name,
3491                                         data, data->groups);
3492         return PTR_ERR_OR_ZERO(hwmon_dev);
3493 }
3494
3495 static struct platform_driver it87_driver = {
3496         .driver = {
3497                 .name   = DRVNAME,
3498         },
3499         .probe  = it87_probe,
3500 };
3501
3502 static int __init it87_device_add(int index, unsigned short address,
3503                                   const struct it87_sio_data *sio_data)
3504 {
3505         struct platform_device *pdev;
3506         struct resource res = {
3507                 .start  = address + IT87_EC_OFFSET,
3508                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3509                 .name   = DRVNAME,
3510                 .flags  = IORESOURCE_IO,
3511         };
3512         int err;
3513
3514         err = acpi_check_resource_conflict(&res);
3515         if (err)
3516                 return err;
3517
3518         pdev = platform_device_alloc(DRVNAME, address);
3519         if (!pdev)
3520                 return -ENOMEM;
3521
3522         err = platform_device_add_resources(pdev, &res, 1);
3523         if (err) {
3524                 pr_err("Device resource addition failed (%d)\n", err);
3525                 goto exit_device_put;
3526         }
3527
3528         err = platform_device_add_data(pdev, sio_data,
3529                                        sizeof(struct it87_sio_data));
3530         if (err) {
3531                 pr_err("Platform data allocation failed\n");
3532                 goto exit_device_put;
3533         }
3534
3535         err = platform_device_add(pdev);
3536         if (err) {
3537                 pr_err("Device addition failed (%d)\n", err);
3538                 goto exit_device_put;
3539         }
3540
3541         it87_pdev[index] = pdev;
3542         return 0;
3543
3544 exit_device_put:
3545         platform_device_put(pdev);
3546         return err;
3547 }
3548
3549 static int __init sm_it87_init(void)
3550 {
3551         int sioaddr[2] = { REG_2E, REG_4E };
3552         struct it87_sio_data sio_data;
3553         unsigned short isa_address;
3554         bool found = false;
3555         int i, err;
3556
3557         err = platform_driver_register(&it87_driver);
3558         if (err)
3559                 return err;
3560
3561         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3562                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3563                 isa_address = 0;
3564                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3565                 if (err || isa_address == 0)
3566                         continue;
3567
3568                 err = it87_device_add(i, isa_address, &sio_data);
3569                 if (err)
3570                         goto exit_dev_unregister;
3571                 found = true;
3572         }
3573
3574         if (!found) {
3575                 err = -ENODEV;
3576                 goto exit_unregister;
3577         }
3578         return 0;
3579
3580 exit_dev_unregister:
3581         /* NULL check handled by platform_device_unregister */
3582         platform_device_unregister(it87_pdev[0]);
3583 exit_unregister:
3584         platform_driver_unregister(&it87_driver);
3585         return err;
3586 }
3587
3588 static void __exit sm_it87_exit(void)
3589 {
3590         /* NULL check handled by platform_device_unregister */
3591         platform_device_unregister(it87_pdev[1]);
3592         platform_device_unregister(it87_pdev[0]);
3593         platform_driver_unregister(&it87_driver);
3594 }
3595
3596 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3597 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3598 module_param(update_vbat, bool, 0);
3599 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3600 module_param(fix_pwm_polarity, bool, 0);
3601 MODULE_PARM_DESC(fix_pwm_polarity,
3602                  "Force PWM polarity to active high (DANGEROUS)");
3603 MODULE_LICENSE("GPL");
3604
3605 module_init(sm_it87_init);
3606 module_exit(sm_it87_exit);