git.sur5r.net Git - groeck-it87/blob - it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8607E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8655E  Super I/O chip w/LPC interface
  20  *            IT8665E  Super I/O chip w/LPC interface
  21  *            IT8686E  Super I/O chip w/LPC interface
  22  *            IT8705F  Super I/O chip w/LPC interface
  23  *            IT8712F  Super I/O chip w/LPC interface
  24  *            IT8716F  Super I/O chip w/LPC interface
  25  *            IT8718F  Super I/O chip w/LPC interface
  26  *            IT8720F  Super I/O chip w/LPC interface
  27  *            IT8721F  Super I/O chip w/LPC interface
  28  *            IT8726F  Super I/O chip w/LPC interface
  29  *            IT8728F  Super I/O chip w/LPC interface
  30  *            IT8732F  Super I/O chip w/LPC interface
  31  *            IT8758E  Super I/O chip w/LPC interface
  32  *            IT8771E  Super I/O chip w/LPC interface
  33  *            IT8772E  Super I/O chip w/LPC interface
  34  *            IT8781F  Super I/O chip w/LPC interface
  35  *            IT8782F  Super I/O chip w/LPC interface
  36  *            IT8783E/F Super I/O chip w/LPC interface
  37  *            IT8786E  Super I/O chip w/LPC interface
  38  *            IT8790E  Super I/O chip w/LPC interface
  39  *            IT8792E  Super I/O chip w/LPC interface
  40  *            Sis950   A clone of the IT8705F
  41  *
  42  *  Copyright (C) 2001 Chris Gauthron
  43  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  44  *
  45  *  This program is free software; you can redistribute it and/or modify
  46  *  it under the terms of the GNU General Public License as published by
  47  *  the Free Software Foundation; either version 2 of the License, or
  48  *  (at your option) any later version.
  49  *
  50  *  This program is distributed in the hope that it will be useful,
  51  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  52  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  53  *  GNU General Public License for more details.
  54  */
  55
  56 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  57
  58 #include <linux/bitops.h>
  59 #include <linux/module.h>
  60 #include <linux/init.h>
  61 #include <linux/slab.h>
  62 #include <linux/jiffies.h>
  63 #include <linux/platform_device.h>
  64 #include <linux/hwmon.h>
  65 #include <linux/hwmon-sysfs.h>
  66 #include <linux/hwmon-vid.h>
  67 #include <linux/err.h>
  68 #include <linux/mutex.h>
  69 #include <linux/sysfs.h>
  70 #include <linux/string.h>
  71 #include <linux/dmi.h>
  72 #include <linux/acpi.h>
  73 #include <linux/io.h>
  74 #include "compat.h"
  75
  76 #define DRVNAME "it87"
  77
  78 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  79              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  80              it8792, it8603, it8607, it8620, it8622, it8628, it8655, it8665,
  81              it8686 };
  82
  83 static unsigned short force_id;
  84 module_param(force_id, ushort, 0);
  85 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  86
  87 static struct platform_device *it87_pdev[2];
  88
  89 #define REG_2E  0x2e    /* The register to read/write */
  90 #define REG_4E  0x4e    /* Secondary register to read/write */
  91
  92 #define DEV     0x07    /* Register: Logical device select */
  93 #define PME     0x04    /* The device with the fan registers in it */
  94
  95 /* The device with the IT8718F/IT8720F VID value in it */
  96 #define GPIO    0x07
  97
  98 #define DEVID   0x20    /* Register: Device ID */
  99 #define DEVREV  0x22    /* Register: Device Revision */
 100
 101 static inline int superio_inb(int ioreg, int reg)
 102 {
 103         outb(reg, ioreg);
 104         return inb(ioreg + 1);
 105 }
 106
 107 static inline void superio_outb(int ioreg, int reg, int val)
 108 {
 109         outb(reg, ioreg);
 110         outb(val, ioreg + 1);
 111 }
 112
 113 static int superio_inw(int ioreg, int reg)
 114 {
 115         int val;
 116
 117         outb(reg++, ioreg);
 118         val = inb(ioreg + 1) << 8;
 119         outb(reg, ioreg);
 120         val |= inb(ioreg + 1);
 121         return val;
 122 }
 123
 124 static inline void superio_select(int ioreg, int ldn)
 125 {
 126         outb(DEV, ioreg);
 127         outb(ldn, ioreg + 1);
 128 }
 129
 130 static inline int superio_enter(int ioreg)
 131 {
 132         /*
 133          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 134          */
 135         if (!request_muxed_region(ioreg, 2, DRVNAME))
 136                 return -EBUSY;
 137
 138         outb(0x87, ioreg);
 139         outb(0x01, ioreg);
 140         outb(0x55, ioreg);
 141         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 142         return 0;
 143 }
 144
 145 static inline void superio_exit(int ioreg)
 146 {
 147         outb(0x02, ioreg);
 148         outb(0x02, ioreg + 1);
 149         release_region(ioreg, 2);
 150 }
 151
 152 /* Logical device 4 registers */
 153 #define IT8712F_DEVID 0x8712
 154 #define IT8705F_DEVID 0x8705
 155 #define IT8716F_DEVID 0x8716
 156 #define IT8718F_DEVID 0x8718
 157 #define IT8720F_DEVID 0x8720
 158 #define IT8721F_DEVID 0x8721
 159 #define IT8726F_DEVID 0x8726
 160 #define IT8728F_DEVID 0x8728
 161 #define IT8732F_DEVID 0x8732
 162 #define IT8792E_DEVID 0x8733
 163 #define IT8771E_DEVID 0x8771
 164 #define IT8772E_DEVID 0x8772
 165 #define IT8781F_DEVID 0x8781
 166 #define IT8782F_DEVID 0x8782
 167 #define IT8783E_DEVID 0x8783
 168 #define IT8786E_DEVID 0x8786
 169 #define IT8790E_DEVID 0x8790
 170 #define IT8603E_DEVID 0x8603
 171 #define IT8607E_DEVID 0x8607
 172 #define IT8620E_DEVID 0x8620
 173 #define IT8622E_DEVID 0x8622
 174 #define IT8623E_DEVID 0x8623
 175 #define IT8628E_DEVID 0x8628
 176 #define IT8655E_DEVID 0x8655
 177 #define IT8665E_DEVID 0x8665
 178 #define IT8686E_DEVID 0x8686
 179 #define IT87_ACT_REG  0x30
 180 #define IT87_BASE_REG 0x60
 181
 182 /* Logical device 7 registers (IT8712F and later) */
 183 #define IT87_SIO_GPIO1_REG      0x25
 184 #define IT87_SIO_GPIO2_REG      0x26
 185 #define IT87_SIO_GPIO3_REG      0x27
 186 #define IT87_SIO_GPIO4_REG      0x28
 187 #define IT87_SIO_GPIO5_REG      0x29
 188 #define IT87_SIO_GPIO9_REG      0xd3
 189 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 190 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 191 #define IT87_SIO_PINX4_REG      0x2d    /* Pin selection */
 192 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 193 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 194 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 195
 196 /* Update battery voltage after every reading if true */
 197 static bool update_vbat;
 198
 199 /* Not all BIOSes properly configure the PWM registers */
 200 static bool fix_pwm_polarity;
 201
 202 /* Many IT87 constants specified below */
 203
 204 /* Length of ISA address segment */
 205 #define IT87_EXTENT 8
 206
 207 /* Length of ISA address segment for Environmental Controller */
 208 #define IT87_EC_EXTENT 2
 209
 210 /* Offset of EC registers from ISA base address */
 211 #define IT87_EC_OFFSET 5
 212
 213 /* Where are the ISA address/data registers relative to the EC base address */
 214 #define IT87_ADDR_REG_OFFSET 0
 215 #define IT87_DATA_REG_OFFSET 1
 216
 217 /*----- The IT87 registers -----*/
 218
 219 #define IT87_REG_CONFIG        0x00
 220
 221 #define IT87_REG_ALARM1        0x01
 222 #define IT87_REG_ALARM2        0x02
 223 #define IT87_REG_ALARM3        0x03
 224
 225 #define IT87_REG_BANK           0x06
 226
 227 /*
 228  * The IT8718F and IT8720F have the VID value in a different register, in
 229  * Super-I/O configuration space.
 230  */
 231 #define IT87_REG_VID           0x0a
 232 /*
 233  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 234  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 235  * mode.
 236  */
 237 #define IT87_REG_FAN_DIV       0x0b
 238 #define IT87_REG_FAN_16BIT     0x0c
 239
 240 /*
 241  * Monitors:
 242  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 243  * - up to 6 temp (1 to 6)
 244  * - up to 6 fan (1 to 6)
 245  */
 246
 247 static const u8 IT87_REG_FAN[] =        { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 248 static const u8 IT87_REG_FAN_MIN[] =    { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 249 static const u8 IT87_REG_FANX[] =       { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 250 static const u8 IT87_REG_FANX_MIN[] =   { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 251
 252 static const u8 IT87_REG_FAN_8665[] =   { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
 253 static const u8 IT87_REG_FAN_MIN_8665[] =
 254                                         { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
 255 static const u8 IT87_REG_FANX_8665[] =  { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
 256 static const u8 IT87_REG_FANX_MIN_8665[] =
 257                                         { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
 258
 259 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 260
 261 #define IT87_REG_FAN_MAIN_CTRL 0x13
 262 #define IT87_REG_FAN_CTL       0x14
 263
 264 static const u8 IT87_REG_PWM[] =        { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 265 static const u8 IT87_REG_PWM_8665[] =   { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
 266
 267 static const u8 IT87_REG_PWM_DUTY[] =   { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 268
 269 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 270                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 271
 272 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 273
 274 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 275 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 276 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 277 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 278
 279 #define IT87_REG_VIN_ENABLE    0x50
 280 #define IT87_REG_TEMP_ENABLE   0x51
 281 #define IT87_REG_TEMP_EXTRA    0x55
 282 #define IT87_REG_BEEP_ENABLE   0x5c
 283
 284 #define IT87_REG_CHIPID        0x58
 285
 286 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 287
 288 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 289 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 290
 291 #define IT87_REG_TEMP456_ENABLE 0x77
 292
 293 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 294 #define NUM_VIN_LIMIT           8
 295 #define NUM_TEMP                6
 296 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 297 #define NUM_TEMP_LIMIT          3
 298 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 299 #define NUM_FAN_DIV             3
 300 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 301 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 302
 303 struct it87_devices {
 304         const char *name;
 305         const char * const suffix;
 306         u32 features;
 307         u8 peci_mask;
 308         u8 old_peci_mask;
 309 };
 310
 311 #define FEAT_12MV_ADC           BIT(0)
 312 #define FEAT_NEWER_AUTOPWM      BIT(1)
 313 #define FEAT_OLD_AUTOPWM        BIT(2)
 314 #define FEAT_16BIT_FANS         BIT(3)
 315 #define FEAT_TEMP_OFFSET        BIT(4)
 316 #define FEAT_TEMP_PECI          BIT(5)
 317 #define FEAT_TEMP_OLD_PECI      BIT(6)
 318 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 319 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 320 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 321 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 322 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 323 #define FEAT_10_9MV_ADC         BIT(12)
 324 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 325 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 326 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 327 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 328 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 329 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 330 #define FEAT_FOUR_FANS          BIT(19) /* Supports four fans */
 331 #define FEAT_FOUR_PWM           BIT(20) /* Supports four fan controls */
 332 #define FEAT_BANK_SEL           BIT(21) /* Chip has multi-bank support */
 333 #define FEAT_SCALING            BIT(22) /* Internal voltage scaling */
 334 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 335
 336 static const struct it87_devices it87_devices[] = {
 337         [it87] = {
 338                 .name = "it87",
 339                 .suffix = "F",
 340                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 341                                                 /* may need to overwrite */
 342         },
 343         [it8712] = {
 344                 .name = "it8712",
 345                 .suffix = "F",
 346                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 347                                                 /* may need to overwrite */
 348         },
 349         [it8716] = {
 350                 .name = "it8716",
 351                 .suffix = "F",
 352                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 353                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 354                   | FEAT_FANCTL_ONOFF,
 355         },
 356         [it8718] = {
 357                 .name = "it8718",
 358                 .suffix = "F",
 359                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 360                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 361                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 362                 .old_peci_mask = 0x4,
 363         },
 364         [it8720] = {
 365                 .name = "it8720",
 366                 .suffix = "F",
 367                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 368                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 369                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 370                 .old_peci_mask = 0x4,
 371         },
 372         [it8721] = {
 373                 .name = "it8721",
 374                 .suffix = "F",
 375                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 376                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 377                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 378                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 379                 .peci_mask = 0x05,
 380                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 381         },
 382         [it8728] = {
 383                 .name = "it8728",
 384                 .suffix = "F",
 385                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 386                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 387                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
 388                   | FEAT_FANCTL_ONOFF,
 389                 .peci_mask = 0x07,
 390         },
 391         [it8732] = {
 392                 .name = "it8732",
 393                 .suffix = "F",
 394                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 395                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 396                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 397                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 398                 .peci_mask = 0x07,
 399                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 400         },
 401         [it8771] = {
 402                 .name = "it8771",
 403                 .suffix = "E",
 404                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 405                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 406                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 407                                 /* PECI: guesswork */
 408                                 /* 12mV ADC (OHM) */
 409                                 /* 16 bit fans (OHM) */
 410                                 /* three fans, always 16 bit (guesswork) */
 411                 .peci_mask = 0x07,
 412         },
 413         [it8772] = {
 414                 .name = "it8772",
 415                 .suffix = "E",
 416                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 417                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 418                   | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
 419                                 /* PECI (coreboot) */
 420                                 /* 12mV ADC (HWSensors4, OHM) */
 421                                 /* 16 bit fans (HWSensors4, OHM) */
 422                                 /* three fans, always 16 bit (datasheet) */
 423                 .peci_mask = 0x07,
 424         },
 425         [it8781] = {
 426                 .name = "it8781",
 427                 .suffix = "F",
 428                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 429                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 430                   | FEAT_FANCTL_ONOFF,
 431                 .old_peci_mask = 0x4,
 432         },
 433         [it8782] = {
 434                 .name = "it8782",
 435                 .suffix = "F",
 436                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 437                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 438                   | FEAT_FANCTL_ONOFF,
 439                 .old_peci_mask = 0x4,
 440         },
 441         [it8783] = {
 442                 .name = "it8783",
 443                 .suffix = "E/F",
 444                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 445                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 446                   | FEAT_FANCTL_ONOFF,
 447                 .old_peci_mask = 0x4,
 448         },
 449         [it8786] = {
 450                 .name = "it8786",
 451                 .suffix = "E",
 452                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 453                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 454                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 455                 .peci_mask = 0x07,
 456         },
 457         [it8790] = {
 458                 .name = "it8790",
 459                 .suffix = "E",
 460                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 461                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 462                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 463                 .peci_mask = 0x07,
 464         },
 465         [it8792] = {
 466                 .name = "it8792",
 467                 .suffix = "E",
 468                 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
 469                   | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
 470                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 471                 .peci_mask = 0x07,
 472         },
 473         [it8603] = {
 474                 .name = "it8603",
 475                 .suffix = "E",
 476                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 477                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 478                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
 479                 .peci_mask = 0x07,
 480         },
 481         [it8607] = {
 482                 .name = "it8607",
 483                 .suffix = "E",
 484                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 485                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 486                   | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
 487                   | FEAT_FANCTL_ONOFF,
 488                 .peci_mask = 0x07,
 489         },
 490         [it8620] = {
 491                 .name = "it8620",
 492                 .suffix = "E",
 493                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 494                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 495                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 496                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
 497                   | FEAT_FANCTL_ONOFF,
 498                 .peci_mask = 0x07,
 499         },
 500         [it8622] = {
 501                 .name = "it8622",
 502                 .suffix = "E",
 503                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 504                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 505                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 506                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
 507                 .peci_mask = 0x07,
 508         },
 509         [it8628] = {
 510                 .name = "it8628",
 511                 .suffix = "E",
 512                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 513                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 514                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 515                   | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
 516                   | FEAT_FANCTL_ONOFF,
 517                 .peci_mask = 0x07,
 518         },
 519         [it8655] = {
 520                 .name = "it8655",
 521                 .suffix = "E",
 522                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 523                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_AVCC3
 524                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
 525                 .peci_mask = 0x07,
 526         },
 527         [it8665] = {
 528                 .name = "it8665",
 529                 .suffix = "E",
 530                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 531                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_AVCC3
 532                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
 533                   | FEAT_SIX_PWM | FEAT_BANK_SEL,
 534                 .peci_mask = 0x07,
 535         },
 536         [it8686] = {
 537                 .name = "it8686",
 538                 .suffix = "E",
 539                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 540                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 541                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 542                   | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
 543                 .peci_mask = 0x07,
 544         },
 545 };
 546
 547 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 548 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 549 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 550 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 551 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 552 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 553 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 554                                  ((data)->peci_mask & BIT(nr)))
 555 #define has_temp_old_peci(data, nr) \
 556                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 557                                  ((data)->old_peci_mask & BIT(nr)))
 558 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 559 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 560                                                      FEAT_SIX_FANS))
 561 #define has_vid(data)           ((data)->features & FEAT_VID)
 562 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 563 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 564 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 565 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 566                                                      | FEAT_SIX_PWM))
 567 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 568 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 569 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 570 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 571 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 572                                                      FEAT_FIVE_FANS | \
 573                                                      FEAT_SIX_FANS))
 574 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 575                                                      FEAT_FIVE_PWM \
 576                                                      | FEAT_SIX_PWM))
 577 #define has_bank_sel(data)      ((data)->features & FEAT_BANK_SEL)
 578 #define has_scaling(data)       ((data)->features & FEAT_SCALING)
 579 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 580
 581 struct it87_sio_data {
 582         enum chips type;
 583         /* Values read from Super-I/O config space */
 584         u8 revision;
 585         u8 vid_value;
 586         u8 beep_pin;
 587         u8 internal;    /* Internal sensors can be labeled */
 588         /* Features skipped based on config or DMI */
 589         u16 skip_in;
 590         u8 skip_vid;
 591         u8 skip_fan;
 592         u8 skip_pwm;
 593         u8 skip_temp;
 594 };
 595
 596 /*
 597  * For each registered chip, we need to keep some data in memory.
 598  * The structure is dynamically allocated.
 599  */
 600 struct it87_data {
 601         const struct attribute_group *groups[7];
 602         enum chips type;
 603         u32 features;
 604         u8 bank;
 605         u8 peci_mask;
 606         u8 old_peci_mask;
 607
 608         const u8 *REG_FAN;
 609         const u8 *REG_FANX;
 610         const u8 *REG_FAN_MIN;
 611         const u8 *REG_FANX_MIN;
 612
 613         const u8 *REG_PWM;
 614
 615         unsigned short addr;
 616         const char *name;
 617         struct mutex update_lock;
 618         char valid;             /* !=0 if following fields are valid */
 619         unsigned long last_updated;     /* In jiffies */
 620
 621         u16 in_scaled;          /* Internal voltage sensors are scaled */
 622         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 623         u16 has_in;             /* Bitfield, voltage sensors enabled */
 624         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 625         u8 has_fan;             /* Bitfield, fans enabled */
 626         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 627         u8 has_temp;            /* Bitfield, temp sensors enabled */
 628         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 629         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 630         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 631         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 632         bool has_vid;           /* True if VID supported */
 633         u8 vid;                 /* Register encoding, combined */
 634         u8 vrm;
 635         u32 alarms;             /* Register encoding, combined */
 636         bool has_beep;          /* true if beep supported */
 637         u8 beeps;               /* Register encoding */
 638         u8 fan_main_ctrl;       /* Register value */
 639         u8 fan_ctl;             /* Register value */
 640
 641         /*
 642          * The following 3 arrays correspond to the same registers up to
 643          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 644          * 7, and we want to preserve settings on mode changes, so we have
 645          * to track all values separately.
 646          * Starting with the IT8721F, the manual PWM duty cycles are stored
 647          * in separate registers (8-bit values), so the separate tracking
 648          * is no longer needed, but it is still done to keep the driver
 649          * simple.
 650          */
 651         u8 has_pwm;             /* Bitfield, pwm control enabled */
 652         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 653         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 654         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 655
 656         /* Automatic fan speed control registers */
 657         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 658         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 659 };
 660
 661 static int adc_lsb(const struct it87_data *data, int nr)
 662 {
 663         int lsb;
 664
 665         if (has_12mv_adc(data))
 666                 lsb = 120;
 667         else if (has_10_9mv_adc(data))
 668                 lsb = 109;
 669         else
 670                 lsb = 160;
 671         if (data->in_scaled & BIT(nr))
 672                 lsb <<= 1;
 673         return lsb;
 674 }
 675
 676 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 677 {
 678         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 679         return clamp_val(val, 0, 255);
 680 }
 681
 682 static int in_from_reg(const struct it87_data *data, int nr, int val)
 683 {
 684         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 685 }
 686
 687 static inline u8 FAN_TO_REG(long rpm, int div)
 688 {
 689         if (rpm == 0)
 690                 return 255;
 691         rpm = clamp_val(rpm, 1, 1000000);
 692         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 693 }
 694
 695 static inline u16 FAN16_TO_REG(long rpm)
 696 {
 697         if (rpm == 0)
 698                 return 0xffff;
 699         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 700 }
 701
 702 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 703                                 1350000 / ((val) * (div)))
 704 /* The divider is fixed to 2 in 16-bit mode */
 705 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 706                              1350000 / ((val) * 2))
 707
 708 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 709                                     ((val) + 500) / 1000), -128, 127))
 710 #define TEMP_FROM_REG(val) ((val) * 1000)
 711
 712 static u8 pwm_to_reg(const struct it87_data *data, long val)
 713 {
 714         if (has_newer_autopwm(data))
 715                 return val;
 716         else
 717                 return val >> 1;
 718 }
 719
 720 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 721 {
 722         if (has_newer_autopwm(data))
 723                 return reg;
 724         else
 725                 return (reg & 0x7f) << 1;
 726 }
 727
 728 static int DIV_TO_REG(int val)
 729 {
 730         int answer = 0;
 731
 732         while (answer < 7 && (val >>= 1))
 733                 answer++;
 734         return answer;
 735 }
 736
 737 #define DIV_FROM_REG(val) BIT(val)
 738
 739 /*
 740  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 741  * depending on the chip type, to calculate the actual PWM frequency.
 742  *
 743  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 744  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 745  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 746  * sometimes just one. It is unknown if this is a datasheet error or real,
 747  * so this is ignored for now.
 748  */
 749 static const unsigned int pwm_freq[8] = {
 750         48000000,
 751         24000000,
 752         12000000,
 753         8000000,
 754         6000000,
 755         3000000,
 756         1500000,
 757         750000,
 758 };
 759
 760 static int _it87_read_value(struct it87_data *data, u8 reg)
 761 {
 762         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 763         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 764 }
 765
 766 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
 767 {
 768         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 769         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 770 }
 771
 772 static void it87_set_bank(struct it87_data *data, u8 bank)
 773 {
 774         if (has_bank_sel(data) && bank != data->bank) {
 775                 u8 breg = _it87_read_value(data, IT87_REG_BANK);
 776
 777                 breg &= 0x1f;
 778                 breg |= (bank << 5);
 779                 data->bank = bank;
 780                 _it87_write_value(data, IT87_REG_BANK, breg);
 781         }
 782 }
 783
 784 /*
 785  * Must be called with data->update_lock held, except during initialization.
 786  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 787  * would slow down the IT87 access and should not be necessary.
 788  */
 789 static int it87_read_value(struct it87_data *data, u16 reg)
 790 {
 791         it87_set_bank(data, reg >> 8);
 792         return _it87_read_value(data, reg & 0xff);
 793 }
 794
 795 /*
 796  * Must be called with data->update_lock held, except during initialization.
 797  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 798  * would slow down the IT87 access and should not be necessary.
 799  */
 800 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
 801 {
 802         it87_set_bank(data, reg >> 8);
 803         _it87_write_value(data, reg & 0xff, value);
 804 }
 805
 806 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 807 {
 808         data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
 809         if (has_newer_autopwm(data)) {
 810                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 811                 data->pwm_duty[nr] = it87_read_value(data,
 812                                                      IT87_REG_PWM_DUTY[nr]);
 813         } else {
 814                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 815                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 816                 else                            /* Manual mode */
 817                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 818         }
 819
 820         if (has_old_autopwm(data)) {
 821                 int i;
 822
 823                 for (i = 0; i < 5 ; i++)
 824                         data->auto_temp[nr][i] = it87_read_value(data,
 825                                                 IT87_REG_AUTO_TEMP(nr, i));
 826                 for (i = 0; i < 3 ; i++)
 827                         data->auto_pwm[nr][i] = it87_read_value(data,
 828                                                 IT87_REG_AUTO_PWM(nr, i));
 829         } else if (has_newer_autopwm(data)) {
 830                 int i;
 831
 832                 /*
 833                  * 0: temperature hysteresis (base + 5)
 834                  * 1: fan off temperature (base + 0)
 835                  * 2: fan start temperature (base + 1)
 836                  * 3: fan max temperature (base + 2)
 837                  */
 838                 data->auto_temp[nr][0] =
 839                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 840
 841                 for (i = 0; i < 3 ; i++)
 842                         data->auto_temp[nr][i + 1] =
 843                                 it87_read_value(data,
 844                                                 IT87_REG_AUTO_TEMP(nr, i));
 845                 /*
 846                  * 0: start pwm value (base + 3)
 847                  * 1: pwm slope (base + 4, 1/8th pwm)
 848                  */
 849                 data->auto_pwm[nr][0] =
 850                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 851                 data->auto_pwm[nr][1] =
 852                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 853         }
 854 }
 855
 856 static struct it87_data *it87_update_device(struct device *dev)
 857 {
 858         struct it87_data *data = dev_get_drvdata(dev);
 859         int i;
 860
 861         mutex_lock(&data->update_lock);
 862
 863         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 864             !data->valid) {
 865                 if (update_vbat) {
 866                         /*
 867                          * Cleared after each update, so reenable.  Value
 868                          * returned by this read will be previous value
 869                          */
 870                         it87_write_value(data, IT87_REG_CONFIG,
 871                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 872                 }
 873                 for (i = 0; i < NUM_VIN; i++) {
 874                         if (!(data->has_in & BIT(i)))
 875                                 continue;
 876
 877                         data->in[i][0] =
 878                                 it87_read_value(data, IT87_REG_VIN[i]);
 879
 880                         /* VBAT and AVCC don't have limit registers */
 881                         if (i >= NUM_VIN_LIMIT)
 882                                 continue;
 883
 884                         data->in[i][1] =
 885                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 886                         data->in[i][2] =
 887                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 888                 }
 889
 890                 for (i = 0; i < NUM_FAN; i++) {
 891                         /* Skip disabled fans */
 892                         if (!(data->has_fan & BIT(i)))
 893                                 continue;
 894
 895                         data->fan[i][1] =
 896                                 it87_read_value(data, data->REG_FAN_MIN[i]);
 897                         data->fan[i][0] = it87_read_value(data,
 898                                        data->REG_FAN[i]);
 899                         /* Add high byte if in 16-bit mode */
 900                         if (has_16bit_fans(data)) {
 901                                 data->fan[i][0] |= it87_read_value(data,
 902                                                 data->REG_FANX[i]) << 8;
 903                                 data->fan[i][1] |= it87_read_value(data,
 904                                                 data->REG_FANX_MIN[i]) << 8;
 905                         }
 906                 }
 907                 for (i = 0; i < NUM_TEMP; i++) {
 908                         if (!(data->has_temp & BIT(i)))
 909                                 continue;
 910                         data->temp[i][0] =
 911                                 it87_read_value(data, IT87_REG_TEMP(i));
 912
 913                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 914                                 data->temp[i][3] =
 915                                   it87_read_value(data,
 916                                                   IT87_REG_TEMP_OFFSET[i]);
 917
 918                         if (i >= NUM_TEMP_LIMIT)
 919                                 continue;
 920
 921                         data->temp[i][1] =
 922                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 923                         data->temp[i][2] =
 924                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 925                 }
 926
 927                 /* Newer chips don't have clock dividers */
 928                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 929                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 930                         data->fan_div[0] = i & 0x07;
 931                         data->fan_div[1] = (i >> 3) & 0x07;
 932                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 933                 }
 934
 935                 data->alarms =
 936                         it87_read_value(data, IT87_REG_ALARM1) |
 937                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 938                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 939                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 940
 941                 data->fan_main_ctrl = it87_read_value(data,
 942                                 IT87_REG_FAN_MAIN_CTRL);
 943                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 944                 for (i = 0; i < NUM_PWM; i++) {
 945                         if (!(data->has_pwm & BIT(i)))
 946                                 continue;
 947                         it87_update_pwm_ctrl(data, i);
 948                 }
 949
 950                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 951                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 952                 /*
 953                  * The IT8705F does not have VID capability.
 954                  * The IT8718F and later don't use IT87_REG_VID for the
 955                  * same purpose.
 956                  */
 957                 if (data->type == it8712 || data->type == it8716) {
 958                         data->vid = it87_read_value(data, IT87_REG_VID);
 959                         /*
 960                          * The older IT8712F revisions had only 5 VID pins,
 961                          * but we assume it is always safe to read 6 bits.
 962                          */
 963                         data->vid &= 0x3f;
 964                 }
 965                 data->last_updated = jiffies;
 966                 data->valid = 1;
 967         }
 968
 969         mutex_unlock(&data->update_lock);
 970
 971         return data;
 972 }
 973
 974 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 975                        char *buf)
 976 {
 977         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 978         struct it87_data *data = it87_update_device(dev);
 979         int index = sattr->index;
 980         int nr = sattr->nr;
 981
 982         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 983 }
 984
 985 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 986                       const char *buf, size_t count)
 987 {
 988         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 989         struct it87_data *data = dev_get_drvdata(dev);
 990         int index = sattr->index;
 991         int nr = sattr->nr;
 992         unsigned long val;
 993
 994         if (kstrtoul(buf, 10, &val) < 0)
 995                 return -EINVAL;
 996
 997         mutex_lock(&data->update_lock);
 998         data->in[nr][index] = in_to_reg(data, nr, val);
 999         it87_write_value(data,
1000                          index == 1 ? IT87_REG_VIN_MIN(nr)
1001                                     : IT87_REG_VIN_MAX(nr),
1002                          data->in[nr][index]);
1003         mutex_unlock(&data->update_lock);
1004         return count;
1005 }
1006
1007 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1008 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1009                             0, 1);
1010 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1011                             0, 2);
1012
1013 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1014 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1015                             1, 1);
1016 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1017                             1, 2);
1018
1019 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1020 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1021                             2, 1);
1022 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1023                             2, 2);
1024
1025 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1026 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1027                             3, 1);
1028 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1029                             3, 2);
1030
1031 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1032 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1033                             4, 1);
1034 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1035                             4, 2);
1036
1037 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1038 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1039                             5, 1);
1040 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1041                             5, 2);
1042
1043 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1044 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1045                             6, 1);
1046 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1047                             6, 2);
1048
1049 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1050 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1051                             7, 1);
1052 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1053                             7, 2);
1054
1055 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1056 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1057 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1058 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1059 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1060
1061 /* Up to 6 temperatures */
1062 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1063                          char *buf)
1064 {
1065         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1066         int nr = sattr->nr;
1067         int index = sattr->index;
1068         struct it87_data *data = it87_update_device(dev);
1069
1070         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1071 }
1072
1073 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1074                         const char *buf, size_t count)
1075 {
1076         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1077         int nr = sattr->nr;
1078         int index = sattr->index;
1079         struct it87_data *data = dev_get_drvdata(dev);
1080         long val;
1081         u8 reg, regval;
1082
1083         if (kstrtol(buf, 10, &val) < 0)
1084                 return -EINVAL;
1085
1086         mutex_lock(&data->update_lock);
1087
1088         switch (index) {
1089         default:
1090         case 1:
1091                 reg = IT87_REG_TEMP_LOW(nr);
1092                 break;
1093         case 2:
1094                 reg = IT87_REG_TEMP_HIGH(nr);
1095                 break;
1096         case 3:
1097                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1098                 if (!(regval & 0x80)) {
1099                         regval |= 0x80;
1100                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1101                 }
1102                 data->valid = 0;
1103                 reg = IT87_REG_TEMP_OFFSET[nr];
1104                 break;
1105         }
1106
1107         data->temp[nr][index] = TEMP_TO_REG(val);
1108         it87_write_value(data, reg, data->temp[nr][index]);
1109         mutex_unlock(&data->update_lock);
1110         return count;
1111 }
1112
1113 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1114 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1115                             0, 1);
1116 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1117                             0, 2);
1118 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1119                             set_temp, 0, 3);
1120 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1121 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1122                             1, 1);
1123 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1124                             1, 2);
1125 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1126                             set_temp, 1, 3);
1127 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1128 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1129                             2, 1);
1130 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1131                             2, 2);
1132 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1133                             set_temp, 2, 3);
1134 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1135 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1136 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1137
1138 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1139                               char *buf)
1140 {
1141         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1142         int nr = sensor_attr->index;
1143         struct it87_data *data = it87_update_device(dev);
1144         u8 reg = data->sensor;      /* In case value is updated while used */
1145         u8 extra = data->extra;
1146
1147         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1148             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1149                 return sprintf(buf, "6\n");  /* Intel PECI */
1150         if (reg & (1 << nr))
1151                 return sprintf(buf, "3\n");  /* thermal diode */
1152         if (reg & (8 << nr))
1153                 return sprintf(buf, "4\n");  /* thermistor */
1154         return sprintf(buf, "0\n");      /* disabled */
1155 }
1156
1157 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1158                              const char *buf, size_t count)
1159 {
1160         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1161         int nr = sensor_attr->index;
1162
1163         struct it87_data *data = dev_get_drvdata(dev);
1164         long val;
1165         u8 reg, extra;
1166
1167         if (kstrtol(buf, 10, &val) < 0)
1168                 return -EINVAL;
1169
1170         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1171         reg &= ~(1 << nr);
1172         reg &= ~(8 << nr);
1173         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1174                 reg &= 0x3f;
1175         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1176         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1177                 extra &= 0x7f;
1178         if (val == 2) { /* backwards compatibility */
1179                 dev_warn(dev,
1180                          "Sensor type 2 is deprecated, please use 4 instead\n");
1181                 val = 4;
1182         }
1183         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1184         if (val == 3)
1185                 reg |= 1 << nr;
1186         else if (val == 4)
1187                 reg |= 8 << nr;
1188         else if (has_temp_peci(data, nr) && val == 6)
1189                 reg |= (nr + 1) << 6;
1190         else if (has_temp_old_peci(data, nr) && val == 6)
1191                 extra |= 0x80;
1192         else if (val != 0)
1193                 return -EINVAL;
1194
1195         mutex_lock(&data->update_lock);
1196         data->sensor = reg;
1197         data->extra = extra;
1198         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1199         if (has_temp_old_peci(data, nr))
1200                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1201         data->valid = 0;        /* Force cache refresh */
1202         mutex_unlock(&data->update_lock);
1203         return count;
1204 }
1205
1206 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1207                           set_temp_type, 0);
1208 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1209                           set_temp_type, 1);
1210 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1211                           set_temp_type, 2);
1212
1213 /* 6 Fans */
1214
1215 static int pwm_mode(const struct it87_data *data, int nr)
1216 {
1217         if (has_fanctl_onoff(data) && nr < 3 &&
1218             !(data->fan_main_ctrl & BIT(nr)))
1219                 return 0;                               /* Full speed */
1220         if (data->pwm_ctrl[nr] & 0x80)
1221                 return 2;                               /* Automatic mode */
1222         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1223             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1224                 return 0;                       /* Full speed */
1225
1226         return 1;                               /* Manual mode */
1227 }
1228
1229 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1230                         char *buf)
1231 {
1232         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1233         int nr = sattr->nr;
1234         int index = sattr->index;
1235         int speed;
1236         struct it87_data *data = it87_update_device(dev);
1237
1238         speed = has_16bit_fans(data) ?
1239                 FAN16_FROM_REG(data->fan[nr][index]) :
1240                 FAN_FROM_REG(data->fan[nr][index],
1241                              DIV_FROM_REG(data->fan_div[nr]));
1242         return sprintf(buf, "%d\n", speed);
1243 }
1244
1245 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1246                             char *buf)
1247 {
1248         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1249         struct it87_data *data = it87_update_device(dev);
1250         int nr = sensor_attr->index;
1251
1252         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1253 }
1254
1255 static ssize_t show_pwm_enable(struct device *dev,
1256                                struct device_attribute *attr, char *buf)
1257 {
1258         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1259         struct it87_data *data = it87_update_device(dev);
1260         int nr = sensor_attr->index;
1261
1262         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1263 }
1264
1265 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1266                         char *buf)
1267 {
1268         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1269         struct it87_data *data = it87_update_device(dev);
1270         int nr = sensor_attr->index;
1271
1272         return sprintf(buf, "%d\n",
1273                        pwm_from_reg(data, data->pwm_duty[nr]));
1274 }
1275
1276 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1277                              char *buf)
1278 {
1279         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1280         struct it87_data *data = it87_update_device(dev);
1281         int nr = sensor_attr->index;
1282         unsigned int freq;
1283         int index;
1284
1285         if (has_pwm_freq2(data) && nr == 1)
1286                 index = (data->extra >> 4) & 0x07;
1287         else
1288                 index = (data->fan_ctl >> 4) & 0x07;
1289
1290         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1291
1292         return sprintf(buf, "%u\n", freq);
1293 }
1294
1295 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1296                        const char *buf, size_t count)
1297 {
1298         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1299         int nr = sattr->nr;
1300         int index = sattr->index;
1301
1302         struct it87_data *data = dev_get_drvdata(dev);
1303         long val;
1304         u8 reg;
1305
1306         if (kstrtol(buf, 10, &val) < 0)
1307                 return -EINVAL;
1308
1309         mutex_lock(&data->update_lock);
1310
1311         if (has_16bit_fans(data)) {
1312                 data->fan[nr][index] = FAN16_TO_REG(val);
1313                 it87_write_value(data, data->REG_FAN_MIN[nr],
1314                                  data->fan[nr][index] & 0xff);
1315                 it87_write_value(data, data->REG_FANX_MIN[nr],
1316                                  data->fan[nr][index] >> 8);
1317         } else {
1318                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1319                 switch (nr) {
1320                 case 0:
1321                         data->fan_div[nr] = reg & 0x07;
1322                         break;
1323                 case 1:
1324                         data->fan_div[nr] = (reg >> 3) & 0x07;
1325                         break;
1326                 case 2:
1327                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1328                         break;
1329                 }
1330                 data->fan[nr][index] =
1331                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1332                 it87_write_value(data, data->REG_FAN_MIN[nr],
1333                                  data->fan[nr][index]);
1334         }
1335
1336         mutex_unlock(&data->update_lock);
1337         return count;
1338 }
1339
1340 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1341                            const char *buf, size_t count)
1342 {
1343         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1344         struct it87_data *data = dev_get_drvdata(dev);
1345         int nr = sensor_attr->index;
1346         unsigned long val;
1347         int min;
1348         u8 old;
1349
1350         if (kstrtoul(buf, 10, &val) < 0)
1351                 return -EINVAL;
1352
1353         mutex_lock(&data->update_lock);
1354         old = it87_read_value(data, IT87_REG_FAN_DIV);
1355
1356         /* Save fan min limit */
1357         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1358
1359         switch (nr) {
1360         case 0:
1361         case 1:
1362                 data->fan_div[nr] = DIV_TO_REG(val);
1363                 break;
1364         case 2:
1365                 if (val < 8)
1366                         data->fan_div[nr] = 1;
1367                 else
1368                         data->fan_div[nr] = 3;
1369         }
1370         val = old & 0x80;
1371         val |= (data->fan_div[0] & 0x07);
1372         val |= (data->fan_div[1] & 0x07) << 3;
1373         if (data->fan_div[2] == 3)
1374                 val |= 0x1 << 6;
1375         it87_write_value(data, IT87_REG_FAN_DIV, val);
1376
1377         /* Restore fan min limit */
1378         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1379         it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1380
1381         mutex_unlock(&data->update_lock);
1382         return count;
1383 }
1384
1385 /* Returns 0 if OK, -EINVAL otherwise */
1386 static int check_trip_points(struct device *dev, int nr)
1387 {
1388         const struct it87_data *data = dev_get_drvdata(dev);
1389         int i, err = 0;
1390
1391         if (has_old_autopwm(data)) {
1392                 for (i = 0; i < 3; i++) {
1393                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1394                                 err = -EINVAL;
1395                 }
1396                 for (i = 0; i < 2; i++) {
1397                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1398                                 err = -EINVAL;
1399                 }
1400         } else if (has_newer_autopwm(data)) {
1401                 for (i = 1; i < 3; i++) {
1402                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1403                                 err = -EINVAL;
1404                 }
1405         }
1406
1407         if (err) {
1408                 dev_err(dev,
1409                         "Inconsistent trip points, not switching to automatic mode\n");
1410                 dev_err(dev, "Adjust the trip points and try again\n");
1411         }
1412         return err;
1413 }
1414
1415 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1416                               const char *buf, size_t count)
1417 {
1418         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1419         struct it87_data *data = dev_get_drvdata(dev);
1420         int nr = sensor_attr->index;
1421         long val;
1422
1423         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1424                 return -EINVAL;
1425
1426         /* Check trip points before switching to automatic mode */
1427         if (val == 2) {
1428                 if (check_trip_points(dev, nr) < 0)
1429                         return -EINVAL;
1430         }
1431
1432         mutex_lock(&data->update_lock);
1433
1434         if (val == 0) {
1435                 if (nr < 3 && has_fanctl_onoff(data)) {
1436                         int tmp;
1437                         /* make sure the fan is on when in on/off mode */
1438                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1439                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1440                         /* set on/off mode */
1441                         data->fan_main_ctrl &= ~BIT(nr);
1442                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1443                                          data->fan_main_ctrl);
1444                 } else {
1445                         u8 ctrl;
1446
1447                         /* No on/off mode, set maximum pwm value */
1448                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1449                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1450                                          data->pwm_duty[nr]);
1451                         /* and set manual mode */
1452                         if (has_newer_autopwm(data)) {
1453                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1454                                         data->pwm_temp_map[nr];
1455                         } else {
1456                                 ctrl = data->pwm_duty[nr];
1457                         }
1458                         data->pwm_ctrl[nr] = ctrl;
1459                         it87_write_value(data, data->REG_PWM[nr], ctrl);
1460                 }
1461         } else {
1462                 u8 ctrl;
1463
1464                 if (has_newer_autopwm(data)) {
1465                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1466                                 data->pwm_temp_map[nr];
1467                         if (val != 1)
1468                                 ctrl |= 0x80;
1469                 } else {
1470                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1471                 }
1472                 data->pwm_ctrl[nr] = ctrl;
1473                 it87_write_value(data, data->REG_PWM[nr], ctrl);
1474
1475                 if (has_fanctl_onoff(data) && nr < 3) {
1476                         /* set SmartGuardian mode */
1477                         data->fan_main_ctrl |= BIT(nr);
1478                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1479                                          data->fan_main_ctrl);
1480                 }
1481         }
1482
1483         mutex_unlock(&data->update_lock);
1484         return count;
1485 }
1486
1487 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1488                        const char *buf, size_t count)
1489 {
1490         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1491         struct it87_data *data = dev_get_drvdata(dev);
1492         int nr = sensor_attr->index;
1493         long val;
1494
1495         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1496                 return -EINVAL;
1497
1498         mutex_lock(&data->update_lock);
1499         it87_update_pwm_ctrl(data, nr);
1500         if (has_newer_autopwm(data)) {
1501                 /*
1502                  * If we are in automatic mode, the PWM duty cycle register
1503                  * is read-only so we can't write the value.
1504                  */
1505                 if (data->pwm_ctrl[nr] & 0x80) {
1506                         mutex_unlock(&data->update_lock);
1507                         return -EBUSY;
1508                 }
1509                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1510                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1511                                  data->pwm_duty[nr]);
1512         } else {
1513                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1514                 /*
1515                  * If we are in manual mode, write the duty cycle immediately;
1516                  * otherwise, just store it for later use.
1517                  */
1518                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1519                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1520                         it87_write_value(data, data->REG_PWM[nr],
1521                                          data->pwm_ctrl[nr]);
1522                 }
1523         }
1524         mutex_unlock(&data->update_lock);
1525         return count;
1526 }
1527
1528 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1529                             const char *buf, size_t count)
1530 {
1531         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1532         struct it87_data *data = dev_get_drvdata(dev);
1533         int nr = sensor_attr->index;
1534         unsigned long val;
1535         int i;
1536
1537         if (kstrtoul(buf, 10, &val) < 0)
1538                 return -EINVAL;
1539
1540         val = clamp_val(val, 0, 1000000);
1541         val *= has_newer_autopwm(data) ? 256 : 128;
1542
1543         /* Search for the nearest available frequency */
1544         for (i = 0; i < 7; i++) {
1545                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1546                         break;
1547         }
1548
1549         mutex_lock(&data->update_lock);
1550         if (nr == 0) {
1551                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1552                 data->fan_ctl |= i << 4;
1553                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1554         } else {
1555                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1556                 data->extra |= i << 4;
1557                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1558         }
1559         mutex_unlock(&data->update_lock);
1560
1561         return count;
1562 }
1563
1564 static ssize_t show_pwm_temp_map(struct device *dev,
1565                                  struct device_attribute *attr, char *buf)
1566 {
1567         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1568         struct it87_data *data = it87_update_device(dev);
1569         int nr = sensor_attr->index;
1570         int map;
1571
1572         map = data->pwm_temp_map[nr];
1573         if (map >= 3)
1574                 map = 0;        /* Should never happen */
1575         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1576                 map += 3;
1577
1578         return sprintf(buf, "%d\n", (int)BIT(map));
1579 }
1580
1581 static ssize_t set_pwm_temp_map(struct device *dev,
1582                                 struct device_attribute *attr, const char *buf,
1583                                 size_t count)
1584 {
1585         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1586         struct it87_data *data = dev_get_drvdata(dev);
1587         int nr = sensor_attr->index;
1588         long val;
1589         u8 reg;
1590
1591         if (kstrtol(buf, 10, &val) < 0)
1592                 return -EINVAL;
1593
1594         if (nr >= 3)
1595                 val -= 3;
1596
1597         switch (val) {
1598         case BIT(0):
1599                 reg = 0x00;
1600                 break;
1601         case BIT(1):
1602                 reg = 0x01;
1603                 break;
1604         case BIT(2):
1605                 reg = 0x02;
1606                 break;
1607         default:
1608                 return -EINVAL;
1609         }
1610
1611         mutex_lock(&data->update_lock);
1612         it87_update_pwm_ctrl(data, nr);
1613         data->pwm_temp_map[nr] = reg;
1614         /*
1615          * If we are in automatic mode, write the temp mapping immediately;
1616          * otherwise, just store it for later use.
1617          */
1618         if (data->pwm_ctrl[nr] & 0x80) {
1619                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1620                                                 data->pwm_temp_map[nr];
1621                 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1622         }
1623         mutex_unlock(&data->update_lock);
1624         return count;
1625 }
1626
1627 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1628                              char *buf)
1629 {
1630         struct it87_data *data = it87_update_device(dev);
1631         struct sensor_device_attribute_2 *sensor_attr =
1632                         to_sensor_dev_attr_2(attr);
1633         int nr = sensor_attr->nr;
1634         int point = sensor_attr->index;
1635
1636         return sprintf(buf, "%d\n",
1637                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1638 }
1639
1640 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1641                             const char *buf, size_t count)
1642 {
1643         struct it87_data *data = dev_get_drvdata(dev);
1644         struct sensor_device_attribute_2 *sensor_attr =
1645                         to_sensor_dev_attr_2(attr);
1646         int nr = sensor_attr->nr;
1647         int point = sensor_attr->index;
1648         int regaddr;
1649         long val;
1650
1651         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1652                 return -EINVAL;
1653
1654         mutex_lock(&data->update_lock);
1655         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1656         if (has_newer_autopwm(data))
1657                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1658         else
1659                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1660         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1661         mutex_unlock(&data->update_lock);
1662         return count;
1663 }
1664
1665 static ssize_t show_auto_pwm_slope(struct device *dev,
1666                                    struct device_attribute *attr, char *buf)
1667 {
1668         struct it87_data *data = it87_update_device(dev);
1669         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1670         int nr = sensor_attr->index;
1671
1672         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1673 }
1674
1675 static ssize_t set_auto_pwm_slope(struct device *dev,
1676                                   struct device_attribute *attr,
1677                                   const char *buf, size_t count)
1678 {
1679         struct it87_data *data = dev_get_drvdata(dev);
1680         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1681         int nr = sensor_attr->index;
1682         unsigned long val;
1683
1684         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1685                 return -EINVAL;
1686
1687         mutex_lock(&data->update_lock);
1688         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1689         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1690                          data->auto_pwm[nr][1]);
1691         mutex_unlock(&data->update_lock);
1692         return count;
1693 }
1694
1695 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1696                               char *buf)
1697 {
1698         struct it87_data *data = it87_update_device(dev);
1699         struct sensor_device_attribute_2 *sensor_attr =
1700                         to_sensor_dev_attr_2(attr);
1701         int nr = sensor_attr->nr;
1702         int point = sensor_attr->index;
1703         int reg;
1704
1705         if (has_old_autopwm(data) || point)
1706                 reg = data->auto_temp[nr][point];
1707         else
1708                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1709
1710         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1711 }
1712
1713 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1714                              const char *buf, size_t count)
1715 {
1716         struct it87_data *data = dev_get_drvdata(dev);
1717         struct sensor_device_attribute_2 *sensor_attr =
1718                         to_sensor_dev_attr_2(attr);
1719         int nr = sensor_attr->nr;
1720         int point = sensor_attr->index;
1721         long val;
1722         int reg;
1723
1724         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1725                 return -EINVAL;
1726
1727         mutex_lock(&data->update_lock);
1728         if (has_newer_autopwm(data) && !point) {
1729                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1730                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1731                 data->auto_temp[nr][0] = reg;
1732                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1733         } else {
1734                 reg = TEMP_TO_REG(val);
1735                 data->auto_temp[nr][point] = reg;
1736                 if (has_newer_autopwm(data))
1737                         point--;
1738                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1739         }
1740         mutex_unlock(&data->update_lock);
1741         return count;
1742 }
1743
1744 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1745 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1746                             0, 1);
1747 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1748                           set_fan_div, 0);
1749
1750 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1751 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1752                             1, 1);
1753 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1754                           set_fan_div, 1);
1755
1756 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1757 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1758                             2, 1);
1759 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1760                           set_fan_div, 2);
1761
1762 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1763 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1764                             3, 1);
1765
1766 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1767 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1768                             4, 1);
1769
1770 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1771 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1772                             5, 1);
1773
1774 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1775                           show_pwm_enable, set_pwm_enable, 0);
1776 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1777 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1778                           set_pwm_freq, 0);
1779 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1780                           show_pwm_temp_map, set_pwm_temp_map, 0);
1781 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1782                             show_auto_pwm, set_auto_pwm, 0, 0);
1783 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1784                             show_auto_pwm, set_auto_pwm, 0, 1);
1785 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1786                             show_auto_pwm, set_auto_pwm, 0, 2);
1787 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1788                             show_auto_pwm, NULL, 0, 3);
1789 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1790                             show_auto_temp, set_auto_temp, 0, 1);
1791 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1792                             show_auto_temp, set_auto_temp, 0, 0);
1793 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1794                             show_auto_temp, set_auto_temp, 0, 2);
1795 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1796                             show_auto_temp, set_auto_temp, 0, 3);
1797 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1798                             show_auto_temp, set_auto_temp, 0, 4);
1799 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1800                             show_auto_pwm, set_auto_pwm, 0, 0);
1801 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1802                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1803
1804 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1805                           show_pwm_enable, set_pwm_enable, 1);
1806 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1807 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1808 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1809                           show_pwm_temp_map, set_pwm_temp_map, 1);
1810 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1811                             show_auto_pwm, set_auto_pwm, 1, 0);
1812 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1813                             show_auto_pwm, set_auto_pwm, 1, 1);
1814 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1815                             show_auto_pwm, set_auto_pwm, 1, 2);
1816 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1817                             show_auto_pwm, NULL, 1, 3);
1818 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1819                             show_auto_temp, set_auto_temp, 1, 1);
1820 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1821                             show_auto_temp, set_auto_temp, 1, 0);
1822 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1823                             show_auto_temp, set_auto_temp, 1, 2);
1824 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1825                             show_auto_temp, set_auto_temp, 1, 3);
1826 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1827                             show_auto_temp, set_auto_temp, 1, 4);
1828 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1829                             show_auto_pwm, set_auto_pwm, 1, 0);
1830 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1831                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1832
1833 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1834                           show_pwm_enable, set_pwm_enable, 2);
1835 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1836 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1837 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1838                           show_pwm_temp_map, set_pwm_temp_map, 2);
1839 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1840                             show_auto_pwm, set_auto_pwm, 2, 0);
1841 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1842                             show_auto_pwm, set_auto_pwm, 2, 1);
1843 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1844                             show_auto_pwm, set_auto_pwm, 2, 2);
1845 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1846                             show_auto_pwm, NULL, 2, 3);
1847 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1848                             show_auto_temp, set_auto_temp, 2, 1);
1849 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1850                             show_auto_temp, set_auto_temp, 2, 0);
1851 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1852                             show_auto_temp, set_auto_temp, 2, 2);
1853 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1854                             show_auto_temp, set_auto_temp, 2, 3);
1855 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1856                             show_auto_temp, set_auto_temp, 2, 4);
1857 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1858                             show_auto_pwm, set_auto_pwm, 2, 0);
1859 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1860                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1861
1862 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1863                           show_pwm_enable, set_pwm_enable, 3);
1864 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1865 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1866 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1867                           show_pwm_temp_map, set_pwm_temp_map, 3);
1868 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1869                             show_auto_temp, set_auto_temp, 2, 1);
1870 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1871                             show_auto_temp, set_auto_temp, 2, 0);
1872 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1873                             show_auto_temp, set_auto_temp, 2, 2);
1874 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1875                             show_auto_temp, set_auto_temp, 2, 3);
1876 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1877                             show_auto_pwm, set_auto_pwm, 3, 0);
1878 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1879                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1880
1881 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1882                           show_pwm_enable, set_pwm_enable, 4);
1883 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1884 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1885 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1886                           show_pwm_temp_map, set_pwm_temp_map, 4);
1887 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1888                             show_auto_temp, set_auto_temp, 2, 1);
1889 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1890                             show_auto_temp, set_auto_temp, 2, 0);
1891 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1892                             show_auto_temp, set_auto_temp, 2, 2);
1893 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1894                             show_auto_temp, set_auto_temp, 2, 3);
1895 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1896                             show_auto_pwm, set_auto_pwm, 4, 0);
1897 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1898                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1899
1900 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1901                           show_pwm_enable, set_pwm_enable, 5);
1902 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1903 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1904 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1905                           show_pwm_temp_map, set_pwm_temp_map, 5);
1906 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1907                             show_auto_temp, set_auto_temp, 2, 1);
1908 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1909                             show_auto_temp, set_auto_temp, 2, 0);
1910 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1911                             show_auto_temp, set_auto_temp, 2, 2);
1912 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1913                             show_auto_temp, set_auto_temp, 2, 3);
1914 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1915                             show_auto_pwm, set_auto_pwm, 5, 0);
1916 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1917                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1918
1919 /* Alarms */
1920 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1921                            char *buf)
1922 {
1923         struct it87_data *data = it87_update_device(dev);
1924
1925         return sprintf(buf, "%u\n", data->alarms);
1926 }
1927 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1928
1929 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1930                           char *buf)
1931 {
1932         struct it87_data *data = it87_update_device(dev);
1933         int bitnr = to_sensor_dev_attr(attr)->index;
1934
1935         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1936 }
1937
1938 static ssize_t clear_intrusion(struct device *dev,
1939                                struct device_attribute *attr, const char *buf,
1940                                size_t count)
1941 {
1942         struct it87_data *data = dev_get_drvdata(dev);
1943         int config;
1944         long val;
1945
1946         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1947                 return -EINVAL;
1948
1949         mutex_lock(&data->update_lock);
1950         config = it87_read_value(data, IT87_REG_CONFIG);
1951         if (config < 0) {
1952                 count = config;
1953         } else {
1954                 config |= BIT(5);
1955                 it87_write_value(data, IT87_REG_CONFIG, config);
1956                 /* Invalidate cache to force re-read */
1957                 data->valid = 0;
1958         }
1959         mutex_unlock(&data->update_lock);
1960
1961         return count;
1962 }
1963
1964 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1965 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1966 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1967 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1968 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1969 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1970 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1971 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1972 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1973 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1974 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1975 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1976 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1977 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1978 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1979 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1980 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1981 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1982                           show_alarm, clear_intrusion, 4);
1983
1984 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1985                          char *buf)
1986 {
1987         struct it87_data *data = it87_update_device(dev);
1988         int bitnr = to_sensor_dev_attr(attr)->index;
1989
1990         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1991 }
1992
1993 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1994                         const char *buf, size_t count)
1995 {
1996         int bitnr = to_sensor_dev_attr(attr)->index;
1997         struct it87_data *data = dev_get_drvdata(dev);
1998         long val;
1999
2000         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2001                 return -EINVAL;
2002
2003         mutex_lock(&data->update_lock);
2004         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2005         if (val)
2006                 data->beeps |= BIT(bitnr);
2007         else
2008                 data->beeps &= ~BIT(bitnr);
2009         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2010         mutex_unlock(&data->update_lock);
2011         return count;
2012 }
2013
2014 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2015                           show_beep, set_beep, 1);
2016 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2017 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2018 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2019 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2020 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2021 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2022 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2023 /* fanX_beep writability is set later */
2024 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2025 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2026 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2027 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2028 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2029 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2030 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2031                           show_beep, set_beep, 2);
2032 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2033 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2034
2035 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2036                             char *buf)
2037 {
2038         struct it87_data *data = dev_get_drvdata(dev);
2039
2040         return sprintf(buf, "%u\n", data->vrm);
2041 }
2042
2043 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2044                              const char *buf, size_t count)
2045 {
2046         struct it87_data *data = dev_get_drvdata(dev);
2047         unsigned long val;
2048
2049         if (kstrtoul(buf, 10, &val) < 0)
2050                 return -EINVAL;
2051
2052         data->vrm = val;
2053
2054         return count;
2055 }
2056 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2057
2058 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2059                             char *buf)
2060 {
2061         struct it87_data *data = it87_update_device(dev);
2062
2063         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2064 }
2065 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2066
2067 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2068                           char *buf)
2069 {
2070         static const char * const labels[] = {
2071                 "+5V",
2072                 "5VSB",
2073                 "Vbat",
2074                 "AVCC",
2075         };
2076         static const char * const labels_it8721[] = {
2077                 "+3.3V",
2078                 "3VSB",
2079                 "Vbat",
2080                 "+3.3V",
2081         };
2082         struct it87_data *data = dev_get_drvdata(dev);
2083         int nr = to_sensor_dev_attr(attr)->index;
2084         const char *label;
2085
2086         if (has_vin3_5v(data) && nr == 0)
2087                 label = labels[0];
2088         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2089                 label = labels_it8721[nr];
2090         else
2091                 label = labels[nr];
2092
2093         return sprintf(buf, "%s\n", label);
2094 }
2095 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2096 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2097 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2098 /* AVCC3 */
2099 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2100
2101 static umode_t it87_in_is_visible(struct kobject *kobj,
2102                                   struct attribute *attr, int index)
2103 {
2104         struct device *dev = container_of(kobj, struct device, kobj);
2105         struct it87_data *data = dev_get_drvdata(dev);
2106         int i = index / 5;      /* voltage index */
2107         int a = index % 5;      /* attribute index */
2108
2109         if (index >= 40) {      /* in8 and higher only have input attributes */
2110                 i = index - 40 + 8;
2111                 a = 0;
2112         }
2113
2114         if (!(data->has_in & BIT(i)))
2115                 return 0;
2116
2117         if (a == 4 && !data->has_beep)
2118                 return 0;
2119
2120         return attr->mode;
2121 }
2122
2123 static struct attribute *it87_attributes_in[] = {
2124         &sensor_dev_attr_in0_input.dev_attr.attr,
2125         &sensor_dev_attr_in0_min.dev_attr.attr,
2126         &sensor_dev_attr_in0_max.dev_attr.attr,
2127         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2128         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2129
2130         &sensor_dev_attr_in1_input.dev_attr.attr,
2131         &sensor_dev_attr_in1_min.dev_attr.attr,
2132         &sensor_dev_attr_in1_max.dev_attr.attr,
2133         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2134         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2135
2136         &sensor_dev_attr_in2_input.dev_attr.attr,
2137         &sensor_dev_attr_in2_min.dev_attr.attr,
2138         &sensor_dev_attr_in2_max.dev_attr.attr,
2139         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2140         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2141
2142         &sensor_dev_attr_in3_input.dev_attr.attr,
2143         &sensor_dev_attr_in3_min.dev_attr.attr,
2144         &sensor_dev_attr_in3_max.dev_attr.attr,
2145         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2146         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2147
2148         &sensor_dev_attr_in4_input.dev_attr.attr,
2149         &sensor_dev_attr_in4_min.dev_attr.attr,
2150         &sensor_dev_attr_in4_max.dev_attr.attr,
2151         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2152         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2153
2154         &sensor_dev_attr_in5_input.dev_attr.attr,
2155         &sensor_dev_attr_in5_min.dev_attr.attr,
2156         &sensor_dev_attr_in5_max.dev_attr.attr,
2157         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2158         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2159
2160         &sensor_dev_attr_in6_input.dev_attr.attr,
2161         &sensor_dev_attr_in6_min.dev_attr.attr,
2162         &sensor_dev_attr_in6_max.dev_attr.attr,
2163         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2164         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2165
2166         &sensor_dev_attr_in7_input.dev_attr.attr,
2167         &sensor_dev_attr_in7_min.dev_attr.attr,
2168         &sensor_dev_attr_in7_max.dev_attr.attr,
2169         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2170         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2171
2172         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2173         &sensor_dev_attr_in9_input.dev_attr.attr,       /* 41 */
2174         &sensor_dev_attr_in10_input.dev_attr.attr,      /* 42 */
2175         &sensor_dev_attr_in11_input.dev_attr.attr,      /* 43 */
2176         &sensor_dev_attr_in12_input.dev_attr.attr,      /* 44 */
2177         NULL
2178 };
2179
2180 static const struct attribute_group it87_group_in = {
2181         .attrs = it87_attributes_in,
2182         .is_visible = it87_in_is_visible,
2183 };
2184
2185 static umode_t it87_temp_is_visible(struct kobject *kobj,
2186                                     struct attribute *attr, int index)
2187 {
2188         struct device *dev = container_of(kobj, struct device, kobj);
2189         struct it87_data *data = dev_get_drvdata(dev);
2190         int i = index / 7;      /* temperature index */
2191         int a = index % 7;      /* attribute index */
2192
2193         if (index >= 21) {
2194                 i = index - 21 + 3;
2195                 a = 0;
2196         }
2197
2198         if (!(data->has_temp & BIT(i)))
2199                 return 0;
2200
2201         if (a == 5 && !has_temp_offset(data))
2202                 return 0;
2203
2204         if (a == 6 && !data->has_beep)
2205                 return 0;
2206
2207         return attr->mode;
2208 }
2209
2210 static struct attribute *it87_attributes_temp[] = {
2211         &sensor_dev_attr_temp1_input.dev_attr.attr,
2212         &sensor_dev_attr_temp1_max.dev_attr.attr,
2213         &sensor_dev_attr_temp1_min.dev_attr.attr,
2214         &sensor_dev_attr_temp1_type.dev_attr.attr,
2215         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2216         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2217         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2218
2219         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2220         &sensor_dev_attr_temp2_max.dev_attr.attr,
2221         &sensor_dev_attr_temp2_min.dev_attr.attr,
2222         &sensor_dev_attr_temp2_type.dev_attr.attr,
2223         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2224         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2225         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2226
2227         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2228         &sensor_dev_attr_temp3_max.dev_attr.attr,
2229         &sensor_dev_attr_temp3_min.dev_attr.attr,
2230         &sensor_dev_attr_temp3_type.dev_attr.attr,
2231         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2232         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2233         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2234
2235         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2236         &sensor_dev_attr_temp5_input.dev_attr.attr,
2237         &sensor_dev_attr_temp6_input.dev_attr.attr,
2238         NULL
2239 };
2240
2241 static const struct attribute_group it87_group_temp = {
2242         .attrs = it87_attributes_temp,
2243         .is_visible = it87_temp_is_visible,
2244 };
2245
2246 static umode_t it87_is_visible(struct kobject *kobj,
2247                                struct attribute *attr, int index)
2248 {
2249         struct device *dev = container_of(kobj, struct device, kobj);
2250         struct it87_data *data = dev_get_drvdata(dev);
2251
2252         if ((index == 2 || index == 3) && !data->has_vid)
2253                 return 0;
2254
2255         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2256                 return 0;
2257
2258         return attr->mode;
2259 }
2260
2261 static struct attribute *it87_attributes[] = {
2262         &dev_attr_alarms.attr,
2263         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2264         &dev_attr_vrm.attr,                             /* 2 */
2265         &dev_attr_cpu0_vid.attr,                        /* 3 */
2266         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2267         &sensor_dev_attr_in7_label.dev_attr.attr,
2268         &sensor_dev_attr_in8_label.dev_attr.attr,
2269         &sensor_dev_attr_in9_label.dev_attr.attr,
2270         NULL
2271 };
2272
2273 static const struct attribute_group it87_group = {
2274         .attrs = it87_attributes,
2275         .is_visible = it87_is_visible,
2276 };
2277
2278 static umode_t it87_fan_is_visible(struct kobject *kobj,
2279                                    struct attribute *attr, int index)
2280 {
2281         struct device *dev = container_of(kobj, struct device, kobj);
2282         struct it87_data *data = dev_get_drvdata(dev);
2283         int i = index / 5;      /* fan index */
2284         int a = index % 5;      /* attribute index */
2285
2286         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2287                 i = (index - 15) / 4 + 3;
2288                 a = (index - 15) % 4;
2289         }
2290
2291         if (!(data->has_fan & BIT(i)))
2292                 return 0;
2293
2294         if (a == 3) {                           /* beep */
2295                 if (!data->has_beep)
2296                         return 0;
2297                 /* first fan beep attribute is writable */
2298                 if (i == __ffs(data->has_fan))
2299                         return attr->mode | S_IWUSR;
2300         }
2301
2302         if (a == 4 && has_16bit_fans(data))     /* divisor */
2303                 return 0;
2304
2305         return attr->mode;
2306 }
2307
2308 static struct attribute *it87_attributes_fan[] = {
2309         &sensor_dev_attr_fan1_input.dev_attr.attr,
2310         &sensor_dev_attr_fan1_min.dev_attr.attr,
2311         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2312         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2313         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2314
2315         &sensor_dev_attr_fan2_input.dev_attr.attr,
2316         &sensor_dev_attr_fan2_min.dev_attr.attr,
2317         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2318         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2319         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2320
2321         &sensor_dev_attr_fan3_input.dev_attr.attr,
2322         &sensor_dev_attr_fan3_min.dev_attr.attr,
2323         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2324         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2325         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2326
2327         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2328         &sensor_dev_attr_fan4_min.dev_attr.attr,
2329         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2330         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2331
2332         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2333         &sensor_dev_attr_fan5_min.dev_attr.attr,
2334         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2335         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2336
2337         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2338         &sensor_dev_attr_fan6_min.dev_attr.attr,
2339         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2340         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2341         NULL
2342 };
2343
2344 static const struct attribute_group it87_group_fan = {
2345         .attrs = it87_attributes_fan,
2346         .is_visible = it87_fan_is_visible,
2347 };
2348
2349 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2350                                    struct attribute *attr, int index)
2351 {
2352         struct device *dev = container_of(kobj, struct device, kobj);
2353         struct it87_data *data = dev_get_drvdata(dev);
2354         int i = index / 4;      /* pwm index */
2355         int a = index % 4;      /* attribute index */
2356
2357         if (!(data->has_pwm & BIT(i)))
2358                 return 0;
2359
2360         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2361         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2362                 return attr->mode | S_IWUSR;
2363
2364         /* pwm2_freq is writable if there are two pwm frequency selects */
2365         if (has_pwm_freq2(data) && i == 1 && a == 2)
2366                 return attr->mode | S_IWUSR;
2367
2368         return attr->mode;
2369 }
2370
2371 static struct attribute *it87_attributes_pwm[] = {
2372         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2373         &sensor_dev_attr_pwm1.dev_attr.attr,
2374         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2375         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2376
2377         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2378         &sensor_dev_attr_pwm2.dev_attr.attr,
2379         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2380         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2381
2382         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2383         &sensor_dev_attr_pwm3.dev_attr.attr,
2384         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2385         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2386
2387         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2388         &sensor_dev_attr_pwm4.dev_attr.attr,
2389         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2390         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2391
2392         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2393         &sensor_dev_attr_pwm5.dev_attr.attr,
2394         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2395         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2396
2397         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2398         &sensor_dev_attr_pwm6.dev_attr.attr,
2399         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2400         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2401
2402         NULL
2403 };
2404
2405 static const struct attribute_group it87_group_pwm = {
2406         .attrs = it87_attributes_pwm,
2407         .is_visible = it87_pwm_is_visible,
2408 };
2409
2410 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2411                                         struct attribute *attr, int index)
2412 {
2413         struct device *dev = container_of(kobj, struct device, kobj);
2414         struct it87_data *data = dev_get_drvdata(dev);
2415         int i = index / 11;     /* pwm index */
2416         int a = index % 11;     /* attribute index */
2417
2418         if (index >= 33) {      /* pwm 4..6 */
2419                 i = (index - 33) / 6 + 3;
2420                 a = (index - 33) % 6 + 4;
2421         }
2422
2423         if (!(data->has_pwm & BIT(i)))
2424                 return 0;
2425
2426         if (has_newer_autopwm(data)) {
2427                 if (a < 4)      /* no auto point pwm */
2428                         return 0;
2429                 if (a == 8)     /* no auto_point4 */
2430                         return 0;
2431         }
2432         if (has_old_autopwm(data)) {
2433                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2434                         return 0;
2435         }
2436
2437         return attr->mode;
2438 }
2439
2440 static struct attribute *it87_attributes_auto_pwm[] = {
2441         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2442         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2443         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2444         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2445         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2446         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2447         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2448         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2449         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2450         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2451         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2452
2453         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2454         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2455         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2456         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2457         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2458         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2459         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2460         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2461         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2462         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2463         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2464
2465         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2466         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2467         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2468         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2469         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2470         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2471         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2472         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2473         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2474         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2475         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2476
2477         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2478         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2479         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2480         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2481         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2482         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2483
2484         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2485         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2486         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2487         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2488         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2489         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2490
2491         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2492         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2493         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2494         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2495         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2496         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2497
2498         NULL,
2499 };
2500
2501 static const struct attribute_group it87_group_auto_pwm = {
2502         .attrs = it87_attributes_auto_pwm,
2503         .is_visible = it87_auto_pwm_is_visible,
2504 };
2505
2506 /* SuperIO detection - will change isa_address if a chip is found */
2507 static int __init it87_find(int sioaddr, unsigned short *address,
2508                             struct it87_sio_data *sio_data)
2509 {
2510         int err;
2511         u16 chip_type;
2512         const char *board_vendor, *board_name;
2513         const struct it87_devices *config;
2514
2515         err = superio_enter(sioaddr);
2516         if (err)
2517                 return err;
2518
2519         err = -ENODEV;
2520         chip_type = superio_inw(sioaddr, DEVID);
2521         if (chip_type == 0xffff)
2522                 goto exit;
2523
2524         if (force_id)
2525                 chip_type = force_id;
2526
2527         switch (chip_type) {
2528         case IT8705F_DEVID:
2529                 sio_data->type = it87;
2530                 break;
2531         case IT8712F_DEVID:
2532                 sio_data->type = it8712;
2533                 break;
2534         case IT8716F_DEVID:
2535         case IT8726F_DEVID:
2536                 sio_data->type = it8716;
2537                 break;
2538         case IT8718F_DEVID:
2539                 sio_data->type = it8718;
2540                 break;
2541         case IT8720F_DEVID:
2542                 sio_data->type = it8720;
2543                 break;
2544         case IT8721F_DEVID:
2545                 sio_data->type = it8721;
2546                 break;
2547         case IT8728F_DEVID:
2548                 sio_data->type = it8728;
2549                 break;
2550         case IT8732F_DEVID:
2551                 sio_data->type = it8732;
2552                 break;
2553         case IT8792E_DEVID:
2554                 sio_data->type = it8792;
2555                 break;
2556         case IT8771E_DEVID:
2557                 sio_data->type = it8771;
2558                 break;
2559         case IT8772E_DEVID:
2560                 sio_data->type = it8772;
2561                 break;
2562         case IT8781F_DEVID:
2563                 sio_data->type = it8781;
2564                 break;
2565         case IT8782F_DEVID:
2566                 sio_data->type = it8782;
2567                 break;
2568         case IT8783E_DEVID:
2569                 sio_data->type = it8783;
2570                 break;
2571         case IT8786E_DEVID:
2572                 sio_data->type = it8786;
2573                 break;
2574         case IT8790E_DEVID:
2575                 sio_data->type = it8790;
2576                 break;
2577         case IT8603E_DEVID:
2578         case IT8623E_DEVID:
2579                 sio_data->type = it8603;
2580                 break;
2581         case IT8607E_DEVID:
2582                 sio_data->type = it8607;
2583                 break;
2584         case IT8620E_DEVID:
2585                 sio_data->type = it8620;
2586                 break;
2587         case IT8622E_DEVID:
2588                 sio_data->type = it8622;
2589                 break;
2590         case IT8628E_DEVID:
2591                 sio_data->type = it8628;
2592                 break;
2593         case IT8655E_DEVID:
2594                 sio_data->type = it8655;
2595                 break;
2596         case IT8665E_DEVID:
2597                 sio_data->type = it8665;
2598                 break;
2599         case IT8686E_DEVID:
2600                 sio_data->type = it8686;
2601                 break;
2602         case 0xffff:    /* No device at all */
2603                 goto exit;
2604         default:
2605                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2606                 goto exit;
2607         }
2608
2609         superio_select(sioaddr, PME);
2610         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2611                 pr_info("Device not activated, skipping\n");
2612                 goto exit;
2613         }
2614
2615         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2616         if (*address == 0) {
2617                 pr_info("Base address not set, skipping\n");
2618                 goto exit;
2619         }
2620
2621         err = 0;
2622         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2623         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2624                 it87_devices[sio_data->type].suffix,
2625                 *address, sio_data->revision);
2626
2627         config = &it87_devices[sio_data->type];
2628
2629         /* in7 (VSB or VCCH5V) is always internal on some chips */
2630         if (has_in7_internal(config))
2631                 sio_data->internal |= BIT(1);
2632
2633         /* in8 (Vbat) is always internal */
2634         sio_data->internal |= BIT(2);
2635
2636         /* in9 (AVCC3), always internal if supported */
2637         if (has_avcc3(config))
2638                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2639         else
2640                 sio_data->skip_in |= BIT(9);
2641
2642         if (!has_four_pwm(config))
2643                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2644         else if (!has_five_pwm(config))
2645                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2646         else if (!has_six_pwm(config))
2647                 sio_data->skip_pwm |= BIT(5);
2648
2649         if (!has_vid(config))
2650                 sio_data->skip_vid = 1;
2651
2652         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2653         if (sio_data->type == it87) {
2654                 /* The IT8705F has a different LD number for GPIO */
2655                 superio_select(sioaddr, 5);
2656                 sio_data->beep_pin = superio_inb(sioaddr,
2657                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2658         } else if (sio_data->type == it8783) {
2659                 int reg25, reg27, reg2a, reg2c, regef;
2660
2661                 superio_select(sioaddr, GPIO);
2662
2663                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2664                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2665                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2666                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2667                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2668
2669                 /* Check if fan3 is there or not */
2670                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2671                         sio_data->skip_fan |= BIT(2);
2672                 if ((reg25 & BIT(4)) ||
2673                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2674                         sio_data->skip_pwm |= BIT(2);
2675
2676                 /* Check if fan2 is there or not */
2677                 if (reg27 & BIT(7))
2678                         sio_data->skip_fan |= BIT(1);
2679                 if (reg27 & BIT(3))
2680                         sio_data->skip_pwm |= BIT(1);
2681
2682                 /* VIN5 */
2683                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2684                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2685
2686                 /* VIN6 */
2687                 if (reg27 & BIT(1))
2688                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2689
2690                 /*
2691                  * VIN7
2692                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2693                  */
2694                 if (reg27 & BIT(2)) {
2695                         /*
2696                          * The data sheet is a bit unclear regarding the
2697                          * internal voltage divider for VCCH5V. It says
2698                          * "This bit enables and switches VIN7 (pin 91) to the
2699                          * internal voltage divider for VCCH5V".
2700                          * This is different to other chips, where the internal
2701                          * voltage divider would connect VIN7 to an internal
2702                          * voltage source. Maybe that is the case here as well.
2703                          *
2704                          * Since we don't know for sure, re-route it if that is
2705                          * not the case, and ask the user to report if the
2706                          * resulting voltage is sane.
2707                          */
2708                         if (!(reg2c & BIT(1))) {
2709                                 reg2c |= BIT(1);
2710                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2711                                              reg2c);
2712                                 pr_notice("Routing internal VCCH5V to in7.\n");
2713                         }
2714                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2715                         pr_notice("Please report if it displays a reasonable voltage.\n");
2716                 }
2717
2718                 if (reg2c & BIT(0))
2719                         sio_data->internal |= BIT(0);
2720                 if (reg2c & BIT(1))
2721                         sio_data->internal |= BIT(1);
2722
2723                 sio_data->beep_pin = superio_inb(sioaddr,
2724                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2725         } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2726                 int reg27, reg29;
2727
2728                 superio_select(sioaddr, GPIO);
2729
2730                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2731
2732                 /* Check if fan3 is there or not */
2733                 if (reg27 & BIT(6))
2734                         sio_data->skip_pwm |= BIT(2);
2735                 if (reg27 & BIT(7))
2736                         sio_data->skip_fan |= BIT(2);
2737
2738                 /* Check if fan2 is there or not */
2739                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2740                 if (reg29 & BIT(1))
2741                         sio_data->skip_pwm |= BIT(1);
2742                 if (reg29 & BIT(2))
2743                         sio_data->skip_fan |= BIT(1);
2744
2745                 if (sio_data->type == it8603) {
2746                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2747                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2748                 }
2749
2750                 sio_data->beep_pin = superio_inb(sioaddr,
2751                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2752         } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2753                    sio_data->type == it8686) {
2754                 int reg;
2755
2756                 superio_select(sioaddr, GPIO);
2757
2758                 /* Check for pwm5 */
2759                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2760                 if (reg & BIT(6))
2761                         sio_data->skip_pwm |= BIT(4);
2762
2763                 /* Check for fan4, fan5 */
2764                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2765                 if (!(reg & BIT(5)))
2766                         sio_data->skip_fan |= BIT(3);
2767                 if (!(reg & BIT(4)))
2768                         sio_data->skip_fan |= BIT(4);
2769
2770                 /* Check for pwm3, fan3 */
2771                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2772                 if (reg & BIT(6))
2773                         sio_data->skip_pwm |= BIT(2);
2774                 if (reg & BIT(7))
2775                         sio_data->skip_fan |= BIT(2);
2776
2777                 /* Check for pwm4 */
2778                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2779                 if (reg & BIT(2))
2780                         sio_data->skip_pwm |= BIT(3);
2781
2782                 /* Check for pwm2, fan2 */
2783                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2784                 if (reg & BIT(1))
2785                         sio_data->skip_pwm |= BIT(1);
2786                 if (reg & BIT(2))
2787                         sio_data->skip_fan |= BIT(1);
2788                 /* Check for pwm6, fan6 */
2789                 if (!(reg & BIT(7))) {
2790                         sio_data->skip_pwm |= BIT(5);
2791                         sio_data->skip_fan |= BIT(5);
2792                 }
2793
2794                 /* Check if AVCC is on VIN3 */
2795                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2796                 if (reg & BIT(0)) {
2797                         /* For it8686, the bit just enables AVCC3 */
2798                         if (sio_data->type != it8686)
2799                                 sio_data->internal |= BIT(0);
2800                 } else {
2801                         sio_data->internal &= ~BIT(3);
2802                         sio_data->skip_in |= BIT(9);
2803                 }
2804
2805                 sio_data->beep_pin = superio_inb(sioaddr,
2806                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2807         } else if (sio_data->type == it8622) {
2808                 int reg;
2809
2810                 superio_select(sioaddr, GPIO);
2811
2812                 /* Check for pwm4, fan4 */
2813                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2814                 if (reg & BIT(6))
2815                         sio_data->skip_fan |= BIT(3);
2816                 if (reg & BIT(5))
2817                         sio_data->skip_pwm |= BIT(3);
2818
2819                 /* Check for pwm3, fan3, pwm5, fan5 */
2820                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2821                 if (reg & BIT(6))
2822                         sio_data->skip_pwm |= BIT(2);
2823                 if (reg & BIT(7))
2824                         sio_data->skip_fan |= BIT(2);
2825                 if (reg & BIT(3))
2826                         sio_data->skip_pwm |= BIT(4);
2827                 if (reg & BIT(1))
2828                         sio_data->skip_fan |= BIT(4);
2829
2830                 /* Check for pwm2, fan2 */
2831                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2832                 if (reg & BIT(1))
2833                         sio_data->skip_pwm |= BIT(1);
2834                 if (reg & BIT(2))
2835                         sio_data->skip_fan |= BIT(1);
2836
2837                 /* Check for AVCC */
2838                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2839                 if (!(reg & BIT(0)))
2840                         sio_data->skip_in |= BIT(9);
2841
2842                 sio_data->beep_pin = superio_inb(sioaddr,
2843                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2844         } else if (sio_data->type == it8732) {
2845                 int reg;
2846
2847                 superio_select(sioaddr, GPIO);
2848
2849                 /* Check for pwm2, fan2 */
2850                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2851                 if (reg & BIT(1))
2852                         sio_data->skip_pwm |= BIT(1);
2853                 if (reg & BIT(2))
2854                         sio_data->skip_fan |= BIT(1);
2855
2856                 /* Check for pwm3, fan3, fan4 */
2857                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2858                 if (reg & BIT(6))
2859                         sio_data->skip_pwm |= BIT(2);
2860                 if (reg & BIT(7))
2861                         sio_data->skip_fan |= BIT(2);
2862                 if (reg & BIT(5))
2863                         sio_data->skip_fan |= BIT(3);
2864
2865                 /* Check if AVCC is on VIN3 */
2866                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2867                 if (reg & BIT(0))
2868                         sio_data->internal |= BIT(0);
2869
2870                 sio_data->beep_pin = superio_inb(sioaddr,
2871                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2872         } else if (sio_data->type == it8655) {
2873                 int reg;
2874
2875                 superio_select(sioaddr, GPIO);
2876
2877                 /* Check for pwm2 */
2878                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2879                 if (reg & BIT(1))
2880                         sio_data->skip_pwm |= BIT(1);
2881
2882                 /* Check for fan2 */
2883                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2884                 if (reg & BIT(4))
2885                         sio_data->skip_fan |= BIT(1);
2886
2887                 /* Check for pwm3, fan3 */
2888                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2889                 if (reg & BIT(6))
2890                         sio_data->skip_pwm |= BIT(2);
2891                 if (reg & BIT(7))
2892                         sio_data->skip_fan |= BIT(2);
2893
2894                 sio_data->beep_pin = superio_inb(sioaddr,
2895                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2896         } else if (sio_data->type == it8665) {
2897                 int reg;
2898
2899                 superio_select(sioaddr, GPIO);
2900
2901                 /* Check for pwm2 */
2902                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2903                 if (reg & BIT(1))
2904                         sio_data->skip_pwm |= BIT(1);
2905
2906                 /* Check for fan2 */
2907                 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2908                 if (reg & BIT(4))
2909                         sio_data->skip_fan |= BIT(1);
2910
2911                 /* Check for pwm3, fan3 */
2912                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2913                 if (reg & BIT(6))
2914                         sio_data->skip_pwm |= BIT(2);
2915                 if (reg & BIT(7))
2916                         sio_data->skip_fan |= BIT(2);
2917
2918                 /* Check for pwm5, fan5 */
2919                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2920                 if (reg & BIT(5))
2921                         sio_data->skip_pwm |= BIT(4);
2922                 if (!(reg & BIT(4)))
2923                         sio_data->skip_fan |= BIT(4);
2924
2925                 /* Check for pwm4, fan4, pwm6, fan6 */
2926                 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
2927                 if (reg & BIT(2))
2928                         sio_data->skip_pwm |= BIT(3);
2929                 if (reg & BIT(3))
2930                         sio_data->skip_fan |= BIT(3);
2931                 if (reg & BIT(0))
2932                         sio_data->skip_pwm |= BIT(5);
2933                 if (reg & BIT(1))
2934                         sio_data->skip_fan |= BIT(5);
2935
2936                 sio_data->beep_pin = superio_inb(sioaddr,
2937                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2938         } else {
2939                 int reg;
2940                 bool uart6;
2941
2942                 superio_select(sioaddr, GPIO);
2943
2944                 /* Check for fan4, fan5 */
2945                 if (has_five_fans(config)) {
2946                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2947                         switch (sio_data->type) {
2948                         case it8718:
2949                                 if (reg & BIT(5))
2950                                         sio_data->skip_fan |= BIT(3);
2951                                 if (reg & BIT(4))
2952                                         sio_data->skip_fan |= BIT(4);
2953                                 break;
2954                         case it8720:
2955                         case it8721:
2956                         case it8728:
2957                                 if (!(reg & BIT(5)))
2958                                         sio_data->skip_fan |= BIT(3);
2959                                 if (!(reg & BIT(4)))
2960                                         sio_data->skip_fan |= BIT(4);
2961                                 break;
2962                         default:
2963                                 break;
2964                         }
2965                 }
2966
2967                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2968                 if (!sio_data->skip_vid) {
2969                         /* We need at least 4 VID pins */
2970                         if (reg & 0x0f) {
2971                                 pr_info("VID is disabled (pins used for GPIO)\n");
2972                                 sio_data->skip_vid = 1;
2973                         }
2974                 }
2975
2976                 /* Check if fan3 is there or not */
2977                 if (reg & BIT(6))
2978                         sio_data->skip_pwm |= BIT(2);
2979                 if (reg & BIT(7))
2980                         sio_data->skip_fan |= BIT(2);
2981
2982                 /* Check if fan2 is there or not */
2983                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2984                 if (reg & BIT(1))
2985                         sio_data->skip_pwm |= BIT(1);
2986                 if (reg & BIT(2))
2987                         sio_data->skip_fan |= BIT(1);
2988
2989                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2990                     !(sio_data->skip_vid))
2991                         sio_data->vid_value = superio_inb(sioaddr,
2992                                                           IT87_SIO_VID_REG);
2993
2994                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2995
2996                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2997
2998                 /*
2999                  * The IT8720F has no VIN7 pin, so VCCH should always be
3000                  * routed internally to VIN7 with an internal divider.
3001                  * Curiously, there still is a configuration bit to control
3002                  * this, which means it can be set incorrectly. And even
3003                  * more curiously, many boards out there are improperly
3004                  * configured, even though the IT8720F datasheet claims
3005                  * that the internal routing of VCCH to VIN7 is the default
3006                  * setting. So we force the internal routing in this case.
3007                  *
3008                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3009                  * If UART6 is enabled, re-route VIN7 to the internal divider
3010                  * if that is not already the case.
3011                  */
3012                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3013                         reg |= BIT(1);
3014                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3015                         pr_notice("Routing internal VCCH to in7\n");
3016                 }
3017                 if (reg & BIT(0))
3018                         sio_data->internal |= BIT(0);
3019                 if (reg & BIT(1))
3020                         sio_data->internal |= BIT(1);
3021
3022                 /*
3023                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3024                  * While VIN7 can be routed to the internal voltage divider,
3025                  * VIN5 and VIN6 are not available if UART6 is enabled.
3026                  *
3027                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3028                  * is the temperature source. Since we can not read the
3029                  * temperature source here, skip_temp is preliminary.
3030                  */
3031                 if (uart6) {
3032                         sio_data->skip_in |= BIT(5) | BIT(6);
3033                         sio_data->skip_temp |= BIT(2);
3034                 }
3035
3036                 sio_data->beep_pin = superio_inb(sioaddr,
3037                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3038         }
3039         if (sio_data->beep_pin)
3040                 pr_info("Beeping is supported\n");
3041
3042         /* Disable specific features based on DMI strings */
3043         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3044         board_name = dmi_get_system_info(DMI_BOARD_NAME);
3045         if (board_vendor && board_name) {
3046                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
3047                     strcmp(board_name, "FN68PT") == 0) {
3048                         /*
3049                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3050                          * connected to a fan, but to something else. One user
3051                          * has reported instant system power-off when changing
3052                          * the PWM2 duty cycle, so we disable it.
3053                          * I use the board name string as the trigger in case
3054                          * the same board is ever used in other systems.
3055                          */
3056                         pr_info("Disabling pwm2 due to hardware constraints\n");
3057                         sio_data->skip_pwm = BIT(1);
3058                 }
3059         }
3060
3061 exit:
3062         superio_exit(sioaddr);
3063         return err;
3064 }
3065
3066 /* Called when we have found a new IT87. */
3067 static void it87_init_device(struct platform_device *pdev)
3068 {
3069         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3070         struct it87_data *data = platform_get_drvdata(pdev);
3071         int tmp, i;
3072         u8 mask;
3073
3074         /* Initialize chip specific register pointers */
3075         switch (data->type) {
3076         case it8655:
3077         case it8665:
3078                 data->REG_FAN = IT87_REG_FAN_8665;
3079                 data->REG_FANX = IT87_REG_FANX_8665;
3080                 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3081                 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3082                 data->REG_PWM = IT87_REG_PWM_8665;
3083                 break;
3084         case it8622:
3085                 data->REG_FAN = IT87_REG_FAN;
3086                 data->REG_FANX = IT87_REG_FANX;
3087                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3088                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3089                 data->REG_PWM = IT87_REG_PWM_8665;
3090                 break;
3091         default:
3092                 data->REG_FAN = IT87_REG_FAN;
3093                 data->REG_FANX = IT87_REG_FANX;
3094                 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3095                 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3096                 data->REG_PWM = IT87_REG_PWM;
3097                 break;
3098         }
3099
3100         /*
3101          * For each PWM channel:
3102          * - If it is in automatic mode, setting to manual mode should set
3103          *   the fan to full speed by default.
3104          * - If it is in manual mode, we need a mapping to temperature
3105          *   channels to use when later setting to automatic mode later.
3106          *   Use a 1:1 mapping by default (we are clueless.)
3107          * In both cases, the value can (and should) be changed by the user
3108          * prior to switching to a different mode.
3109          * Note that this is no longer needed for the IT8721F and later, as
3110          * these have separate registers for the temperature mapping and the
3111          * manual duty cycle.
3112          */
3113         for (i = 0; i < NUM_AUTO_PWM; i++) {
3114                 data->pwm_temp_map[i] = i;
3115                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3116                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3117         }
3118
3119         /*
3120          * Some chips seem to have default value 0xff for all limit
3121          * registers. For low voltage limits it makes no sense and triggers
3122          * alarms, so change to 0 instead. For high temperature limits, it
3123          * means -1 degree C, which surprisingly doesn't trigger an alarm,
3124          * but is still confusing, so change to 127 degrees C.
3125          */
3126         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3127                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3128                 if (tmp == 0xff)
3129                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3130         }
3131         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
3132                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
3133                 if (tmp == 0xff)
3134                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
3135         }
3136
3137         /*
3138          * Temperature channels are not forcibly enabled, as they can be
3139          * set to two different sensor types and we can't guess which one
3140          * is correct for a given system. These channels can be enabled at
3141          * run-time through the temp{1-3}_type sysfs accessors if needed.
3142          */
3143
3144         /* Check if voltage monitors are reset manually or by some reason */
3145         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3146         if ((tmp & 0xff) == 0) {
3147                 /* Enable all voltage monitors */
3148                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3149         }
3150
3151         /* Check if tachometers are reset manually or by some reason */
3152         mask = 0x70 & ~(sio_data->skip_fan << 4);
3153         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3154         if ((data->fan_main_ctrl & mask) == 0) {
3155                 /* Enable all fan tachometers */
3156                 data->fan_main_ctrl |= mask;
3157                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3158                                  data->fan_main_ctrl);
3159         }
3160         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3161
3162         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3163
3164         /* Set tachometers to 16-bit mode if needed */
3165         if (has_fan16_config(data)) {
3166                 if (~tmp & 0x07 & data->has_fan) {
3167                         dev_dbg(&pdev->dev,
3168                                 "Setting fan1-3 to 16-bit mode\n");
3169                         it87_write_value(data, IT87_REG_FAN_16BIT,
3170                                          tmp | 0x07);
3171                 }
3172         }
3173
3174         /* Check for additional fans */
3175         if (has_four_fans(data) && (tmp & BIT(4)))
3176                 data->has_fan |= BIT(3); /* fan4 enabled */
3177         if (has_five_fans(data) && (tmp & BIT(5)))
3178                 data->has_fan |= BIT(4); /* fan5 enabled */
3179         if (has_six_fans(data)) {
3180                 switch (data->type) {
3181                 case it8620:
3182                 case it8628:
3183                 case it8686:
3184                         if (tmp & BIT(2))
3185                                 data->has_fan |= BIT(5); /* fan6 enabled */
3186                         break;
3187                 case it8665:
3188                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3189                         if (tmp & BIT(3))
3190                                 data->has_fan |= BIT(5); /* fan6 enabled */
3191                         break;
3192                 default:
3193                         break;
3194                 }
3195         }
3196
3197         /* Fan input pins may be used for alternative functions */
3198         data->has_fan &= ~sio_data->skip_fan;
3199
3200         /* Check if pwm6 is enabled */
3201         if (has_six_pwm(data)) {
3202                 switch (data->type) {
3203                 case it8620:
3204                 case it8686:
3205                         tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3206                         if (!(tmp & BIT(3)))
3207                                 sio_data->skip_pwm |= BIT(5);
3208                         break;
3209                 default:
3210                         break;
3211                 }
3212         }
3213
3214         /* Start monitoring */
3215         it87_write_value(data, IT87_REG_CONFIG,
3216                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3217                          | (update_vbat ? 0x41 : 0x01));
3218 }
3219
3220 /* Return 1 if and only if the PWM interface is safe to use */
3221 static int it87_check_pwm(struct device *dev)
3222 {
3223         struct it87_data *data = dev_get_drvdata(dev);
3224         /*
3225          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3226          * and polarity set to active low is sign that this is the case so we
3227          * disable pwm control to protect the user.
3228          */
3229         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3230
3231         if ((tmp & 0x87) == 0) {
3232                 if (fix_pwm_polarity) {
3233                         /*
3234                          * The user asks us to attempt a chip reconfiguration.
3235                          * This means switching to active high polarity and
3236                          * inverting all fan speed values.
3237                          */
3238                         int i;
3239                         u8 pwm[3];
3240
3241                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3242                                 pwm[i] = it87_read_value(data,
3243                                                          data->REG_PWM[i]);
3244
3245                         /*
3246                          * If any fan is in automatic pwm mode, the polarity
3247                          * might be correct, as suspicious as it seems, so we
3248                          * better don't change anything (but still disable the
3249                          * PWM interface).
3250                          */
3251                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3252                                 dev_info(dev,
3253                                          "Reconfiguring PWM to active high polarity\n");
3254                                 it87_write_value(data, IT87_REG_FAN_CTL,
3255                                                  tmp | 0x87);
3256                                 for (i = 0; i < 3; i++)
3257                                         it87_write_value(data,
3258                                                          data->REG_PWM[i],
3259                                                          0x7f & ~pwm[i]);
3260                                 return 1;
3261                         }
3262
3263                         dev_info(dev,
3264                                  "PWM configuration is too broken to be fixed\n");
3265                 }
3266
3267                 dev_info(dev,
3268                          "Detected broken BIOS defaults, disabling PWM interface\n");
3269                 return 0;
3270         } else if (fix_pwm_polarity) {
3271                 dev_info(dev,
3272                          "PWM configuration looks sane, won't touch\n");
3273         }
3274
3275         return 1;
3276 }
3277
3278 static int it87_probe(struct platform_device *pdev)
3279 {
3280         struct it87_data *data;
3281         struct resource *res;
3282         struct device *dev = &pdev->dev;
3283         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3284         int enable_pwm_interface;
3285         struct device *hwmon_dev;
3286
3287         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3288         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3289                                  DRVNAME)) {
3290                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3291                         (unsigned long)res->start,
3292                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3293                 return -EBUSY;
3294         }
3295
3296         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3297         if (!data)
3298                 return -ENOMEM;
3299
3300         data->addr = res->start;
3301         data->type = sio_data->type;
3302         data->features = it87_devices[sio_data->type].features;
3303         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3304         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3305         data->bank = 0xff;
3306
3307         /*
3308          * IT8705F Datasheet 0.4.1, 3h == Version G.
3309          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3310          * These are the first revisions with 16-bit tachometer support.
3311          */
3312         switch (data->type) {
3313         case it87:
3314                 if (sio_data->revision >= 0x03) {
3315                         data->features &= ~FEAT_OLD_AUTOPWM;
3316                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3317                 }
3318                 break;
3319         case it8712:
3320                 if (sio_data->revision >= 0x08) {
3321                         data->features &= ~FEAT_OLD_AUTOPWM;
3322                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3323                                           FEAT_FIVE_FANS;
3324                 }
3325                 break;
3326         default:
3327                 break;
3328         }
3329
3330         /* Now, we do the remaining detection. */
3331         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3332             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3333                 return -ENODEV;
3334
3335         platform_set_drvdata(pdev, data);
3336
3337         mutex_init(&data->update_lock);
3338
3339         /* Check PWM configuration */
3340         enable_pwm_interface = it87_check_pwm(dev);
3341
3342         /* Starting with IT8721F, we handle scaling of internal voltages */
3343         if (has_scaling(data)) {
3344                 if (sio_data->internal & BIT(0))
3345                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3346                 if (sio_data->internal & BIT(1))
3347                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3348                 if (sio_data->internal & BIT(2))
3349                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3350                 if (sio_data->internal & BIT(3))
3351                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3352         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3353                    sio_data->type == it8783) {
3354                 if (sio_data->internal & BIT(0))
3355                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3356                 if (sio_data->internal & BIT(1))
3357                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3358         }
3359
3360         data->has_temp = 0x07;
3361         if (sio_data->skip_temp & BIT(2)) {
3362                 if (sio_data->type == it8782 &&
3363                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3364                         data->has_temp &= ~BIT(2);
3365         }
3366
3367         data->in_internal = sio_data->internal;
3368         data->has_in = 0x3ff & ~sio_data->skip_in;
3369
3370         if (has_six_temp(data)) {
3371                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3372
3373                 /* Check for additional temperature sensors */
3374                 if ((reg & 0x03) >= 0x02)
3375                         data->has_temp |= BIT(3);
3376                 if (((reg >> 2) & 0x03) >= 0x02)
3377                         data->has_temp |= BIT(4);
3378                 if (((reg >> 4) & 0x03) >= 0x02)
3379                         data->has_temp |= BIT(5);
3380
3381                 /* Check for additional voltage sensors */
3382                 if ((reg & 0x03) == 0x01)
3383                         data->has_in |= BIT(10);
3384                 if (((reg >> 2) & 0x03) == 0x01)
3385                         data->has_in |= BIT(11);
3386                 if (((reg >> 4) & 0x03) == 0x01)
3387                         data->has_in |= BIT(12);
3388         }
3389
3390         data->has_beep = !!sio_data->beep_pin;
3391
3392         /* Initialize the IT87 chip */
3393         it87_init_device(pdev);
3394
3395         if (!sio_data->skip_vid) {
3396                 data->has_vid = true;
3397                 data->vrm = vid_which_vrm();
3398                 /* VID reading from Super-I/O config space if available */
3399                 data->vid = sio_data->vid_value;
3400         }
3401
3402         /* Prepare for sysfs hooks */
3403         data->groups[0] = &it87_group;
3404         data->groups[1] = &it87_group_in;
3405         data->groups[2] = &it87_group_temp;
3406         data->groups[3] = &it87_group_fan;
3407
3408         if (enable_pwm_interface) {
3409                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3410                 data->has_pwm &= ~sio_data->skip_pwm;
3411
3412                 data->groups[4] = &it87_group_pwm;
3413                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3414                         data->groups[5] = &it87_group_auto_pwm;
3415         }
3416
3417         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3418                                         it87_devices[sio_data->type].name,
3419                                         data, data->groups);
3420         return PTR_ERR_OR_ZERO(hwmon_dev);
3421 }
3422
3423 static struct platform_driver it87_driver = {
3424         .driver = {
3425                 .name   = DRVNAME,
3426         },
3427         .probe  = it87_probe,
3428 };
3429
3430 static int __init it87_device_add(int index, unsigned short address,
3431                                   const struct it87_sio_data *sio_data)
3432 {
3433         struct platform_device *pdev;
3434         struct resource res = {
3435                 .start  = address + IT87_EC_OFFSET,
3436                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3437                 .name   = DRVNAME,
3438                 .flags  = IORESOURCE_IO,
3439         };
3440         int err;
3441
3442         err = acpi_check_resource_conflict(&res);
3443         if (err)
3444                 return err;
3445
3446         pdev = platform_device_alloc(DRVNAME, address);
3447         if (!pdev)
3448                 return -ENOMEM;
3449
3450         err = platform_device_add_resources(pdev, &res, 1);
3451         if (err) {
3452                 pr_err("Device resource addition failed (%d)\n", err);
3453                 goto exit_device_put;
3454         }
3455
3456         err = platform_device_add_data(pdev, sio_data,
3457                                        sizeof(struct it87_sio_data));
3458         if (err) {
3459                 pr_err("Platform data allocation failed\n");
3460                 goto exit_device_put;
3461         }
3462
3463         err = platform_device_add(pdev);
3464         if (err) {
3465                 pr_err("Device addition failed (%d)\n", err);
3466                 goto exit_device_put;
3467         }
3468
3469         it87_pdev[index] = pdev;
3470         return 0;
3471
3472 exit_device_put:
3473         platform_device_put(pdev);
3474         return err;
3475 }
3476
3477 static int __init sm_it87_init(void)
3478 {
3479         int sioaddr[2] = { REG_2E, REG_4E };
3480         struct it87_sio_data sio_data;
3481         unsigned short isa_address;
3482         bool found = false;
3483         int i, err;
3484
3485         err = platform_driver_register(&it87_driver);
3486         if (err)
3487                 return err;
3488
3489         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3490                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3491                 isa_address = 0;
3492                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3493                 if (err || isa_address == 0)
3494                         continue;
3495
3496                 err = it87_device_add(i, isa_address, &sio_data);
3497                 if (err)
3498                         goto exit_dev_unregister;
3499                 found = true;
3500         }
3501
3502         if (!found) {
3503                 err = -ENODEV;
3504                 goto exit_unregister;
3505         }
3506         return 0;
3507
3508 exit_dev_unregister:
3509         /* NULL check handled by platform_device_unregister */
3510         platform_device_unregister(it87_pdev[0]);
3511 exit_unregister:
3512         platform_driver_unregister(&it87_driver);
3513         return err;
3514 }
3515
3516 static void __exit sm_it87_exit(void)
3517 {
3518         /* NULL check handled by platform_device_unregister */
3519         platform_device_unregister(it87_pdev[1]);
3520         platform_device_unregister(it87_pdev[0]);
3521         platform_driver_unregister(&it87_driver);
3522 }
3523
3524 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3525 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3526 module_param(update_vbat, bool, 0);
3527 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3528 module_param(fix_pwm_polarity, bool, 0);
3529 MODULE_PARM_DESC(fix_pwm_polarity,
3530                  "Force PWM polarity to active high (DANGEROUS)");
3531 MODULE_LICENSE("GPL");
3532
3533 module_init(sm_it87_init);
3534 module_exit(sm_it87_exit);