2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8607E Super I/O chip w/LPC interface
15 * IT8620E Super I/O chip w/LPC interface
16 * IT8622E Super I/O chip w/LPC interface
17 * IT8623E Super I/O chip w/LPC interface
18 * IT8628E Super I/O chip w/LPC interface
19 * IT8655E Super I/O chip w/LPC interface
20 * IT8665E Super I/O chip w/LPC interface
21 * IT8686E Super I/O chip w/LPC interface
22 * IT8705F Super I/O chip w/LPC interface
23 * IT8712F Super I/O chip w/LPC interface
24 * IT8716F Super I/O chip w/LPC interface
25 * IT8718F Super I/O chip w/LPC interface
26 * IT8720F Super I/O chip w/LPC interface
27 * IT8721F Super I/O chip w/LPC interface
28 * IT8726F Super I/O chip w/LPC interface
29 * IT8728F Super I/O chip w/LPC interface
30 * IT8732F Super I/O chip w/LPC interface
31 * IT8758E Super I/O chip w/LPC interface
32 * IT8771E Super I/O chip w/LPC interface
33 * IT8772E Super I/O chip w/LPC interface
34 * IT8781F Super I/O chip w/LPC interface
35 * IT8782F Super I/O chip w/LPC interface
36 * IT8783E/F Super I/O chip w/LPC interface
37 * IT8786E Super I/O chip w/LPC interface
38 * IT8790E Super I/O chip w/LPC interface
39 * IT8792E Super I/O chip w/LPC interface
40 * Sis950 A clone of the IT8705F
42 * Copyright (C) 2001 Chris Gauthron
43 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
45 * This program is free software; you can redistribute it and/or modify
46 * it under the terms of the GNU General Public License as published by
47 * the Free Software Foundation; either version 2 of the License, or
48 * (at your option) any later version.
50 * This program is distributed in the hope that it will be useful,
51 * but WITHOUT ANY WARRANTY; without even the implied warranty of
52 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53 * GNU General Public License for more details.
56 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
58 #include <linux/bitops.h>
59 #include <linux/module.h>
60 #include <linux/init.h>
61 #include <linux/slab.h>
62 #include <linux/jiffies.h>
63 #include <linux/platform_device.h>
64 #include <linux/hwmon.h>
65 #include <linux/hwmon-sysfs.h>
66 #include <linux/hwmon-vid.h>
67 #include <linux/err.h>
68 #include <linux/mutex.h>
69 #include <linux/sysfs.h>
70 #include <linux/string.h>
71 #include <linux/dmi.h>
72 #include <linux/acpi.h>
76 #define DRVNAME "it87"
78 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
79 it8771, it8772, it8781, it8782, it8783, it8786, it8790,
80 it8792, it8603, it8607, it8620, it8622, it8628, it8655, it8665,
83 static unsigned short force_id;
84 module_param(force_id, ushort, 0);
85 MODULE_PARM_DESC(force_id, "Override the detected device ID");
87 static struct platform_device *it87_pdev[2];
89 #define REG_2E 0x2e /* The register to read/write */
90 #define REG_4E 0x4e /* Secondary register to read/write */
92 #define DEV 0x07 /* Register: Logical device select */
93 #define PME 0x04 /* The device with the fan registers in it */
95 /* The device with the IT8718F/IT8720F VID value in it */
98 #define DEVID 0x20 /* Register: Device ID */
99 #define DEVREV 0x22 /* Register: Device Revision */
101 static inline int superio_inb(int ioreg, int reg)
104 return inb(ioreg + 1);
107 static inline void superio_outb(int ioreg, int reg, int val)
110 outb(val, ioreg + 1);
113 static int superio_inw(int ioreg, int reg)
118 val = inb(ioreg + 1) << 8;
120 val |= inb(ioreg + 1);
124 static inline void superio_select(int ioreg, int ldn)
127 outb(ldn, ioreg + 1);
130 static inline int superio_enter(int ioreg)
133 * Try to reserve ioreg and ioreg + 1 for exclusive access.
135 if (!request_muxed_region(ioreg, 2, DRVNAME))
141 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
145 static inline void superio_exit(int ioreg)
148 outb(0x02, ioreg + 1);
149 release_region(ioreg, 2);
152 /* Logical device 4 registers */
153 #define IT8712F_DEVID 0x8712
154 #define IT8705F_DEVID 0x8705
155 #define IT8716F_DEVID 0x8716
156 #define IT8718F_DEVID 0x8718
157 #define IT8720F_DEVID 0x8720
158 #define IT8721F_DEVID 0x8721
159 #define IT8726F_DEVID 0x8726
160 #define IT8728F_DEVID 0x8728
161 #define IT8732F_DEVID 0x8732
162 #define IT8792E_DEVID 0x8733
163 #define IT8771E_DEVID 0x8771
164 #define IT8772E_DEVID 0x8772
165 #define IT8781F_DEVID 0x8781
166 #define IT8782F_DEVID 0x8782
167 #define IT8783E_DEVID 0x8783
168 #define IT8786E_DEVID 0x8786
169 #define IT8790E_DEVID 0x8790
170 #define IT8603E_DEVID 0x8603
171 #define IT8607E_DEVID 0x8607
172 #define IT8620E_DEVID 0x8620
173 #define IT8622E_DEVID 0x8622
174 #define IT8623E_DEVID 0x8623
175 #define IT8628E_DEVID 0x8628
176 #define IT8655E_DEVID 0x8655
177 #define IT8665E_DEVID 0x8665
178 #define IT8686E_DEVID 0x8686
179 #define IT87_ACT_REG 0x30
180 #define IT87_BASE_REG 0x60
182 /* Logical device 7 registers (IT8712F and later) */
183 #define IT87_SIO_GPIO1_REG 0x25
184 #define IT87_SIO_GPIO2_REG 0x26
185 #define IT87_SIO_GPIO3_REG 0x27
186 #define IT87_SIO_GPIO4_REG 0x28
187 #define IT87_SIO_GPIO5_REG 0x29
188 #define IT87_SIO_GPIO9_REG 0xd3
189 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
190 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
191 #define IT87_SIO_PINX4_REG 0x2d /* Pin selection */
192 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
193 #define IT87_SIO_VID_REG 0xfc /* VID value */
194 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
196 /* Update battery voltage after every reading if true */
197 static bool update_vbat;
199 /* Not all BIOSes properly configure the PWM registers */
200 static bool fix_pwm_polarity;
202 /* Many IT87 constants specified below */
204 /* Length of ISA address segment */
205 #define IT87_EXTENT 8
207 /* Length of ISA address segment for Environmental Controller */
208 #define IT87_EC_EXTENT 2
210 /* Offset of EC registers from ISA base address */
211 #define IT87_EC_OFFSET 5
213 /* Where are the ISA address/data registers relative to the EC base address */
214 #define IT87_ADDR_REG_OFFSET 0
215 #define IT87_DATA_REG_OFFSET 1
217 /*----- The IT87 registers -----*/
219 #define IT87_REG_CONFIG 0x00
221 #define IT87_REG_ALARM1 0x01
222 #define IT87_REG_ALARM2 0x02
223 #define IT87_REG_ALARM3 0x03
225 #define IT87_REG_BANK 0x06
228 * The IT8718F and IT8720F have the VID value in a different register, in
229 * Super-I/O configuration space.
231 #define IT87_REG_VID 0x0a
233 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
234 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
237 #define IT87_REG_FAN_DIV 0x0b
238 #define IT87_REG_FAN_16BIT 0x0c
242 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
243 * - up to 6 temp (1 to 6)
244 * - up to 6 fan (1 to 6)
247 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
248 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
249 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
250 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
252 static const u8 IT87_REG_FAN_8665[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
253 static const u8 IT87_REG_FAN_MIN_8665[] =
254 { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
255 static const u8 IT87_REG_FANX_8665[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
256 static const u8 IT87_REG_FANX_MIN_8665[] =
257 { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
259 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
261 #define IT87_REG_FAN_MAIN_CTRL 0x13
262 #define IT87_REG_FAN_CTL 0x14
264 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
265 static const u8 IT87_REG_PWM_8665[] = { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
267 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
269 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
270 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
272 #define IT87_REG_TEMP(nr) (0x29 + (nr))
274 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
275 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
276 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
277 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
279 #define IT87_REG_VIN_ENABLE 0x50
280 #define IT87_REG_TEMP_ENABLE 0x51
281 #define IT87_REG_TEMP_EXTRA 0x55
282 #define IT87_REG_BEEP_ENABLE 0x5c
284 #define IT87_REG_CHIPID 0x58
286 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
288 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
289 #define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
291 #define IT87_REG_TEMP456_ENABLE 0x77
293 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
294 #define NUM_VIN_LIMIT 8
296 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
297 #define NUM_TEMP_LIMIT 3
298 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
299 #define NUM_FAN_DIV 3
300 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
301 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
303 struct it87_devices {
305 const char * const suffix;
311 #define FEAT_12MV_ADC BIT(0)
312 #define FEAT_NEWER_AUTOPWM BIT(1)
313 #define FEAT_OLD_AUTOPWM BIT(2)
314 #define FEAT_16BIT_FANS BIT(3)
315 #define FEAT_TEMP_OFFSET BIT(4)
316 #define FEAT_TEMP_PECI BIT(5)
317 #define FEAT_TEMP_OLD_PECI BIT(6)
318 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
319 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
320 #define FEAT_VID BIT(9) /* Set if chip supports VID */
321 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
322 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
323 #define FEAT_10_9MV_ADC BIT(12)
324 #define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
325 #define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
326 #define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
327 #define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
328 #define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
329 #define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
330 #define FEAT_FOUR_FANS BIT(19) /* Supports four fans */
331 #define FEAT_FOUR_PWM BIT(20) /* Supports four fan controls */
332 #define FEAT_BANK_SEL BIT(21) /* Chip has multi-bank support */
333 #define FEAT_SCALING BIT(22) /* Internal voltage scaling */
334 #define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */
336 static const struct it87_devices it87_devices[] = {
340 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
341 /* may need to overwrite */
346 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
347 /* may need to overwrite */
352 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
353 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
359 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
360 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
361 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
362 .old_peci_mask = 0x4,
367 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
368 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
369 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
370 .old_peci_mask = 0x4,
375 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
376 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
377 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
378 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
380 .old_peci_mask = 0x02, /* Actually reports PCH */
385 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
386 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
387 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
394 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
395 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
396 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
397 | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
399 .old_peci_mask = 0x02, /* Actually reports PCH */
404 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
405 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
406 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
407 /* PECI: guesswork */
409 /* 16 bit fans (OHM) */
410 /* three fans, always 16 bit (guesswork) */
416 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
417 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
418 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
419 /* PECI (coreboot) */
420 /* 12mV ADC (HWSensors4, OHM) */
421 /* 16 bit fans (HWSensors4, OHM) */
422 /* three fans, always 16 bit (datasheet) */
428 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
429 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
431 .old_peci_mask = 0x4,
436 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
437 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
439 .old_peci_mask = 0x4,
444 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
445 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
447 .old_peci_mask = 0x4,
452 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
453 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
454 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
460 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
461 | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
462 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
468 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
469 | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
470 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
476 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
477 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
478 | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
484 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
485 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
486 | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
493 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
494 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
495 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
496 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
503 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
504 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
505 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
506 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
512 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
513 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
514 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
515 | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
522 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
523 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_AVCC3
524 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
530 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
531 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_AVCC3
532 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
533 | FEAT_SIX_PWM | FEAT_BANK_SEL,
539 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
540 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
541 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
542 | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
547 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
548 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
549 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
550 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
551 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
552 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
553 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
554 ((data)->peci_mask & BIT(nr)))
555 #define has_temp_old_peci(data, nr) \
556 (((data)->features & FEAT_TEMP_OLD_PECI) && \
557 ((data)->old_peci_mask & BIT(nr)))
558 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
559 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
561 #define has_vid(data) ((data)->features & FEAT_VID)
562 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
563 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
564 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
565 #define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM \
567 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
568 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
569 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
570 #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
571 #define has_four_fans(data) ((data)->features & (FEAT_FOUR_FANS | \
574 #define has_four_pwm(data) ((data)->features & (FEAT_FOUR_PWM | \
577 #define has_bank_sel(data) ((data)->features & FEAT_BANK_SEL)
578 #define has_scaling(data) ((data)->features & FEAT_SCALING)
579 #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF)
581 struct it87_sio_data {
583 /* Values read from Super-I/O config space */
587 u8 internal; /* Internal sensors can be labeled */
588 /* Features skipped based on config or DMI */
597 * For each registered chip, we need to keep some data in memory.
598 * The structure is dynamically allocated.
601 const struct attribute_group *groups[7];
610 const u8 *REG_FAN_MIN;
611 const u8 *REG_FANX_MIN;
617 struct mutex update_lock;
618 char valid; /* !=0 if following fields are valid */
619 unsigned long last_updated; /* In jiffies */
621 u16 in_scaled; /* Internal voltage sensors are scaled */
622 u16 in_internal; /* Bitfield, internal sensors (for labels) */
623 u16 has_in; /* Bitfield, voltage sensors enabled */
624 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
625 u8 has_fan; /* Bitfield, fans enabled */
626 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
627 u8 has_temp; /* Bitfield, temp sensors enabled */
628 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
629 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
630 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
631 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
632 bool has_vid; /* True if VID supported */
633 u8 vid; /* Register encoding, combined */
635 u32 alarms; /* Register encoding, combined */
636 bool has_beep; /* true if beep supported */
637 u8 beeps; /* Register encoding */
638 u8 fan_main_ctrl; /* Register value */
639 u8 fan_ctl; /* Register value */
642 * The following 3 arrays correspond to the same registers up to
643 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
644 * 7, and we want to preserve settings on mode changes, so we have
645 * to track all values separately.
646 * Starting with the IT8721F, the manual PWM duty cycles are stored
647 * in separate registers (8-bit values), so the separate tracking
648 * is no longer needed, but it is still done to keep the driver
651 u8 has_pwm; /* Bitfield, pwm control enabled */
652 u8 pwm_ctrl[NUM_PWM]; /* Register value */
653 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
654 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
656 /* Automatic fan speed control registers */
657 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
658 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
661 static int adc_lsb(const struct it87_data *data, int nr)
665 if (has_12mv_adc(data))
667 else if (has_10_9mv_adc(data))
671 if (data->in_scaled & BIT(nr))
676 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
678 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
679 return clamp_val(val, 0, 255);
682 static int in_from_reg(const struct it87_data *data, int nr, int val)
684 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
687 static inline u8 FAN_TO_REG(long rpm, int div)
691 rpm = clamp_val(rpm, 1, 1000000);
692 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
695 static inline u16 FAN16_TO_REG(long rpm)
699 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
702 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
703 1350000 / ((val) * (div)))
704 /* The divider is fixed to 2 in 16-bit mode */
705 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
706 1350000 / ((val) * 2))
708 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
709 ((val) + 500) / 1000), -128, 127))
710 #define TEMP_FROM_REG(val) ((val) * 1000)
712 static u8 pwm_to_reg(const struct it87_data *data, long val)
714 if (has_newer_autopwm(data))
720 static int pwm_from_reg(const struct it87_data *data, u8 reg)
722 if (has_newer_autopwm(data))
725 return (reg & 0x7f) << 1;
728 static int DIV_TO_REG(int val)
732 while (answer < 7 && (val >>= 1))
737 #define DIV_FROM_REG(val) BIT(val)
740 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
741 * depending on the chip type, to calculate the actual PWM frequency.
743 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
744 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
745 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
746 * sometimes just one. It is unknown if this is a datasheet error or real,
747 * so this is ignored for now.
749 static const unsigned int pwm_freq[8] = {
760 static int _it87_read_value(struct it87_data *data, u8 reg)
762 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
763 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
766 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
768 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
769 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
772 static void it87_set_bank(struct it87_data *data, u8 bank)
774 if (has_bank_sel(data) && bank != data->bank) {
775 u8 breg = _it87_read_value(data, IT87_REG_BANK);
780 _it87_write_value(data, IT87_REG_BANK, breg);
785 * Must be called with data->update_lock held, except during initialization.
786 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
787 * would slow down the IT87 access and should not be necessary.
789 static int it87_read_value(struct it87_data *data, u16 reg)
791 it87_set_bank(data, reg >> 8);
792 return _it87_read_value(data, reg & 0xff);
796 * Must be called with data->update_lock held, except during initialization.
797 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
798 * would slow down the IT87 access and should not be necessary.
800 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
802 it87_set_bank(data, reg >> 8);
803 _it87_write_value(data, reg & 0xff, value);
806 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
808 data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
809 if (has_newer_autopwm(data)) {
810 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
811 data->pwm_duty[nr] = it87_read_value(data,
812 IT87_REG_PWM_DUTY[nr]);
814 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
815 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
816 else /* Manual mode */
817 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
820 if (has_old_autopwm(data)) {
823 for (i = 0; i < 5 ; i++)
824 data->auto_temp[nr][i] = it87_read_value(data,
825 IT87_REG_AUTO_TEMP(nr, i));
826 for (i = 0; i < 3 ; i++)
827 data->auto_pwm[nr][i] = it87_read_value(data,
828 IT87_REG_AUTO_PWM(nr, i));
829 } else if (has_newer_autopwm(data)) {
833 * 0: temperature hysteresis (base + 5)
834 * 1: fan off temperature (base + 0)
835 * 2: fan start temperature (base + 1)
836 * 3: fan max temperature (base + 2)
838 data->auto_temp[nr][0] =
839 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
841 for (i = 0; i < 3 ; i++)
842 data->auto_temp[nr][i + 1] =
843 it87_read_value(data,
844 IT87_REG_AUTO_TEMP(nr, i));
846 * 0: start pwm value (base + 3)
847 * 1: pwm slope (base + 4, 1/8th pwm)
849 data->auto_pwm[nr][0] =
850 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
851 data->auto_pwm[nr][1] =
852 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
856 static struct it87_data *it87_update_device(struct device *dev)
858 struct it87_data *data = dev_get_drvdata(dev);
861 mutex_lock(&data->update_lock);
863 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
867 * Cleared after each update, so reenable. Value
868 * returned by this read will be previous value
870 it87_write_value(data, IT87_REG_CONFIG,
871 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
873 for (i = 0; i < NUM_VIN; i++) {
874 if (!(data->has_in & BIT(i)))
878 it87_read_value(data, IT87_REG_VIN[i]);
880 /* VBAT and AVCC don't have limit registers */
881 if (i >= NUM_VIN_LIMIT)
885 it87_read_value(data, IT87_REG_VIN_MIN(i));
887 it87_read_value(data, IT87_REG_VIN_MAX(i));
890 for (i = 0; i < NUM_FAN; i++) {
891 /* Skip disabled fans */
892 if (!(data->has_fan & BIT(i)))
896 it87_read_value(data, data->REG_FAN_MIN[i]);
897 data->fan[i][0] = it87_read_value(data,
899 /* Add high byte if in 16-bit mode */
900 if (has_16bit_fans(data)) {
901 data->fan[i][0] |= it87_read_value(data,
902 data->REG_FANX[i]) << 8;
903 data->fan[i][1] |= it87_read_value(data,
904 data->REG_FANX_MIN[i]) << 8;
907 for (i = 0; i < NUM_TEMP; i++) {
908 if (!(data->has_temp & BIT(i)))
911 it87_read_value(data, IT87_REG_TEMP(i));
913 if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
915 it87_read_value(data,
916 IT87_REG_TEMP_OFFSET[i]);
918 if (i >= NUM_TEMP_LIMIT)
922 it87_read_value(data, IT87_REG_TEMP_LOW(i));
924 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
927 /* Newer chips don't have clock dividers */
928 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
929 i = it87_read_value(data, IT87_REG_FAN_DIV);
930 data->fan_div[0] = i & 0x07;
931 data->fan_div[1] = (i >> 3) & 0x07;
932 data->fan_div[2] = (i & 0x40) ? 3 : 1;
936 it87_read_value(data, IT87_REG_ALARM1) |
937 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
938 (it87_read_value(data, IT87_REG_ALARM3) << 16);
939 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
941 data->fan_main_ctrl = it87_read_value(data,
942 IT87_REG_FAN_MAIN_CTRL);
943 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
944 for (i = 0; i < NUM_PWM; i++) {
945 if (!(data->has_pwm & BIT(i)))
947 it87_update_pwm_ctrl(data, i);
950 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
951 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
953 * The IT8705F does not have VID capability.
954 * The IT8718F and later don't use IT87_REG_VID for the
957 if (data->type == it8712 || data->type == it8716) {
958 data->vid = it87_read_value(data, IT87_REG_VID);
960 * The older IT8712F revisions had only 5 VID pins,
961 * but we assume it is always safe to read 6 bits.
965 data->last_updated = jiffies;
969 mutex_unlock(&data->update_lock);
974 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
977 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
978 struct it87_data *data = it87_update_device(dev);
979 int index = sattr->index;
982 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
985 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
986 const char *buf, size_t count)
988 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
989 struct it87_data *data = dev_get_drvdata(dev);
990 int index = sattr->index;
994 if (kstrtoul(buf, 10, &val) < 0)
997 mutex_lock(&data->update_lock);
998 data->in[nr][index] = in_to_reg(data, nr, val);
999 it87_write_value(data,
1000 index == 1 ? IT87_REG_VIN_MIN(nr)
1001 : IT87_REG_VIN_MAX(nr),
1002 data->in[nr][index]);
1003 mutex_unlock(&data->update_lock);
1007 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1008 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1010 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1013 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1014 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1016 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1019 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1020 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1022 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1025 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1026 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1028 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1031 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1032 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1034 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1037 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1038 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1040 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1043 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1044 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1046 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1049 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1050 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1052 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1055 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1056 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1057 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1058 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1059 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1061 /* Up to 6 temperatures */
1062 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1065 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1067 int index = sattr->index;
1068 struct it87_data *data = it87_update_device(dev);
1070 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1073 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1074 const char *buf, size_t count)
1076 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1078 int index = sattr->index;
1079 struct it87_data *data = dev_get_drvdata(dev);
1083 if (kstrtol(buf, 10, &val) < 0)
1086 mutex_lock(&data->update_lock);
1091 reg = IT87_REG_TEMP_LOW(nr);
1094 reg = IT87_REG_TEMP_HIGH(nr);
1097 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1098 if (!(regval & 0x80)) {
1100 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1103 reg = IT87_REG_TEMP_OFFSET[nr];
1107 data->temp[nr][index] = TEMP_TO_REG(val);
1108 it87_write_value(data, reg, data->temp[nr][index]);
1109 mutex_unlock(&data->update_lock);
1113 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1114 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1116 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1118 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1120 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1121 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1123 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1125 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1127 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1128 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1130 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1132 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1134 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1135 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1136 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1138 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1141 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1142 int nr = sensor_attr->index;
1143 struct it87_data *data = it87_update_device(dev);
1144 u8 reg = data->sensor; /* In case value is updated while used */
1145 u8 extra = data->extra;
1147 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1148 (has_temp_old_peci(data, nr) && (extra & 0x80)))
1149 return sprintf(buf, "6\n"); /* Intel PECI */
1150 if (reg & (1 << nr))
1151 return sprintf(buf, "3\n"); /* thermal diode */
1152 if (reg & (8 << nr))
1153 return sprintf(buf, "4\n"); /* thermistor */
1154 return sprintf(buf, "0\n"); /* disabled */
1157 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1158 const char *buf, size_t count)
1160 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1161 int nr = sensor_attr->index;
1163 struct it87_data *data = dev_get_drvdata(dev);
1167 if (kstrtol(buf, 10, &val) < 0)
1170 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1173 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1175 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1176 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1178 if (val == 2) { /* backwards compatibility */
1180 "Sensor type 2 is deprecated, please use 4 instead\n");
1183 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1188 else if (has_temp_peci(data, nr) && val == 6)
1189 reg |= (nr + 1) << 6;
1190 else if (has_temp_old_peci(data, nr) && val == 6)
1195 mutex_lock(&data->update_lock);
1197 data->extra = extra;
1198 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1199 if (has_temp_old_peci(data, nr))
1200 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1201 data->valid = 0; /* Force cache refresh */
1202 mutex_unlock(&data->update_lock);
1206 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1208 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1210 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1215 static int pwm_mode(const struct it87_data *data, int nr)
1217 if (has_fanctl_onoff(data) && nr < 3 &&
1218 !(data->fan_main_ctrl & BIT(nr)))
1219 return 0; /* Full speed */
1220 if (data->pwm_ctrl[nr] & 0x80)
1221 return 2; /* Automatic mode */
1222 if ((!has_fanctl_onoff(data) || nr >= 3) &&
1223 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1224 return 0; /* Full speed */
1226 return 1; /* Manual mode */
1229 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1232 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1234 int index = sattr->index;
1236 struct it87_data *data = it87_update_device(dev);
1238 speed = has_16bit_fans(data) ?
1239 FAN16_FROM_REG(data->fan[nr][index]) :
1240 FAN_FROM_REG(data->fan[nr][index],
1241 DIV_FROM_REG(data->fan_div[nr]));
1242 return sprintf(buf, "%d\n", speed);
1245 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1248 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1249 struct it87_data *data = it87_update_device(dev);
1250 int nr = sensor_attr->index;
1252 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1255 static ssize_t show_pwm_enable(struct device *dev,
1256 struct device_attribute *attr, char *buf)
1258 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1259 struct it87_data *data = it87_update_device(dev);
1260 int nr = sensor_attr->index;
1262 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1265 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1268 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1269 struct it87_data *data = it87_update_device(dev);
1270 int nr = sensor_attr->index;
1272 return sprintf(buf, "%d\n",
1273 pwm_from_reg(data, data->pwm_duty[nr]));
1276 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1279 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1280 struct it87_data *data = it87_update_device(dev);
1281 int nr = sensor_attr->index;
1285 if (has_pwm_freq2(data) && nr == 1)
1286 index = (data->extra >> 4) & 0x07;
1288 index = (data->fan_ctl >> 4) & 0x07;
1290 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1292 return sprintf(buf, "%u\n", freq);
1295 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1296 const char *buf, size_t count)
1298 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1300 int index = sattr->index;
1302 struct it87_data *data = dev_get_drvdata(dev);
1306 if (kstrtol(buf, 10, &val) < 0)
1309 mutex_lock(&data->update_lock);
1311 if (has_16bit_fans(data)) {
1312 data->fan[nr][index] = FAN16_TO_REG(val);
1313 it87_write_value(data, data->REG_FAN_MIN[nr],
1314 data->fan[nr][index] & 0xff);
1315 it87_write_value(data, data->REG_FANX_MIN[nr],
1316 data->fan[nr][index] >> 8);
1318 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1321 data->fan_div[nr] = reg & 0x07;
1324 data->fan_div[nr] = (reg >> 3) & 0x07;
1327 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1330 data->fan[nr][index] =
1331 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1332 it87_write_value(data, data->REG_FAN_MIN[nr],
1333 data->fan[nr][index]);
1336 mutex_unlock(&data->update_lock);
1340 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1341 const char *buf, size_t count)
1343 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1344 struct it87_data *data = dev_get_drvdata(dev);
1345 int nr = sensor_attr->index;
1350 if (kstrtoul(buf, 10, &val) < 0)
1353 mutex_lock(&data->update_lock);
1354 old = it87_read_value(data, IT87_REG_FAN_DIV);
1356 /* Save fan min limit */
1357 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1362 data->fan_div[nr] = DIV_TO_REG(val);
1366 data->fan_div[nr] = 1;
1368 data->fan_div[nr] = 3;
1371 val |= (data->fan_div[0] & 0x07);
1372 val |= (data->fan_div[1] & 0x07) << 3;
1373 if (data->fan_div[2] == 3)
1375 it87_write_value(data, IT87_REG_FAN_DIV, val);
1377 /* Restore fan min limit */
1378 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1379 it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1381 mutex_unlock(&data->update_lock);
1385 /* Returns 0 if OK, -EINVAL otherwise */
1386 static int check_trip_points(struct device *dev, int nr)
1388 const struct it87_data *data = dev_get_drvdata(dev);
1391 if (has_old_autopwm(data)) {
1392 for (i = 0; i < 3; i++) {
1393 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1396 for (i = 0; i < 2; i++) {
1397 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1400 } else if (has_newer_autopwm(data)) {
1401 for (i = 1; i < 3; i++) {
1402 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1409 "Inconsistent trip points, not switching to automatic mode\n");
1410 dev_err(dev, "Adjust the trip points and try again\n");
1415 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1416 const char *buf, size_t count)
1418 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1419 struct it87_data *data = dev_get_drvdata(dev);
1420 int nr = sensor_attr->index;
1423 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1426 /* Check trip points before switching to automatic mode */
1428 if (check_trip_points(dev, nr) < 0)
1432 mutex_lock(&data->update_lock);
1435 if (nr < 3 && has_fanctl_onoff(data)) {
1437 /* make sure the fan is on when in on/off mode */
1438 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1439 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1440 /* set on/off mode */
1441 data->fan_main_ctrl &= ~BIT(nr);
1442 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1443 data->fan_main_ctrl);
1447 /* No on/off mode, set maximum pwm value */
1448 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1449 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1450 data->pwm_duty[nr]);
1451 /* and set manual mode */
1452 if (has_newer_autopwm(data)) {
1453 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1454 data->pwm_temp_map[nr];
1456 ctrl = data->pwm_duty[nr];
1458 data->pwm_ctrl[nr] = ctrl;
1459 it87_write_value(data, data->REG_PWM[nr], ctrl);
1464 if (has_newer_autopwm(data)) {
1465 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1466 data->pwm_temp_map[nr];
1470 ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1472 data->pwm_ctrl[nr] = ctrl;
1473 it87_write_value(data, data->REG_PWM[nr], ctrl);
1475 if (has_fanctl_onoff(data) && nr < 3) {
1476 /* set SmartGuardian mode */
1477 data->fan_main_ctrl |= BIT(nr);
1478 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1479 data->fan_main_ctrl);
1483 mutex_unlock(&data->update_lock);
1487 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1488 const char *buf, size_t count)
1490 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1491 struct it87_data *data = dev_get_drvdata(dev);
1492 int nr = sensor_attr->index;
1495 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1498 mutex_lock(&data->update_lock);
1499 it87_update_pwm_ctrl(data, nr);
1500 if (has_newer_autopwm(data)) {
1502 * If we are in automatic mode, the PWM duty cycle register
1503 * is read-only so we can't write the value.
1505 if (data->pwm_ctrl[nr] & 0x80) {
1506 mutex_unlock(&data->update_lock);
1509 data->pwm_duty[nr] = pwm_to_reg(data, val);
1510 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1511 data->pwm_duty[nr]);
1513 data->pwm_duty[nr] = pwm_to_reg(data, val);
1515 * If we are in manual mode, write the duty cycle immediately;
1516 * otherwise, just store it for later use.
1518 if (!(data->pwm_ctrl[nr] & 0x80)) {
1519 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1520 it87_write_value(data, data->REG_PWM[nr],
1521 data->pwm_ctrl[nr]);
1524 mutex_unlock(&data->update_lock);
1528 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1529 const char *buf, size_t count)
1531 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1532 struct it87_data *data = dev_get_drvdata(dev);
1533 int nr = sensor_attr->index;
1537 if (kstrtoul(buf, 10, &val) < 0)
1540 val = clamp_val(val, 0, 1000000);
1541 val *= has_newer_autopwm(data) ? 256 : 128;
1543 /* Search for the nearest available frequency */
1544 for (i = 0; i < 7; i++) {
1545 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1549 mutex_lock(&data->update_lock);
1551 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1552 data->fan_ctl |= i << 4;
1553 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1555 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1556 data->extra |= i << 4;
1557 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1559 mutex_unlock(&data->update_lock);
1564 static ssize_t show_pwm_temp_map(struct device *dev,
1565 struct device_attribute *attr, char *buf)
1567 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1568 struct it87_data *data = it87_update_device(dev);
1569 int nr = sensor_attr->index;
1572 map = data->pwm_temp_map[nr];
1574 map = 0; /* Should never happen */
1575 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1578 return sprintf(buf, "%d\n", (int)BIT(map));
1581 static ssize_t set_pwm_temp_map(struct device *dev,
1582 struct device_attribute *attr, const char *buf,
1585 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1586 struct it87_data *data = dev_get_drvdata(dev);
1587 int nr = sensor_attr->index;
1591 if (kstrtol(buf, 10, &val) < 0)
1611 mutex_lock(&data->update_lock);
1612 it87_update_pwm_ctrl(data, nr);
1613 data->pwm_temp_map[nr] = reg;
1615 * If we are in automatic mode, write the temp mapping immediately;
1616 * otherwise, just store it for later use.
1618 if (data->pwm_ctrl[nr] & 0x80) {
1619 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1620 data->pwm_temp_map[nr];
1621 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1623 mutex_unlock(&data->update_lock);
1627 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1630 struct it87_data *data = it87_update_device(dev);
1631 struct sensor_device_attribute_2 *sensor_attr =
1632 to_sensor_dev_attr_2(attr);
1633 int nr = sensor_attr->nr;
1634 int point = sensor_attr->index;
1636 return sprintf(buf, "%d\n",
1637 pwm_from_reg(data, data->auto_pwm[nr][point]));
1640 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1641 const char *buf, size_t count)
1643 struct it87_data *data = dev_get_drvdata(dev);
1644 struct sensor_device_attribute_2 *sensor_attr =
1645 to_sensor_dev_attr_2(attr);
1646 int nr = sensor_attr->nr;
1647 int point = sensor_attr->index;
1651 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1654 mutex_lock(&data->update_lock);
1655 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1656 if (has_newer_autopwm(data))
1657 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1659 regaddr = IT87_REG_AUTO_PWM(nr, point);
1660 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1661 mutex_unlock(&data->update_lock);
1665 static ssize_t show_auto_pwm_slope(struct device *dev,
1666 struct device_attribute *attr, char *buf)
1668 struct it87_data *data = it87_update_device(dev);
1669 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1670 int nr = sensor_attr->index;
1672 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1675 static ssize_t set_auto_pwm_slope(struct device *dev,
1676 struct device_attribute *attr,
1677 const char *buf, size_t count)
1679 struct it87_data *data = dev_get_drvdata(dev);
1680 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1681 int nr = sensor_attr->index;
1684 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1687 mutex_lock(&data->update_lock);
1688 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1689 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1690 data->auto_pwm[nr][1]);
1691 mutex_unlock(&data->update_lock);
1695 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1698 struct it87_data *data = it87_update_device(dev);
1699 struct sensor_device_attribute_2 *sensor_attr =
1700 to_sensor_dev_attr_2(attr);
1701 int nr = sensor_attr->nr;
1702 int point = sensor_attr->index;
1705 if (has_old_autopwm(data) || point)
1706 reg = data->auto_temp[nr][point];
1708 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1710 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1713 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1714 const char *buf, size_t count)
1716 struct it87_data *data = dev_get_drvdata(dev);
1717 struct sensor_device_attribute_2 *sensor_attr =
1718 to_sensor_dev_attr_2(attr);
1719 int nr = sensor_attr->nr;
1720 int point = sensor_attr->index;
1724 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1727 mutex_lock(&data->update_lock);
1728 if (has_newer_autopwm(data) && !point) {
1729 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1730 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1731 data->auto_temp[nr][0] = reg;
1732 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1734 reg = TEMP_TO_REG(val);
1735 data->auto_temp[nr][point] = reg;
1736 if (has_newer_autopwm(data))
1738 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1740 mutex_unlock(&data->update_lock);
1744 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1745 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1747 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1750 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1751 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1753 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1756 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1757 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1759 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1762 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1763 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1766 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1767 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1770 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1771 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1774 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1775 show_pwm_enable, set_pwm_enable, 0);
1776 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1777 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1779 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1780 show_pwm_temp_map, set_pwm_temp_map, 0);
1781 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1782 show_auto_pwm, set_auto_pwm, 0, 0);
1783 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1784 show_auto_pwm, set_auto_pwm, 0, 1);
1785 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1786 show_auto_pwm, set_auto_pwm, 0, 2);
1787 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1788 show_auto_pwm, NULL, 0, 3);
1789 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1790 show_auto_temp, set_auto_temp, 0, 1);
1791 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1792 show_auto_temp, set_auto_temp, 0, 0);
1793 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1794 show_auto_temp, set_auto_temp, 0, 2);
1795 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1796 show_auto_temp, set_auto_temp, 0, 3);
1797 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1798 show_auto_temp, set_auto_temp, 0, 4);
1799 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1800 show_auto_pwm, set_auto_pwm, 0, 0);
1801 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1802 show_auto_pwm_slope, set_auto_pwm_slope, 0);
1804 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1805 show_pwm_enable, set_pwm_enable, 1);
1806 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1807 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1808 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1809 show_pwm_temp_map, set_pwm_temp_map, 1);
1810 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1811 show_auto_pwm, set_auto_pwm, 1, 0);
1812 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1813 show_auto_pwm, set_auto_pwm, 1, 1);
1814 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1815 show_auto_pwm, set_auto_pwm, 1, 2);
1816 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1817 show_auto_pwm, NULL, 1, 3);
1818 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1819 show_auto_temp, set_auto_temp, 1, 1);
1820 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1821 show_auto_temp, set_auto_temp, 1, 0);
1822 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1823 show_auto_temp, set_auto_temp, 1, 2);
1824 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1825 show_auto_temp, set_auto_temp, 1, 3);
1826 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1827 show_auto_temp, set_auto_temp, 1, 4);
1828 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1829 show_auto_pwm, set_auto_pwm, 1, 0);
1830 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1831 show_auto_pwm_slope, set_auto_pwm_slope, 1);
1833 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1834 show_pwm_enable, set_pwm_enable, 2);
1835 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1836 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1837 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1838 show_pwm_temp_map, set_pwm_temp_map, 2);
1839 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1840 show_auto_pwm, set_auto_pwm, 2, 0);
1841 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1842 show_auto_pwm, set_auto_pwm, 2, 1);
1843 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1844 show_auto_pwm, set_auto_pwm, 2, 2);
1845 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1846 show_auto_pwm, NULL, 2, 3);
1847 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1848 show_auto_temp, set_auto_temp, 2, 1);
1849 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1850 show_auto_temp, set_auto_temp, 2, 0);
1851 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1852 show_auto_temp, set_auto_temp, 2, 2);
1853 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1854 show_auto_temp, set_auto_temp, 2, 3);
1855 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1856 show_auto_temp, set_auto_temp, 2, 4);
1857 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1858 show_auto_pwm, set_auto_pwm, 2, 0);
1859 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1860 show_auto_pwm_slope, set_auto_pwm_slope, 2);
1862 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1863 show_pwm_enable, set_pwm_enable, 3);
1864 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1865 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1866 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1867 show_pwm_temp_map, set_pwm_temp_map, 3);
1868 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1869 show_auto_temp, set_auto_temp, 2, 1);
1870 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1871 show_auto_temp, set_auto_temp, 2, 0);
1872 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1873 show_auto_temp, set_auto_temp, 2, 2);
1874 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1875 show_auto_temp, set_auto_temp, 2, 3);
1876 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1877 show_auto_pwm, set_auto_pwm, 3, 0);
1878 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1879 show_auto_pwm_slope, set_auto_pwm_slope, 3);
1881 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1882 show_pwm_enable, set_pwm_enable, 4);
1883 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1884 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1885 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1886 show_pwm_temp_map, set_pwm_temp_map, 4);
1887 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1888 show_auto_temp, set_auto_temp, 2, 1);
1889 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1890 show_auto_temp, set_auto_temp, 2, 0);
1891 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1892 show_auto_temp, set_auto_temp, 2, 2);
1893 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1894 show_auto_temp, set_auto_temp, 2, 3);
1895 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1896 show_auto_pwm, set_auto_pwm, 4, 0);
1897 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1898 show_auto_pwm_slope, set_auto_pwm_slope, 4);
1900 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1901 show_pwm_enable, set_pwm_enable, 5);
1902 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1903 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1904 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1905 show_pwm_temp_map, set_pwm_temp_map, 5);
1906 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1907 show_auto_temp, set_auto_temp, 2, 1);
1908 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1909 show_auto_temp, set_auto_temp, 2, 0);
1910 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1911 show_auto_temp, set_auto_temp, 2, 2);
1912 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1913 show_auto_temp, set_auto_temp, 2, 3);
1914 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1915 show_auto_pwm, set_auto_pwm, 5, 0);
1916 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1917 show_auto_pwm_slope, set_auto_pwm_slope, 5);
1920 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1923 struct it87_data *data = it87_update_device(dev);
1925 return sprintf(buf, "%u\n", data->alarms);
1927 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1929 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1932 struct it87_data *data = it87_update_device(dev);
1933 int bitnr = to_sensor_dev_attr(attr)->index;
1935 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1938 static ssize_t clear_intrusion(struct device *dev,
1939 struct device_attribute *attr, const char *buf,
1942 struct it87_data *data = dev_get_drvdata(dev);
1946 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1949 mutex_lock(&data->update_lock);
1950 config = it87_read_value(data, IT87_REG_CONFIG);
1955 it87_write_value(data, IT87_REG_CONFIG, config);
1956 /* Invalidate cache to force re-read */
1959 mutex_unlock(&data->update_lock);
1964 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1965 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1966 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1967 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1968 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1969 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1970 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1971 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1972 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1973 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1974 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1975 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1976 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1977 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1978 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1979 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1980 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1981 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1982 show_alarm, clear_intrusion, 4);
1984 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1987 struct it87_data *data = it87_update_device(dev);
1988 int bitnr = to_sensor_dev_attr(attr)->index;
1990 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1993 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1994 const char *buf, size_t count)
1996 int bitnr = to_sensor_dev_attr(attr)->index;
1997 struct it87_data *data = dev_get_drvdata(dev);
2000 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2003 mutex_lock(&data->update_lock);
2004 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2006 data->beeps |= BIT(bitnr);
2008 data->beeps &= ~BIT(bitnr);
2009 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2010 mutex_unlock(&data->update_lock);
2014 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2015 show_beep, set_beep, 1);
2016 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2017 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2018 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2019 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2020 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2021 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2022 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2023 /* fanX_beep writability is set later */
2024 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2025 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2026 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2027 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2028 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2029 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2030 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2031 show_beep, set_beep, 2);
2032 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2033 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2035 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2038 struct it87_data *data = dev_get_drvdata(dev);
2040 return sprintf(buf, "%u\n", data->vrm);
2043 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2044 const char *buf, size_t count)
2046 struct it87_data *data = dev_get_drvdata(dev);
2049 if (kstrtoul(buf, 10, &val) < 0)
2056 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2058 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2061 struct it87_data *data = it87_update_device(dev);
2063 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2065 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2067 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2070 static const char * const labels[] = {
2076 static const char * const labels_it8721[] = {
2082 struct it87_data *data = dev_get_drvdata(dev);
2083 int nr = to_sensor_dev_attr(attr)->index;
2086 if (has_vin3_5v(data) && nr == 0)
2088 else if (has_12mv_adc(data) || has_10_9mv_adc(data))
2089 label = labels_it8721[nr];
2093 return sprintf(buf, "%s\n", label);
2095 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2096 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2097 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2099 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2101 static umode_t it87_in_is_visible(struct kobject *kobj,
2102 struct attribute *attr, int index)
2104 struct device *dev = container_of(kobj, struct device, kobj);
2105 struct it87_data *data = dev_get_drvdata(dev);
2106 int i = index / 5; /* voltage index */
2107 int a = index % 5; /* attribute index */
2109 if (index >= 40) { /* in8 and higher only have input attributes */
2114 if (!(data->has_in & BIT(i)))
2117 if (a == 4 && !data->has_beep)
2123 static struct attribute *it87_attributes_in[] = {
2124 &sensor_dev_attr_in0_input.dev_attr.attr,
2125 &sensor_dev_attr_in0_min.dev_attr.attr,
2126 &sensor_dev_attr_in0_max.dev_attr.attr,
2127 &sensor_dev_attr_in0_alarm.dev_attr.attr,
2128 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
2130 &sensor_dev_attr_in1_input.dev_attr.attr,
2131 &sensor_dev_attr_in1_min.dev_attr.attr,
2132 &sensor_dev_attr_in1_max.dev_attr.attr,
2133 &sensor_dev_attr_in1_alarm.dev_attr.attr,
2134 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
2136 &sensor_dev_attr_in2_input.dev_attr.attr,
2137 &sensor_dev_attr_in2_min.dev_attr.attr,
2138 &sensor_dev_attr_in2_max.dev_attr.attr,
2139 &sensor_dev_attr_in2_alarm.dev_attr.attr,
2140 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
2142 &sensor_dev_attr_in3_input.dev_attr.attr,
2143 &sensor_dev_attr_in3_min.dev_attr.attr,
2144 &sensor_dev_attr_in3_max.dev_attr.attr,
2145 &sensor_dev_attr_in3_alarm.dev_attr.attr,
2146 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
2148 &sensor_dev_attr_in4_input.dev_attr.attr,
2149 &sensor_dev_attr_in4_min.dev_attr.attr,
2150 &sensor_dev_attr_in4_max.dev_attr.attr,
2151 &sensor_dev_attr_in4_alarm.dev_attr.attr,
2152 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
2154 &sensor_dev_attr_in5_input.dev_attr.attr,
2155 &sensor_dev_attr_in5_min.dev_attr.attr,
2156 &sensor_dev_attr_in5_max.dev_attr.attr,
2157 &sensor_dev_attr_in5_alarm.dev_attr.attr,
2158 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2160 &sensor_dev_attr_in6_input.dev_attr.attr,
2161 &sensor_dev_attr_in6_min.dev_attr.attr,
2162 &sensor_dev_attr_in6_max.dev_attr.attr,
2163 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2164 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2166 &sensor_dev_attr_in7_input.dev_attr.attr,
2167 &sensor_dev_attr_in7_min.dev_attr.attr,
2168 &sensor_dev_attr_in7_max.dev_attr.attr,
2169 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2170 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2172 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2173 &sensor_dev_attr_in9_input.dev_attr.attr, /* 41 */
2174 &sensor_dev_attr_in10_input.dev_attr.attr, /* 42 */
2175 &sensor_dev_attr_in11_input.dev_attr.attr, /* 43 */
2176 &sensor_dev_attr_in12_input.dev_attr.attr, /* 44 */
2180 static const struct attribute_group it87_group_in = {
2181 .attrs = it87_attributes_in,
2182 .is_visible = it87_in_is_visible,
2185 static umode_t it87_temp_is_visible(struct kobject *kobj,
2186 struct attribute *attr, int index)
2188 struct device *dev = container_of(kobj, struct device, kobj);
2189 struct it87_data *data = dev_get_drvdata(dev);
2190 int i = index / 7; /* temperature index */
2191 int a = index % 7; /* attribute index */
2198 if (!(data->has_temp & BIT(i)))
2201 if (a == 5 && !has_temp_offset(data))
2204 if (a == 6 && !data->has_beep)
2210 static struct attribute *it87_attributes_temp[] = {
2211 &sensor_dev_attr_temp1_input.dev_attr.attr,
2212 &sensor_dev_attr_temp1_max.dev_attr.attr,
2213 &sensor_dev_attr_temp1_min.dev_attr.attr,
2214 &sensor_dev_attr_temp1_type.dev_attr.attr,
2215 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2216 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2217 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2219 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2220 &sensor_dev_attr_temp2_max.dev_attr.attr,
2221 &sensor_dev_attr_temp2_min.dev_attr.attr,
2222 &sensor_dev_attr_temp2_type.dev_attr.attr,
2223 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2224 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2225 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2227 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2228 &sensor_dev_attr_temp3_max.dev_attr.attr,
2229 &sensor_dev_attr_temp3_min.dev_attr.attr,
2230 &sensor_dev_attr_temp3_type.dev_attr.attr,
2231 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2232 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2233 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2235 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2236 &sensor_dev_attr_temp5_input.dev_attr.attr,
2237 &sensor_dev_attr_temp6_input.dev_attr.attr,
2241 static const struct attribute_group it87_group_temp = {
2242 .attrs = it87_attributes_temp,
2243 .is_visible = it87_temp_is_visible,
2246 static umode_t it87_is_visible(struct kobject *kobj,
2247 struct attribute *attr, int index)
2249 struct device *dev = container_of(kobj, struct device, kobj);
2250 struct it87_data *data = dev_get_drvdata(dev);
2252 if ((index == 2 || index == 3) && !data->has_vid)
2255 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2261 static struct attribute *it87_attributes[] = {
2262 &dev_attr_alarms.attr,
2263 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2264 &dev_attr_vrm.attr, /* 2 */
2265 &dev_attr_cpu0_vid.attr, /* 3 */
2266 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2267 &sensor_dev_attr_in7_label.dev_attr.attr,
2268 &sensor_dev_attr_in8_label.dev_attr.attr,
2269 &sensor_dev_attr_in9_label.dev_attr.attr,
2273 static const struct attribute_group it87_group = {
2274 .attrs = it87_attributes,
2275 .is_visible = it87_is_visible,
2278 static umode_t it87_fan_is_visible(struct kobject *kobj,
2279 struct attribute *attr, int index)
2281 struct device *dev = container_of(kobj, struct device, kobj);
2282 struct it87_data *data = dev_get_drvdata(dev);
2283 int i = index / 5; /* fan index */
2284 int a = index % 5; /* attribute index */
2286 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2287 i = (index - 15) / 4 + 3;
2288 a = (index - 15) % 4;
2291 if (!(data->has_fan & BIT(i)))
2294 if (a == 3) { /* beep */
2295 if (!data->has_beep)
2297 /* first fan beep attribute is writable */
2298 if (i == __ffs(data->has_fan))
2299 return attr->mode | S_IWUSR;
2302 if (a == 4 && has_16bit_fans(data)) /* divisor */
2308 static struct attribute *it87_attributes_fan[] = {
2309 &sensor_dev_attr_fan1_input.dev_attr.attr,
2310 &sensor_dev_attr_fan1_min.dev_attr.attr,
2311 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2312 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2313 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2315 &sensor_dev_attr_fan2_input.dev_attr.attr,
2316 &sensor_dev_attr_fan2_min.dev_attr.attr,
2317 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2318 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2319 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2321 &sensor_dev_attr_fan3_input.dev_attr.attr,
2322 &sensor_dev_attr_fan3_min.dev_attr.attr,
2323 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2324 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2325 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2327 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2328 &sensor_dev_attr_fan4_min.dev_attr.attr,
2329 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2330 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2332 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2333 &sensor_dev_attr_fan5_min.dev_attr.attr,
2334 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2335 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2337 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2338 &sensor_dev_attr_fan6_min.dev_attr.attr,
2339 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2340 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2344 static const struct attribute_group it87_group_fan = {
2345 .attrs = it87_attributes_fan,
2346 .is_visible = it87_fan_is_visible,
2349 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2350 struct attribute *attr, int index)
2352 struct device *dev = container_of(kobj, struct device, kobj);
2353 struct it87_data *data = dev_get_drvdata(dev);
2354 int i = index / 4; /* pwm index */
2355 int a = index % 4; /* attribute index */
2357 if (!(data->has_pwm & BIT(i)))
2360 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2361 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2362 return attr->mode | S_IWUSR;
2364 /* pwm2_freq is writable if there are two pwm frequency selects */
2365 if (has_pwm_freq2(data) && i == 1 && a == 2)
2366 return attr->mode | S_IWUSR;
2371 static struct attribute *it87_attributes_pwm[] = {
2372 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2373 &sensor_dev_attr_pwm1.dev_attr.attr,
2374 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2375 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2377 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2378 &sensor_dev_attr_pwm2.dev_attr.attr,
2379 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2380 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2382 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2383 &sensor_dev_attr_pwm3.dev_attr.attr,
2384 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2385 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2387 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2388 &sensor_dev_attr_pwm4.dev_attr.attr,
2389 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2390 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2392 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2393 &sensor_dev_attr_pwm5.dev_attr.attr,
2394 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2395 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2397 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2398 &sensor_dev_attr_pwm6.dev_attr.attr,
2399 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2400 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2405 static const struct attribute_group it87_group_pwm = {
2406 .attrs = it87_attributes_pwm,
2407 .is_visible = it87_pwm_is_visible,
2410 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2411 struct attribute *attr, int index)
2413 struct device *dev = container_of(kobj, struct device, kobj);
2414 struct it87_data *data = dev_get_drvdata(dev);
2415 int i = index / 11; /* pwm index */
2416 int a = index % 11; /* attribute index */
2418 if (index >= 33) { /* pwm 4..6 */
2419 i = (index - 33) / 6 + 3;
2420 a = (index - 33) % 6 + 4;
2423 if (!(data->has_pwm & BIT(i)))
2426 if (has_newer_autopwm(data)) {
2427 if (a < 4) /* no auto point pwm */
2429 if (a == 8) /* no auto_point4 */
2432 if (has_old_autopwm(data)) {
2433 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2440 static struct attribute *it87_attributes_auto_pwm[] = {
2441 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2442 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2443 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2444 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2445 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2446 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2447 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2448 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2449 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2450 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2451 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2453 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2454 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2455 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2456 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2457 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2458 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2459 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2460 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2461 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2462 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2463 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2465 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2466 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2467 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2468 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2469 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2470 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2471 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2472 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2473 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2474 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2475 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2477 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2478 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2479 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2480 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2481 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2482 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2484 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2485 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2486 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2487 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2488 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2489 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2491 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2492 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2493 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2494 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2495 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2496 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2501 static const struct attribute_group it87_group_auto_pwm = {
2502 .attrs = it87_attributes_auto_pwm,
2503 .is_visible = it87_auto_pwm_is_visible,
2506 /* SuperIO detection - will change isa_address if a chip is found */
2507 static int __init it87_find(int sioaddr, unsigned short *address,
2508 struct it87_sio_data *sio_data)
2512 const char *board_vendor, *board_name;
2513 const struct it87_devices *config;
2515 err = superio_enter(sioaddr);
2520 chip_type = superio_inw(sioaddr, DEVID);
2521 if (chip_type == 0xffff)
2525 chip_type = force_id;
2527 switch (chip_type) {
2529 sio_data->type = it87;
2532 sio_data->type = it8712;
2536 sio_data->type = it8716;
2539 sio_data->type = it8718;
2542 sio_data->type = it8720;
2545 sio_data->type = it8721;
2548 sio_data->type = it8728;
2551 sio_data->type = it8732;
2554 sio_data->type = it8792;
2557 sio_data->type = it8771;
2560 sio_data->type = it8772;
2563 sio_data->type = it8781;
2566 sio_data->type = it8782;
2569 sio_data->type = it8783;
2572 sio_data->type = it8786;
2575 sio_data->type = it8790;
2579 sio_data->type = it8603;
2582 sio_data->type = it8607;
2585 sio_data->type = it8620;
2588 sio_data->type = it8622;
2591 sio_data->type = it8628;
2594 sio_data->type = it8655;
2597 sio_data->type = it8665;
2600 sio_data->type = it8686;
2602 case 0xffff: /* No device at all */
2605 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2609 superio_select(sioaddr, PME);
2610 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2611 pr_info("Device not activated, skipping\n");
2615 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2616 if (*address == 0) {
2617 pr_info("Base address not set, skipping\n");
2622 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2623 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2624 it87_devices[sio_data->type].suffix,
2625 *address, sio_data->revision);
2627 config = &it87_devices[sio_data->type];
2629 /* in7 (VSB or VCCH5V) is always internal on some chips */
2630 if (has_in7_internal(config))
2631 sio_data->internal |= BIT(1);
2633 /* in8 (Vbat) is always internal */
2634 sio_data->internal |= BIT(2);
2636 /* in9 (AVCC3), always internal if supported */
2637 if (has_avcc3(config))
2638 sio_data->internal |= BIT(3); /* in9 is AVCC */
2640 sio_data->skip_in |= BIT(9);
2642 if (!has_four_pwm(config))
2643 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2644 else if (!has_five_pwm(config))
2645 sio_data->skip_pwm |= BIT(4) | BIT(5);
2646 else if (!has_six_pwm(config))
2647 sio_data->skip_pwm |= BIT(5);
2649 if (!has_vid(config))
2650 sio_data->skip_vid = 1;
2652 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2653 if (sio_data->type == it87) {
2654 /* The IT8705F has a different LD number for GPIO */
2655 superio_select(sioaddr, 5);
2656 sio_data->beep_pin = superio_inb(sioaddr,
2657 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2658 } else if (sio_data->type == it8783) {
2659 int reg25, reg27, reg2a, reg2c, regef;
2661 superio_select(sioaddr, GPIO);
2663 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2664 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2665 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2666 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2667 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2669 /* Check if fan3 is there or not */
2670 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2671 sio_data->skip_fan |= BIT(2);
2672 if ((reg25 & BIT(4)) ||
2673 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2674 sio_data->skip_pwm |= BIT(2);
2676 /* Check if fan2 is there or not */
2678 sio_data->skip_fan |= BIT(1);
2680 sio_data->skip_pwm |= BIT(1);
2683 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2684 sio_data->skip_in |= BIT(5); /* No VIN5 */
2688 sio_data->skip_in |= BIT(6); /* No VIN6 */
2692 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2694 if (reg27 & BIT(2)) {
2696 * The data sheet is a bit unclear regarding the
2697 * internal voltage divider for VCCH5V. It says
2698 * "This bit enables and switches VIN7 (pin 91) to the
2699 * internal voltage divider for VCCH5V".
2700 * This is different to other chips, where the internal
2701 * voltage divider would connect VIN7 to an internal
2702 * voltage source. Maybe that is the case here as well.
2704 * Since we don't know for sure, re-route it if that is
2705 * not the case, and ask the user to report if the
2706 * resulting voltage is sane.
2708 if (!(reg2c & BIT(1))) {
2710 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2712 pr_notice("Routing internal VCCH5V to in7.\n");
2714 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2715 pr_notice("Please report if it displays a reasonable voltage.\n");
2719 sio_data->internal |= BIT(0);
2721 sio_data->internal |= BIT(1);
2723 sio_data->beep_pin = superio_inb(sioaddr,
2724 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2725 } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2728 superio_select(sioaddr, GPIO);
2730 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2732 /* Check if fan3 is there or not */
2734 sio_data->skip_pwm |= BIT(2);
2736 sio_data->skip_fan |= BIT(2);
2738 /* Check if fan2 is there or not */
2739 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2741 sio_data->skip_pwm |= BIT(1);
2743 sio_data->skip_fan |= BIT(1);
2745 if (sio_data->type == it8603) {
2746 sio_data->skip_in |= BIT(5); /* No VIN5 */
2747 sio_data->skip_in |= BIT(6); /* No VIN6 */
2750 sio_data->beep_pin = superio_inb(sioaddr,
2751 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2752 } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
2753 sio_data->type == it8686) {
2756 superio_select(sioaddr, GPIO);
2758 /* Check for pwm5 */
2759 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2761 sio_data->skip_pwm |= BIT(4);
2763 /* Check for fan4, fan5 */
2764 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2765 if (!(reg & BIT(5)))
2766 sio_data->skip_fan |= BIT(3);
2767 if (!(reg & BIT(4)))
2768 sio_data->skip_fan |= BIT(4);
2770 /* Check for pwm3, fan3 */
2771 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2773 sio_data->skip_pwm |= BIT(2);
2775 sio_data->skip_fan |= BIT(2);
2777 /* Check for pwm4 */
2778 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2780 sio_data->skip_pwm |= BIT(3);
2782 /* Check for pwm2, fan2 */
2783 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2785 sio_data->skip_pwm |= BIT(1);
2787 sio_data->skip_fan |= BIT(1);
2788 /* Check for pwm6, fan6 */
2789 if (!(reg & BIT(7))) {
2790 sio_data->skip_pwm |= BIT(5);
2791 sio_data->skip_fan |= BIT(5);
2794 /* Check if AVCC is on VIN3 */
2795 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2797 /* For it8686, the bit just enables AVCC3 */
2798 if (sio_data->type != it8686)
2799 sio_data->internal |= BIT(0);
2801 sio_data->internal &= ~BIT(3);
2802 sio_data->skip_in |= BIT(9);
2805 sio_data->beep_pin = superio_inb(sioaddr,
2806 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2807 } else if (sio_data->type == it8622) {
2810 superio_select(sioaddr, GPIO);
2812 /* Check for pwm4, fan4 */
2813 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2815 sio_data->skip_fan |= BIT(3);
2817 sio_data->skip_pwm |= BIT(3);
2819 /* Check for pwm3, fan3, pwm5, fan5 */
2820 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2822 sio_data->skip_pwm |= BIT(2);
2824 sio_data->skip_fan |= BIT(2);
2826 sio_data->skip_pwm |= BIT(4);
2828 sio_data->skip_fan |= BIT(4);
2830 /* Check for pwm2, fan2 */
2831 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2833 sio_data->skip_pwm |= BIT(1);
2835 sio_data->skip_fan |= BIT(1);
2837 /* Check for AVCC */
2838 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2839 if (!(reg & BIT(0)))
2840 sio_data->skip_in |= BIT(9);
2842 sio_data->beep_pin = superio_inb(sioaddr,
2843 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2844 } else if (sio_data->type == it8732) {
2847 superio_select(sioaddr, GPIO);
2849 /* Check for pwm2, fan2 */
2850 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2852 sio_data->skip_pwm |= BIT(1);
2854 sio_data->skip_fan |= BIT(1);
2856 /* Check for pwm3, fan3, fan4 */
2857 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2859 sio_data->skip_pwm |= BIT(2);
2861 sio_data->skip_fan |= BIT(2);
2863 sio_data->skip_fan |= BIT(3);
2865 /* Check if AVCC is on VIN3 */
2866 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2868 sio_data->internal |= BIT(0);
2870 sio_data->beep_pin = superio_inb(sioaddr,
2871 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2872 } else if (sio_data->type == it8655) {
2875 superio_select(sioaddr, GPIO);
2877 /* Check for pwm2 */
2878 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2880 sio_data->skip_pwm |= BIT(1);
2882 /* Check for fan2 */
2883 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2885 sio_data->skip_fan |= BIT(1);
2887 /* Check for pwm3, fan3 */
2888 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2890 sio_data->skip_pwm |= BIT(2);
2892 sio_data->skip_fan |= BIT(2);
2894 sio_data->beep_pin = superio_inb(sioaddr,
2895 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2896 } else if (sio_data->type == it8665) {
2899 superio_select(sioaddr, GPIO);
2901 /* Check for pwm2 */
2902 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2904 sio_data->skip_pwm |= BIT(1);
2906 /* Check for fan2 */
2907 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
2909 sio_data->skip_fan |= BIT(1);
2911 /* Check for pwm3, fan3 */
2912 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2914 sio_data->skip_pwm |= BIT(2);
2916 sio_data->skip_fan |= BIT(2);
2918 /* Check for pwm5, fan5 */
2919 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2921 sio_data->skip_pwm |= BIT(4);
2922 if (!(reg & BIT(4)))
2923 sio_data->skip_fan |= BIT(4);
2925 /* Check for pwm4, fan4, pwm6, fan6 */
2926 reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
2928 sio_data->skip_pwm |= BIT(3);
2930 sio_data->skip_fan |= BIT(3);
2932 sio_data->skip_pwm |= BIT(5);
2934 sio_data->skip_fan |= BIT(5);
2936 sio_data->beep_pin = superio_inb(sioaddr,
2937 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2942 superio_select(sioaddr, GPIO);
2944 /* Check for fan4, fan5 */
2945 if (has_five_fans(config)) {
2946 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2947 switch (sio_data->type) {
2950 sio_data->skip_fan |= BIT(3);
2952 sio_data->skip_fan |= BIT(4);
2957 if (!(reg & BIT(5)))
2958 sio_data->skip_fan |= BIT(3);
2959 if (!(reg & BIT(4)))
2960 sio_data->skip_fan |= BIT(4);
2967 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2968 if (!sio_data->skip_vid) {
2969 /* We need at least 4 VID pins */
2971 pr_info("VID is disabled (pins used for GPIO)\n");
2972 sio_data->skip_vid = 1;
2976 /* Check if fan3 is there or not */
2978 sio_data->skip_pwm |= BIT(2);
2980 sio_data->skip_fan |= BIT(2);
2982 /* Check if fan2 is there or not */
2983 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2985 sio_data->skip_pwm |= BIT(1);
2987 sio_data->skip_fan |= BIT(1);
2989 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2990 !(sio_data->skip_vid))
2991 sio_data->vid_value = superio_inb(sioaddr,
2994 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2996 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2999 * The IT8720F has no VIN7 pin, so VCCH should always be
3000 * routed internally to VIN7 with an internal divider.
3001 * Curiously, there still is a configuration bit to control
3002 * this, which means it can be set incorrectly. And even
3003 * more curiously, many boards out there are improperly
3004 * configured, even though the IT8720F datasheet claims
3005 * that the internal routing of VCCH to VIN7 is the default
3006 * setting. So we force the internal routing in this case.
3008 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3009 * If UART6 is enabled, re-route VIN7 to the internal divider
3010 * if that is not already the case.
3012 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3014 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3015 pr_notice("Routing internal VCCH to in7\n");
3018 sio_data->internal |= BIT(0);
3020 sio_data->internal |= BIT(1);
3023 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3024 * While VIN7 can be routed to the internal voltage divider,
3025 * VIN5 and VIN6 are not available if UART6 is enabled.
3027 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3028 * is the temperature source. Since we can not read the
3029 * temperature source here, skip_temp is preliminary.
3032 sio_data->skip_in |= BIT(5) | BIT(6);
3033 sio_data->skip_temp |= BIT(2);
3036 sio_data->beep_pin = superio_inb(sioaddr,
3037 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3039 if (sio_data->beep_pin)
3040 pr_info("Beeping is supported\n");
3042 /* Disable specific features based on DMI strings */
3043 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3044 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3045 if (board_vendor && board_name) {
3046 if (strcmp(board_vendor, "nVIDIA") == 0 &&
3047 strcmp(board_name, "FN68PT") == 0) {
3049 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3050 * connected to a fan, but to something else. One user
3051 * has reported instant system power-off when changing
3052 * the PWM2 duty cycle, so we disable it.
3053 * I use the board name string as the trigger in case
3054 * the same board is ever used in other systems.
3056 pr_info("Disabling pwm2 due to hardware constraints\n");
3057 sio_data->skip_pwm = BIT(1);
3062 superio_exit(sioaddr);
3066 /* Called when we have found a new IT87. */
3067 static void it87_init_device(struct platform_device *pdev)
3069 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3070 struct it87_data *data = platform_get_drvdata(pdev);
3074 /* Initialize chip specific register pointers */
3075 switch (data->type) {
3078 data->REG_FAN = IT87_REG_FAN_8665;
3079 data->REG_FANX = IT87_REG_FANX_8665;
3080 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3081 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3082 data->REG_PWM = IT87_REG_PWM_8665;
3085 data->REG_FAN = IT87_REG_FAN;
3086 data->REG_FANX = IT87_REG_FANX;
3087 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3088 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3089 data->REG_PWM = IT87_REG_PWM_8665;
3092 data->REG_FAN = IT87_REG_FAN;
3093 data->REG_FANX = IT87_REG_FANX;
3094 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3095 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3096 data->REG_PWM = IT87_REG_PWM;
3101 * For each PWM channel:
3102 * - If it is in automatic mode, setting to manual mode should set
3103 * the fan to full speed by default.
3104 * - If it is in manual mode, we need a mapping to temperature
3105 * channels to use when later setting to automatic mode later.
3106 * Use a 1:1 mapping by default (we are clueless.)
3107 * In both cases, the value can (and should) be changed by the user
3108 * prior to switching to a different mode.
3109 * Note that this is no longer needed for the IT8721F and later, as
3110 * these have separate registers for the temperature mapping and the
3111 * manual duty cycle.
3113 for (i = 0; i < NUM_AUTO_PWM; i++) {
3114 data->pwm_temp_map[i] = i;
3115 data->pwm_duty[i] = 0x7f; /* Full speed */
3116 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
3120 * Some chips seem to have default value 0xff for all limit
3121 * registers. For low voltage limits it makes no sense and triggers
3122 * alarms, so change to 0 instead. For high temperature limits, it
3123 * means -1 degree C, which surprisingly doesn't trigger an alarm,
3124 * but is still confusing, so change to 127 degrees C.
3126 for (i = 0; i < NUM_VIN_LIMIT; i++) {
3127 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3129 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3131 for (i = 0; i < NUM_TEMP_LIMIT; i++) {
3132 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
3134 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
3138 * Temperature channels are not forcibly enabled, as they can be
3139 * set to two different sensor types and we can't guess which one
3140 * is correct for a given system. These channels can be enabled at
3141 * run-time through the temp{1-3}_type sysfs accessors if needed.
3144 /* Check if voltage monitors are reset manually or by some reason */
3145 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3146 if ((tmp & 0xff) == 0) {
3147 /* Enable all voltage monitors */
3148 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3151 /* Check if tachometers are reset manually or by some reason */
3152 mask = 0x70 & ~(sio_data->skip_fan << 4);
3153 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3154 if ((data->fan_main_ctrl & mask) == 0) {
3155 /* Enable all fan tachometers */
3156 data->fan_main_ctrl |= mask;
3157 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3158 data->fan_main_ctrl);
3160 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3162 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3164 /* Set tachometers to 16-bit mode if needed */
3165 if (has_fan16_config(data)) {
3166 if (~tmp & 0x07 & data->has_fan) {
3168 "Setting fan1-3 to 16-bit mode\n");
3169 it87_write_value(data, IT87_REG_FAN_16BIT,
3174 /* Check for additional fans */
3175 if (has_four_fans(data) && (tmp & BIT(4)))
3176 data->has_fan |= BIT(3); /* fan4 enabled */
3177 if (has_five_fans(data) && (tmp & BIT(5)))
3178 data->has_fan |= BIT(4); /* fan5 enabled */
3179 if (has_six_fans(data)) {
3180 switch (data->type) {
3185 data->has_fan |= BIT(5); /* fan6 enabled */
3188 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3190 data->has_fan |= BIT(5); /* fan6 enabled */
3197 /* Fan input pins may be used for alternative functions */
3198 data->has_fan &= ~sio_data->skip_fan;
3200 /* Check if pwm6 is enabled */
3201 if (has_six_pwm(data)) {
3202 switch (data->type) {
3205 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3206 if (!(tmp & BIT(3)))
3207 sio_data->skip_pwm |= BIT(5);
3214 /* Start monitoring */
3215 it87_write_value(data, IT87_REG_CONFIG,
3216 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3217 | (update_vbat ? 0x41 : 0x01));
3220 /* Return 1 if and only if the PWM interface is safe to use */
3221 static int it87_check_pwm(struct device *dev)
3223 struct it87_data *data = dev_get_drvdata(dev);
3225 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3226 * and polarity set to active low is sign that this is the case so we
3227 * disable pwm control to protect the user.
3229 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3231 if ((tmp & 0x87) == 0) {
3232 if (fix_pwm_polarity) {
3234 * The user asks us to attempt a chip reconfiguration.
3235 * This means switching to active high polarity and
3236 * inverting all fan speed values.
3241 for (i = 0; i < ARRAY_SIZE(pwm); i++)
3242 pwm[i] = it87_read_value(data,
3246 * If any fan is in automatic pwm mode, the polarity
3247 * might be correct, as suspicious as it seems, so we
3248 * better don't change anything (but still disable the
3251 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3253 "Reconfiguring PWM to active high polarity\n");
3254 it87_write_value(data, IT87_REG_FAN_CTL,
3256 for (i = 0; i < 3; i++)
3257 it87_write_value(data,
3264 "PWM configuration is too broken to be fixed\n");
3268 "Detected broken BIOS defaults, disabling PWM interface\n");
3270 } else if (fix_pwm_polarity) {
3272 "PWM configuration looks sane, won't touch\n");
3278 static int it87_probe(struct platform_device *pdev)
3280 struct it87_data *data;
3281 struct resource *res;
3282 struct device *dev = &pdev->dev;
3283 struct it87_sio_data *sio_data = dev_get_platdata(dev);
3284 int enable_pwm_interface;
3285 struct device *hwmon_dev;
3287 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3288 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3290 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3291 (unsigned long)res->start,
3292 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3296 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3300 data->addr = res->start;
3301 data->type = sio_data->type;
3302 data->features = it87_devices[sio_data->type].features;
3303 data->peci_mask = it87_devices[sio_data->type].peci_mask;
3304 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3308 * IT8705F Datasheet 0.4.1, 3h == Version G.
3309 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3310 * These are the first revisions with 16-bit tachometer support.
3312 switch (data->type) {
3314 if (sio_data->revision >= 0x03) {
3315 data->features &= ~FEAT_OLD_AUTOPWM;
3316 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3320 if (sio_data->revision >= 0x08) {
3321 data->features &= ~FEAT_OLD_AUTOPWM;
3322 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3330 /* Now, we do the remaining detection. */
3331 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3332 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3335 platform_set_drvdata(pdev, data);
3337 mutex_init(&data->update_lock);
3339 /* Check PWM configuration */
3340 enable_pwm_interface = it87_check_pwm(dev);
3342 /* Starting with IT8721F, we handle scaling of internal voltages */
3343 if (has_scaling(data)) {
3344 if (sio_data->internal & BIT(0))
3345 data->in_scaled |= BIT(3); /* in3 is AVCC */
3346 if (sio_data->internal & BIT(1))
3347 data->in_scaled |= BIT(7); /* in7 is VSB */
3348 if (sio_data->internal & BIT(2))
3349 data->in_scaled |= BIT(8); /* in8 is Vbat */
3350 if (sio_data->internal & BIT(3))
3351 data->in_scaled |= BIT(9); /* in9 is AVCC */
3352 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3353 sio_data->type == it8783) {
3354 if (sio_data->internal & BIT(0))
3355 data->in_scaled |= BIT(3); /* in3 is VCC5V */
3356 if (sio_data->internal & BIT(1))
3357 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
3360 data->has_temp = 0x07;
3361 if (sio_data->skip_temp & BIT(2)) {
3362 if (sio_data->type == it8782 &&
3363 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3364 data->has_temp &= ~BIT(2);
3367 data->in_internal = sio_data->internal;
3368 data->has_in = 0x3ff & ~sio_data->skip_in;
3370 if (has_six_temp(data)) {
3371 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3373 /* Check for additional temperature sensors */
3374 if ((reg & 0x03) >= 0x02)
3375 data->has_temp |= BIT(3);
3376 if (((reg >> 2) & 0x03) >= 0x02)
3377 data->has_temp |= BIT(4);
3378 if (((reg >> 4) & 0x03) >= 0x02)
3379 data->has_temp |= BIT(5);
3381 /* Check for additional voltage sensors */
3382 if ((reg & 0x03) == 0x01)
3383 data->has_in |= BIT(10);
3384 if (((reg >> 2) & 0x03) == 0x01)
3385 data->has_in |= BIT(11);
3386 if (((reg >> 4) & 0x03) == 0x01)
3387 data->has_in |= BIT(12);
3390 data->has_beep = !!sio_data->beep_pin;
3392 /* Initialize the IT87 chip */
3393 it87_init_device(pdev);
3395 if (!sio_data->skip_vid) {
3396 data->has_vid = true;
3397 data->vrm = vid_which_vrm();
3398 /* VID reading from Super-I/O config space if available */
3399 data->vid = sio_data->vid_value;
3402 /* Prepare for sysfs hooks */
3403 data->groups[0] = &it87_group;
3404 data->groups[1] = &it87_group_in;
3405 data->groups[2] = &it87_group_temp;
3406 data->groups[3] = &it87_group_fan;
3408 if (enable_pwm_interface) {
3409 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3410 data->has_pwm &= ~sio_data->skip_pwm;
3412 data->groups[4] = &it87_group_pwm;
3413 if (has_old_autopwm(data) || has_newer_autopwm(data))
3414 data->groups[5] = &it87_group_auto_pwm;
3417 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3418 it87_devices[sio_data->type].name,
3419 data, data->groups);
3420 return PTR_ERR_OR_ZERO(hwmon_dev);
3423 static struct platform_driver it87_driver = {
3427 .probe = it87_probe,
3430 static int __init it87_device_add(int index, unsigned short address,
3431 const struct it87_sio_data *sio_data)
3433 struct platform_device *pdev;
3434 struct resource res = {
3435 .start = address + IT87_EC_OFFSET,
3436 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3438 .flags = IORESOURCE_IO,
3442 err = acpi_check_resource_conflict(&res);
3446 pdev = platform_device_alloc(DRVNAME, address);
3450 err = platform_device_add_resources(pdev, &res, 1);
3452 pr_err("Device resource addition failed (%d)\n", err);
3453 goto exit_device_put;
3456 err = platform_device_add_data(pdev, sio_data,
3457 sizeof(struct it87_sio_data));
3459 pr_err("Platform data allocation failed\n");
3460 goto exit_device_put;
3463 err = platform_device_add(pdev);
3465 pr_err("Device addition failed (%d)\n", err);
3466 goto exit_device_put;
3469 it87_pdev[index] = pdev;
3473 platform_device_put(pdev);
3477 static int __init sm_it87_init(void)
3479 int sioaddr[2] = { REG_2E, REG_4E };
3480 struct it87_sio_data sio_data;
3481 unsigned short isa_address;
3485 err = platform_driver_register(&it87_driver);
3489 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3490 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3492 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3493 if (err || isa_address == 0)
3496 err = it87_device_add(i, isa_address, &sio_data);
3498 goto exit_dev_unregister;
3504 goto exit_unregister;
3508 exit_dev_unregister:
3509 /* NULL check handled by platform_device_unregister */
3510 platform_device_unregister(it87_pdev[0]);
3512 platform_driver_unregister(&it87_driver);
3516 static void __exit sm_it87_exit(void)
3518 /* NULL check handled by platform_device_unregister */
3519 platform_device_unregister(it87_pdev[1]);
3520 platform_device_unregister(it87_pdev[0]);
3521 platform_driver_unregister(&it87_driver);
3524 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3525 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3526 module_param(update_vbat, bool, 0);
3527 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3528 module_param(fix_pwm_polarity, bool, 0);
3529 MODULE_PARM_DESC(fix_pwm_polarity,
3530 "Force PWM polarity to active high (DANGEROUS)");
3531 MODULE_LICENSE("GPL");
3533 module_init(sm_it87_init);
3534 module_exit(sm_it87_exit);